intel/nir: Add 1-bit opcodes to brw_cmod_for_nir_comparison_op
[mesa.git] / src / gallium / drivers / lima / lima_screen.c
1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "ir/lima_ir.h"
42
43 #include "xf86drm.h"
44
45 int lima_plb_max_blk = 0;
46
47 static void
48 lima_screen_destroy(struct pipe_screen *pscreen)
49 {
50 struct lima_screen *screen = lima_screen(pscreen);
51
52 if (lima_dump_command_stream) {
53 fclose(lima_dump_command_stream);
54 lima_dump_command_stream = NULL;
55 }
56
57 slab_destroy_parent(&screen->transfer_pool);
58
59 if (screen->ro)
60 free(screen->ro);
61
62 if (screen->pp_buffer)
63 lima_bo_free(screen->pp_buffer);
64
65 lima_bo_table_fini(screen);
66 ralloc_free(screen);
67 }
68
69 static const char *
70 lima_screen_get_name(struct pipe_screen *pscreen)
71 {
72 struct lima_screen *screen = lima_screen(pscreen);
73
74 switch (screen->gpu_type) {
75 case DRM_LIMA_PARAM_GPU_ID_MALI400:
76 return "Mali400";
77 case DRM_LIMA_PARAM_GPU_ID_MALI450:
78 return "Mali450";
79 }
80
81 return NULL;
82 }
83
84 static const char *
85 lima_screen_get_vendor(struct pipe_screen *pscreen)
86 {
87 return "lima";
88 }
89
90 static const char *
91 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
92 {
93 return "ARM";
94 }
95
96 static int
97 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
98 {
99 switch (param) {
100 case PIPE_CAP_NPOT_TEXTURES:
101 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
102 case PIPE_CAP_ACCELERATED:
103 case PIPE_CAP_UMA:
104 case PIPE_CAP_NATIVE_FENCE_FD:
105 return 1;
106
107 /* Unimplemented, but for exporting OpenGL 2.0 */
108 case PIPE_CAP_OCCLUSION_QUERY:
109 case PIPE_CAP_POINT_SPRITE:
110 return 1;
111
112 /* not clear supported */
113 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
115 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
117 return 1;
118
119 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
120 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
121 return 1;
122
123 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
124 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
125 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
126 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
127 return LIMA_MAX_MIP_LEVELS;
128
129 case PIPE_CAP_VENDOR_ID:
130 return 0x13B5;
131
132 case PIPE_CAP_VIDEO_MEMORY:
133 return 0;
134
135 case PIPE_CAP_PCI_GROUP:
136 case PIPE_CAP_PCI_BUS:
137 case PIPE_CAP_PCI_DEVICE:
138 case PIPE_CAP_PCI_FUNCTION:
139 return 0;
140
141 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
142 return 0;
143
144 default:
145 return u_pipe_screen_get_param_defaults(pscreen, param);
146 }
147 }
148
149 static float
150 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
151 {
152 switch (param) {
153 case PIPE_CAPF_MAX_LINE_WIDTH:
154 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
155 case PIPE_CAPF_MAX_POINT_WIDTH:
156 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
157 return 255.0f;
158 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
159 return 16.0f;
160 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
161 return 16.0f;
162
163 default:
164 return 0.0f;
165 }
166 }
167
168 static int
169 get_vertex_shader_param(struct lima_screen *screen,
170 enum pipe_shader_cap param)
171 {
172 switch (param) {
173 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
174 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
175 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
176 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
177 return 16384; /* need investigate */
178
179 case PIPE_SHADER_CAP_MAX_INPUTS:
180 return 16; /* attributes */
181
182 case PIPE_SHADER_CAP_MAX_OUTPUTS:
183 return LIMA_MAX_VARYING_NUM; /* varying */
184
185 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
186 return 4096; /* need investigate */
187 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
188 return 1;
189
190 case PIPE_SHADER_CAP_PREFERRED_IR:
191 return PIPE_SHADER_IR_NIR;
192
193 case PIPE_SHADER_CAP_MAX_TEMPS:
194 return 256; /* need investigate */
195
196 default:
197 return 0;
198 }
199 }
200
201 static int
202 get_fragment_shader_param(struct lima_screen *screen,
203 enum pipe_shader_cap param)
204 {
205 switch (param) {
206 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
207 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
208 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
209 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
210 return 16384; /* need investigate */
211
212 case PIPE_SHADER_CAP_MAX_INPUTS:
213 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
214
215 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
216 return 4096; /* need investigate */
217 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
218 return 1;
219
220 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
221 return 16; /* need investigate */
222
223 case PIPE_SHADER_CAP_PREFERRED_IR:
224 return PIPE_SHADER_IR_NIR;
225
226 case PIPE_SHADER_CAP_MAX_TEMPS:
227 return 256; /* need investigate */
228
229 default:
230 return 0;
231 }
232 }
233
234 static int
235 lima_screen_get_shader_param(struct pipe_screen *pscreen,
236 enum pipe_shader_type shader,
237 enum pipe_shader_cap param)
238 {
239 struct lima_screen *screen = lima_screen(pscreen);
240
241 switch (shader) {
242 case PIPE_SHADER_FRAGMENT:
243 return get_fragment_shader_param(screen, param);
244 case PIPE_SHADER_VERTEX:
245 return get_vertex_shader_param(screen, param);
246
247 default:
248 return 0;
249 }
250 }
251
252 static bool
253 lima_screen_is_format_supported(struct pipe_screen *pscreen,
254 enum pipe_format format,
255 enum pipe_texture_target target,
256 unsigned sample_count,
257 unsigned storage_sample_count,
258 unsigned usage)
259 {
260 switch (target) {
261 case PIPE_BUFFER:
262 case PIPE_TEXTURE_1D:
263 case PIPE_TEXTURE_2D:
264 break;
265 default:
266 return false;
267 }
268
269 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
270 return false;
271
272 /* be able to support 16, now limit to 4 */
273 if (sample_count > 1 && sample_count != 4)
274 return false;
275
276 if (usage & PIPE_BIND_RENDER_TARGET) {
277 switch (format) {
278 case PIPE_FORMAT_B8G8R8A8_UNORM:
279 case PIPE_FORMAT_B8G8R8X8_UNORM:
280 case PIPE_FORMAT_R8G8B8A8_UNORM:
281 case PIPE_FORMAT_R8G8B8X8_UNORM:
282 case PIPE_FORMAT_Z16_UNORM:
283 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
284 case PIPE_FORMAT_Z24X8_UNORM:
285 break;
286 default:
287 return false;
288 }
289 }
290
291 if (usage & PIPE_BIND_DEPTH_STENCIL) {
292 switch (format) {
293 case PIPE_FORMAT_Z16_UNORM:
294 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
295 case PIPE_FORMAT_Z24X8_UNORM:
296 break;
297 default:
298 return false;
299 }
300 }
301
302 if (usage & PIPE_BIND_VERTEX_BUFFER) {
303 switch (format) {
304 case PIPE_FORMAT_R32G32B32_FLOAT:
305 break;
306 default:
307 return false;
308 }
309 }
310
311 if (usage & PIPE_BIND_INDEX_BUFFER) {
312 switch (format) {
313 case PIPE_FORMAT_I8_UINT:
314 case PIPE_FORMAT_I16_UINT:
315 case PIPE_FORMAT_I32_UINT:
316 break;
317 default:
318 return false;
319 }
320 }
321
322 if (usage & PIPE_BIND_SAMPLER_VIEW) {
323 switch (format) {
324 case PIPE_FORMAT_R8G8B8X8_UNORM:
325 case PIPE_FORMAT_R8G8B8A8_UNORM:
326 case PIPE_FORMAT_B8G8R8X8_UNORM:
327 case PIPE_FORMAT_B8G8R8A8_UNORM:
328 case PIPE_FORMAT_A8B8G8R8_SRGB:
329 case PIPE_FORMAT_B8G8R8A8_SRGB:
330 case PIPE_FORMAT_Z16_UNORM:
331 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
332 case PIPE_FORMAT_Z24X8_UNORM:
333 break;
334 default:
335 return false;
336 }
337 }
338
339 return true;
340 }
341
342 static const void *
343 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
344 enum pipe_shader_ir ir,
345 enum pipe_shader_type shader)
346 {
347 return lima_program_get_compiler_options(shader);
348 }
349
350 static bool
351 lima_screen_set_plb_max_blk(struct lima_screen *screen)
352 {
353 if (lima_plb_max_blk) {
354 screen->plb_max_blk = lima_plb_max_blk;
355 return true;
356 }
357
358 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
359 screen->plb_max_blk = 4096;
360 else
361 screen->plb_max_blk = 512;
362
363 drmDevicePtr devinfo;
364
365 if (drmGetDevice2(screen->fd, 0, &devinfo))
366 return false;
367
368 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
369 char **compatible = devinfo->deviceinfo.platform->compatible;
370
371 if (compatible && *compatible)
372 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
373 screen->plb_max_blk = 2048;
374 }
375
376 drmFreeDevice(&devinfo);
377
378 return true;
379 }
380
381 static bool
382 lima_screen_query_info(struct lima_screen *screen)
383 {
384 struct drm_lima_get_param param;
385
386 memset(&param, 0, sizeof(param));
387 param.param = DRM_LIMA_PARAM_GPU_ID;
388 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
389 return false;
390
391 switch (param.value) {
392 case DRM_LIMA_PARAM_GPU_ID_MALI400:
393 case DRM_LIMA_PARAM_GPU_ID_MALI450:
394 screen->gpu_type = param.value;
395 break;
396 default:
397 return false;
398 }
399
400 memset(&param, 0, sizeof(param));
401 param.param = DRM_LIMA_PARAM_NUM_PP;
402 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
403 return false;
404
405 screen->num_pp = param.value;
406
407 lima_screen_set_plb_max_blk(screen);
408
409 return true;
410 }
411
412 static void
413 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
414 enum pipe_format format, int max,
415 uint64_t *modifiers,
416 unsigned int *external_only,
417 int *count)
418 {
419 uint64_t available_modifiers[] = {
420 DRM_FORMAT_MOD_LINEAR,
421 };
422
423 if (!modifiers) {
424 *count = ARRAY_SIZE(available_modifiers);
425 return;
426 }
427
428 for (int i = 0; i < *count; i++) {
429 modifiers[i] = available_modifiers[i];
430 if (external_only)
431 external_only = false;
432 }
433 }
434
435 static const struct debug_named_value debug_options[] = {
436 { "gp", LIMA_DEBUG_GP,
437 "print GP shader compiler result of each stage" },
438 { "pp", LIMA_DEBUG_PP,
439 "print PP shader compiler result of each stage" },
440 { "dump", LIMA_DEBUG_DUMP,
441 "dump GPU command stream to $PWD/lima.dump" },
442 { NULL }
443 };
444
445 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
446 uint32_t lima_debug;
447
448 static void
449 lima_screen_parse_env(void)
450 {
451 lima_debug = debug_get_option_lima_debug();
452
453 if (lima_debug & LIMA_DEBUG_DUMP) {
454 const char *dump_command = "lima.dump";
455 printf("lima: dump command stream to file %s\n", dump_command);
456 lima_dump_command_stream = fopen(dump_command, "w");
457 if (!lima_dump_command_stream)
458 fprintf(stderr, "lima: fail to open command stream log file %s\n",
459 dump_command);
460 }
461
462 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
463 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
464 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
465 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
466 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
467 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
468 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
469 }
470
471 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
472 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
473 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
474 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
475 lima_plb_max_blk = 0;
476 }
477
478 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
479 if (lima_ppir_force_spilling < 0) {
480 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
481 "reset to default 0\n", lima_ppir_force_spilling);
482 lima_ppir_force_spilling = 0;
483 }
484 }
485
486 struct pipe_screen *
487 lima_screen_create(int fd, struct renderonly *ro)
488 {
489 struct lima_screen *screen;
490
491 screen = rzalloc(NULL, struct lima_screen);
492 if (!screen)
493 return NULL;
494
495 screen->fd = fd;
496
497 lima_screen_parse_env();
498
499 if (!lima_screen_query_info(screen))
500 goto err_out0;
501
502 if (!lima_bo_table_init(screen))
503 goto err_out0;
504
505 screen->pp_ra = ppir_regalloc_init(screen);
506 if (!screen->pp_ra)
507 goto err_out1;
508
509 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
510 if (!screen->pp_buffer)
511 goto err_out1;
512
513 /* fs program for clear buffer?
514 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
515 */
516 static const uint32_t pp_clear_program[] = {
517 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
518 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
519 };
520 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
521 pp_clear_program, sizeof(pp_clear_program));
522
523 /* copy texture to framebuffer, used to reload gpu tile buffer
524 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
525 */
526 static const uint32_t pp_reload_program[] = {
527 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
528 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
529 };
530 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
531 pp_reload_program, sizeof(pp_reload_program));
532
533 /* 0/1/2 vertex index for reload/clear draw */
534 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
535 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
536 pp_shared_index, sizeof(pp_shared_index));
537
538 /* 4096x4096 gl pos used for partial clear */
539 static const float pp_clear_gl_pos[] = {
540 4096, 0, 1, 1,
541 0, 0, 1, 1,
542 0, 4096, 1, 1,
543 };
544 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
545 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
546
547 /* is pp frame render state static? */
548 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
549 memset(pp_frame_rsw, 0, 0x40);
550 pp_frame_rsw[8] = 0x0000f008;
551 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
552 pp_frame_rsw[13] = 0x00000100;
553
554 if (ro) {
555 screen->ro = renderonly_dup(ro);
556 if (!screen->ro) {
557 fprintf(stderr, "Failed to dup renderonly object\n");
558 goto err_out2;
559 }
560 }
561
562 screen->base.destroy = lima_screen_destroy;
563 screen->base.get_name = lima_screen_get_name;
564 screen->base.get_vendor = lima_screen_get_vendor;
565 screen->base.get_device_vendor = lima_screen_get_device_vendor;
566 screen->base.get_param = lima_screen_get_param;
567 screen->base.get_paramf = lima_screen_get_paramf;
568 screen->base.get_shader_param = lima_screen_get_shader_param;
569 screen->base.context_create = lima_context_create;
570 screen->base.is_format_supported = lima_screen_is_format_supported;
571 screen->base.get_compiler_options = lima_screen_get_compiler_options;
572 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
573
574 lima_resource_screen_init(screen);
575 lima_fence_screen_init(screen);
576
577 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
578
579 screen->refcnt = 1;
580
581 return &screen->base;
582
583 err_out2:
584 lima_bo_free(screen->pp_buffer);
585 err_out1:
586 lima_bo_table_fini(screen);
587 err_out0:
588 ralloc_free(screen);
589 return NULL;
590 }