lima: implement BO cache
[mesa.git] / src / gallium / drivers / lima / lima_screen.c
1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "ir/lima_ir.h"
43
44 #include "xf86drm.h"
45
46 int lima_plb_max_blk = 0;
47
48 static void
49 lima_screen_destroy(struct pipe_screen *pscreen)
50 {
51 struct lima_screen *screen = lima_screen(pscreen);
52
53 if (lima_dump_command_stream) {
54 fclose(lima_dump_command_stream);
55 lima_dump_command_stream = NULL;
56 }
57
58 slab_destroy_parent(&screen->transfer_pool);
59
60 if (screen->ro)
61 free(screen->ro);
62
63 if (screen->pp_buffer)
64 lima_bo_unreference(screen->pp_buffer);
65
66 lima_bo_cache_fini(screen);
67 lima_bo_table_fini(screen);
68 ralloc_free(screen);
69 }
70
71 static const char *
72 lima_screen_get_name(struct pipe_screen *pscreen)
73 {
74 struct lima_screen *screen = lima_screen(pscreen);
75
76 switch (screen->gpu_type) {
77 case DRM_LIMA_PARAM_GPU_ID_MALI400:
78 return "Mali400";
79 case DRM_LIMA_PARAM_GPU_ID_MALI450:
80 return "Mali450";
81 }
82
83 return NULL;
84 }
85
86 static const char *
87 lima_screen_get_vendor(struct pipe_screen *pscreen)
88 {
89 return "lima";
90 }
91
92 static const char *
93 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
94 {
95 return "ARM";
96 }
97
98 static int
99 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
100 {
101 switch (param) {
102 case PIPE_CAP_NPOT_TEXTURES:
103 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
104 case PIPE_CAP_ACCELERATED:
105 case PIPE_CAP_UMA:
106 case PIPE_CAP_NATIVE_FENCE_FD:
107 return 1;
108
109 /* Unimplemented, but for exporting OpenGL 2.0 */
110 case PIPE_CAP_OCCLUSION_QUERY:
111 case PIPE_CAP_POINT_SPRITE:
112 return 1;
113
114 /* not clear supported */
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
116 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
118 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
119 return 1;
120
121 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
122 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
123 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
124 return 1;
125
126 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
127 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
128 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
129 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
130 return LIMA_MAX_MIP_LEVELS;
131
132 case PIPE_CAP_VENDOR_ID:
133 return 0x13B5;
134
135 case PIPE_CAP_VIDEO_MEMORY:
136 return 0;
137
138 case PIPE_CAP_PCI_GROUP:
139 case PIPE_CAP_PCI_BUS:
140 case PIPE_CAP_PCI_DEVICE:
141 case PIPE_CAP_PCI_FUNCTION:
142 return 0;
143
144 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
145 return 0;
146
147 default:
148 return u_pipe_screen_get_param_defaults(pscreen, param);
149 }
150 }
151
152 static float
153 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
154 {
155 switch (param) {
156 case PIPE_CAPF_MAX_LINE_WIDTH:
157 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
158 case PIPE_CAPF_MAX_POINT_WIDTH:
159 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
160 return 255.0f;
161 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
162 return 16.0f;
163 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
164 return 16.0f;
165
166 default:
167 return 0.0f;
168 }
169 }
170
171 static int
172 get_vertex_shader_param(struct lima_screen *screen,
173 enum pipe_shader_cap param)
174 {
175 switch (param) {
176 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
177 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
178 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
179 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
180 return 16384; /* need investigate */
181
182 case PIPE_SHADER_CAP_MAX_INPUTS:
183 return 16; /* attributes */
184
185 case PIPE_SHADER_CAP_MAX_OUTPUTS:
186 return LIMA_MAX_VARYING_NUM; /* varying */
187
188 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
189 return 4096; /* need investigate */
190 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
191 return 1;
192
193 case PIPE_SHADER_CAP_PREFERRED_IR:
194 return PIPE_SHADER_IR_NIR;
195
196 case PIPE_SHADER_CAP_MAX_TEMPS:
197 return 256; /* need investigate */
198
199 default:
200 return 0;
201 }
202 }
203
204 static int
205 get_fragment_shader_param(struct lima_screen *screen,
206 enum pipe_shader_cap param)
207 {
208 switch (param) {
209 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
210 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
211 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
212 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
213 return 16384; /* need investigate */
214
215 case PIPE_SHADER_CAP_MAX_INPUTS:
216 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
217
218 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
219 return 4096; /* need investigate */
220 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
221 return 1;
222
223 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
224 return 16; /* need investigate */
225
226 case PIPE_SHADER_CAP_PREFERRED_IR:
227 return PIPE_SHADER_IR_NIR;
228
229 case PIPE_SHADER_CAP_MAX_TEMPS:
230 return 256; /* need investigate */
231
232 default:
233 return 0;
234 }
235 }
236
237 static int
238 lima_screen_get_shader_param(struct pipe_screen *pscreen,
239 enum pipe_shader_type shader,
240 enum pipe_shader_cap param)
241 {
242 struct lima_screen *screen = lima_screen(pscreen);
243
244 switch (shader) {
245 case PIPE_SHADER_FRAGMENT:
246 return get_fragment_shader_param(screen, param);
247 case PIPE_SHADER_VERTEX:
248 return get_vertex_shader_param(screen, param);
249
250 default:
251 return 0;
252 }
253 }
254
255 static bool
256 lima_screen_is_format_supported(struct pipe_screen *pscreen,
257 enum pipe_format format,
258 enum pipe_texture_target target,
259 unsigned sample_count,
260 unsigned storage_sample_count,
261 unsigned usage)
262 {
263 switch (target) {
264 case PIPE_BUFFER:
265 case PIPE_TEXTURE_1D:
266 case PIPE_TEXTURE_2D:
267 break;
268 default:
269 return false;
270 }
271
272 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
273 return false;
274
275 /* be able to support 16, now limit to 4 */
276 if (sample_count > 1 && sample_count != 4)
277 return false;
278
279 if (usage & PIPE_BIND_RENDER_TARGET &&
280 !lima_format_pixel_supported(format))
281 return false;
282
283 if (usage & PIPE_BIND_DEPTH_STENCIL) {
284 switch (format) {
285 case PIPE_FORMAT_Z16_UNORM:
286 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
287 case PIPE_FORMAT_Z24X8_UNORM:
288 break;
289 default:
290 return false;
291 }
292 }
293
294 if (usage & PIPE_BIND_VERTEX_BUFFER) {
295 switch (format) {
296 case PIPE_FORMAT_R32G32B32_FLOAT:
297 break;
298 default:
299 return false;
300 }
301 }
302
303 if (usage & PIPE_BIND_INDEX_BUFFER) {
304 switch (format) {
305 case PIPE_FORMAT_I8_UINT:
306 case PIPE_FORMAT_I16_UINT:
307 case PIPE_FORMAT_I32_UINT:
308 break;
309 default:
310 return false;
311 }
312 }
313
314 if (usage & PIPE_BIND_SAMPLER_VIEW)
315 return lima_format_texel_supported(format);
316
317 return true;
318 }
319
320 static const void *
321 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
322 enum pipe_shader_ir ir,
323 enum pipe_shader_type shader)
324 {
325 return lima_program_get_compiler_options(shader);
326 }
327
328 static bool
329 lima_screen_set_plb_max_blk(struct lima_screen *screen)
330 {
331 if (lima_plb_max_blk) {
332 screen->plb_max_blk = lima_plb_max_blk;
333 return true;
334 }
335
336 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
337 screen->plb_max_blk = 4096;
338 else
339 screen->plb_max_blk = 512;
340
341 drmDevicePtr devinfo;
342
343 if (drmGetDevice2(screen->fd, 0, &devinfo))
344 return false;
345
346 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
347 char **compatible = devinfo->deviceinfo.platform->compatible;
348
349 if (compatible && *compatible)
350 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
351 screen->plb_max_blk = 2048;
352 }
353
354 drmFreeDevice(&devinfo);
355
356 return true;
357 }
358
359 static bool
360 lima_screen_query_info(struct lima_screen *screen)
361 {
362 struct drm_lima_get_param param;
363
364 memset(&param, 0, sizeof(param));
365 param.param = DRM_LIMA_PARAM_GPU_ID;
366 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
367 return false;
368
369 switch (param.value) {
370 case DRM_LIMA_PARAM_GPU_ID_MALI400:
371 case DRM_LIMA_PARAM_GPU_ID_MALI450:
372 screen->gpu_type = param.value;
373 break;
374 default:
375 return false;
376 }
377
378 memset(&param, 0, sizeof(param));
379 param.param = DRM_LIMA_PARAM_NUM_PP;
380 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
381 return false;
382
383 screen->num_pp = param.value;
384
385 lima_screen_set_plb_max_blk(screen);
386
387 return true;
388 }
389
390 static void
391 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
392 enum pipe_format format, int max,
393 uint64_t *modifiers,
394 unsigned int *external_only,
395 int *count)
396 {
397 uint64_t available_modifiers[] = {
398 DRM_FORMAT_MOD_LINEAR,
399 };
400
401 if (!modifiers) {
402 *count = ARRAY_SIZE(available_modifiers);
403 return;
404 }
405
406 for (int i = 0; i < *count; i++) {
407 modifiers[i] = available_modifiers[i];
408 if (external_only)
409 external_only = false;
410 }
411 }
412
413 static const struct debug_named_value debug_options[] = {
414 { "gp", LIMA_DEBUG_GP,
415 "print GP shader compiler result of each stage" },
416 { "pp", LIMA_DEBUG_PP,
417 "print PP shader compiler result of each stage" },
418 { "dump", LIMA_DEBUG_DUMP,
419 "dump GPU command stream to $PWD/lima.dump" },
420 { "shaderdb", LIMA_DEBUG_SHADERDB,
421 "print shader information for shaderdb" },
422 { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
423 "disable BO cache" },
424 { NULL }
425 };
426
427 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
428 uint32_t lima_debug;
429
430 static void
431 lima_screen_parse_env(void)
432 {
433 lima_debug = debug_get_option_lima_debug();
434
435 if (lima_debug & LIMA_DEBUG_DUMP) {
436 const char *dump_command = "lima.dump";
437 printf("lima: dump command stream to file %s\n", dump_command);
438 lima_dump_command_stream = fopen(dump_command, "w");
439 if (!lima_dump_command_stream)
440 fprintf(stderr, "lima: fail to open command stream log file %s\n",
441 dump_command);
442 }
443
444 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
445 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
446 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
447 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
448 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
449 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
450 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
451 }
452
453 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
454 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
455 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
456 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
457 lima_plb_max_blk = 0;
458 }
459
460 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
461 if (lima_ppir_force_spilling < 0) {
462 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
463 "reset to default 0\n", lima_ppir_force_spilling);
464 lima_ppir_force_spilling = 0;
465 }
466 }
467
468 struct pipe_screen *
469 lima_screen_create(int fd, struct renderonly *ro)
470 {
471 struct lima_screen *screen;
472
473 screen = rzalloc(NULL, struct lima_screen);
474 if (!screen)
475 return NULL;
476
477 screen->fd = fd;
478
479 lima_screen_parse_env();
480
481 if (!lima_screen_query_info(screen))
482 goto err_out0;
483
484 if (!lima_bo_cache_init(screen))
485 goto err_out0;
486
487 if (!lima_bo_table_init(screen))
488 goto err_out1;
489
490 screen->pp_ra = ppir_regalloc_init(screen);
491 if (!screen->pp_ra)
492 goto err_out2;
493
494 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
495 if (!screen->pp_buffer)
496 goto err_out2;
497 screen->pp_buffer->cacheable = false;
498
499 /* fs program for clear buffer?
500 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
501 */
502 static const uint32_t pp_clear_program[] = {
503 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
504 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
505 };
506 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
507 pp_clear_program, sizeof(pp_clear_program));
508
509 /* copy texture to framebuffer, used to reload gpu tile buffer
510 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
511 */
512 static const uint32_t pp_reload_program[] = {
513 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
514 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
515 };
516 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
517 pp_reload_program, sizeof(pp_reload_program));
518
519 /* 0/1/2 vertex index for reload/clear draw */
520 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
521 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
522 pp_shared_index, sizeof(pp_shared_index));
523
524 /* 4096x4096 gl pos used for partial clear */
525 static const float pp_clear_gl_pos[] = {
526 4096, 0, 1, 1,
527 0, 0, 1, 1,
528 0, 4096, 1, 1,
529 };
530 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
531 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
532
533 /* is pp frame render state static? */
534 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
535 memset(pp_frame_rsw, 0, 0x40);
536 pp_frame_rsw[8] = 0x0000f008;
537 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
538 pp_frame_rsw[13] = 0x00000100;
539
540 if (ro) {
541 screen->ro = renderonly_dup(ro);
542 if (!screen->ro) {
543 fprintf(stderr, "Failed to dup renderonly object\n");
544 goto err_out3;
545 }
546 }
547
548 screen->base.destroy = lima_screen_destroy;
549 screen->base.get_name = lima_screen_get_name;
550 screen->base.get_vendor = lima_screen_get_vendor;
551 screen->base.get_device_vendor = lima_screen_get_device_vendor;
552 screen->base.get_param = lima_screen_get_param;
553 screen->base.get_paramf = lima_screen_get_paramf;
554 screen->base.get_shader_param = lima_screen_get_shader_param;
555 screen->base.context_create = lima_context_create;
556 screen->base.is_format_supported = lima_screen_is_format_supported;
557 screen->base.get_compiler_options = lima_screen_get_compiler_options;
558 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
559
560 lima_resource_screen_init(screen);
561 lima_fence_screen_init(screen);
562
563 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
564
565 screen->refcnt = 1;
566
567 return &screen->base;
568
569 err_out3:
570 lima_bo_unreference(screen->pp_buffer);
571 err_out2:
572 lima_bo_table_fini(screen);
573 err_out1:
574 lima_bo_cache_fini(screen);
575 err_out0:
576 ralloc_free(screen);
577 return NULL;
578 }