src/gallium/drivers/lima/lima_screen.c

   1 /*
   2  * Copyright (c) 2017-2019 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <string.h>
  26
  27 #include "util/ralloc.h"
  28 #include "util/u_debug.h"
  29 #include "util/u_screen.h"
  30 #include "renderonly/renderonly.h"
  31
  32 #include "drm-uapi/drm_fourcc.h"
  33 #include "drm-uapi/lima_drm.h"
  34
  35 #include "lima_screen.h"
  36 #include "lima_context.h"
  37 #include "lima_resource.h"
  38 #include "lima_program.h"
  39 #include "lima_bo.h"
  40 #include "lima_fence.h"
  41 #include "lima_format.h"
  42 #include "lima_util.h"
  43 #include "ir/lima_ir.h"
  44
  45 #include "xf86drm.h"
  46
  47 int lima_plb_max_blk = 0;
  48
  49 static void
  50 lima_screen_destroy(struct pipe_screen *pscreen)
  51 {
  52    struct lima_screen *screen = lima_screen(pscreen);
  53
  54    lima_dump_file_close();
  55
  56    slab_destroy_parent(&screen->transfer_pool);
  57
  58    if (screen->ro)
  59       free(screen->ro);
  60
  61    if (screen->pp_buffer)
  62       lima_bo_unreference(screen->pp_buffer);
  63
  64    lima_bo_cache_fini(screen);
  65    lima_bo_table_fini(screen);
  66    ralloc_free(screen);
  67 }
  68
  69 static const char *
  70 lima_screen_get_name(struct pipe_screen *pscreen)
  71 {
  72    struct lima_screen *screen = lima_screen(pscreen);
  73
  74    switch (screen->gpu_type) {
  75    case DRM_LIMA_PARAM_GPU_ID_MALI400:
  76      return "Mali400";
  77    case DRM_LIMA_PARAM_GPU_ID_MALI450:
  78      return "Mali450";
  79    }
  80
  81    return NULL;
  82 }
  83
  84 static const char *
  85 lima_screen_get_vendor(struct pipe_screen *pscreen)
  86 {
  87    return "lima";
  88 }
  89
  90 static const char *
  91 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
  92 {
  93    return "ARM";
  94 }
  95
  96 static int
  97 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  98 {
  99    switch (param) {
 100    case PIPE_CAP_NPOT_TEXTURES:
 101    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 102    case PIPE_CAP_ACCELERATED:
 103    case PIPE_CAP_UMA:
 104    case PIPE_CAP_NATIVE_FENCE_FD:
 105    case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 106       return 1;
 107
 108    /* Unimplemented, but for exporting OpenGL 2.0 */
 109    case PIPE_CAP_OCCLUSION_QUERY:
 110    case PIPE_CAP_POINT_SPRITE:
 111       return 1;
 112
 113    /* not clear supported */
 114    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 115    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 116    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 117    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 118       return 1;
 119
 120    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 121    case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 122    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 123       return 1;
 124
 125    case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 126       return 1 << (LIMA_MAX_MIP_LEVELS - 1);
 127    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 128    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 129       return LIMA_MAX_MIP_LEVELS;
 130
 131    case PIPE_CAP_VENDOR_ID:
 132       return 0x13B5;
 133
 134    case PIPE_CAP_VIDEO_MEMORY:
 135       return 0;
 136
 137    case PIPE_CAP_PCI_GROUP:
 138    case PIPE_CAP_PCI_BUS:
 139    case PIPE_CAP_PCI_DEVICE:
 140    case PIPE_CAP_PCI_FUNCTION:
 141       return 0;
 142
 143    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 144       return 0;
 145
 146    default:
 147       return u_pipe_screen_get_param_defaults(pscreen, param);
 148    }
 149 }
 150
 151 static float
 152 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 153 {
 154    switch (param) {
 155    case PIPE_CAPF_MAX_LINE_WIDTH:
 156    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 157    case PIPE_CAPF_MAX_POINT_WIDTH:
 158    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 159       return 100.0f;
 160    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 161       return 16.0f;
 162    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 163       return 16.0f;
 164
 165    default:
 166       return 0.0f;
 167    }
 168 }
 169
 170 static int
 171 get_vertex_shader_param(struct lima_screen *screen,
 172                         enum pipe_shader_cap param)
 173 {
 174    switch (param) {
 175    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 176    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 177    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 178    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 179       return 16384; /* need investigate */
 180
 181    case PIPE_SHADER_CAP_MAX_INPUTS:
 182       return 16; /* attributes */
 183
 184    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 185       return LIMA_MAX_VARYING_NUM; /* varying */
 186
 187    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 188       return 4096; /* need investigate */
 189    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 190       return 1;
 191
 192    case PIPE_SHADER_CAP_PREFERRED_IR:
 193       return PIPE_SHADER_IR_NIR;
 194
 195    case PIPE_SHADER_CAP_MAX_TEMPS:
 196       return 256; /* need investigate */
 197
 198    default:
 199       return 0;
 200    }
 201 }
 202
 203 static int
 204 get_fragment_shader_param(struct lima_screen *screen,
 205                           enum pipe_shader_cap param)
 206 {
 207    switch (param) {
 208    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 209    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 210    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 211    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 212       return 16384; /* need investigate */
 213
 214    case PIPE_SHADER_CAP_MAX_INPUTS:
 215       return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
 216
 217    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 218       return 4096; /* need investigate */
 219    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 220       return 1;
 221
 222    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 223       return 16; /* need investigate */
 224
 225    case PIPE_SHADER_CAP_PREFERRED_IR:
 226       return PIPE_SHADER_IR_NIR;
 227
 228    case PIPE_SHADER_CAP_MAX_TEMPS:
 229       return 256; /* need investigate */
 230
 231    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 232    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 233       return 1;
 234
 235    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 236    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 237       return 0;
 238
 239    default:
 240       return 0;
 241    }
 242 }
 243
 244 static int
 245 lima_screen_get_shader_param(struct pipe_screen *pscreen,
 246                              enum pipe_shader_type shader,
 247                              enum pipe_shader_cap param)
 248 {
 249    struct lima_screen *screen = lima_screen(pscreen);
 250
 251    switch (shader) {
 252    case PIPE_SHADER_FRAGMENT:
 253       return get_fragment_shader_param(screen, param);
 254    case PIPE_SHADER_VERTEX:
 255       return get_vertex_shader_param(screen, param);
 256
 257    default:
 258       return 0;
 259    }
 260 }
 261
 262 static bool
 263 lima_screen_is_format_supported(struct pipe_screen *pscreen,
 264                                 enum pipe_format format,
 265                                 enum pipe_texture_target target,
 266                                 unsigned sample_count,
 267                                 unsigned storage_sample_count,
 268                                 unsigned usage)
 269 {
 270    switch (target) {
 271    case PIPE_BUFFER:
 272    case PIPE_TEXTURE_1D:
 273    case PIPE_TEXTURE_2D:
 274    case PIPE_TEXTURE_RECT:
 275    case PIPE_TEXTURE_CUBE:
 276       break;
 277    default:
 278       return false;
 279    }
 280
 281    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 282       return false;
 283
 284    /* be able to support 16, now limit to 4 */
 285    if (sample_count > 1 && sample_count != 4)
 286       return false;
 287
 288    if (usage & PIPE_BIND_RENDER_TARGET &&
 289        !lima_format_pixel_supported(format))
 290       return false;
 291
 292    if (usage & PIPE_BIND_DEPTH_STENCIL) {
 293       switch (format) {
 294       case PIPE_FORMAT_Z16_UNORM:
 295       case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 296       case PIPE_FORMAT_Z24X8_UNORM:
 297          break;
 298       default:
 299          return false;
 300       }
 301    }
 302
 303    if (usage & PIPE_BIND_VERTEX_BUFFER) {
 304       switch (format) {
 305       case PIPE_FORMAT_R32G32B32_FLOAT:
 306          break;
 307       default:
 308          return false;
 309       }
 310    }
 311
 312    if (usage & PIPE_BIND_INDEX_BUFFER) {
 313       switch (format) {
 314       case PIPE_FORMAT_I8_UINT:
 315       case PIPE_FORMAT_I16_UINT:
 316       case PIPE_FORMAT_I32_UINT:
 317          break;
 318       default:
 319          return false;
 320       }
 321    }
 322
 323    if (usage & PIPE_BIND_SAMPLER_VIEW)
 324       return lima_format_texel_supported(format);
 325
 326    return true;
 327 }
 328
 329 static const void *
 330 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
 331                                  enum pipe_shader_ir ir,
 332                                  enum pipe_shader_type shader)
 333 {
 334    return lima_program_get_compiler_options(shader);
 335 }
 336
 337 static bool
 338 lima_screen_set_plb_max_blk(struct lima_screen *screen)
 339 {
 340    if (lima_plb_max_blk) {
 341       screen->plb_max_blk = lima_plb_max_blk;
 342       return true;
 343    }
 344
 345    if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
 346       screen->plb_max_blk = 4096;
 347    else
 348       screen->plb_max_blk = 512;
 349
 350    drmDevicePtr devinfo;
 351
 352    if (drmGetDevice2(screen->fd, 0, &devinfo))
 353       return false;
 354
 355    if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
 356       char **compatible = devinfo->deviceinfo.platform->compatible;
 357
 358       if (compatible && *compatible)
 359          if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
 360             screen->plb_max_blk = 2048;
 361    }
 362
 363    drmFreeDevice(&devinfo);
 364
 365    return true;
 366 }
 367
 368 static bool
 369 lima_screen_query_info(struct lima_screen *screen)
 370 {
 371    struct drm_lima_get_param param;
 372
 373    memset(&param, 0, sizeof(param));
 374    param.param = DRM_LIMA_PARAM_GPU_ID;
 375    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 376       return false;
 377
 378    switch (param.value) {
 379    case DRM_LIMA_PARAM_GPU_ID_MALI400:
 380    case DRM_LIMA_PARAM_GPU_ID_MALI450:
 381       screen->gpu_type = param.value;
 382       break;
 383    default:
 384       return false;
 385    }
 386
 387    memset(&param, 0, sizeof(param));
 388    param.param = DRM_LIMA_PARAM_NUM_PP;
 389    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 390       return false;
 391
 392    screen->num_pp = param.value;
 393
 394    lima_screen_set_plb_max_blk(screen);
 395
 396    return true;
 397 }
 398
 399 static void
 400 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
 401                                    enum pipe_format format, int max,
 402                                    uint64_t *modifiers,
 403                                    unsigned int *external_only,
 404                                    int *count)
 405 {
 406    uint64_t available_modifiers[] = {
 407       DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
 408       DRM_FORMAT_MOD_LINEAR,
 409    };
 410
 411    if (!modifiers) {
 412       *count = ARRAY_SIZE(available_modifiers);
 413       return;
 414    }
 415
 416    for (int i = 0; i < *count; i++) {
 417       modifiers[i] = available_modifiers[i];
 418       if (external_only)
 419          external_only = false;
 420    }
 421 }
 422
 423 static const struct debug_named_value debug_options[] = {
 424         { "gp",       LIMA_DEBUG_GP,
 425           "print GP shader compiler result of each stage" },
 426         { "pp",       LIMA_DEBUG_PP,
 427           "print PP shader compiler result of each stage" },
 428         { "dump",     LIMA_DEBUG_DUMP,
 429           "dump GPU command stream to $PWD/lima.dump" },
 430         { "shaderdb", LIMA_DEBUG_SHADERDB,
 431           "print shader information for shaderdb" },
 432         { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
 433           "disable BO cache" },
 434         { "bocache", LIMA_DEBUG_BO_CACHE,
 435           "print debug info for BO cache" },
 436         { NULL }
 437 };
 438
 439 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
 440 uint32_t lima_debug;
 441
 442 static void
 443 lima_screen_parse_env(void)
 444 {
 445    lima_debug = debug_get_option_lima_debug();
 446
 447    if (lima_debug & LIMA_DEBUG_DUMP)
 448       lima_dump_file_open();
 449
 450    lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
 451    if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
 452        lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
 453       fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
 454               "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
 455               LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
 456       lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
 457    }
 458
 459    lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
 460    if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
 461       fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
 462               "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
 463       lima_plb_max_blk = 0;
 464    }
 465
 466    lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
 467    if (lima_ppir_force_spilling < 0) {
 468       fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
 469               "reset to default 0\n", lima_ppir_force_spilling);
 470       lima_ppir_force_spilling = 0;
 471    }
 472 }
 473
 474 struct pipe_screen *
 475 lima_screen_create(int fd, struct renderonly *ro)
 476 {
 477    struct lima_screen *screen;
 478
 479    screen = rzalloc(NULL, struct lima_screen);
 480    if (!screen)
 481       return NULL;
 482
 483    screen->fd = fd;
 484
 485    lima_screen_parse_env();
 486
 487    if (!lima_screen_query_info(screen))
 488       goto err_out0;
 489
 490    if (!lima_bo_cache_init(screen))
 491       goto err_out0;
 492
 493    if (!lima_bo_table_init(screen))
 494       goto err_out1;
 495
 496    screen->pp_ra = ppir_regalloc_init(screen);
 497    if (!screen->pp_ra)
 498       goto err_out2;
 499
 500    screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
 501    if (!screen->pp_buffer)
 502       goto err_out2;
 503    screen->pp_buffer->cacheable = false;
 504
 505    /* fs program for clear buffer?
 506     * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
 507     */
 508    static const uint32_t pp_clear_program[] = {
 509       0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
 510       0x000005f5, 0x00000000, 0x00000000, 0x00000000,
 511    };
 512    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
 513           pp_clear_program, sizeof(pp_clear_program));
 514
 515    /* copy texture to framebuffer, used to reload gpu tile buffer
 516     * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
 517     */
 518    static const uint32_t pp_reload_program[] = {
 519       0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
 520       0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
 521    };
 522    memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
 523           pp_reload_program, sizeof(pp_reload_program));
 524
 525    /* 0/1/2 vertex index for reload/clear draw */
 526    static const uint8_t pp_shared_index[] = { 0, 1, 2 };
 527    memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
 528           pp_shared_index, sizeof(pp_shared_index));
 529
 530    /* 4096x4096 gl pos used for partial clear */
 531    static const float pp_clear_gl_pos[] = {
 532       4096, 0,    1, 1,
 533       0,    0,    1, 1,
 534       0,    4096, 1, 1,
 535    };
 536    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
 537           pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
 538
 539    /* is pp frame render state static? */
 540    uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
 541    memset(pp_frame_rsw, 0, 0x40);
 542    pp_frame_rsw[8] = 0x0000f008;
 543    pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
 544    pp_frame_rsw[13] = 0x00000100;
 545
 546    if (ro) {
 547       screen->ro = renderonly_dup(ro);
 548       if (!screen->ro) {
 549          fprintf(stderr, "Failed to dup renderonly object\n");
 550          goto err_out3;
 551       }
 552    }
 553
 554    screen->base.destroy = lima_screen_destroy;
 555    screen->base.get_name = lima_screen_get_name;
 556    screen->base.get_vendor = lima_screen_get_vendor;
 557    screen->base.get_device_vendor = lima_screen_get_device_vendor;
 558    screen->base.get_param = lima_screen_get_param;
 559    screen->base.get_paramf = lima_screen_get_paramf;
 560    screen->base.get_shader_param = lima_screen_get_shader_param;
 561    screen->base.context_create = lima_context_create;
 562    screen->base.is_format_supported = lima_screen_is_format_supported;
 563    screen->base.get_compiler_options = lima_screen_get_compiler_options;
 564    screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
 565
 566    lima_resource_screen_init(screen);
 567    lima_fence_screen_init(screen);
 568
 569    slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
 570
 571    screen->refcnt = 1;
 572
 573    return &screen->base;
 574
 575 err_out3:
 576    lima_bo_unreference(screen->pp_buffer);
 577 err_out2:
 578    lima_bo_table_fini(screen);
 579 err_out1:
 580    lima_bo_cache_fini(screen);
 581 err_out0:
 582    ralloc_free(screen);
 583    return NULL;
 584 }