panfrost: Rename pan_bo_cache.c into pan_bo.c
[mesa.git] / src / gallium / drivers / lima / lima_screen.c
1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "ir/lima_ir.h"
43
44 #include "xf86drm.h"
45
46 int lima_plb_max_blk = 0;
47
48 static void
49 lima_screen_destroy(struct pipe_screen *pscreen)
50 {
51 struct lima_screen *screen = lima_screen(pscreen);
52
53 if (lima_dump_command_stream) {
54 fclose(lima_dump_command_stream);
55 lima_dump_command_stream = NULL;
56 }
57
58 slab_destroy_parent(&screen->transfer_pool);
59
60 if (screen->ro)
61 free(screen->ro);
62
63 if (screen->pp_buffer)
64 lima_bo_free(screen->pp_buffer);
65
66 lima_bo_table_fini(screen);
67 ralloc_free(screen);
68 }
69
70 static const char *
71 lima_screen_get_name(struct pipe_screen *pscreen)
72 {
73 struct lima_screen *screen = lima_screen(pscreen);
74
75 switch (screen->gpu_type) {
76 case DRM_LIMA_PARAM_GPU_ID_MALI400:
77 return "Mali400";
78 case DRM_LIMA_PARAM_GPU_ID_MALI450:
79 return "Mali450";
80 }
81
82 return NULL;
83 }
84
85 static const char *
86 lima_screen_get_vendor(struct pipe_screen *pscreen)
87 {
88 return "lima";
89 }
90
91 static const char *
92 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
93 {
94 return "ARM";
95 }
96
97 static int
98 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
99 {
100 switch (param) {
101 case PIPE_CAP_NPOT_TEXTURES:
102 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
103 case PIPE_CAP_ACCELERATED:
104 case PIPE_CAP_UMA:
105 case PIPE_CAP_NATIVE_FENCE_FD:
106 return 1;
107
108 /* Unimplemented, but for exporting OpenGL 2.0 */
109 case PIPE_CAP_OCCLUSION_QUERY:
110 case PIPE_CAP_POINT_SPRITE:
111 return 1;
112
113 /* not clear supported */
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
118 return 1;
119
120 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
121 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
122 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
123 return 1;
124
125 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
126 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
127 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
128 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
129 return LIMA_MAX_MIP_LEVELS;
130
131 case PIPE_CAP_VENDOR_ID:
132 return 0x13B5;
133
134 case PIPE_CAP_VIDEO_MEMORY:
135 return 0;
136
137 case PIPE_CAP_PCI_GROUP:
138 case PIPE_CAP_PCI_BUS:
139 case PIPE_CAP_PCI_DEVICE:
140 case PIPE_CAP_PCI_FUNCTION:
141 return 0;
142
143 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
144 return 0;
145
146 default:
147 return u_pipe_screen_get_param_defaults(pscreen, param);
148 }
149 }
150
151 static float
152 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
153 {
154 switch (param) {
155 case PIPE_CAPF_MAX_LINE_WIDTH:
156 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
157 case PIPE_CAPF_MAX_POINT_WIDTH:
158 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
159 return 255.0f;
160 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
161 return 16.0f;
162 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
163 return 16.0f;
164
165 default:
166 return 0.0f;
167 }
168 }
169
170 static int
171 get_vertex_shader_param(struct lima_screen *screen,
172 enum pipe_shader_cap param)
173 {
174 switch (param) {
175 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
176 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
177 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
178 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
179 return 16384; /* need investigate */
180
181 case PIPE_SHADER_CAP_MAX_INPUTS:
182 return 16; /* attributes */
183
184 case PIPE_SHADER_CAP_MAX_OUTPUTS:
185 return LIMA_MAX_VARYING_NUM; /* varying */
186
187 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
188 return 4096; /* need investigate */
189 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
190 return 1;
191
192 case PIPE_SHADER_CAP_PREFERRED_IR:
193 return PIPE_SHADER_IR_NIR;
194
195 case PIPE_SHADER_CAP_MAX_TEMPS:
196 return 256; /* need investigate */
197
198 default:
199 return 0;
200 }
201 }
202
203 static int
204 get_fragment_shader_param(struct lima_screen *screen,
205 enum pipe_shader_cap param)
206 {
207 switch (param) {
208 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
209 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
210 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
211 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
212 return 16384; /* need investigate */
213
214 case PIPE_SHADER_CAP_MAX_INPUTS:
215 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
216
217 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
218 return 4096; /* need investigate */
219 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
220 return 1;
221
222 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
223 return 16; /* need investigate */
224
225 case PIPE_SHADER_CAP_PREFERRED_IR:
226 return PIPE_SHADER_IR_NIR;
227
228 case PIPE_SHADER_CAP_MAX_TEMPS:
229 return 256; /* need investigate */
230
231 default:
232 return 0;
233 }
234 }
235
236 static int
237 lima_screen_get_shader_param(struct pipe_screen *pscreen,
238 enum pipe_shader_type shader,
239 enum pipe_shader_cap param)
240 {
241 struct lima_screen *screen = lima_screen(pscreen);
242
243 switch (shader) {
244 case PIPE_SHADER_FRAGMENT:
245 return get_fragment_shader_param(screen, param);
246 case PIPE_SHADER_VERTEX:
247 return get_vertex_shader_param(screen, param);
248
249 default:
250 return 0;
251 }
252 }
253
254 static bool
255 lima_screen_is_format_supported(struct pipe_screen *pscreen,
256 enum pipe_format format,
257 enum pipe_texture_target target,
258 unsigned sample_count,
259 unsigned storage_sample_count,
260 unsigned usage)
261 {
262 switch (target) {
263 case PIPE_BUFFER:
264 case PIPE_TEXTURE_1D:
265 case PIPE_TEXTURE_2D:
266 break;
267 default:
268 return false;
269 }
270
271 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
272 return false;
273
274 /* be able to support 16, now limit to 4 */
275 if (sample_count > 1 && sample_count != 4)
276 return false;
277
278 if (usage & PIPE_BIND_RENDER_TARGET &&
279 !lima_format_pixel_supported(format))
280 return false;
281
282 if (usage & PIPE_BIND_DEPTH_STENCIL) {
283 switch (format) {
284 case PIPE_FORMAT_Z16_UNORM:
285 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
286 case PIPE_FORMAT_Z24X8_UNORM:
287 break;
288 default:
289 return false;
290 }
291 }
292
293 if (usage & PIPE_BIND_VERTEX_BUFFER) {
294 switch (format) {
295 case PIPE_FORMAT_R32G32B32_FLOAT:
296 break;
297 default:
298 return false;
299 }
300 }
301
302 if (usage & PIPE_BIND_INDEX_BUFFER) {
303 switch (format) {
304 case PIPE_FORMAT_I8_UINT:
305 case PIPE_FORMAT_I16_UINT:
306 case PIPE_FORMAT_I32_UINT:
307 break;
308 default:
309 return false;
310 }
311 }
312
313 if (usage & PIPE_BIND_SAMPLER_VIEW)
314 return lima_format_texel_supported(format);
315
316 return true;
317 }
318
319 static const void *
320 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
321 enum pipe_shader_ir ir,
322 enum pipe_shader_type shader)
323 {
324 return lima_program_get_compiler_options(shader);
325 }
326
327 static bool
328 lima_screen_set_plb_max_blk(struct lima_screen *screen)
329 {
330 if (lima_plb_max_blk) {
331 screen->plb_max_blk = lima_plb_max_blk;
332 return true;
333 }
334
335 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
336 screen->plb_max_blk = 4096;
337 else
338 screen->plb_max_blk = 512;
339
340 drmDevicePtr devinfo;
341
342 if (drmGetDevice2(screen->fd, 0, &devinfo))
343 return false;
344
345 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
346 char **compatible = devinfo->deviceinfo.platform->compatible;
347
348 if (compatible && *compatible)
349 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
350 screen->plb_max_blk = 2048;
351 }
352
353 drmFreeDevice(&devinfo);
354
355 return true;
356 }
357
358 static bool
359 lima_screen_query_info(struct lima_screen *screen)
360 {
361 struct drm_lima_get_param param;
362
363 memset(&param, 0, sizeof(param));
364 param.param = DRM_LIMA_PARAM_GPU_ID;
365 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
366 return false;
367
368 switch (param.value) {
369 case DRM_LIMA_PARAM_GPU_ID_MALI400:
370 case DRM_LIMA_PARAM_GPU_ID_MALI450:
371 screen->gpu_type = param.value;
372 break;
373 default:
374 return false;
375 }
376
377 memset(&param, 0, sizeof(param));
378 param.param = DRM_LIMA_PARAM_NUM_PP;
379 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
380 return false;
381
382 screen->num_pp = param.value;
383
384 lima_screen_set_plb_max_blk(screen);
385
386 return true;
387 }
388
389 static void
390 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
391 enum pipe_format format, int max,
392 uint64_t *modifiers,
393 unsigned int *external_only,
394 int *count)
395 {
396 uint64_t available_modifiers[] = {
397 DRM_FORMAT_MOD_LINEAR,
398 };
399
400 if (!modifiers) {
401 *count = ARRAY_SIZE(available_modifiers);
402 return;
403 }
404
405 for (int i = 0; i < *count; i++) {
406 modifiers[i] = available_modifiers[i];
407 if (external_only)
408 external_only = false;
409 }
410 }
411
412 static const struct debug_named_value debug_options[] = {
413 { "gp", LIMA_DEBUG_GP,
414 "print GP shader compiler result of each stage" },
415 { "pp", LIMA_DEBUG_PP,
416 "print PP shader compiler result of each stage" },
417 { "dump", LIMA_DEBUG_DUMP,
418 "dump GPU command stream to $PWD/lima.dump" },
419 { "shaderdb", LIMA_DEBUG_SHADERDB,
420 "print shader information for shaderdb" },
421 { NULL }
422 };
423
424 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
425 uint32_t lima_debug;
426
427 static void
428 lima_screen_parse_env(void)
429 {
430 lima_debug = debug_get_option_lima_debug();
431
432 if (lima_debug & LIMA_DEBUG_DUMP) {
433 const char *dump_command = "lima.dump";
434 printf("lima: dump command stream to file %s\n", dump_command);
435 lima_dump_command_stream = fopen(dump_command, "w");
436 if (!lima_dump_command_stream)
437 fprintf(stderr, "lima: fail to open command stream log file %s\n",
438 dump_command);
439 }
440
441 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
442 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
443 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
444 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
445 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
446 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
447 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
448 }
449
450 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
451 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
452 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
453 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
454 lima_plb_max_blk = 0;
455 }
456
457 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
458 if (lima_ppir_force_spilling < 0) {
459 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
460 "reset to default 0\n", lima_ppir_force_spilling);
461 lima_ppir_force_spilling = 0;
462 }
463 }
464
465 struct pipe_screen *
466 lima_screen_create(int fd, struct renderonly *ro)
467 {
468 struct lima_screen *screen;
469
470 screen = rzalloc(NULL, struct lima_screen);
471 if (!screen)
472 return NULL;
473
474 screen->fd = fd;
475
476 lima_screen_parse_env();
477
478 if (!lima_screen_query_info(screen))
479 goto err_out0;
480
481 if (!lima_bo_table_init(screen))
482 goto err_out0;
483
484 screen->pp_ra = ppir_regalloc_init(screen);
485 if (!screen->pp_ra)
486 goto err_out1;
487
488 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
489 if (!screen->pp_buffer)
490 goto err_out1;
491
492 /* fs program for clear buffer?
493 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
494 */
495 static const uint32_t pp_clear_program[] = {
496 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
497 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
498 };
499 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
500 pp_clear_program, sizeof(pp_clear_program));
501
502 /* copy texture to framebuffer, used to reload gpu tile buffer
503 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
504 */
505 static const uint32_t pp_reload_program[] = {
506 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
507 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
508 };
509 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
510 pp_reload_program, sizeof(pp_reload_program));
511
512 /* 0/1/2 vertex index for reload/clear draw */
513 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
514 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
515 pp_shared_index, sizeof(pp_shared_index));
516
517 /* 4096x4096 gl pos used for partial clear */
518 static const float pp_clear_gl_pos[] = {
519 4096, 0, 1, 1,
520 0, 0, 1, 1,
521 0, 4096, 1, 1,
522 };
523 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
524 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
525
526 /* is pp frame render state static? */
527 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
528 memset(pp_frame_rsw, 0, 0x40);
529 pp_frame_rsw[8] = 0x0000f008;
530 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
531 pp_frame_rsw[13] = 0x00000100;
532
533 if (ro) {
534 screen->ro = renderonly_dup(ro);
535 if (!screen->ro) {
536 fprintf(stderr, "Failed to dup renderonly object\n");
537 goto err_out2;
538 }
539 }
540
541 screen->base.destroy = lima_screen_destroy;
542 screen->base.get_name = lima_screen_get_name;
543 screen->base.get_vendor = lima_screen_get_vendor;
544 screen->base.get_device_vendor = lima_screen_get_device_vendor;
545 screen->base.get_param = lima_screen_get_param;
546 screen->base.get_paramf = lima_screen_get_paramf;
547 screen->base.get_shader_param = lima_screen_get_shader_param;
548 screen->base.context_create = lima_context_create;
549 screen->base.is_format_supported = lima_screen_is_format_supported;
550 screen->base.get_compiler_options = lima_screen_get_compiler_options;
551 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
552
553 lima_resource_screen_init(screen);
554 lima_fence_screen_init(screen);
555
556 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
557
558 screen->refcnt = 1;
559
560 return &screen->base;
561
562 err_out2:
563 lima_bo_free(screen->pp_buffer);
564 err_out1:
565 lima_bo_table_fini(screen);
566 err_out0:
567 ralloc_free(screen);
568 return NULL;
569 }