60020f28a0c09a804dbce85484b703a23684831f
[mesa.git] / src / gallium / drivers / lima / lima_screen.c
1 /*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25 #include <string.h>
26
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
31
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
34
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
39 #include "lima_bo.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "ir/lima_ir.h"
43
44 #include "xf86drm.h"
45
46 int lima_plb_max_blk = 0;
47
48 static void
49 lima_screen_destroy(struct pipe_screen *pscreen)
50 {
51 struct lima_screen *screen = lima_screen(pscreen);
52
53 if (lima_dump_command_stream) {
54 fclose(lima_dump_command_stream);
55 lima_dump_command_stream = NULL;
56 }
57
58 slab_destroy_parent(&screen->transfer_pool);
59
60 if (screen->ro)
61 free(screen->ro);
62
63 if (screen->pp_buffer)
64 lima_bo_unreference(screen->pp_buffer);
65
66 lima_bo_cache_fini(screen);
67 lima_bo_table_fini(screen);
68 ralloc_free(screen);
69 }
70
71 static const char *
72 lima_screen_get_name(struct pipe_screen *pscreen)
73 {
74 struct lima_screen *screen = lima_screen(pscreen);
75
76 switch (screen->gpu_type) {
77 case DRM_LIMA_PARAM_GPU_ID_MALI400:
78 return "Mali400";
79 case DRM_LIMA_PARAM_GPU_ID_MALI450:
80 return "Mali450";
81 }
82
83 return NULL;
84 }
85
86 static const char *
87 lima_screen_get_vendor(struct pipe_screen *pscreen)
88 {
89 return "lima";
90 }
91
92 static const char *
93 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
94 {
95 return "ARM";
96 }
97
98 static int
99 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
100 {
101 switch (param) {
102 case PIPE_CAP_NPOT_TEXTURES:
103 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
104 case PIPE_CAP_ACCELERATED:
105 case PIPE_CAP_UMA:
106 case PIPE_CAP_NATIVE_FENCE_FD:
107 return 1;
108
109 /* Unimplemented, but for exporting OpenGL 2.0 */
110 case PIPE_CAP_OCCLUSION_QUERY:
111 case PIPE_CAP_POINT_SPRITE:
112 return 1;
113
114 /* not clear supported */
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
116 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
118 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
119 return 1;
120
121 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
122 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
123 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
124 return 1;
125
126 case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
127 return 1 << (LIMA_MAX_MIP_LEVELS - 1);
128 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
129 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
130 return LIMA_MAX_MIP_LEVELS;
131
132 case PIPE_CAP_VENDOR_ID:
133 return 0x13B5;
134
135 case PIPE_CAP_VIDEO_MEMORY:
136 return 0;
137
138 case PIPE_CAP_PCI_GROUP:
139 case PIPE_CAP_PCI_BUS:
140 case PIPE_CAP_PCI_DEVICE:
141 case PIPE_CAP_PCI_FUNCTION:
142 return 0;
143
144 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
145 return 0;
146
147 default:
148 return u_pipe_screen_get_param_defaults(pscreen, param);
149 }
150 }
151
152 static float
153 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
154 {
155 switch (param) {
156 case PIPE_CAPF_MAX_LINE_WIDTH:
157 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
158 case PIPE_CAPF_MAX_POINT_WIDTH:
159 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
160 return 100.0f;
161 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
162 return 16.0f;
163 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
164 return 16.0f;
165
166 default:
167 return 0.0f;
168 }
169 }
170
171 static int
172 get_vertex_shader_param(struct lima_screen *screen,
173 enum pipe_shader_cap param)
174 {
175 switch (param) {
176 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
177 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
178 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
179 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
180 return 16384; /* need investigate */
181
182 case PIPE_SHADER_CAP_MAX_INPUTS:
183 return 16; /* attributes */
184
185 case PIPE_SHADER_CAP_MAX_OUTPUTS:
186 return LIMA_MAX_VARYING_NUM; /* varying */
187
188 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
189 return 4096; /* need investigate */
190 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
191 return 1;
192
193 case PIPE_SHADER_CAP_PREFERRED_IR:
194 return PIPE_SHADER_IR_NIR;
195
196 case PIPE_SHADER_CAP_MAX_TEMPS:
197 return 256; /* need investigate */
198
199 default:
200 return 0;
201 }
202 }
203
204 static int
205 get_fragment_shader_param(struct lima_screen *screen,
206 enum pipe_shader_cap param)
207 {
208 switch (param) {
209 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
210 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
211 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
212 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
213 return 16384; /* need investigate */
214
215 case PIPE_SHADER_CAP_MAX_INPUTS:
216 return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
217
218 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
219 return 4096; /* need investigate */
220 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
221 return 1;
222
223 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
224 return 16; /* need investigate */
225
226 case PIPE_SHADER_CAP_PREFERRED_IR:
227 return PIPE_SHADER_IR_NIR;
228
229 case PIPE_SHADER_CAP_MAX_TEMPS:
230 return 256; /* need investigate */
231
232 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
233 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
234 return 1;
235
236 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
237 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
238 return 0;
239
240 default:
241 return 0;
242 }
243 }
244
245 static int
246 lima_screen_get_shader_param(struct pipe_screen *pscreen,
247 enum pipe_shader_type shader,
248 enum pipe_shader_cap param)
249 {
250 struct lima_screen *screen = lima_screen(pscreen);
251
252 switch (shader) {
253 case PIPE_SHADER_FRAGMENT:
254 return get_fragment_shader_param(screen, param);
255 case PIPE_SHADER_VERTEX:
256 return get_vertex_shader_param(screen, param);
257
258 default:
259 return 0;
260 }
261 }
262
263 static bool
264 lima_screen_is_format_supported(struct pipe_screen *pscreen,
265 enum pipe_format format,
266 enum pipe_texture_target target,
267 unsigned sample_count,
268 unsigned storage_sample_count,
269 unsigned usage)
270 {
271 switch (target) {
272 case PIPE_BUFFER:
273 case PIPE_TEXTURE_1D:
274 case PIPE_TEXTURE_2D:
275 case PIPE_TEXTURE_RECT:
276 case PIPE_TEXTURE_CUBE:
277 break;
278 default:
279 return false;
280 }
281
282 if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
283 return false;
284
285 /* be able to support 16, now limit to 4 */
286 if (sample_count > 1 && sample_count != 4)
287 return false;
288
289 if (usage & PIPE_BIND_RENDER_TARGET &&
290 !lima_format_pixel_supported(format))
291 return false;
292
293 if (usage & PIPE_BIND_DEPTH_STENCIL) {
294 switch (format) {
295 case PIPE_FORMAT_Z16_UNORM:
296 case PIPE_FORMAT_Z24_UNORM_S8_UINT:
297 case PIPE_FORMAT_Z24X8_UNORM:
298 break;
299 default:
300 return false;
301 }
302 }
303
304 if (usage & PIPE_BIND_VERTEX_BUFFER) {
305 switch (format) {
306 case PIPE_FORMAT_R32G32B32_FLOAT:
307 break;
308 default:
309 return false;
310 }
311 }
312
313 if (usage & PIPE_BIND_INDEX_BUFFER) {
314 switch (format) {
315 case PIPE_FORMAT_I8_UINT:
316 case PIPE_FORMAT_I16_UINT:
317 case PIPE_FORMAT_I32_UINT:
318 break;
319 default:
320 return false;
321 }
322 }
323
324 if (usage & PIPE_BIND_SAMPLER_VIEW)
325 return lima_format_texel_supported(format);
326
327 return true;
328 }
329
330 static const void *
331 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
332 enum pipe_shader_ir ir,
333 enum pipe_shader_type shader)
334 {
335 return lima_program_get_compiler_options(shader);
336 }
337
338 static bool
339 lima_screen_set_plb_max_blk(struct lima_screen *screen)
340 {
341 if (lima_plb_max_blk) {
342 screen->plb_max_blk = lima_plb_max_blk;
343 return true;
344 }
345
346 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
347 screen->plb_max_blk = 4096;
348 else
349 screen->plb_max_blk = 512;
350
351 drmDevicePtr devinfo;
352
353 if (drmGetDevice2(screen->fd, 0, &devinfo))
354 return false;
355
356 if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
357 char **compatible = devinfo->deviceinfo.platform->compatible;
358
359 if (compatible && *compatible)
360 if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
361 screen->plb_max_blk = 2048;
362 }
363
364 drmFreeDevice(&devinfo);
365
366 return true;
367 }
368
369 static bool
370 lima_screen_query_info(struct lima_screen *screen)
371 {
372 struct drm_lima_get_param param;
373
374 memset(&param, 0, sizeof(param));
375 param.param = DRM_LIMA_PARAM_GPU_ID;
376 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
377 return false;
378
379 switch (param.value) {
380 case DRM_LIMA_PARAM_GPU_ID_MALI400:
381 case DRM_LIMA_PARAM_GPU_ID_MALI450:
382 screen->gpu_type = param.value;
383 break;
384 default:
385 return false;
386 }
387
388 memset(&param, 0, sizeof(param));
389 param.param = DRM_LIMA_PARAM_NUM_PP;
390 if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
391 return false;
392
393 screen->num_pp = param.value;
394
395 lima_screen_set_plb_max_blk(screen);
396
397 return true;
398 }
399
400 static void
401 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
402 enum pipe_format format, int max,
403 uint64_t *modifiers,
404 unsigned int *external_only,
405 int *count)
406 {
407 uint64_t available_modifiers[] = {
408 DRM_FORMAT_MOD_LINEAR,
409 };
410
411 if (!modifiers) {
412 *count = ARRAY_SIZE(available_modifiers);
413 return;
414 }
415
416 for (int i = 0; i < *count; i++) {
417 modifiers[i] = available_modifiers[i];
418 if (external_only)
419 external_only = false;
420 }
421 }
422
423 static const struct debug_named_value debug_options[] = {
424 { "gp", LIMA_DEBUG_GP,
425 "print GP shader compiler result of each stage" },
426 { "pp", LIMA_DEBUG_PP,
427 "print PP shader compiler result of each stage" },
428 { "dump", LIMA_DEBUG_DUMP,
429 "dump GPU command stream to $PWD/lima.dump" },
430 { "shaderdb", LIMA_DEBUG_SHADERDB,
431 "print shader information for shaderdb" },
432 { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
433 "disable BO cache" },
434 { "bocache", LIMA_DEBUG_BO_CACHE,
435 "print debug info for BO cache" },
436 { NULL }
437 };
438
439 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
440 uint32_t lima_debug;
441
442 static void
443 lima_screen_parse_env(void)
444 {
445 lima_debug = debug_get_option_lima_debug();
446
447 if (lima_debug & LIMA_DEBUG_DUMP) {
448 const char *dump_command = "lima.dump";
449 printf("lima: dump command stream to file %s\n", dump_command);
450 lima_dump_command_stream = fopen(dump_command, "w");
451 if (!lima_dump_command_stream)
452 fprintf(stderr, "lima: fail to open command stream log file %s\n",
453 dump_command);
454 }
455
456 lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
457 if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
458 lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
459 fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
460 "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
461 LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
462 lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
463 }
464
465 lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
466 if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
467 fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
468 "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
469 lima_plb_max_blk = 0;
470 }
471
472 lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
473 if (lima_ppir_force_spilling < 0) {
474 fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
475 "reset to default 0\n", lima_ppir_force_spilling);
476 lima_ppir_force_spilling = 0;
477 }
478 }
479
480 struct pipe_screen *
481 lima_screen_create(int fd, struct renderonly *ro)
482 {
483 struct lima_screen *screen;
484
485 screen = rzalloc(NULL, struct lima_screen);
486 if (!screen)
487 return NULL;
488
489 screen->fd = fd;
490
491 lima_screen_parse_env();
492
493 if (!lima_screen_query_info(screen))
494 goto err_out0;
495
496 if (!lima_bo_cache_init(screen))
497 goto err_out0;
498
499 if (!lima_bo_table_init(screen))
500 goto err_out1;
501
502 screen->pp_ra = ppir_regalloc_init(screen);
503 if (!screen->pp_ra)
504 goto err_out2;
505
506 screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
507 if (!screen->pp_buffer)
508 goto err_out2;
509 screen->pp_buffer->cacheable = false;
510
511 /* fs program for clear buffer?
512 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
513 */
514 static const uint32_t pp_clear_program[] = {
515 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
516 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
517 };
518 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
519 pp_clear_program, sizeof(pp_clear_program));
520
521 /* copy texture to framebuffer, used to reload gpu tile buffer
522 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
523 */
524 static const uint32_t pp_reload_program[] = {
525 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
526 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
527 };
528 memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
529 pp_reload_program, sizeof(pp_reload_program));
530
531 /* 0/1/2 vertex index for reload/clear draw */
532 static const uint8_t pp_shared_index[] = { 0, 1, 2 };
533 memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
534 pp_shared_index, sizeof(pp_shared_index));
535
536 /* 4096x4096 gl pos used for partial clear */
537 static const float pp_clear_gl_pos[] = {
538 4096, 0, 1, 1,
539 0, 0, 1, 1,
540 0, 4096, 1, 1,
541 };
542 memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
543 pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
544
545 /* is pp frame render state static? */
546 uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
547 memset(pp_frame_rsw, 0, 0x40);
548 pp_frame_rsw[8] = 0x0000f008;
549 pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
550 pp_frame_rsw[13] = 0x00000100;
551
552 if (ro) {
553 screen->ro = renderonly_dup(ro);
554 if (!screen->ro) {
555 fprintf(stderr, "Failed to dup renderonly object\n");
556 goto err_out3;
557 }
558 }
559
560 screen->base.destroy = lima_screen_destroy;
561 screen->base.get_name = lima_screen_get_name;
562 screen->base.get_vendor = lima_screen_get_vendor;
563 screen->base.get_device_vendor = lima_screen_get_device_vendor;
564 screen->base.get_param = lima_screen_get_param;
565 screen->base.get_paramf = lima_screen_get_paramf;
566 screen->base.get_shader_param = lima_screen_get_shader_param;
567 screen->base.context_create = lima_context_create;
568 screen->base.is_format_supported = lima_screen_is_format_supported;
569 screen->base.get_compiler_options = lima_screen_get_compiler_options;
570 screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
571
572 lima_resource_screen_init(screen);
573 lima_fence_screen_init(screen);
574
575 slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
576
577 screen->refcnt = 1;
578
579 return &screen->base;
580
581 err_out3:
582 lima_bo_unreference(screen->pp_buffer);
583 err_out2:
584 lima_bo_table_fini(screen);
585 err_out1:
586 lima_bo_cache_fini(screen);
587 err_out0:
588 ralloc_free(screen);
589 return NULL;
590 }