src/gallium/drivers/lima/lima_screen.c

   1 /*
   2  * Copyright (c) 2017-2019 Lima Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include <string.h>
  26
  27 #include "util/ralloc.h"
  28 #include "util/u_debug.h"
  29 #include "util/u_screen.h"
  30 #include "renderonly/renderonly.h"
  31
  32 #include "drm-uapi/drm_fourcc.h"
  33 #include "drm-uapi/lima_drm.h"
  34
  35 #include "lima_screen.h"
  36 #include "lima_context.h"
  37 #include "lima_resource.h"
  38 #include "lima_program.h"
  39 #include "lima_bo.h"
  40 #include "lima_fence.h"
  41 #include "lima_format.h"
  42 #include "ir/lima_ir.h"
  43
  44 #include "xf86drm.h"
  45
  46 int lima_plb_max_blk = 0;
  47
  48 static void
  49 lima_screen_destroy(struct pipe_screen *pscreen)
  50 {
  51    struct lima_screen *screen = lima_screen(pscreen);
  52
  53    slab_destroy_parent(&screen->transfer_pool);
  54
  55    if (screen->ro)
  56       free(screen->ro);
  57
  58    if (screen->pp_buffer)
  59       lima_bo_unreference(screen->pp_buffer);
  60
  61    lima_bo_cache_fini(screen);
  62    lima_bo_table_fini(screen);
  63    ralloc_free(screen);
  64 }
  65
  66 static const char *
  67 lima_screen_get_name(struct pipe_screen *pscreen)
  68 {
  69    struct lima_screen *screen = lima_screen(pscreen);
  70
  71    switch (screen->gpu_type) {
  72    case DRM_LIMA_PARAM_GPU_ID_MALI400:
  73      return "Mali400";
  74    case DRM_LIMA_PARAM_GPU_ID_MALI450:
  75      return "Mali450";
  76    }
  77
  78    return NULL;
  79 }
  80
  81 static const char *
  82 lima_screen_get_vendor(struct pipe_screen *pscreen)
  83 {
  84    return "lima";
  85 }
  86
  87 static const char *
  88 lima_screen_get_device_vendor(struct pipe_screen *pscreen)
  89 {
  90    return "ARM";
  91 }
  92
  93 static int
  94 lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
  95 {
  96    switch (param) {
  97    case PIPE_CAP_NPOT_TEXTURES:
  98    case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  99    case PIPE_CAP_ACCELERATED:
 100    case PIPE_CAP_UMA:
 101    case PIPE_CAP_NATIVE_FENCE_FD:
 102    case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
 103       return 1;
 104
 105    /* Unimplemented, but for exporting OpenGL 2.0 */
 106    case PIPE_CAP_OCCLUSION_QUERY:
 107    case PIPE_CAP_POINT_SPRITE:
 108       return 1;
 109
 110    /* not clear supported */
 111    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 112    case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 113    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 114    case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 115       return 1;
 116
 117    case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 118    case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
 119    case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 120       return 1;
 121
 122    case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 123       return 1 << (LIMA_MAX_MIP_LEVELS - 1);
 124    case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 125    case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 126       return LIMA_MAX_MIP_LEVELS;
 127
 128    case PIPE_CAP_VENDOR_ID:
 129       return 0x13B5;
 130
 131    case PIPE_CAP_VIDEO_MEMORY:
 132       return 0;
 133
 134    case PIPE_CAP_PCI_GROUP:
 135    case PIPE_CAP_PCI_BUS:
 136    case PIPE_CAP_PCI_DEVICE:
 137    case PIPE_CAP_PCI_FUNCTION:
 138       return 0;
 139
 140    case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 141       return 0;
 142
 143    case PIPE_CAP_ALPHA_TEST:
 144    case PIPE_CAP_FLATSHADE:
 145    case PIPE_CAP_TWO_SIDED_COLOR:
 146    case PIPE_CAP_CLIP_PLANES:
 147       return 0;
 148
 149    default:
 150       return u_pipe_screen_get_param_defaults(pscreen, param);
 151    }
 152 }
 153
 154 static float
 155 lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
 156 {
 157    switch (param) {
 158    case PIPE_CAPF_MAX_LINE_WIDTH:
 159    case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 160    case PIPE_CAPF_MAX_POINT_WIDTH:
 161    case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 162       return 100.0f;
 163    case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 164       return 16.0f;
 165    case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 166       return 15.0f;
 167
 168    default:
 169       return 0.0f;
 170    }
 171 }
 172
 173 static int
 174 get_vertex_shader_param(struct lima_screen *screen,
 175                         enum pipe_shader_cap param)
 176 {
 177    switch (param) {
 178    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 179    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 180    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 181    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 182       return 16384; /* need investigate */
 183
 184    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 185       return 1024;
 186
 187    case PIPE_SHADER_CAP_MAX_INPUTS:
 188       return 16; /* attributes */
 189
 190    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 191       return LIMA_MAX_VARYING_NUM; /* varying */
 192
 193    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 194       return 16 * 1024 * sizeof(float);
 195
 196    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 197       return 1;
 198
 199    case PIPE_SHADER_CAP_PREFERRED_IR:
 200       return PIPE_SHADER_IR_NIR;
 201
 202    case PIPE_SHADER_CAP_MAX_TEMPS:
 203       return 256; /* need investigate */
 204
 205    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 206       return 32;
 207
 208    default:
 209       return 0;
 210    }
 211 }
 212
 213 static int
 214 get_fragment_shader_param(struct lima_screen *screen,
 215                           enum pipe_shader_cap param)
 216 {
 217    switch (param) {
 218    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 219    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 220    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 221    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 222       return 16384; /* need investigate */
 223
 224    case PIPE_SHADER_CAP_MAX_INPUTS:
 225       return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
 226
 227    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 228       return 1024;
 229
 230    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 231       return 16 * 1024 * sizeof(float);
 232
 233    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 234       return 1;
 235
 236    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 237       return 16; /* need investigate */
 238
 239    case PIPE_SHADER_CAP_PREFERRED_IR:
 240       return PIPE_SHADER_IR_NIR;
 241
 242    case PIPE_SHADER_CAP_MAX_TEMPS:
 243       return 256; /* need investigate */
 244
 245    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 246    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 247       return 1;
 248
 249    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 250    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 251       return 0;
 252
 253    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 254       return 32;
 255
 256    default:
 257       return 0;
 258    }
 259 }
 260
 261 static int
 262 lima_screen_get_shader_param(struct pipe_screen *pscreen,
 263                              enum pipe_shader_type shader,
 264                              enum pipe_shader_cap param)
 265 {
 266    struct lima_screen *screen = lima_screen(pscreen);
 267
 268    switch (shader) {
 269    case PIPE_SHADER_FRAGMENT:
 270       return get_fragment_shader_param(screen, param);
 271    case PIPE_SHADER_VERTEX:
 272       return get_vertex_shader_param(screen, param);
 273
 274    default:
 275       return 0;
 276    }
 277 }
 278
 279 static bool
 280 lima_screen_is_format_supported(struct pipe_screen *pscreen,
 281                                 enum pipe_format format,
 282                                 enum pipe_texture_target target,
 283                                 unsigned sample_count,
 284                                 unsigned storage_sample_count,
 285                                 unsigned usage)
 286 {
 287    switch (target) {
 288    case PIPE_BUFFER:
 289    case PIPE_TEXTURE_1D:
 290    case PIPE_TEXTURE_2D:
 291    case PIPE_TEXTURE_RECT:
 292    case PIPE_TEXTURE_CUBE:
 293       break;
 294    default:
 295       return false;
 296    }
 297
 298    if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
 299       return false;
 300
 301    /* be able to support 16, now limit to 4 */
 302    if (sample_count > 1 && sample_count != 4)
 303       return false;
 304
 305    if (usage & PIPE_BIND_RENDER_TARGET &&
 306        !lima_format_pixel_supported(format))
 307       return false;
 308
 309    if (usage & PIPE_BIND_DEPTH_STENCIL) {
 310       switch (format) {
 311       case PIPE_FORMAT_Z16_UNORM:
 312       case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 313       case PIPE_FORMAT_Z24X8_UNORM:
 314          break;
 315       default:
 316          return false;
 317       }
 318    }
 319
 320    if (usage & PIPE_BIND_VERTEX_BUFFER) {
 321       switch (format) {
 322       case PIPE_FORMAT_R32G32B32_FLOAT:
 323          break;
 324       default:
 325          return false;
 326       }
 327    }
 328
 329    if (usage & PIPE_BIND_INDEX_BUFFER) {
 330       switch (format) {
 331       case PIPE_FORMAT_I8_UINT:
 332       case PIPE_FORMAT_I16_UINT:
 333       case PIPE_FORMAT_I32_UINT:
 334          break;
 335       default:
 336          return false;
 337       }
 338    }
 339
 340    if (usage & PIPE_BIND_SAMPLER_VIEW)
 341       return lima_format_texel_supported(format);
 342
 343    return true;
 344 }
 345
 346 static const void *
 347 lima_screen_get_compiler_options(struct pipe_screen *pscreen,
 348                                  enum pipe_shader_ir ir,
 349                                  enum pipe_shader_type shader)
 350 {
 351    return lima_program_get_compiler_options(shader);
 352 }
 353
 354 static bool
 355 lima_screen_set_plb_max_blk(struct lima_screen *screen)
 356 {
 357    if (lima_plb_max_blk) {
 358       screen->plb_max_blk = lima_plb_max_blk;
 359       return true;
 360    }
 361
 362    if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
 363       screen->plb_max_blk = 4096;
 364    else
 365       screen->plb_max_blk = 512;
 366
 367    drmDevicePtr devinfo;
 368
 369    if (drmGetDevice2(screen->fd, 0, &devinfo))
 370       return false;
 371
 372    if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
 373       char **compatible = devinfo->deviceinfo.platform->compatible;
 374
 375       if (compatible && *compatible)
 376          if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
 377             screen->plb_max_blk = 2048;
 378    }
 379
 380    drmFreeDevice(&devinfo);
 381
 382    return true;
 383 }
 384
 385 static bool
 386 lima_screen_query_info(struct lima_screen *screen)
 387 {
 388    drmVersionPtr version = drmGetVersion(screen->fd);
 389    if (!version)
 390       return false;
 391
 392    if (version->version_major > 1 || version->version_minor > 0)
 393       screen->has_growable_heap_buffer = true;
 394
 395    drmFreeVersion(version);
 396
 397    if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
 398       screen->has_growable_heap_buffer = false;
 399
 400    struct drm_lima_get_param param;
 401
 402    memset(&param, 0, sizeof(param));
 403    param.param = DRM_LIMA_PARAM_GPU_ID;
 404    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 405       return false;
 406
 407    switch (param.value) {
 408    case DRM_LIMA_PARAM_GPU_ID_MALI400:
 409    case DRM_LIMA_PARAM_GPU_ID_MALI450:
 410       screen->gpu_type = param.value;
 411       break;
 412    default:
 413       return false;
 414    }
 415
 416    memset(&param, 0, sizeof(param));
 417    param.param = DRM_LIMA_PARAM_NUM_PP;
 418    if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
 419       return false;
 420
 421    screen->num_pp = param.value;
 422
 423    lima_screen_set_plb_max_blk(screen);
 424
 425    return true;
 426 }
 427
 428 static void
 429 lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
 430                                    enum pipe_format format, int max,
 431                                    uint64_t *modifiers,
 432                                    unsigned int *external_only,
 433                                    int *count)
 434 {
 435    uint64_t available_modifiers[] = {
 436       DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
 437       DRM_FORMAT_MOD_LINEAR,
 438    };
 439
 440    if (!modifiers) {
 441       *count = ARRAY_SIZE(available_modifiers);
 442       return;
 443    }
 444
 445    for (int i = 0; i < *count; i++) {
 446       modifiers[i] = available_modifiers[i];
 447       if (external_only)
 448          external_only = false;
 449    }
 450 }
 451
 452 static const struct debug_named_value debug_options[] = {
 453         { "gp",       LIMA_DEBUG_GP,
 454           "print GP shader compiler result of each stage" },
 455         { "pp",       LIMA_DEBUG_PP,
 456           "print PP shader compiler result of each stage" },
 457         { "dump",     LIMA_DEBUG_DUMP,
 458           "dump GPU command stream to $PWD/lima.dump" },
 459         { "shaderdb", LIMA_DEBUG_SHADERDB,
 460           "print shader information for shaderdb" },
 461         { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
 462           "disable BO cache" },
 463         { "bocache", LIMA_DEBUG_BO_CACHE,
 464           "print debug info for BO cache" },
 465         { "notiling", LIMA_DEBUG_NO_TILING,
 466           "don't use tiled buffers" },
 467         { "nogrowheap",   LIMA_DEBUG_NO_GROW_HEAP,
 468           "disable growable heap buffer" },
 469         { "singlejob", LIMA_DEBUG_SINGLE_JOB,
 470           "disable multi job optimization" },
 471         { NULL }
 472 };
 473
 474 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", debug_options, 0)
 475 uint32_t lima_debug;
 476
 477 static void
 478 lima_screen_parse_env(void)
 479 {
 480    lima_debug = debug_get_option_lima_debug();
 481
 482    lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
 483    if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
 484        lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
 485       fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
 486               "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
 487               LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
 488       lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
 489    }
 490
 491    lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
 492    if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
 493       fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
 494               "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
 495       lima_plb_max_blk = 0;
 496    }
 497
 498    lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
 499    if (lima_ppir_force_spilling < 0) {
 500       fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
 501               "reset to default 0\n", lima_ppir_force_spilling);
 502       lima_ppir_force_spilling = 0;
 503    }
 504 }
 505
 506 struct pipe_screen *
 507 lima_screen_create(int fd, struct renderonly *ro)
 508 {
 509    struct lima_screen *screen;
 510
 511    screen = rzalloc(NULL, struct lima_screen);
 512    if (!screen)
 513       return NULL;
 514
 515    screen->fd = fd;
 516
 517    lima_screen_parse_env();
 518
 519    if (!lima_screen_query_info(screen))
 520       goto err_out0;
 521
 522    if (!lima_bo_cache_init(screen))
 523       goto err_out0;
 524
 525    if (!lima_bo_table_init(screen))
 526       goto err_out1;
 527
 528    screen->pp_ra = ppir_regalloc_init(screen);
 529    if (!screen->pp_ra)
 530       goto err_out2;
 531
 532    screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
 533    if (!screen->pp_buffer)
 534       goto err_out2;
 535    screen->pp_buffer->cacheable = false;
 536
 537    /* fs program for clear buffer?
 538     * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
 539     */
 540    static const uint32_t pp_clear_program[] = {
 541       0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
 542       0x000005f5, 0x00000000, 0x00000000, 0x00000000,
 543    };
 544    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
 545           pp_clear_program, sizeof(pp_clear_program));
 546
 547    /* copy texture to framebuffer, used to reload gpu tile buffer
 548     * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
 549     */
 550    static const uint32_t pp_reload_program[] = {
 551       0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
 552       0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
 553    };
 554    memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
 555           pp_reload_program, sizeof(pp_reload_program));
 556
 557    /* 0/1/2 vertex index for reload/clear draw */
 558    static const uint8_t pp_shared_index[] = { 0, 1, 2 };
 559    memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
 560           pp_shared_index, sizeof(pp_shared_index));
 561
 562    /* 4096x4096 gl pos used for partial clear */
 563    static const float pp_clear_gl_pos[] = {
 564       4096, 0,    1, 1,
 565       0,    0,    1, 1,
 566       0,    4096, 1, 1,
 567    };
 568    memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
 569           pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
 570
 571    /* is pp frame render state static? */
 572    uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
 573    memset(pp_frame_rsw, 0, 0x40);
 574    pp_frame_rsw[8] = 0x0000f008;
 575    pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
 576    pp_frame_rsw[13] = 0x00000100;
 577
 578    if (ro) {
 579       screen->ro = renderonly_dup(ro);
 580       if (!screen->ro) {
 581          fprintf(stderr, "Failed to dup renderonly object\n");
 582          goto err_out3;
 583       }
 584    }
 585
 586    screen->base.destroy = lima_screen_destroy;
 587    screen->base.get_name = lima_screen_get_name;
 588    screen->base.get_vendor = lima_screen_get_vendor;
 589    screen->base.get_device_vendor = lima_screen_get_device_vendor;
 590    screen->base.get_param = lima_screen_get_param;
 591    screen->base.get_paramf = lima_screen_get_paramf;
 592    screen->base.get_shader_param = lima_screen_get_shader_param;
 593    screen->base.context_create = lima_context_create;
 594    screen->base.is_format_supported = lima_screen_is_format_supported;
 595    screen->base.get_compiler_options = lima_screen_get_compiler_options;
 596    screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
 597
 598    lima_resource_screen_init(screen);
 599    lima_fence_screen_init(screen);
 600
 601    slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
 602
 603    screen->refcnt = 1;
 604
 605    return &screen->base;
 606
 607 err_out3:
 608    lima_bo_unreference(screen->pp_buffer);
 609 err_out2:
 610    lima_bo_table_fini(screen);
 611 err_out1:
 612    lima_bo_cache_fini(screen);
 613 err_out0:
 614    ralloc_free(screen);
 615    return NULL;
 616 }