2 * Copyright (c) 2017-2019 Lima Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
40 #include "lima_fence.h"
41 #include "lima_format.h"
42 #include "lima_util.h"
43 #include "ir/lima_ir.h"
47 int lima_plb_max_blk
= 0;
50 lima_screen_destroy(struct pipe_screen
*pscreen
)
52 struct lima_screen
*screen
= lima_screen(pscreen
);
54 lima_dump_file_close();
56 slab_destroy_parent(&screen
->transfer_pool
);
61 if (screen
->pp_buffer
)
62 lima_bo_unreference(screen
->pp_buffer
);
64 lima_bo_cache_fini(screen
);
65 lima_bo_table_fini(screen
);
70 lima_screen_get_name(struct pipe_screen
*pscreen
)
72 struct lima_screen
*screen
= lima_screen(pscreen
);
74 switch (screen
->gpu_type
) {
75 case DRM_LIMA_PARAM_GPU_ID_MALI400
:
77 case DRM_LIMA_PARAM_GPU_ID_MALI450
:
85 lima_screen_get_vendor(struct pipe_screen
*pscreen
)
91 lima_screen_get_device_vendor(struct pipe_screen
*pscreen
)
97 lima_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
100 case PIPE_CAP_NPOT_TEXTURES
:
101 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
102 case PIPE_CAP_ACCELERATED
:
104 case PIPE_CAP_NATIVE_FENCE_FD
:
105 case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD
:
108 /* Unimplemented, but for exporting OpenGL 2.0 */
109 case PIPE_CAP_OCCLUSION_QUERY
:
110 case PIPE_CAP_POINT_SPRITE
:
113 /* not clear supported */
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
115 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
117 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
120 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL
:
121 case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL
:
122 case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL
:
125 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
126 return 1 << (LIMA_MAX_MIP_LEVELS
- 1);
127 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
128 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
129 return LIMA_MAX_MIP_LEVELS
;
131 case PIPE_CAP_VENDOR_ID
:
134 case PIPE_CAP_VIDEO_MEMORY
:
137 case PIPE_CAP_PCI_GROUP
:
138 case PIPE_CAP_PCI_BUS
:
139 case PIPE_CAP_PCI_DEVICE
:
140 case PIPE_CAP_PCI_FUNCTION
:
143 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
146 case PIPE_CAP_ALPHA_TEST
:
147 case PIPE_CAP_FLATSHADE
:
148 case PIPE_CAP_TWO_SIDED_COLOR
:
149 case PIPE_CAP_CLIP_PLANES
:
153 return u_pipe_screen_get_param_defaults(pscreen
, param
);
158 lima_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
161 case PIPE_CAPF_MAX_LINE_WIDTH
:
162 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
163 case PIPE_CAPF_MAX_POINT_WIDTH
:
164 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
166 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
168 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
177 get_vertex_shader_param(struct lima_screen
*screen
,
178 enum pipe_shader_cap param
)
181 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
182 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
183 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
184 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
185 return 16384; /* need investigate */
187 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
190 case PIPE_SHADER_CAP_MAX_INPUTS
:
191 return 16; /* attributes */
193 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
194 return LIMA_MAX_VARYING_NUM
; /* varying */
196 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
197 return 16 * 1024 * sizeof(float);
199 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
202 case PIPE_SHADER_CAP_PREFERRED_IR
:
203 return PIPE_SHADER_IR_NIR
;
205 case PIPE_SHADER_CAP_MAX_TEMPS
:
206 return 256; /* need investigate */
208 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
217 get_fragment_shader_param(struct lima_screen
*screen
,
218 enum pipe_shader_cap param
)
221 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
222 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
223 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
224 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
225 return 16384; /* need investigate */
227 case PIPE_SHADER_CAP_MAX_INPUTS
:
228 return LIMA_MAX_VARYING_NUM
- 1; /* varying, minus gl_Position */
230 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
233 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
234 return 16 * 1024 * sizeof(float);
236 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
239 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
240 return 16; /* need investigate */
242 case PIPE_SHADER_CAP_PREFERRED_IR
:
243 return PIPE_SHADER_IR_NIR
;
245 case PIPE_SHADER_CAP_MAX_TEMPS
:
246 return 256; /* need investigate */
248 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
249 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
252 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
253 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
256 case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT
:
265 lima_screen_get_shader_param(struct pipe_screen
*pscreen
,
266 enum pipe_shader_type shader
,
267 enum pipe_shader_cap param
)
269 struct lima_screen
*screen
= lima_screen(pscreen
);
272 case PIPE_SHADER_FRAGMENT
:
273 return get_fragment_shader_param(screen
, param
);
274 case PIPE_SHADER_VERTEX
:
275 return get_vertex_shader_param(screen
, param
);
283 lima_screen_is_format_supported(struct pipe_screen
*pscreen
,
284 enum pipe_format format
,
285 enum pipe_texture_target target
,
286 unsigned sample_count
,
287 unsigned storage_sample_count
,
292 case PIPE_TEXTURE_1D
:
293 case PIPE_TEXTURE_2D
:
294 case PIPE_TEXTURE_RECT
:
295 case PIPE_TEXTURE_CUBE
:
301 if (MAX2(1, sample_count
) != MAX2(1, storage_sample_count
))
304 /* be able to support 16, now limit to 4 */
305 if (sample_count
> 1 && sample_count
!= 4)
308 if (usage
& PIPE_BIND_RENDER_TARGET
&&
309 !lima_format_pixel_supported(format
))
312 if (usage
& PIPE_BIND_DEPTH_STENCIL
) {
314 case PIPE_FORMAT_Z16_UNORM
:
315 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
316 case PIPE_FORMAT_Z24X8_UNORM
:
323 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
325 case PIPE_FORMAT_R32G32B32_FLOAT
:
332 if (usage
& PIPE_BIND_INDEX_BUFFER
) {
334 case PIPE_FORMAT_I8_UINT
:
335 case PIPE_FORMAT_I16_UINT
:
336 case PIPE_FORMAT_I32_UINT
:
343 if (usage
& PIPE_BIND_SAMPLER_VIEW
)
344 return lima_format_texel_supported(format
);
350 lima_screen_get_compiler_options(struct pipe_screen
*pscreen
,
351 enum pipe_shader_ir ir
,
352 enum pipe_shader_type shader
)
354 return lima_program_get_compiler_options(shader
);
358 lima_screen_set_plb_max_blk(struct lima_screen
*screen
)
360 if (lima_plb_max_blk
) {
361 screen
->plb_max_blk
= lima_plb_max_blk
;
365 if (screen
->gpu_type
== DRM_LIMA_PARAM_GPU_ID_MALI450
)
366 screen
->plb_max_blk
= 4096;
368 screen
->plb_max_blk
= 512;
370 drmDevicePtr devinfo
;
372 if (drmGetDevice2(screen
->fd
, 0, &devinfo
))
375 if (devinfo
->bustype
== DRM_BUS_PLATFORM
&& devinfo
->deviceinfo
.platform
) {
376 char **compatible
= devinfo
->deviceinfo
.platform
->compatible
;
378 if (compatible
&& *compatible
)
379 if (!strcmp("allwinner,sun50i-h5-mali", *compatible
))
380 screen
->plb_max_blk
= 2048;
383 drmFreeDevice(&devinfo
);
389 lima_screen_query_info(struct lima_screen
*screen
)
391 struct drm_lima_get_param param
;
393 memset(¶m
, 0, sizeof(param
));
394 param
.param
= DRM_LIMA_PARAM_GPU_ID
;
395 if (drmIoctl(screen
->fd
, DRM_IOCTL_LIMA_GET_PARAM
, ¶m
))
398 switch (param
.value
) {
399 case DRM_LIMA_PARAM_GPU_ID_MALI400
:
400 case DRM_LIMA_PARAM_GPU_ID_MALI450
:
401 screen
->gpu_type
= param
.value
;
407 memset(¶m
, 0, sizeof(param
));
408 param
.param
= DRM_LIMA_PARAM_NUM_PP
;
409 if (drmIoctl(screen
->fd
, DRM_IOCTL_LIMA_GET_PARAM
, ¶m
))
412 screen
->num_pp
= param
.value
;
414 lima_screen_set_plb_max_blk(screen
);
420 lima_screen_query_dmabuf_modifiers(struct pipe_screen
*pscreen
,
421 enum pipe_format format
, int max
,
423 unsigned int *external_only
,
426 uint64_t available_modifiers
[] = {
427 DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED
,
428 DRM_FORMAT_MOD_LINEAR
,
432 *count
= ARRAY_SIZE(available_modifiers
);
436 for (int i
= 0; i
< *count
; i
++) {
437 modifiers
[i
] = available_modifiers
[i
];
439 external_only
= false;
443 static const struct debug_named_value debug_options
[] = {
444 { "gp", LIMA_DEBUG_GP
,
445 "print GP shader compiler result of each stage" },
446 { "pp", LIMA_DEBUG_PP
,
447 "print PP shader compiler result of each stage" },
448 { "dump", LIMA_DEBUG_DUMP
,
449 "dump GPU command stream to $PWD/lima.dump" },
450 { "shaderdb", LIMA_DEBUG_SHADERDB
,
451 "print shader information for shaderdb" },
452 { "nobocache", LIMA_DEBUG_NO_BO_CACHE
,
453 "disable BO cache" },
454 { "bocache", LIMA_DEBUG_BO_CACHE
,
455 "print debug info for BO cache" },
456 { "notiling", LIMA_DEBUG_NO_TILING
,
457 "don't use tiled buffers" },
461 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug
, "LIMA_DEBUG", debug_options
, 0)
465 lima_screen_parse_env(void)
467 lima_debug
= debug_get_option_lima_debug();
469 if (lima_debug
& LIMA_DEBUG_DUMP
)
470 lima_dump_file_open();
472 lima_ctx_num_plb
= debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM
);
473 if (lima_ctx_num_plb
> LIMA_CTX_PLB_MAX_NUM
||
474 lima_ctx_num_plb
< LIMA_CTX_PLB_MIN_NUM
) {
475 fprintf(stderr
, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
476 "reset to default %d\n", lima_ctx_num_plb
, LIMA_CTX_PLB_MIN_NUM
,
477 LIMA_CTX_PLB_MAX_NUM
, LIMA_CTX_PLB_DEF_NUM
);
478 lima_ctx_num_plb
= LIMA_CTX_PLB_DEF_NUM
;
481 lima_plb_max_blk
= debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
482 if (lima_plb_max_blk
< 0 || lima_plb_max_blk
> 65536) {
483 fprintf(stderr
, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
484 "reset to default %d\n", lima_plb_max_blk
, 0, 65536, 0);
485 lima_plb_max_blk
= 0;
488 lima_ppir_force_spilling
= debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
489 if (lima_ppir_force_spilling
< 0) {
490 fprintf(stderr
, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
491 "reset to default 0\n", lima_ppir_force_spilling
);
492 lima_ppir_force_spilling
= 0;
497 lima_screen_create(int fd
, struct renderonly
*ro
)
499 struct lima_screen
*screen
;
501 screen
= rzalloc(NULL
, struct lima_screen
);
507 lima_screen_parse_env();
509 if (!lima_screen_query_info(screen
))
512 if (!lima_bo_cache_init(screen
))
515 if (!lima_bo_table_init(screen
))
518 screen
->pp_ra
= ppir_regalloc_init(screen
);
522 screen
->pp_buffer
= lima_bo_create(screen
, pp_buffer_size
, 0);
523 if (!screen
->pp_buffer
)
525 screen
->pp_buffer
->cacheable
= false;
527 /* fs program for clear buffer?
528 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
530 static const uint32_t pp_clear_program
[] = {
531 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
532 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
534 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_clear_program_offset
,
535 pp_clear_program
, sizeof(pp_clear_program
));
537 /* copy texture to framebuffer, used to reload gpu tile buffer
538 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
540 static const uint32_t pp_reload_program
[] = {
541 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
542 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
544 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_reload_program_offset
,
545 pp_reload_program
, sizeof(pp_reload_program
));
547 /* 0/1/2 vertex index for reload/clear draw */
548 static const uint8_t pp_shared_index
[] = { 0, 1, 2 };
549 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_shared_index_offset
,
550 pp_shared_index
, sizeof(pp_shared_index
));
552 /* 4096x4096 gl pos used for partial clear */
553 static const float pp_clear_gl_pos
[] = {
558 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_clear_gl_pos_offset
,
559 pp_clear_gl_pos
, sizeof(pp_clear_gl_pos
));
561 /* is pp frame render state static? */
562 uint32_t *pp_frame_rsw
= lima_bo_map(screen
->pp_buffer
) + pp_frame_rsw_offset
;
563 memset(pp_frame_rsw
, 0, 0x40);
564 pp_frame_rsw
[8] = 0x0000f008;
565 pp_frame_rsw
[9] = screen
->pp_buffer
->va
+ pp_clear_program_offset
;
566 pp_frame_rsw
[13] = 0x00000100;
569 screen
->ro
= renderonly_dup(ro
);
571 fprintf(stderr
, "Failed to dup renderonly object\n");
576 screen
->base
.destroy
= lima_screen_destroy
;
577 screen
->base
.get_name
= lima_screen_get_name
;
578 screen
->base
.get_vendor
= lima_screen_get_vendor
;
579 screen
->base
.get_device_vendor
= lima_screen_get_device_vendor
;
580 screen
->base
.get_param
= lima_screen_get_param
;
581 screen
->base
.get_paramf
= lima_screen_get_paramf
;
582 screen
->base
.get_shader_param
= lima_screen_get_shader_param
;
583 screen
->base
.context_create
= lima_context_create
;
584 screen
->base
.is_format_supported
= lima_screen_is_format_supported
;
585 screen
->base
.get_compiler_options
= lima_screen_get_compiler_options
;
586 screen
->base
.query_dmabuf_modifiers
= lima_screen_query_dmabuf_modifiers
;
588 lima_resource_screen_init(screen
);
589 lima_fence_screen_init(screen
);
591 slab_create_parent(&screen
->transfer_pool
, sizeof(struct lima_transfer
), 16);
595 return &screen
->base
;
598 lima_bo_unreference(screen
->pp_buffer
);
600 lima_bo_table_fini(screen
);
602 lima_bo_cache_fini(screen
);