2 * Copyright (c) 2017-2019 Lima Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
27 #include "util/ralloc.h"
28 #include "util/u_debug.h"
29 #include "util/u_screen.h"
30 #include "renderonly/renderonly.h"
32 #include "drm-uapi/drm_fourcc.h"
33 #include "drm-uapi/lima_drm.h"
35 #include "lima_screen.h"
36 #include "lima_context.h"
37 #include "lima_resource.h"
38 #include "lima_program.h"
40 #include "lima_fence.h"
41 #include "ir/lima_ir.h"
45 int lima_plb_max_blk
= 0;
48 lima_screen_destroy(struct pipe_screen
*pscreen
)
50 struct lima_screen
*screen
= lima_screen(pscreen
);
52 if (lima_dump_command_stream
) {
53 fclose(lima_dump_command_stream
);
54 lima_dump_command_stream
= NULL
;
57 slab_destroy_parent(&screen
->transfer_pool
);
62 if (screen
->pp_buffer
)
63 lima_bo_free(screen
->pp_buffer
);
65 lima_bo_table_fini(screen
);
70 lima_screen_get_name(struct pipe_screen
*pscreen
)
72 struct lima_screen
*screen
= lima_screen(pscreen
);
74 switch (screen
->gpu_type
) {
75 case DRM_LIMA_PARAM_GPU_ID_MALI400
:
77 case DRM_LIMA_PARAM_GPU_ID_MALI450
:
85 lima_screen_get_vendor(struct pipe_screen
*pscreen
)
91 lima_screen_get_device_vendor(struct pipe_screen
*pscreen
)
97 lima_screen_get_param(struct pipe_screen
*pscreen
, enum pipe_cap param
)
100 case PIPE_CAP_NPOT_TEXTURES
:
101 case PIPE_CAP_BLEND_EQUATION_SEPARATE
:
102 case PIPE_CAP_ACCELERATED
:
104 case PIPE_CAP_NATIVE_FENCE_FD
:
107 /* Unimplemented, but for exporting OpenGL 2.0 */
108 case PIPE_CAP_OCCLUSION_QUERY
:
109 case PIPE_CAP_POINT_SPRITE
:
112 /* not clear supported */
113 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT
:
114 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT
:
115 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER
:
116 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER
:
119 case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL
:
122 case PIPE_CAP_MAX_TEXTURE_2D_SIZE
:
123 return 1 << (LIMA_MAX_MIP_LEVELS
- 1);
124 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
125 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
126 return LIMA_MAX_MIP_LEVELS
;
128 case PIPE_CAP_VENDOR_ID
:
131 case PIPE_CAP_VIDEO_MEMORY
:
134 case PIPE_CAP_PCI_GROUP
:
135 case PIPE_CAP_PCI_BUS
:
136 case PIPE_CAP_PCI_DEVICE
:
137 case PIPE_CAP_PCI_FUNCTION
:
140 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER
:
144 return u_pipe_screen_get_param_defaults(pscreen
, param
);
149 lima_screen_get_paramf(struct pipe_screen
*pscreen
, enum pipe_capf param
)
152 case PIPE_CAPF_MAX_LINE_WIDTH
:
153 case PIPE_CAPF_MAX_LINE_WIDTH_AA
:
154 case PIPE_CAPF_MAX_POINT_WIDTH
:
155 case PIPE_CAPF_MAX_POINT_WIDTH_AA
:
157 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY
:
159 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS
:
168 get_vertex_shader_param(struct lima_screen
*screen
,
169 enum pipe_shader_cap param
)
172 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
173 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
174 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
175 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
176 return 16384; /* need investigate */
178 case PIPE_SHADER_CAP_MAX_INPUTS
:
179 return 16; /* attributes */
181 case PIPE_SHADER_CAP_MAX_OUTPUTS
:
182 return LIMA_MAX_VARYING_NUM
; /* varying */
184 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
185 return 4096; /* need investigate */
186 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
189 case PIPE_SHADER_CAP_PREFERRED_IR
:
190 return PIPE_SHADER_IR_NIR
;
192 case PIPE_SHADER_CAP_MAX_TEMPS
:
193 return 256; /* need investigate */
201 get_fragment_shader_param(struct lima_screen
*screen
,
202 enum pipe_shader_cap param
)
205 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
206 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
207 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
208 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
209 return 16384; /* need investigate */
211 case PIPE_SHADER_CAP_MAX_INPUTS
:
212 return LIMA_MAX_VARYING_NUM
- 1; /* varying, minus gl_Position */
214 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE
:
215 return 4096; /* need investigate */
216 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
219 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
220 return 16; /* need investigate */
222 case PIPE_SHADER_CAP_PREFERRED_IR
:
223 return PIPE_SHADER_IR_NIR
;
225 case PIPE_SHADER_CAP_MAX_TEMPS
:
226 return 256; /* need investigate */
234 lima_screen_get_shader_param(struct pipe_screen
*pscreen
,
235 enum pipe_shader_type shader
,
236 enum pipe_shader_cap param
)
238 struct lima_screen
*screen
= lima_screen(pscreen
);
241 case PIPE_SHADER_FRAGMENT
:
242 return get_fragment_shader_param(screen
, param
);
243 case PIPE_SHADER_VERTEX
:
244 return get_vertex_shader_param(screen
, param
);
252 lima_screen_is_format_supported(struct pipe_screen
*pscreen
,
253 enum pipe_format format
,
254 enum pipe_texture_target target
,
255 unsigned sample_count
,
256 unsigned storage_sample_count
,
261 case PIPE_TEXTURE_1D
:
262 case PIPE_TEXTURE_2D
:
268 if (MAX2(1, sample_count
) != MAX2(1, storage_sample_count
))
271 /* be able to support 16, now limit to 4 */
272 if (sample_count
> 1 && sample_count
!= 4)
275 if (usage
& PIPE_BIND_RENDER_TARGET
) {
277 case PIPE_FORMAT_B8G8R8A8_UNORM
:
278 case PIPE_FORMAT_B8G8R8X8_UNORM
:
279 case PIPE_FORMAT_R8G8B8A8_UNORM
:
280 case PIPE_FORMAT_R8G8B8X8_UNORM
:
281 case PIPE_FORMAT_Z16_UNORM
:
282 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
283 case PIPE_FORMAT_Z24X8_UNORM
:
290 if (usage
& PIPE_BIND_DEPTH_STENCIL
) {
292 case PIPE_FORMAT_Z16_UNORM
:
293 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
294 case PIPE_FORMAT_Z24X8_UNORM
:
301 if (usage
& PIPE_BIND_VERTEX_BUFFER
) {
303 case PIPE_FORMAT_R32G32B32_FLOAT
:
310 if (usage
& PIPE_BIND_INDEX_BUFFER
) {
312 case PIPE_FORMAT_I8_UINT
:
313 case PIPE_FORMAT_I16_UINT
:
314 case PIPE_FORMAT_I32_UINT
:
321 if (usage
& PIPE_BIND_SAMPLER_VIEW
) {
323 case PIPE_FORMAT_R8G8B8X8_UNORM
:
324 case PIPE_FORMAT_R8G8B8A8_UNORM
:
325 case PIPE_FORMAT_B8G8R8X8_UNORM
:
326 case PIPE_FORMAT_B8G8R8A8_UNORM
:
327 case PIPE_FORMAT_A8B8G8R8_SRGB
:
328 case PIPE_FORMAT_B8G8R8A8_SRGB
:
329 case PIPE_FORMAT_Z16_UNORM
:
330 case PIPE_FORMAT_Z24_UNORM_S8_UINT
:
331 case PIPE_FORMAT_Z24X8_UNORM
:
342 lima_screen_get_compiler_options(struct pipe_screen
*pscreen
,
343 enum pipe_shader_ir ir
,
344 enum pipe_shader_type shader
)
346 return lima_program_get_compiler_options(shader
);
350 lima_screen_set_plb_max_blk(struct lima_screen
*screen
)
352 if (lima_plb_max_blk
) {
353 screen
->plb_max_blk
= lima_plb_max_blk
;
357 if (screen
->gpu_type
== DRM_LIMA_PARAM_GPU_ID_MALI450
)
358 screen
->plb_max_blk
= 4096;
360 screen
->plb_max_blk
= 512;
362 drmDevicePtr devinfo
;
364 if (drmGetDevice2(screen
->fd
, 0, &devinfo
))
367 if (devinfo
->bustype
== DRM_BUS_PLATFORM
&& devinfo
->deviceinfo
.platform
) {
368 char **compatible
= devinfo
->deviceinfo
.platform
->compatible
;
370 if (compatible
&& *compatible
)
371 if (!strcmp("allwinner,sun50i-h5-mali", *compatible
))
372 screen
->plb_max_blk
= 2048;
375 drmFreeDevice(&devinfo
);
381 lima_screen_query_info(struct lima_screen
*screen
)
383 struct drm_lima_get_param param
;
385 memset(¶m
, 0, sizeof(param
));
386 param
.param
= DRM_LIMA_PARAM_GPU_ID
;
387 if (drmIoctl(screen
->fd
, DRM_IOCTL_LIMA_GET_PARAM
, ¶m
))
390 switch (param
.value
) {
391 case DRM_LIMA_PARAM_GPU_ID_MALI400
:
392 case DRM_LIMA_PARAM_GPU_ID_MALI450
:
393 screen
->gpu_type
= param
.value
;
399 memset(¶m
, 0, sizeof(param
));
400 param
.param
= DRM_LIMA_PARAM_NUM_PP
;
401 if (drmIoctl(screen
->fd
, DRM_IOCTL_LIMA_GET_PARAM
, ¶m
))
404 screen
->num_pp
= param
.value
;
406 lima_screen_set_plb_max_blk(screen
);
412 lima_screen_query_dmabuf_modifiers(struct pipe_screen
*pscreen
,
413 enum pipe_format format
, int max
,
415 unsigned int *external_only
,
418 uint64_t available_modifiers
[] = {
419 DRM_FORMAT_MOD_LINEAR
,
423 *count
= ARRAY_SIZE(available_modifiers
);
427 for (int i
= 0; i
< *count
; i
++) {
428 modifiers
[i
] = available_modifiers
[i
];
430 external_only
= false;
434 static const struct debug_named_value debug_options
[] = {
435 { "gp", LIMA_DEBUG_GP
,
436 "print GP shader compiler result of each stage" },
437 { "pp", LIMA_DEBUG_PP
,
438 "print PP shader compiler result of each stage" },
439 { "dump", LIMA_DEBUG_DUMP
,
440 "dump GPU command stream to $PWD/lima.dump" },
444 DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug
, "LIMA_DEBUG", debug_options
, 0)
448 lima_screen_parse_env(void)
450 lima_debug
= debug_get_option_lima_debug();
452 if (lima_debug
& LIMA_DEBUG_DUMP
) {
453 const char *dump_command
= "lima.dump";
454 printf("lima: dump command stream to file %s\n", dump_command
);
455 lima_dump_command_stream
= fopen(dump_command
, "w");
456 if (!lima_dump_command_stream
)
457 fprintf(stderr
, "lima: fail to open command stream log file %s\n",
461 lima_ctx_num_plb
= debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM
);
462 if (lima_ctx_num_plb
> LIMA_CTX_PLB_MAX_NUM
||
463 lima_ctx_num_plb
< LIMA_CTX_PLB_MIN_NUM
) {
464 fprintf(stderr
, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
465 "reset to default %d\n", lima_ctx_num_plb
, LIMA_CTX_PLB_MIN_NUM
,
466 LIMA_CTX_PLB_MAX_NUM
, LIMA_CTX_PLB_DEF_NUM
);
467 lima_ctx_num_plb
= LIMA_CTX_PLB_DEF_NUM
;
470 lima_plb_max_blk
= debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
471 if (lima_plb_max_blk
< 0 || lima_plb_max_blk
> 65536) {
472 fprintf(stderr
, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
473 "reset to default %d\n", lima_plb_max_blk
, 0, 65536, 0);
474 lima_plb_max_blk
= 0;
477 lima_ppir_force_spilling
= debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
478 if (lima_ppir_force_spilling
< 0) {
479 fprintf(stderr
, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
480 "reset to default 0\n", lima_ppir_force_spilling
);
481 lima_ppir_force_spilling
= 0;
486 lima_screen_create(int fd
, struct renderonly
*ro
)
488 struct lima_screen
*screen
;
490 screen
= rzalloc(NULL
, struct lima_screen
);
496 lima_screen_parse_env();
498 if (!lima_screen_query_info(screen
))
501 if (!lima_bo_table_init(screen
))
504 screen
->pp_ra
= ppir_regalloc_init(screen
);
508 screen
->pp_buffer
= lima_bo_create(screen
, pp_buffer_size
, 0);
509 if (!screen
->pp_buffer
)
512 /* fs program for clear buffer?
513 * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
515 static const uint32_t pp_clear_program
[] = {
516 0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
517 0x000005f5, 0x00000000, 0x00000000, 0x00000000,
519 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_clear_program_offset
,
520 pp_clear_program
, sizeof(pp_clear_program
));
522 /* copy texture to framebuffer, used to reload gpu tile buffer
523 * load.v $1 0.xy, texld_2d 0, mov.v0 $0 ^tex_sampler, sync, stop
525 static const uint32_t pp_reload_program
[] = {
526 0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
527 0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
529 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_reload_program_offset
,
530 pp_reload_program
, sizeof(pp_reload_program
));
532 /* 0/1/2 vertex index for reload/clear draw */
533 static const uint8_t pp_shared_index
[] = { 0, 1, 2 };
534 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_shared_index_offset
,
535 pp_shared_index
, sizeof(pp_shared_index
));
537 /* 4096x4096 gl pos used for partial clear */
538 static const float pp_clear_gl_pos
[] = {
543 memcpy(lima_bo_map(screen
->pp_buffer
) + pp_clear_gl_pos_offset
,
544 pp_clear_gl_pos
, sizeof(pp_clear_gl_pos
));
546 /* is pp frame render state static? */
547 uint32_t *pp_frame_rsw
= lima_bo_map(screen
->pp_buffer
) + pp_frame_rsw_offset
;
548 memset(pp_frame_rsw
, 0, 0x40);
549 pp_frame_rsw
[8] = 0x0000f008;
550 pp_frame_rsw
[9] = screen
->pp_buffer
->va
+ pp_clear_program_offset
;
551 pp_frame_rsw
[13] = 0x00000100;
554 screen
->ro
= renderonly_dup(ro
);
556 fprintf(stderr
, "Failed to dup renderonly object\n");
561 screen
->base
.destroy
= lima_screen_destroy
;
562 screen
->base
.get_name
= lima_screen_get_name
;
563 screen
->base
.get_vendor
= lima_screen_get_vendor
;
564 screen
->base
.get_device_vendor
= lima_screen_get_device_vendor
;
565 screen
->base
.get_param
= lima_screen_get_param
;
566 screen
->base
.get_paramf
= lima_screen_get_paramf
;
567 screen
->base
.get_shader_param
= lima_screen_get_shader_param
;
568 screen
->base
.context_create
= lima_context_create
;
569 screen
->base
.is_format_supported
= lima_screen_is_format_supported
;
570 screen
->base
.get_compiler_options
= lima_screen_get_compiler_options
;
571 screen
->base
.query_dmabuf_modifiers
= lima_screen_query_dmabuf_modifiers
;
573 lima_resource_screen_init(screen
);
574 lima_fence_screen_init(screen
);
576 slab_create_parent(&screen
->transfer_pool
, sizeof(struct lima_transfer
), 16);
580 return &screen
->base
;
583 lima_bo_free(screen
->pp_buffer
);
585 lima_bo_table_fini(screen
);