1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 * Texture tile caching.
35 #include "pipe/p_inlines.h"
36 #include "util/u_memory.h"
37 #include "util/u_tile.h"
38 #include "util/u_format.h"
39 #include "lp_context.h"
40 #include "lp_surface.h"
41 #include "lp_texture.h"
42 #include "lp_tex_cache.h"
47 * Return the position in the cache for the tile that contains win pos (x,y).
48 * We currently use a direct mapped cache so this is like a hack key.
49 * At some point we should investige something more sophisticated, like
50 * a LRU replacement policy.
52 #define CACHE_POS(x, y) \
53 (((x) + (y) * 5) % NUM_ENTRIES)
58 * Is the tile at (x,y) in cleared state?
61 is_clear_flag_set(const uint
*bitvec
, union tex_tile_address addr
)
64 pos
= addr
.bits
.y
* (MAX_TEX_WIDTH
/ TEX_TILE_SIZE
) + addr
.bits
.x
;
65 assert(pos
/ 32 < (MAX_TEX_WIDTH
/ TEX_TILE_SIZE
) * (MAX_TEX_HEIGHT
/ TEX_TILE_SIZE
) / 32);
66 bit
= bitvec
[pos
/ 32] & (1 << (pos
& 31));
72 * Mark the tile at (x,y) as not cleared.
75 clear_clear_flag(uint
*bitvec
, union tex_tile_address addr
)
78 pos
= addr
.bits
.y
* (MAX_TEX_WIDTH
/ TEX_TILE_SIZE
) + addr
.bits
.x
;
79 assert(pos
/ 32 < (MAX_TEX_WIDTH
/ TEX_TILE_SIZE
) * (MAX_TEX_HEIGHT
/ TEX_TILE_SIZE
) / 32);
80 bitvec
[pos
/ 32] &= ~(1 << (pos
& 31));
84 struct llvmpipe_tex_tile_cache
*
85 lp_create_tex_tile_cache( struct pipe_screen
*screen
)
87 struct llvmpipe_tex_tile_cache
*tc
;
90 tc
= CALLOC_STRUCT( llvmpipe_tex_tile_cache
);
93 for (pos
= 0; pos
< NUM_ENTRIES
; pos
++) {
94 tc
->entries
[pos
].addr
.bits
.invalid
= 1;
96 tc
->last_tile
= &tc
->entries
[0]; /* any tile */
103 lp_destroy_tex_tile_cache(struct llvmpipe_tex_tile_cache
*tc
)
105 struct pipe_screen
*screen
;
108 for (pos
= 0; pos
< NUM_ENTRIES
; pos
++) {
109 /*assert(tc->entries[pos].x < 0);*/
112 screen
= tc
->transfer
->texture
->screen
;
113 screen
->tex_transfer_destroy(tc
->transfer
);
116 screen
= tc
->tex_trans
->texture
->screen
;
117 screen
->tex_transfer_destroy(tc
->tex_trans
);
125 lp_tex_tile_cache_map_transfers(struct llvmpipe_tex_tile_cache
*tc
)
127 if (tc
->transfer
&& !tc
->transfer_map
)
128 tc
->transfer_map
= tc
->screen
->transfer_map(tc
->screen
, tc
->transfer
);
130 if (tc
->tex_trans
&& !tc
->tex_trans_map
)
131 tc
->tex_trans_map
= tc
->screen
->transfer_map(tc
->screen
, tc
->tex_trans
);
136 lp_tex_tile_cache_unmap_transfers(struct llvmpipe_tex_tile_cache
*tc
)
138 if (tc
->transfer_map
) {
139 tc
->screen
->transfer_unmap(tc
->screen
, tc
->transfer
);
140 tc
->transfer_map
= NULL
;
143 if (tc
->tex_trans_map
) {
144 tc
->screen
->transfer_unmap(tc
->screen
, tc
->tex_trans
);
145 tc
->tex_trans_map
= NULL
;
150 lp_tex_tile_cache_validate_texture(struct llvmpipe_tex_tile_cache
*tc
)
153 struct llvmpipe_texture
*lpt
= llvmpipe_texture(tc
->texture
);
154 if (lpt
->timestamp
!= tc
->timestamp
) {
155 /* texture was modified, invalidate all cached tiles */
157 _debug_printf("INV %d %d\n", tc
->timestamp
, lpt
->timestamp
);
158 for (i
= 0; i
< NUM_ENTRIES
; i
++) {
159 tc
->entries
[i
].addr
.bits
.invalid
= 1;
162 tc
->timestamp
= lpt
->timestamp
;
168 * Specify the texture to cache.
171 lp_tex_tile_cache_set_texture(struct llvmpipe_tex_tile_cache
*tc
,
172 struct pipe_texture
*texture
)
176 assert(!tc
->transfer
);
178 if (tc
->texture
!= texture
) {
179 pipe_texture_reference(&tc
->texture
, texture
);
182 struct pipe_screen
*screen
= tc
->tex_trans
->texture
->screen
;
184 if (tc
->tex_trans_map
) {
185 screen
->transfer_unmap(screen
, tc
->tex_trans
);
186 tc
->tex_trans_map
= NULL
;
189 screen
->tex_transfer_destroy(tc
->tex_trans
);
190 tc
->tex_trans
= NULL
;
193 /* mark as entries as invalid/empty */
194 /* XXX we should try to avoid this when the teximage hasn't changed */
195 for (i
= 0; i
< NUM_ENTRIES
; i
++) {
196 tc
->entries
[i
].addr
.bits
.invalid
= 1;
199 tc
->tex_face
= -1; /* any invalid value here */
205 * Given the texture face, level, zslice, x and y values, compute
206 * the cache entry position/index where we'd hope to find the
207 * cached texture tile.
208 * This is basically a direct-map cache.
209 * XXX There's probably lots of ways in which we can improve this.
212 tex_cache_pos( union tex_tile_address addr
)
214 uint entry
= (addr
.bits
.x
+
218 addr
.bits
.level
* 7);
220 return entry
% NUM_ENTRIES
;
224 * Similar to lp_get_cached_tile() but for textures.
225 * Tiles are read-only and indexed with more params.
227 const struct llvmpipe_cached_tex_tile
*
228 lp_find_cached_tex_tile(struct llvmpipe_tex_tile_cache
*tc
,
229 union tex_tile_address addr
)
231 struct pipe_screen
*screen
= tc
->screen
;
232 struct llvmpipe_cached_tex_tile
*tile
;
234 tile
= tc
->entries
+ tex_cache_pos( addr
);
236 if (addr
.value
!= tile
->addr
.value
) {
238 /* cache miss. Most misses are because we've invaldiated the
239 * texture cache previously -- most commonly on binding a new
240 * texture. Currently we effectively flush the cache on texture
244 _debug_printf("miss at %u: x=%d y=%d z=%d face=%d level=%d\n"
245 " tile %u: x=%d y=%d z=%d face=%d level=%d\n",
246 pos
, x
/TEX_TILE_SIZE
, y
/TEX_TILE_SIZE
, z
, face
, level
,
247 pos
, tile
->addr
.bits
.x
, tile
->addr
.bits
.y
, tile
->z
, tile
->face
, tile
->level
);
250 /* check if we need to get a new transfer */
251 if (!tc
->tex_trans
||
252 tc
->tex_face
!= addr
.bits
.face
||
253 tc
->tex_level
!= addr
.bits
.level
||
254 tc
->tex_z
!= addr
.bits
.z
) {
255 /* get new transfer (view into texture) */
258 if (tc
->tex_trans_map
) {
259 tc
->screen
->transfer_unmap(tc
->screen
, tc
->tex_trans
);
260 tc
->tex_trans_map
= NULL
;
263 screen
->tex_transfer_destroy(tc
->tex_trans
);
264 tc
->tex_trans
= NULL
;
268 screen
->get_tex_transfer(screen
, tc
->texture
,
272 PIPE_TRANSFER_READ
, 0, 0,
273 tc
->texture
->width
[addr
.bits
.level
],
274 tc
->texture
->height
[addr
.bits
.level
]);
276 tc
->tex_trans_map
= screen
->transfer_map(screen
, tc
->tex_trans
);
278 tc
->tex_face
= addr
.bits
.face
;
279 tc
->tex_level
= addr
.bits
.level
;
280 tc
->tex_z
= addr
.bits
.z
;
284 unsigned x
= addr
.bits
.x
* TEX_TILE_SIZE
;
285 unsigned y
= addr
.bits
.y
* TEX_TILE_SIZE
;
286 unsigned w
= TEX_TILE_SIZE
;
287 unsigned h
= TEX_TILE_SIZE
;
289 if (pipe_clip_tile(x
, y
, &w
, &h
, tc
->tex_trans
)) {
293 util_format_read_4ub(tc
->tex_trans
->format
,
294 (uint8_t *)tile
->color
, sizeof tile
->color
[0],
295 tc
->tex_trans_map
, tc
->tex_trans
->stride
,
302 tc
->last_tile
= tile
;