src/gallium/drivers/llvmpipe/lp_tex_cache.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
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   7  * copy of this software and associated documentation files (the
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  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
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  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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  26  **************************************************************************/
  27
  28 /**
  29  * Texture tile caching.
  30  *
  31  * Author:
  32  *    Brian Paul
  33  */
  34
  35 #include "pipe/p_inlines.h"
  36 #include "util/u_memory.h"
  37 #include "util/u_tile.h"
  38 #include "util/u_format.h"
  39 #include "util/u_math.h"
  40 #include "lp_context.h"
  41 #include "lp_surface.h"
  42 #include "lp_texture.h"
  43 #include "lp_tex_cache.h"
  44
  45
  46
  47 /**
  48  * Return the position in the cache for the tile that contains win pos (x,y).
  49  * We currently use a direct mapped cache so this is like a hack key.
  50  * At some point we should investige something more sophisticated, like
  51  * a LRU replacement policy.
  52  */
  53 #define CACHE_POS(x, y) \
  54    (((x) + (y) * 5) % NUM_ENTRIES)
  55
  56
  57
  58 /**
  59  * Is the tile at (x,y) in cleared state?
  60  */
  61 static INLINE uint
  62 is_clear_flag_set(const uint *bitvec, union tex_tile_address addr)
  63 {
  64    int pos, bit;
  65    pos = addr.bits.y * (MAX_TEX_WIDTH / TEX_TILE_SIZE) + addr.bits.x;
  66    assert(pos / 32 < (MAX_TEX_WIDTH / TEX_TILE_SIZE) * (MAX_TEX_HEIGHT / TEX_TILE_SIZE) / 32);
  67    bit = bitvec[pos / 32] & (1 << (pos & 31));
  68    return bit;
  69 }
  70
  71
  72 /**
  73  * Mark the tile at (x,y) as not cleared.
  74  */
  75 static INLINE void
  76 clear_clear_flag(uint *bitvec, union tex_tile_address addr)
  77 {
  78    int pos;
  79    pos = addr.bits.y * (MAX_TEX_WIDTH / TEX_TILE_SIZE) + addr.bits.x;
  80    assert(pos / 32 < (MAX_TEX_WIDTH / TEX_TILE_SIZE) * (MAX_TEX_HEIGHT / TEX_TILE_SIZE) / 32);
  81    bitvec[pos / 32] &= ~(1 << (pos & 31));
  82 }
  83
  84
  85 struct llvmpipe_tex_tile_cache *
  86 lp_create_tex_tile_cache( struct pipe_screen *screen )
  87 {
  88    struct llvmpipe_tex_tile_cache *tc;
  89    uint pos;
  90
  91    tc = CALLOC_STRUCT( llvmpipe_tex_tile_cache );
  92    if (tc) {
  93       tc->screen = screen;
  94       for (pos = 0; pos < NUM_ENTRIES; pos++) {
  95          tc->entries[pos].addr.bits.invalid = 1;
  96       }
  97       tc->last_tile = &tc->entries[0]; /* any tile */
  98    }
  99    return tc;
 100 }
 101
 102
 103 void
 104 lp_destroy_tex_tile_cache(struct llvmpipe_tex_tile_cache *tc)
 105 {
 106    struct pipe_screen *screen;
 107    uint pos;
 108
 109    for (pos = 0; pos < NUM_ENTRIES; pos++) {
 110       /*assert(tc->entries[pos].x < 0);*/
 111    }
 112    if (tc->transfer) {
 113       screen = tc->transfer->texture->screen;
 114       screen->tex_transfer_destroy(tc->transfer);
 115    }
 116    if (tc->tex_trans) {
 117       screen = tc->tex_trans->texture->screen;
 118       screen->tex_transfer_destroy(tc->tex_trans);
 119    }
 120
 121    FREE( tc );
 122 }
 123
 124
 125 void
 126 lp_tex_tile_cache_map_transfers(struct llvmpipe_tex_tile_cache *tc)
 127 {
 128    if (tc->transfer && !tc->transfer_map)
 129       tc->transfer_map = tc->screen->transfer_map(tc->screen, tc->transfer);
 130
 131    if (tc->tex_trans && !tc->tex_trans_map)
 132       tc->tex_trans_map = tc->screen->transfer_map(tc->screen, tc->tex_trans);
 133 }
 134
 135
 136 void
 137 lp_tex_tile_cache_unmap_transfers(struct llvmpipe_tex_tile_cache *tc)
 138 {
 139    if (tc->transfer_map) {
 140       tc->screen->transfer_unmap(tc->screen, tc->transfer);
 141       tc->transfer_map = NULL;
 142    }
 143
 144    if (tc->tex_trans_map) {
 145       tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 146       tc->tex_trans_map = NULL;
 147    }
 148 }
 149
 150 void
 151 lp_tex_tile_cache_validate_texture(struct llvmpipe_tex_tile_cache *tc)
 152 {
 153    if (tc->texture) {
 154       struct llvmpipe_texture *lpt = llvmpipe_texture(tc->texture);
 155       if (lpt->timestamp != tc->timestamp) {
 156          /* texture was modified, invalidate all cached tiles */
 157          uint i;
 158          debug_printf("INV %d %d\n", tc->timestamp, lpt->timestamp);
 159          for (i = 0; i < NUM_ENTRIES; i++) {
 160             tc->entries[i].addr.bits.invalid = 1;
 161          }
 162
 163          tc->timestamp = lpt->timestamp;
 164       }
 165    }
 166 }
 167
 168 /**
 169  * Specify the texture to cache.
 170  */
 171 void
 172 lp_tex_tile_cache_set_texture(struct llvmpipe_tex_tile_cache *tc,
 173                           struct pipe_texture *texture)
 174 {
 175    uint i;
 176
 177    assert(!tc->transfer);
 178
 179    if (tc->texture != texture) {
 180       pipe_texture_reference(&tc->texture, texture);
 181
 182       if (tc->tex_trans) {
 183          struct pipe_screen *screen = tc->tex_trans->texture->screen;
 184
 185          if (tc->tex_trans_map) {
 186             screen->transfer_unmap(screen, tc->tex_trans);
 187             tc->tex_trans_map = NULL;
 188          }
 189
 190          screen->tex_transfer_destroy(tc->tex_trans);
 191          tc->tex_trans = NULL;
 192       }
 193
 194       /* mark as entries as invalid/empty */
 195       /* XXX we should try to avoid this when the teximage hasn't changed */
 196       for (i = 0; i < NUM_ENTRIES; i++) {
 197          tc->entries[i].addr.bits.invalid = 1;
 198       }
 199
 200       tc->tex_face = -1; /* any invalid value here */
 201    }
 202 }
 203
 204
 205 /**
 206  * Given the texture face, level, zslice, x and y values, compute
 207  * the cache entry position/index where we'd hope to find the
 208  * cached texture tile.
 209  * This is basically a direct-map cache.
 210  * XXX There's probably lots of ways in which we can improve this.
 211  */
 212 static INLINE uint
 213 tex_cache_pos( union tex_tile_address addr )
 214 {
 215    uint entry = (addr.bits.x +
 216                  addr.bits.y * 9 +
 217                  addr.bits.z * 3 +
 218                  addr.bits.face +
 219                  addr.bits.level * 7);
 220
 221    return entry % NUM_ENTRIES;
 222 }
 223
 224 /**
 225  * Similar to lp_get_cached_tile() but for textures.
 226  * Tiles are read-only and indexed with more params.
 227  */
 228 const struct llvmpipe_cached_tex_tile *
 229 lp_find_cached_tex_tile(struct llvmpipe_tex_tile_cache *tc,
 230                         union tex_tile_address addr )
 231 {
 232    struct pipe_screen *screen = tc->screen;
 233    struct llvmpipe_cached_tex_tile *tile;
 234
 235    tile = tc->entries + tex_cache_pos( addr );
 236
 237    if (addr.value != tile->addr.value) {
 238
 239       /* cache miss.  Most misses are because we've invaldiated the
 240        * texture cache previously -- most commonly on binding a new
 241        * texture.  Currently we effectively flush the cache on texture
 242        * bind.
 243        */
 244 #if 0
 245       _debug_printf("miss at %u:  x=%d y=%d z=%d face=%d level=%d\n"
 246                     "   tile %u:  x=%d y=%d z=%d face=%d level=%d\n",
 247                     pos, x/TEX_TILE_SIZE, y/TEX_TILE_SIZE, z, face, level,
 248                     pos, tile->addr.bits.x, tile->addr.bits.y, tile->z, tile->face, tile->level);
 249 #endif
 250
 251       /* check if we need to get a new transfer */
 252       if (!tc->tex_trans ||
 253           tc->tex_face != addr.bits.face ||
 254           tc->tex_level != addr.bits.level ||
 255           tc->tex_z != addr.bits.z) {
 256          /* get new transfer (view into texture) */
 257
 258          if (tc->tex_trans) {
 259             if (tc->tex_trans_map) {
 260                tc->screen->transfer_unmap(tc->screen, tc->tex_trans);
 261                tc->tex_trans_map = NULL;
 262             }
 263
 264             screen->tex_transfer_destroy(tc->tex_trans);
 265             tc->tex_trans = NULL;
 266          }
 267
 268          tc->tex_trans =
 269             screen->get_tex_transfer(screen, tc->texture,
 270                                      addr.bits.face,
 271                                      addr.bits.level,
 272                                      addr.bits.z,
 273                                      PIPE_TRANSFER_READ, 0, 0,
 274                                      u_minify(tc->texture->width0, addr.bits.level),
 275                                      u_minify(tc->texture->height0, addr.bits.level));
 276
 277          tc->tex_trans_map = screen->transfer_map(screen, tc->tex_trans);
 278
 279          tc->tex_face = addr.bits.face;
 280          tc->tex_level = addr.bits.level;
 281          tc->tex_z = addr.bits.z;
 282       }
 283
 284       {
 285          unsigned x = addr.bits.x * TEX_TILE_SIZE;
 286          unsigned y = addr.bits.y * TEX_TILE_SIZE;
 287          unsigned w = TEX_TILE_SIZE;
 288          unsigned h = TEX_TILE_SIZE;
 289
 290          if (pipe_clip_tile(x, y, &w, &h, tc->tex_trans)) {
 291             assert(0);
 292          }
 293
 294          util_format_read_4ub(tc->tex_trans->format,
 295                               (uint8_t *)tile->color, sizeof tile->color[0],
 296                               tc->tex_trans_map, tc->tex_trans->stride,
 297                               x, y, w, h);
 298       }
 299
 300       tile->addr = addr;
 301    }
 302
 303    tc->last_tile = tile;
 304    return tile;
 305 }