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[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57 void setSUConst16(const Instruction *, const int s);
58
59 void modNegAbsF32_3b(const Instruction *, const int s);
60
61 void emitCondCode(CondCode cc, int pos, uint8_t mask);
62 void emitInterpMode(const Instruction *);
63 void emitLoadStoreType(DataType ty, const int pos);
64 void emitCachingMode(CacheMode c, const int pos);
65 void emitSUGType(DataType, const int pos);
66 void emitSUCachingMode(CacheMode c);
67
68 inline uint8_t getSRegEncoding(const ValueRef&);
69
70 void emitRoundMode(RoundMode, const int pos, const int rintPos);
71 void emitRoundModeF(RoundMode, const int pos);
72 void emitRoundModeI(RoundMode, const int pos);
73
74 void emitNegAbs12(const Instruction *);
75
76 void emitNOP(const Instruction *);
77
78 void emitLOAD(const Instruction *);
79 void emitSTORE(const Instruction *);
80 void emitMOV(const Instruction *);
81 void emitATOM(const Instruction *);
82 void emitCCTL(const Instruction *);
83
84 void emitINTERP(const Instruction *);
85 void emitAFETCH(const Instruction *);
86 void emitPFETCH(const Instruction *);
87 void emitVFETCH(const Instruction *);
88 void emitEXPORT(const Instruction *);
89 void emitOUT(const Instruction *);
90
91 void emitUADD(const Instruction *);
92 void emitFADD(const Instruction *);
93 void emitDADD(const Instruction *);
94 void emitIMUL(const Instruction *);
95 void emitFMUL(const Instruction *);
96 void emitDMUL(const Instruction *);
97 void emitIMAD(const Instruction *);
98 void emitISAD(const Instruction *);
99 void emitSHLADD(const Instruction *);
100 void emitFMAD(const Instruction *);
101 void emitDMAD(const Instruction *);
102 void emitMADSP(const Instruction *i);
103
104 void emitNOT(const Instruction *);
105 void emitLogicOp(const Instruction *, uint8_t subOp);
106 void emitPOPC(const Instruction *);
107 void emitINSBF(const Instruction *);
108 void emitEXTBF(const Instruction *);
109 void emitBFIND(const Instruction *);
110 void emitPERMT(const Instruction *);
111 void emitShift(const Instruction *);
112 void emitShift64(const Instruction *);
113
114 void emitSFnOp(const Instruction *, uint8_t subOp);
115
116 void emitCVT(const Instruction *);
117 void emitMINMAX(const Instruction *);
118 void emitPreOp(const Instruction *);
119
120 void emitSET(const CmpInstruction *);
121 void emitSLCT(const CmpInstruction *);
122 void emitSELP(const Instruction *);
123
124 void emitTEXBAR(const Instruction *);
125 void emitTEX(const TexInstruction *);
126 void emitTEXCSAA(const TexInstruction *);
127 void emitTXQ(const TexInstruction *);
128
129 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
130
131 void emitPIXLD(const Instruction *);
132
133 void emitBAR(const Instruction *);
134 void emitMEMBAR(const Instruction *);
135
136 void emitFlow(const Instruction *);
137
138 void emitVOTE(const Instruction *);
139
140 void emitSULDGB(const TexInstruction *);
141 void emitSUSTGx(const TexInstruction *);
142 void emitSUCLAMPMode(uint16_t);
143 void emitSUCalc(Instruction *);
144
145 void emitVSHL(const Instruction *);
146 void emitVectorSubOp(const Instruction *);
147
148 inline void defId(const ValueDef&, const int pos);
149 inline void srcId(const ValueRef&, const int pos);
150 inline void srcId(const ValueRef *, const int pos);
151 inline void srcId(const Instruction *, int s, const int pos);
152
153 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
154
155 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
156 };
157
158 #define GK110_GPR_ZERO 255
159
160 #define NEG_(b, s) \
161 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
162 #define ABS_(b, s) \
163 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
164
165 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
166 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
167
168 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
169 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
170
171 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
172
173 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
174
175 #define SDATA(a) ((a).rep()->reg.data)
176 #define DDATA(a) ((a).rep()->reg.data)
177
178 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
179 {
180 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
181 }
182
183 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
184 {
185 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
186 }
187
188 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
189 {
190 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
191 code[pos / 32] |= r << (pos % 32);
192 }
193
194 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
195 {
196 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
197 }
198
199 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
200 {
201 code[pos / 32] |= (def.get() && def.getFile() != FILE_FLAGS ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
202 }
203
204 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
205 {
206 const ImmediateValue *imm = ref.get()->asImm();
207
208 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
209 }
210
211 void
212 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
213 {
214 bool rint = false;
215 uint8_t n;
216
217 switch (rnd) {
218 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
219 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
220 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
221 default:
222 rint = rnd == ROUND_NI;
223 n = 0;
224 assert(rnd == ROUND_N || rnd == ROUND_NI);
225 break;
226 }
227 code[pos / 32] |= n << (pos % 32);
228 if (rint && rintPos >= 0)
229 code[rintPos / 32] |= 1 << (rintPos % 32);
230 }
231
232 void
233 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
234 {
235 uint8_t n;
236
237 switch (rnd) {
238 case ROUND_M: n = 1; break;
239 case ROUND_P: n = 2; break;
240 case ROUND_Z: n = 3; break;
241 default:
242 n = 0;
243 assert(rnd == ROUND_N);
244 break;
245 }
246 code[pos / 32] |= n << (pos % 32);
247 }
248
249 void
250 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
251 {
252 uint8_t n;
253
254 switch (rnd) {
255 case ROUND_MI: n = 1; break;
256 case ROUND_PI: n = 2; break;
257 case ROUND_ZI: n = 3; break;
258 default:
259 n = 0;
260 assert(rnd == ROUND_NI);
261 break;
262 }
263 code[pos / 32] |= n << (pos % 32);
264 }
265
266 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
267 {
268 uint8_t n;
269
270 switch (cc) {
271 case CC_FL: n = 0x00; break;
272 case CC_LT: n = 0x01; break;
273 case CC_EQ: n = 0x02; break;
274 case CC_LE: n = 0x03; break;
275 case CC_GT: n = 0x04; break;
276 case CC_NE: n = 0x05; break;
277 case CC_GE: n = 0x06; break;
278 case CC_LTU: n = 0x09; break;
279 case CC_EQU: n = 0x0a; break;
280 case CC_LEU: n = 0x0b; break;
281 case CC_GTU: n = 0x0c; break;
282 case CC_NEU: n = 0x0d; break;
283 case CC_GEU: n = 0x0e; break;
284 case CC_TR: n = 0x0f; break;
285 case CC_NO: n = 0x10; break;
286 case CC_NC: n = 0x11; break;
287 case CC_NS: n = 0x12; break;
288 case CC_NA: n = 0x13; break;
289 case CC_A: n = 0x14; break;
290 case CC_S: n = 0x15; break;
291 case CC_C: n = 0x16; break;
292 case CC_O: n = 0x17; break;
293 default:
294 n = 0;
295 assert(!"invalid condition code");
296 break;
297 }
298 code[pos / 32] |= (n & mask) << (pos % 32);
299 }
300
301 void
302 CodeEmitterGK110::emitPredicate(const Instruction *i)
303 {
304 if (i->predSrc >= 0) {
305 srcId(i->src(i->predSrc), 18);
306 if (i->cc == CC_NOT_P)
307 code[0] |= 8 << 18; // negate
308 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
309 } else {
310 code[0] |= 7 << 18;
311 }
312 }
313
314 void
315 CodeEmitterGK110::setCAddress14(const ValueRef& src)
316 {
317 const Storage& res = src.get()->asSym()->reg;
318 const int32_t addr = res.data.offset / 4;
319
320 code[0] |= (addr & 0x01ff) << 23;
321 code[1] |= (addr & 0x3e00) >> 9;
322 code[1] |= res.fileIndex << 5;
323 }
324
325 void
326 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
327 {
328 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
329 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
330
331 if (i->sType == TYPE_F32) {
332 assert(!(u32 & 0x00000fff));
333 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
334 code[1] |= ((u32 & 0x7fe00000) >> 21);
335 code[1] |= ((u32 & 0x80000000) >> 4);
336 } else
337 if (i->sType == TYPE_F64) {
338 assert(!(u64 & 0x00000fffffffffffULL));
339 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
340 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
341 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
342 } else {
343 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
344 code[0] |= (u32 & 0x001ff) << 23;
345 code[1] |= (u32 & 0x7fe00) >> 9;
346 code[1] |= (u32 & 0x80000) << 8;
347 }
348 }
349
350 void
351 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
352 Modifier mod)
353 {
354 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
355
356 if (mod) {
357 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
358 mod.applyTo(imm);
359 u32 = imm.reg.data.u32;
360 }
361
362 code[0] |= u32 << 23;
363 code[1] |= u32 >> 9;
364 }
365
366 void
367 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
368 Modifier mod)
369 {
370 code[0] = ctg;
371 code[1] = opc << 20;
372
373 emitPredicate(i);
374
375 defId(i->def(0), 2);
376
377 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
378 switch (i->src(s).getFile()) {
379 case FILE_GPR:
380 srcId(i->src(s), s ? 42 : 10);
381 break;
382 case FILE_IMMEDIATE:
383 setImmediate32(i, s, mod);
384 break;
385 default:
386 break;
387 }
388 }
389 }
390
391
392 void
393 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
394 {
395 code[0] = ctg;
396 code[1] = opc << 20;
397
398 emitPredicate(i);
399
400 defId(i->def(0), 2);
401
402 switch (i->src(0).getFile()) {
403 case FILE_MEMORY_CONST:
404 code[1] |= 0x4 << 28;
405 setCAddress14(i->src(0));
406 break;
407 case FILE_GPR:
408 code[1] |= 0xc << 28;
409 srcId(i->src(0), 23);
410 break;
411 default:
412 assert(0);
413 break;
414 }
415 }
416
417 // 0x2 for GPR, c[] and 0x1 for short immediate
418 void
419 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
420 uint32_t opc1)
421 {
422 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
423
424 int s1 = 23;
425 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
426 s1 = 42;
427
428 if (imm) {
429 code[0] = 0x1;
430 code[1] = opc1 << 20;
431 } else {
432 code[0] = 0x2;
433 code[1] = (0xc << 28) | (opc2 << 20);
434 }
435
436 emitPredicate(i);
437
438 defId(i->def(0), 2);
439
440 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
441 switch (i->src(s).getFile()) {
442 case FILE_MEMORY_CONST:
443 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
444 setCAddress14(i->src(s));
445 break;
446 case FILE_IMMEDIATE:
447 setShortImmediate(i, s);
448 break;
449 case FILE_GPR:
450 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
451 break;
452 default:
453 if (i->op == OP_SELP) {
454 assert(s == 2 && i->src(s).getFile() == FILE_PREDICATE);
455 srcId(i->src(s), 42);
456 }
457 // ignore here, can be predicate or flags, but must not be address
458 break;
459 }
460 }
461 // 0x0 = invalid
462 // 0xc = rrr
463 // 0x8 = rrc
464 // 0x4 = rcr
465 assert(imm || (code[1] & (0xc << 28)));
466 }
467
468 inline void
469 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
470 {
471 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
472 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
473 }
474
475 void
476 CodeEmitterGK110::emitNOP(const Instruction *i)
477 {
478 code[0] = 0x00003c02;
479 code[1] = 0x85800000;
480
481 if (i)
482 emitPredicate(i);
483 else
484 code[0] = 0x001c3c02;
485 }
486
487 void
488 CodeEmitterGK110::emitFMAD(const Instruction *i)
489 {
490 assert(!isLIMM(i->src(1), TYPE_F32));
491
492 emitForm_21(i, 0x0c0, 0x940);
493
494 NEG_(34, 2);
495 SAT_(35);
496 RND_(36, F);
497 FTZ_(38);
498 DNZ_(39);
499
500 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
501
502 if (code[0] & 0x1) {
503 if (neg1)
504 code[1] ^= 1 << 27;
505 } else
506 if (neg1) {
507 code[1] |= 1 << 19;
508 }
509 }
510
511 void
512 CodeEmitterGK110::emitDMAD(const Instruction *i)
513 {
514 assert(!i->saturate);
515 assert(!i->ftz);
516
517 emitForm_21(i, 0x1b8, 0xb38);
518
519 NEG_(34, 2);
520 RND_(36, F);
521
522 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
523
524 if (code[0] & 0x1) {
525 if (neg1)
526 code[1] ^= 1 << 27;
527 } else
528 if (neg1) {
529 code[1] |= 1 << 19;
530 }
531 }
532
533 void
534 CodeEmitterGK110::emitMADSP(const Instruction *i)
535 {
536 emitForm_21(i, 0x140, 0xa40);
537
538 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
539 code[1] |= 0x00c00000;
540 } else {
541 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
542 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
543 code[1] |= (i->subOp & 0x100) << 11; // imadp3
544 code[1] |= (i->subOp & 0x200) << 15; // imadp3
545 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
546 }
547
548 if (i->flagsDef >= 0)
549 code[1] |= 1 << 18;
550 }
551
552 void
553 CodeEmitterGK110::emitFMUL(const Instruction *i)
554 {
555 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
556
557 assert(i->postFactor >= -3 && i->postFactor <= 3);
558
559 if (isLIMM(i->src(1), TYPE_F32)) {
560 emitForm_L(i, 0x200, 0x2, Modifier(0));
561
562 FTZ_(38);
563 DNZ_(39);
564 SAT_(3a);
565 if (neg)
566 code[1] ^= 1 << 22;
567
568 assert(i->postFactor == 0);
569 } else {
570 emitForm_21(i, 0x234, 0xc34);
571 code[1] |= ((i->postFactor > 0) ?
572 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
573
574 RND_(2a, F);
575 FTZ_(2f);
576 DNZ_(30);
577 SAT_(35);
578
579 if (code[0] & 0x1) {
580 if (neg)
581 code[1] ^= 1 << 27;
582 } else
583 if (neg) {
584 code[1] |= 1 << 19;
585 }
586 }
587 }
588
589 void
590 CodeEmitterGK110::emitDMUL(const Instruction *i)
591 {
592 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
593
594 assert(!i->postFactor);
595 assert(!i->saturate);
596 assert(!i->ftz);
597 assert(!i->dnz);
598
599 emitForm_21(i, 0x240, 0xc40);
600
601 RND_(2a, F);
602
603 if (code[0] & 0x1) {
604 if (neg)
605 code[1] ^= 1 << 27;
606 } else
607 if (neg) {
608 code[1] |= 1 << 19;
609 }
610 }
611
612 void
613 CodeEmitterGK110::emitIMUL(const Instruction *i)
614 {
615 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
616 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
617
618 if (i->src(1).getFile() == FILE_IMMEDIATE) {
619 emitForm_L(i, 0x280, 2, Modifier(0));
620
621 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
622 code[1] |= 1 << 24;
623 if (i->sType == TYPE_S32)
624 code[1] |= 3 << 25;
625 } else {
626 emitForm_21(i, 0x21c, 0xc1c);
627
628 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
629 code[1] |= 1 << 10;
630 if (i->sType == TYPE_S32)
631 code[1] |= 3 << 11;
632 }
633 }
634
635 void
636 CodeEmitterGK110::emitFADD(const Instruction *i)
637 {
638 if (isLIMM(i->src(1), TYPE_F32)) {
639 assert(i->rnd == ROUND_N);
640 assert(!i->saturate);
641
642 Modifier mod = i->src(1).mod ^
643 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
644
645 emitForm_L(i, 0x400, 0, mod);
646
647 FTZ_(3a);
648 NEG_(3b, 0);
649 ABS_(39, 0);
650 } else {
651 emitForm_21(i, 0x22c, 0xc2c);
652
653 FTZ_(2f);
654 RND_(2a, F);
655 ABS_(31, 0);
656 NEG_(33, 0);
657 SAT_(35);
658
659 if (code[0] & 0x1) {
660 modNegAbsF32_3b(i, 1);
661 if (i->op == OP_SUB) code[1] ^= 1 << 27;
662 } else {
663 ABS_(34, 1);
664 NEG_(30, 1);
665 if (i->op == OP_SUB) code[1] ^= 1 << 16;
666 }
667 }
668 }
669
670 void
671 CodeEmitterGK110::emitDADD(const Instruction *i)
672 {
673 assert(!i->saturate);
674 assert(!i->ftz);
675
676 emitForm_21(i, 0x238, 0xc38);
677 RND_(2a, F);
678 ABS_(31, 0);
679 NEG_(33, 0);
680 if (code[0] & 0x1) {
681 modNegAbsF32_3b(i, 1);
682 if (i->op == OP_SUB) code[1] ^= 1 << 27;
683 } else {
684 NEG_(30, 1);
685 ABS_(34, 1);
686 if (i->op == OP_SUB) code[1] ^= 1 << 16;
687 }
688 }
689
690 void
691 CodeEmitterGK110::emitUADD(const Instruction *i)
692 {
693 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
694
695 if (i->op == OP_SUB)
696 addOp ^= 1;
697
698 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
699
700 if (isLIMM(i->src(1), TYPE_S32)) {
701 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
702
703 if (addOp & 2)
704 code[1] |= 1 << 27;
705
706 assert(i->flagsDef < 0);
707 assert(i->flagsSrc < 0);
708
709 SAT_(39);
710 } else {
711 emitForm_21(i, 0x208, 0xc08);
712
713 assert(addOp != 3); // would be add-plus-one
714
715 code[1] |= addOp << 19;
716
717 if (i->flagsDef >= 0)
718 code[1] |= 1 << 18; // write carry
719 if (i->flagsSrc >= 0)
720 code[1] |= 1 << 14; // add carry
721
722 SAT_(35);
723 }
724 }
725
726 void
727 CodeEmitterGK110::emitIMAD(const Instruction *i)
728 {
729 uint8_t addOp =
730 i->src(2).mod.neg() | ((i->src(0).mod.neg() ^ i->src(1).mod.neg()) << 1);
731
732 emitForm_21(i, 0x100, 0xa00);
733
734 assert(addOp != 3);
735 code[1] |= addOp << 26;
736
737 if (i->sType == TYPE_S32)
738 code[1] |= (1 << 19) | (1 << 24);
739
740 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
741 code[1] |= 1 << 25;
742
743 if (i->flagsDef >= 0) code[1] |= 1 << 18;
744 if (i->flagsSrc >= 0) code[1] |= 1 << 20;
745
746 SAT_(35);
747 }
748
749 void
750 CodeEmitterGK110::emitISAD(const Instruction *i)
751 {
752 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
753
754 emitForm_21(i, 0x1f4, 0xb74);
755
756 if (i->dType == TYPE_S32)
757 code[1] |= 1 << 19;
758 }
759
760 void
761 CodeEmitterGK110::emitSHLADD(const Instruction *i)
762 {
763 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(2).mod.neg();
764 const ImmediateValue *imm = i->src(1).get()->asImm();
765 assert(imm);
766
767 if (i->src(2).getFile() == FILE_IMMEDIATE) {
768 code[0] = 0x1;
769 code[1] = 0xc0c << 20;
770 } else {
771 code[0] = 0x2;
772 code[1] = 0x20c << 20;
773 }
774 code[1] |= addOp << 19;
775
776 emitPredicate(i);
777
778 defId(i->def(0), 2);
779 srcId(i->src(0), 10);
780
781 if (i->flagsDef >= 0)
782 code[1] |= 1 << 18;
783
784 assert(!(imm->reg.data.u32 & 0xffffffe0));
785 code[1] |= imm->reg.data.u32 << 10;
786
787 switch (i->src(2).getFile()) {
788 case FILE_GPR:
789 assert(code[0] & 0x2);
790 code[1] |= 0xc << 28;
791 srcId(i->src(2), 23);
792 break;
793 case FILE_MEMORY_CONST:
794 assert(code[0] & 0x2);
795 code[1] |= 0x4 << 28;
796 setCAddress14(i->src(2));
797 break;
798 case FILE_IMMEDIATE:
799 assert(code[0] & 0x1);
800 setShortImmediate(i, 2);
801 break;
802 default:
803 assert(!"bad src2 file");
804 break;
805 }
806 }
807
808 void
809 CodeEmitterGK110::emitNOT(const Instruction *i)
810 {
811 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
812 code[1] = 0x22003800;
813
814 emitPredicate(i);
815
816 defId(i->def(0), 2);
817
818 switch (i->src(0).getFile()) {
819 case FILE_GPR:
820 code[1] |= 0xc << 28;
821 srcId(i->src(0), 23);
822 break;
823 case FILE_MEMORY_CONST:
824 code[1] |= 0x4 << 28;
825 setCAddress14(i->src(0));
826 break;
827 default:
828 assert(0);
829 break;
830 }
831 }
832
833 void
834 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
835 {
836 if (i->def(0).getFile() == FILE_PREDICATE) {
837 code[0] = 0x00000002 | (subOp << 27);
838 code[1] = 0x84800000;
839
840 emitPredicate(i);
841
842 defId(i->def(0), 5);
843 srcId(i->src(0), 14);
844 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[0] |= 1 << 17;
845 srcId(i->src(1), 32);
846 if (i->src(1).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 3;
847
848 if (i->defExists(1)) {
849 defId(i->def(1), 2);
850 } else {
851 code[0] |= 7 << 2;
852 }
853 // (a OP b) OP c
854 if (i->predSrc != 2 && i->srcExists(2)) {
855 code[1] |= subOp << 16;
856 srcId(i->src(2), 42);
857 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 13;
858 } else {
859 code[1] |= 7 << 10;
860 }
861 } else
862 if (isLIMM(i->src(1), TYPE_S32)) {
863 emitForm_L(i, 0x200, 0, i->src(1).mod);
864 code[1] |= subOp << 24;
865 NOT_(3a, 0);
866 } else {
867 emitForm_21(i, 0x220, 0xc20);
868 code[1] |= subOp << 12;
869 NOT_(2a, 0);
870 NOT_(2b, 1);
871 }
872 }
873
874 void
875 CodeEmitterGK110::emitPOPC(const Instruction *i)
876 {
877 assert(!isLIMM(i->src(1), TYPE_S32, true));
878
879 emitForm_21(i, 0x204, 0xc04);
880
881 NOT_(2a, 0);
882 if (!(code[0] & 0x1))
883 NOT_(2b, 1);
884 }
885
886 void
887 CodeEmitterGK110::emitINSBF(const Instruction *i)
888 {
889 emitForm_21(i, 0x1f8, 0xb78);
890 }
891
892 void
893 CodeEmitterGK110::emitEXTBF(const Instruction *i)
894 {
895 emitForm_21(i, 0x600, 0xc00);
896
897 if (i->dType == TYPE_S32)
898 code[1] |= 0x80000;
899 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
900 code[1] |= 0x800;
901 }
902
903 void
904 CodeEmitterGK110::emitBFIND(const Instruction *i)
905 {
906 emitForm_C(i, 0x218, 0x2);
907
908 if (i->dType == TYPE_S32)
909 code[1] |= 0x80000;
910 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
911 code[1] |= 0x800;
912 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
913 code[1] |= 0x1000;
914 }
915
916 void
917 CodeEmitterGK110::emitPERMT(const Instruction *i)
918 {
919 emitForm_21(i, 0x1e0, 0xb60);
920
921 code[1] |= i->subOp << 19;
922 }
923
924 void
925 CodeEmitterGK110::emitShift(const Instruction *i)
926 {
927 if (i->op == OP_SHR) {
928 emitForm_21(i, 0x214, 0xc14);
929 if (isSignedType(i->dType))
930 code[1] |= 1 << 19;
931 } else {
932 emitForm_21(i, 0x224, 0xc24);
933 }
934
935 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
936 code[1] |= 1 << 10;
937 }
938
939 void
940 CodeEmitterGK110::emitShift64(const Instruction *i)
941 {
942 if (i->op == OP_SHR) {
943 emitForm_21(i, 0x27c, 0xc7c);
944 if (isSignedType(i->sType))
945 code[1] |= 0x100;
946 if (i->subOp & NV50_IR_SUBOP_SHIFT_HIGH)
947 code[1] |= 1 << 19;
948 } else {
949 emitForm_21(i, 0xdfc, 0xf7c);
950 }
951 code[1] |= 0x200;
952
953 if (i->subOp & NV50_IR_SUBOP_SHIFT_WRAP)
954 code[1] |= 1 << 21;
955 }
956
957 void
958 CodeEmitterGK110::emitPreOp(const Instruction *i)
959 {
960 emitForm_C(i, 0x248, 0x2);
961
962 if (i->op == OP_PREEX2)
963 code[1] |= 1 << 10;
964
965 NEG_(30, 0);
966 ABS_(34, 0);
967 }
968
969 void
970 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
971 {
972 code[0] = 0x00000002 | (subOp << 23);
973 code[1] = 0x84000000;
974
975 emitPredicate(i);
976
977 defId(i->def(0), 2);
978 srcId(i->src(0), 10);
979
980 NEG_(33, 0);
981 ABS_(31, 0);
982 SAT_(35);
983 }
984
985 void
986 CodeEmitterGK110::emitMINMAX(const Instruction *i)
987 {
988 uint32_t op2, op1;
989
990 switch (i->dType) {
991 case TYPE_U32:
992 case TYPE_S32:
993 op2 = 0x210;
994 op1 = 0xc10;
995 break;
996 case TYPE_F32:
997 op2 = 0x230;
998 op1 = 0xc30;
999 break;
1000 case TYPE_F64:
1001 op2 = 0x228;
1002 op1 = 0xc28;
1003 break;
1004 default:
1005 assert(0);
1006 op2 = 0;
1007 op1 = 0;
1008 break;
1009 }
1010 emitForm_21(i, op2, op1);
1011
1012 if (i->dType == TYPE_S32)
1013 code[1] |= 1 << 19;
1014 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
1015 code[1] |= i->subOp << 14;
1016 if (i->flagsDef >= 0)
1017 code[1] |= i->subOp << 18;
1018
1019 FTZ_(2f);
1020 ABS_(31, 0);
1021 NEG_(33, 0);
1022 if (code[0] & 0x1) {
1023 modNegAbsF32_3b(i, 1);
1024 } else {
1025 ABS_(34, 1);
1026 NEG_(30, 1);
1027 }
1028 }
1029
1030 void
1031 CodeEmitterGK110::emitCVT(const Instruction *i)
1032 {
1033 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
1034 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
1035 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
1036
1037 bool sat = i->saturate;
1038 bool abs = i->src(0).mod.abs();
1039 bool neg = i->src(0).mod.neg();
1040
1041 RoundMode rnd = i->rnd;
1042
1043 switch (i->op) {
1044 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
1045 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
1046 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
1047 case OP_SAT: sat = true; break;
1048 case OP_NEG: neg = !neg; break;
1049 case OP_ABS: abs = true; neg = false; break;
1050 default:
1051 break;
1052 }
1053
1054 DataType dType;
1055
1056 if (i->op == OP_NEG && i->dType == TYPE_U32)
1057 dType = TYPE_S32;
1058 else
1059 dType = i->dType;
1060
1061
1062 uint32_t op;
1063
1064 if (f2f) op = 0x254;
1065 else if (f2i) op = 0x258;
1066 else if (i2f) op = 0x25c;
1067 else op = 0x260;
1068
1069 emitForm_C(i, op, 0x2);
1070
1071 FTZ_(2f);
1072 if (neg) code[1] |= 1 << 16;
1073 if (abs) code[1] |= 1 << 20;
1074 if (sat) code[1] |= 1 << 21;
1075
1076 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
1077
1078 code[0] |= typeSizeofLog2(dType) << 10;
1079 code[0] |= typeSizeofLog2(i->sType) << 12;
1080 code[1] |= i->subOp << 12;
1081
1082 if (isSignedIntType(dType))
1083 code[0] |= 0x4000;
1084 if (isSignedIntType(i->sType))
1085 code[0] |= 0x8000;
1086 }
1087
1088 void
1089 CodeEmitterGK110::emitSET(const CmpInstruction *i)
1090 {
1091 uint16_t op1, op2;
1092
1093 if (i->def(0).getFile() == FILE_PREDICATE) {
1094 switch (i->sType) {
1095 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1096 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1097 default:
1098 op2 = 0x1b0;
1099 op1 = 0xb30;
1100 break;
1101 }
1102 emitForm_21(i, op2, op1);
1103
1104 NEG_(2e, 0);
1105 ABS_(9, 0);
1106 if (!(code[0] & 0x1)) {
1107 NEG_(8, 1);
1108 ABS_(2f, 1);
1109 } else {
1110 modNegAbsF32_3b(i, 1);
1111 }
1112 FTZ_(32);
1113
1114 // normal DST field is negated predicate result
1115 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
1116 if (i->defExists(1))
1117 defId(i->def(1), 2);
1118 else
1119 code[0] |= 0x1c;
1120 } else {
1121 switch (i->sType) {
1122 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
1123 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
1124 default:
1125 op2 = 0x1a8;
1126 op1 = 0xb28;
1127 break;
1128 }
1129 emitForm_21(i, op2, op1);
1130
1131 NEG_(2e, 0);
1132 ABS_(39, 0);
1133 if (!(code[0] & 0x1)) {
1134 NEG_(38, 1);
1135 ABS_(2f, 1);
1136 } else {
1137 modNegAbsF32_3b(i, 1);
1138 }
1139 FTZ_(3a);
1140
1141 if (i->dType == TYPE_F32) {
1142 if (isFloatType(i->sType))
1143 code[1] |= 1 << 23;
1144 else
1145 code[1] |= 1 << 15;
1146 }
1147 }
1148 if (i->sType == TYPE_S32)
1149 code[1] |= 1 << 19;
1150
1151 if (i->op != OP_SET) {
1152 switch (i->op) {
1153 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1154 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1155 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1156 default:
1157 assert(0);
1158 break;
1159 }
1160 srcId(i->src(2), 0x2a);
1161 } else {
1162 code[1] |= 0x7 << 10;
1163 }
1164 if (i->flagsSrc >= 0)
1165 code[1] |= 1 << 14;
1166 emitCondCode(i->setCond,
1167 isFloatType(i->sType) ? 0x33 : 0x34,
1168 isFloatType(i->sType) ? 0xf : 0x7);
1169 }
1170
1171 void
1172 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1173 {
1174 CondCode cc = i->setCond;
1175 if (i->src(2).mod.neg())
1176 cc = reverseCondCode(cc);
1177
1178 if (i->dType == TYPE_F32) {
1179 emitForm_21(i, 0x1d0, 0xb50);
1180 FTZ_(32);
1181 emitCondCode(cc, 0x33, 0xf);
1182 } else {
1183 emitForm_21(i, 0x1a0, 0xb20);
1184 emitCondCode(cc, 0x34, 0x7);
1185 if (i->dType == TYPE_S32)
1186 code[1] |= 1 << 19;
1187 }
1188 }
1189
1190 static void
1191 selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1192 {
1193 int loc = entry->loc;
1194 if (data.force_persample_interp)
1195 code[loc + 1] |= 1 << 13;
1196 else
1197 code[loc + 1] &= ~(1 << 13);
1198 }
1199
1200 void CodeEmitterGK110::emitSELP(const Instruction *i)
1201 {
1202 emitForm_21(i, 0x250, 0x050);
1203
1204 if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
1205 code[1] |= 1 << 13;
1206
1207 if (i->subOp == 1) {
1208 addInterp(0, 0, selpFlip);
1209 }
1210 }
1211
1212 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1213 {
1214 code[0] = 0x0000003e | (i->subOp << 23);
1215 code[1] = 0x77000000;
1216
1217 emitPredicate(i);
1218 }
1219
1220 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1221 {
1222 code[0] = 0x00000002;
1223 code[1] = 0x76c00000;
1224
1225 code[1] |= i->tex.r << 9;
1226 // code[1] |= i->tex.s << (9 + 8);
1227
1228 if (i->tex.liveOnly)
1229 code[0] |= 0x80000000;
1230
1231 defId(i->def(0), 2);
1232 srcId(i->src(0), 10);
1233 }
1234
1235 static inline bool
1236 isNextIndependentTex(const TexInstruction *i)
1237 {
1238 if (!i->next || !isTextureOp(i->next->op))
1239 return false;
1240 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1241 return false;
1242 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1243 }
1244
1245 void
1246 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1247 {
1248 const bool ind = i->tex.rIndirectSrc >= 0;
1249
1250 if (ind) {
1251 code[0] = 0x00000002;
1252 switch (i->op) {
1253 case OP_TXD:
1254 code[1] = 0x7e000000;
1255 break;
1256 case OP_TXLQ:
1257 code[1] = 0x7e800000;
1258 break;
1259 case OP_TXF:
1260 code[1] = 0x78000000;
1261 break;
1262 case OP_TXG:
1263 code[1] = 0x7dc00000;
1264 break;
1265 default:
1266 code[1] = 0x7d800000;
1267 break;
1268 }
1269 } else {
1270 switch (i->op) {
1271 case OP_TXD:
1272 code[0] = 0x00000002;
1273 code[1] = 0x76000000;
1274 code[1] |= i->tex.r << 9;
1275 break;
1276 case OP_TXLQ:
1277 code[0] = 0x00000002;
1278 code[1] = 0x76800000;
1279 code[1] |= i->tex.r << 9;
1280 break;
1281 case OP_TXF:
1282 code[0] = 0x00000002;
1283 code[1] = 0x70000000;
1284 code[1] |= i->tex.r << 13;
1285 break;
1286 case OP_TXG:
1287 code[0] = 0x00000001;
1288 code[1] = 0x70000000;
1289 code[1] |= i->tex.r << 15;
1290 break;
1291 default:
1292 code[0] = 0x00000001;
1293 code[1] = 0x60000000;
1294 code[1] |= i->tex.r << 15;
1295 break;
1296 }
1297 }
1298
1299 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1300
1301 if (i->tex.liveOnly)
1302 code[0] |= 0x80000000;
1303
1304 switch (i->op) {
1305 case OP_TEX: break;
1306 case OP_TXB: code[1] |= 0x2000; break;
1307 case OP_TXL: code[1] |= 0x3000; break;
1308 case OP_TXF: break;
1309 case OP_TXG: break;
1310 case OP_TXD: break;
1311 case OP_TXLQ: break;
1312 default:
1313 assert(!"invalid texture op");
1314 break;
1315 }
1316
1317 if (i->op == OP_TXF) {
1318 if (!i->tex.levelZero)
1319 code[1] |= 0x1000;
1320 } else
1321 if (i->tex.levelZero) {
1322 code[1] |= 0x1000;
1323 }
1324
1325 if (i->op != OP_TXD && i->tex.derivAll)
1326 code[1] |= 0x200;
1327
1328 emitPredicate(i);
1329
1330 code[1] |= i->tex.mask << 2;
1331
1332 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1333
1334 defId(i->def(0), 2);
1335 srcId(i->src(0), 10);
1336 srcId(i, src1, 23);
1337
1338 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1339
1340 // texture target:
1341 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1342 if (i->tex.target.isArray())
1343 code[1] |= 0x40;
1344 if (i->tex.target.isShadow())
1345 code[1] |= 0x400;
1346 if (i->tex.target == TEX_TARGET_2D_MS ||
1347 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1348 code[1] |= 0x800;
1349
1350 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1351 // ?
1352 }
1353
1354 if (i->tex.useOffsets == 1) {
1355 switch (i->op) {
1356 case OP_TXF: code[1] |= 0x200; break;
1357 case OP_TXD: code[1] |= 0x00400000; break;
1358 default: code[1] |= 0x800; break;
1359 }
1360 }
1361 if (i->tex.useOffsets == 4)
1362 code[1] |= 0x1000;
1363 }
1364
1365 void
1366 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1367 {
1368 code[0] = 0x00000002;
1369 code[1] = 0x75400001;
1370
1371 switch (i->tex.query) {
1372 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1373 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1374 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1375 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1376 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1377 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1378 default:
1379 assert(!"invalid texture query");
1380 break;
1381 }
1382
1383 code[1] |= i->tex.mask << 2;
1384 code[1] |= i->tex.r << 9;
1385 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1386 code[1] |= 0x08000000;
1387
1388 defId(i->def(0), 2);
1389 srcId(i->src(0), 10);
1390
1391 emitPredicate(i);
1392 }
1393
1394 void
1395 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1396 {
1397 code[0] = 0x00000002 | ((qOp & 1) << 31);
1398 code[1] = 0x7fc00200 | (qOp >> 1) | (laneMask << 12); // dall
1399
1400 defId(i->def(0), 2);
1401 srcId(i->src(0), 10);
1402 srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
1403
1404 emitPredicate(i);
1405 }
1406
1407 void
1408 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1409 {
1410 emitForm_L(i, 0x7f4, 2, Modifier(0));
1411 code[1] |= i->subOp << 2;
1412 code[1] |= 0x00070000;
1413 }
1414
1415 void
1416 CodeEmitterGK110::emitBAR(const Instruction *i)
1417 {
1418 code[0] = 0x00000002;
1419 code[1] = 0x85400000;
1420
1421 switch (i->subOp) {
1422 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1423 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1424 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1425 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1426 default:
1427 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1428 break;
1429 }
1430
1431 emitPredicate(i);
1432
1433 // barrier id
1434 if (i->src(0).getFile() == FILE_GPR) {
1435 srcId(i->src(0), 10);
1436 } else {
1437 ImmediateValue *imm = i->getSrc(0)->asImm();
1438 assert(imm);
1439 code[0] |= imm->reg.data.u32 << 10;
1440 code[1] |= 0x8000;
1441 }
1442
1443 // thread count
1444 if (i->src(1).getFile() == FILE_GPR) {
1445 srcId(i->src(1), 23);
1446 } else {
1447 ImmediateValue *imm = i->getSrc(0)->asImm();
1448 assert(imm);
1449 assert(imm->reg.data.u32 <= 0xfff);
1450 code[0] |= imm->reg.data.u32 << 23;
1451 code[1] |= imm->reg.data.u32 >> 9;
1452 code[1] |= 0x4000;
1453 }
1454
1455 if (i->srcExists(2) && (i->predSrc != 2)) {
1456 srcId(i->src(2), 32 + 10);
1457 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1458 code[1] |= 1 << 13;
1459 } else {
1460 code[1] |= 7 << 10;
1461 }
1462 }
1463
1464 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1465 {
1466 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1467 code[1] = 0x7cc00000;
1468
1469 emitPredicate(i);
1470 }
1471
1472 void
1473 CodeEmitterGK110::emitFlow(const Instruction *i)
1474 {
1475 const FlowInstruction *f = i->asFlow();
1476
1477 unsigned mask; // bit 0: predicate, bit 1: target
1478
1479 code[0] = 0x00000000;
1480
1481 switch (i->op) {
1482 case OP_BRA:
1483 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1484 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1485 code[0] |= 0x80;
1486 mask = 3;
1487 break;
1488 case OP_CALL:
1489 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1490 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1491 code[0] |= 0x80;
1492 mask = 2;
1493 break;
1494
1495 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1496 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1497 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1498 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1499 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1500
1501 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1502 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1503 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1504 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1505
1506 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1507 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1508 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1509 default:
1510 assert(!"invalid flow operation");
1511 return;
1512 }
1513
1514 if (mask & 1) {
1515 emitPredicate(i);
1516 if (i->flagsSrc < 0)
1517 code[0] |= 0x3c;
1518 }
1519
1520 if (!f)
1521 return;
1522
1523 if (f->allWarp)
1524 code[0] |= 1 << 9;
1525 if (f->limit)
1526 code[0] |= 1 << 8;
1527
1528 if (f->op == OP_CALL) {
1529 if (f->builtin) {
1530 assert(f->absolute);
1531 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1532 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1533 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1534 } else {
1535 assert(!f->absolute);
1536 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1537 code[0] |= (pcRel & 0x1ff) << 23;
1538 code[1] |= (pcRel >> 9) & 0x7fff;
1539 }
1540 } else
1541 if (mask & 2) {
1542 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1543 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1544 pcRel += 8;
1545 // currently we don't want absolute branches
1546 assert(!f->absolute);
1547 code[0] |= (pcRel & 0x1ff) << 23;
1548 code[1] |= (pcRel >> 9) & 0x7fff;
1549 }
1550 }
1551
1552 void
1553 CodeEmitterGK110::emitVOTE(const Instruction *i)
1554 {
1555 assert(i->src(0).getFile() == FILE_PREDICATE);
1556
1557 code[0] = 0x00000002;
1558 code[1] = 0x86c00000 | (i->subOp << 19);
1559
1560 emitPredicate(i);
1561
1562 unsigned rp = 0;
1563 for (int d = 0; i->defExists(d); d++) {
1564 if (i->def(d).getFile() == FILE_PREDICATE) {
1565 assert(!(rp & 2));
1566 rp |= 2;
1567 defId(i->def(d), 48);
1568 } else if (i->def(d).getFile() == FILE_GPR) {
1569 assert(!(rp & 1));
1570 rp |= 1;
1571 defId(i->def(d), 2);
1572 } else {
1573 assert(!"Unhandled def");
1574 }
1575 }
1576 if (!(rp & 1))
1577 code[0] |= 255 << 2;
1578 if (!(rp & 2))
1579 code[1] |= 7 << 16;
1580 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
1581 code[1] |= 1 << 13;
1582 srcId(i->src(0), 42);
1583 }
1584
1585 void
1586 CodeEmitterGK110::emitSUGType(DataType ty, const int pos)
1587 {
1588 uint8_t n = 0;
1589
1590 switch (ty) {
1591 case TYPE_S32: n = 1; break;
1592 case TYPE_U8: n = 2; break;
1593 case TYPE_S8: n = 3; break;
1594 default:
1595 assert(ty == TYPE_U32);
1596 break;
1597 }
1598 code[pos / 32] |= n << (pos % 32);
1599 }
1600
1601 void
1602 CodeEmitterGK110::emitSUCachingMode(CacheMode c)
1603 {
1604 uint8_t n = 0;
1605
1606 switch (c) {
1607 case CACHE_CA:
1608 // case CACHE_WB:
1609 n = 0;
1610 break;
1611 case CACHE_CG:
1612 n = 1;
1613 break;
1614 case CACHE_CS:
1615 n = 2;
1616 break;
1617 case CACHE_CV:
1618 // case CACHE_WT:
1619 n = 3;
1620 break;
1621 default:
1622 assert(!"invalid caching mode");
1623 break;
1624 }
1625 code[0] |= (n & 1) << 31;
1626 code[1] |= (n & 2) >> 1;
1627 }
1628
1629 void
1630 CodeEmitterGK110::setSUConst16(const Instruction *i, const int s)
1631 {
1632 const uint32_t offset = i->getSrc(s)->reg.data.offset;
1633
1634 assert(offset == (offset & 0xfffc));
1635
1636 code[0] |= offset << 21;
1637 code[1] |= offset >> 11;
1638 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
1639 }
1640
1641 void
1642 CodeEmitterGK110::emitSULDGB(const TexInstruction *i)
1643 {
1644 code[0] = 0x00000002;
1645 code[1] = 0x30000000 | (i->subOp << 14);
1646
1647 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1648 emitLoadStoreType(i->dType, 0x38);
1649 emitCachingMode(i->cache, 0x36);
1650
1651 // format
1652 setSUConst16(i, 1);
1653 } else {
1654 assert(i->src(1).getFile() == FILE_GPR);
1655 code[1] |= 0x49800000;
1656
1657 emitLoadStoreType(i->dType, 0x21);
1658 emitSUCachingMode(i->cache);
1659
1660 srcId(i->src(1), 23);
1661 }
1662
1663 emitSUGType(i->sType, 0x34);
1664
1665 emitPredicate(i);
1666 defId(i->def(0), 2); // destination
1667 srcId(i->src(0), 10); // address
1668
1669 // surface predicate
1670 if (!i->srcExists(2) || (i->predSrc == 2)) {
1671 code[1] |= 0x7 << 10;
1672 } else {
1673 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1674 code[1] |= 1 << 13;
1675 srcId(i->src(2), 32 + 10);
1676 }
1677 }
1678
1679 void
1680 CodeEmitterGK110::emitSUSTGx(const TexInstruction *i)
1681 {
1682 assert(i->op == OP_SUSTP);
1683
1684 code[0] = 0x00000002;
1685 code[1] = 0x38000000;
1686
1687 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1688 code[0] |= i->subOp << 2;
1689
1690 if (i->op == OP_SUSTP)
1691 code[0] |= i->tex.mask << 4;
1692
1693 emitSUGType(i->sType, 0x8);
1694 emitCachingMode(i->cache, 0x36);
1695
1696 // format
1697 setSUConst16(i, 1);
1698 } else {
1699 assert(i->src(1).getFile() == FILE_GPR);
1700
1701 code[0] |= i->subOp << 23;
1702 code[1] |= 0x41c00000;
1703
1704 if (i->op == OP_SUSTP)
1705 code[0] |= i->tex.mask << 25;
1706
1707 emitSUGType(i->sType, 0x1d);
1708 emitSUCachingMode(i->cache);
1709
1710 srcId(i->src(1), 2);
1711 }
1712
1713 emitPredicate(i);
1714 srcId(i->src(0), 10); // address
1715 srcId(i->src(3), 42); // values
1716
1717 // surface predicate
1718 if (!i->srcExists(2) || (i->predSrc == 2)) {
1719 code[1] |= 0x7 << 18;
1720 } else {
1721 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1722 code[1] |= 1 << 21;
1723 srcId(i->src(2), 32 + 18);
1724 }
1725 }
1726
1727 void
1728 CodeEmitterGK110::emitSUCLAMPMode(uint16_t subOp)
1729 {
1730 uint8_t m;
1731 switch (subOp & ~NV50_IR_SUBOP_SUCLAMP_2D) {
1732 case NV50_IR_SUBOP_SUCLAMP_SD(0, 1): m = 0; break;
1733 case NV50_IR_SUBOP_SUCLAMP_SD(1, 1): m = 1; break;
1734 case NV50_IR_SUBOP_SUCLAMP_SD(2, 1): m = 2; break;
1735 case NV50_IR_SUBOP_SUCLAMP_SD(3, 1): m = 3; break;
1736 case NV50_IR_SUBOP_SUCLAMP_SD(4, 1): m = 4; break;
1737 case NV50_IR_SUBOP_SUCLAMP_PL(0, 1): m = 5; break;
1738 case NV50_IR_SUBOP_SUCLAMP_PL(1, 1): m = 6; break;
1739 case NV50_IR_SUBOP_SUCLAMP_PL(2, 1): m = 7; break;
1740 case NV50_IR_SUBOP_SUCLAMP_PL(3, 1): m = 8; break;
1741 case NV50_IR_SUBOP_SUCLAMP_PL(4, 1): m = 9; break;
1742 case NV50_IR_SUBOP_SUCLAMP_BL(0, 1): m = 10; break;
1743 case NV50_IR_SUBOP_SUCLAMP_BL(1, 1): m = 11; break;
1744 case NV50_IR_SUBOP_SUCLAMP_BL(2, 1): m = 12; break;
1745 case NV50_IR_SUBOP_SUCLAMP_BL(3, 1): m = 13; break;
1746 case NV50_IR_SUBOP_SUCLAMP_BL(4, 1): m = 14; break;
1747 default:
1748 return;
1749 }
1750 code[1] |= m << 20;
1751 if (subOp & NV50_IR_SUBOP_SUCLAMP_2D)
1752 code[1] |= 1 << 24;
1753 }
1754
1755 void
1756 CodeEmitterGK110::emitSUCalc(Instruction *i)
1757 {
1758 ImmediateValue *imm = NULL;
1759 uint64_t opc1, opc2;
1760
1761 if (i->srcExists(2)) {
1762 imm = i->getSrc(2)->asImm();
1763 if (imm)
1764 i->setSrc(2, NULL); // special case, make emitForm_21 not assert
1765 }
1766
1767 switch (i->op) {
1768 case OP_SUCLAMP: opc1 = 0xb00; opc2 = 0x580; break;
1769 case OP_SUBFM: opc1 = 0xb68; opc2 = 0x1e8; break;
1770 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1771 default:
1772 assert(0);
1773 return;
1774 }
1775 emitForm_21(i, opc2, opc1);
1776
1777 if (i->op == OP_SUCLAMP) {
1778 if (i->dType == TYPE_S32)
1779 code[1] |= 1 << 19;
1780 emitSUCLAMPMode(i->subOp);
1781 }
1782
1783 if (i->op == OP_SUBFM && i->subOp == NV50_IR_SUBOP_SUBFM_3D)
1784 code[1] |= 1 << 18;
1785
1786 if (i->op != OP_SUEAU) {
1787 const uint8_t pos = i->op == OP_SUBFM ? 19 : 16;
1788 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
1789 code[0] |= 255 << 2;
1790 code[1] |= i->getDef(1)->reg.data.id << pos;
1791 } else
1792 if (i->defExists(1)) { // r, p
1793 assert(i->def(1).getFile() == FILE_PREDICATE);
1794 code[1] |= i->getDef(1)->reg.data.id << pos;
1795 } else { // r, #
1796 code[1] |= 7 << pos;
1797 }
1798 }
1799
1800 if (imm) {
1801 assert(i->op == OP_SUCLAMP);
1802 i->setSrc(2, imm);
1803 code[1] |= (imm->reg.data.u32 & 0x3f) << 10; // sint6
1804 }
1805 }
1806
1807
1808 void
1809 CodeEmitterGK110::emitVectorSubOp(const Instruction *i)
1810 {
1811 switch (NV50_IR_SUBOP_Vn(i->subOp)) {
1812 case 0:
1813 code[1] |= (i->subOp & 0x000f) << 7; // vsrc1
1814 code[1] |= (i->subOp & 0x00e0) >> 6; // vsrc2
1815 code[1] |= (i->subOp & 0x0100) << 13; // vsrc2
1816 code[1] |= (i->subOp & 0x3c00) << 12; // vdst
1817 break;
1818 default:
1819 assert(0);
1820 break;
1821 }
1822 }
1823
1824 void
1825 CodeEmitterGK110::emitVSHL(const Instruction *i)
1826 {
1827 code[0] = 0x00000002;
1828 code[1] = 0xb8000000;
1829
1830 assert(NV50_IR_SUBOP_Vn(i->subOp) == 0);
1831
1832 if (isSignedType(i->dType)) code[1] |= 1 << 25;
1833 if (isSignedType(i->sType)) code[1] |= 1 << 19;
1834
1835 emitVectorSubOp(i);
1836
1837 emitPredicate(i);
1838 defId(i->def(0), 2);
1839 srcId(i->src(0), 10);
1840
1841 if (i->getSrc(1)->reg.file == FILE_IMMEDIATE) {
1842 ImmediateValue *imm = i->getSrc(1)->asImm();
1843 assert(imm);
1844 code[0] |= (imm->reg.data.u32 & 0x01ff) << 23;
1845 code[1] |= (imm->reg.data.u32 & 0xfe00) >> 9;
1846 } else {
1847 assert(i->getSrc(1)->reg.file == FILE_GPR);
1848 code[1] |= 1 << 21;
1849 srcId(i->src(1), 23);
1850 }
1851 srcId(i->src(2), 42);
1852
1853 if (i->saturate)
1854 code[0] |= 1 << 22;
1855 if (i->flagsDef >= 0)
1856 code[1] |= 1 << 18;
1857 }
1858
1859 void
1860 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1861 {
1862 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1863
1864 code[0] = 0x00000002 | (offset << 23);
1865 code[1] = 0x7d000000 | (offset >> 9);
1866
1867 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1868 code[1] |= 0x8;
1869
1870 emitPredicate(i);
1871
1872 defId(i->def(0), 2);
1873 srcId(i->src(0).getIndirect(0), 10);
1874 }
1875
1876 void
1877 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1878 {
1879 uint32_t prim = i->src(0).get()->reg.data.u32;
1880
1881 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1882 code[1] = 0x7f800000;
1883
1884 emitPredicate(i);
1885
1886 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1887
1888 defId(i->def(0), 2);
1889 srcId(i, src1, 10);
1890 }
1891
1892 void
1893 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1894 {
1895 unsigned int size = typeSizeof(i->dType);
1896 uint32_t offset = i->src(0).get()->reg.data.offset;
1897
1898 code[0] = 0x00000002 | (offset << 23);
1899 code[1] = 0x7ec00000 | (offset >> 9);
1900 code[1] |= (size / 4 - 1) << 18;
1901
1902 if (i->perPatch)
1903 code[1] |= 0x4;
1904 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1905 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1906
1907 emitPredicate(i);
1908
1909 defId(i->def(0), 2);
1910 srcId(i->src(0).getIndirect(0), 10);
1911 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1912 }
1913
1914 void
1915 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1916 {
1917 unsigned int size = typeSizeof(i->dType);
1918 uint32_t offset = i->src(0).get()->reg.data.offset;
1919
1920 code[0] = 0x00000002 | (offset << 23);
1921 code[1] = 0x7f000000 | (offset >> 9);
1922 code[1] |= (size / 4 - 1) << 18;
1923
1924 if (i->perPatch)
1925 code[1] |= 0x4;
1926
1927 emitPredicate(i);
1928
1929 assert(i->src(1).getFile() == FILE_GPR);
1930
1931 srcId(i->src(0).getIndirect(0), 10);
1932 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1933 srcId(i->src(1), 2);
1934 }
1935
1936 void
1937 CodeEmitterGK110::emitOUT(const Instruction *i)
1938 {
1939 assert(i->src(0).getFile() == FILE_GPR);
1940
1941 emitForm_21(i, 0x1f0, 0xb70);
1942
1943 if (i->op == OP_EMIT)
1944 code[1] |= 1 << 10;
1945 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1946 code[1] |= 1 << 11;
1947 }
1948
1949 void
1950 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1951 {
1952 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1953 code[1] |= (i->ipa & 0xc) << (19 - 2);
1954 }
1955
1956 static void
1957 interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1958 {
1959 int ipa = entry->ipa;
1960 int reg = entry->reg;
1961 int loc = entry->loc;
1962
1963 if (data.flatshade &&
1964 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1965 ipa = NV50_IR_INTERP_FLAT;
1966 reg = 0xff;
1967 } else if (data.force_persample_interp &&
1968 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1969 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1970 ipa |= NV50_IR_INTERP_CENTROID;
1971 }
1972 code[loc + 1] &= ~(0xf << 19);
1973 code[loc + 1] |= (ipa & 0x3) << 21;
1974 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1975 code[loc + 0] &= ~(0xff << 23);
1976 code[loc + 0] |= reg << 23;
1977 }
1978
1979 void
1980 CodeEmitterGK110::emitINTERP(const Instruction *i)
1981 {
1982 const uint32_t base = i->getSrc(0)->reg.data.offset;
1983
1984 code[0] = 0x00000002 | (base << 31);
1985 code[1] = 0x74800000 | (base >> 1);
1986
1987 if (i->saturate)
1988 code[1] |= 1 << 18;
1989
1990 if (i->op == OP_PINTERP) {
1991 srcId(i->src(1), 23);
1992 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1993 } else {
1994 code[0] |= 0xff << 23;
1995 addInterp(i->ipa, 0xff, interpApply);
1996 }
1997
1998 srcId(i->src(0).getIndirect(0), 10);
1999 emitInterpMode(i);
2000
2001 emitPredicate(i);
2002 defId(i->def(0), 2);
2003
2004 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
2005 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
2006 else
2007 code[1] |= 0xff << 10;
2008 }
2009
2010 void
2011 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
2012 {
2013 uint8_t n;
2014
2015 switch (ty) {
2016 case TYPE_U8:
2017 n = 0;
2018 break;
2019 case TYPE_S8:
2020 n = 1;
2021 break;
2022 case TYPE_U16:
2023 n = 2;
2024 break;
2025 case TYPE_S16:
2026 n = 3;
2027 break;
2028 case TYPE_F32:
2029 case TYPE_U32:
2030 case TYPE_S32:
2031 n = 4;
2032 break;
2033 case TYPE_F64:
2034 case TYPE_U64:
2035 case TYPE_S64:
2036 n = 5;
2037 break;
2038 case TYPE_B128:
2039 n = 6;
2040 break;
2041 default:
2042 n = 0;
2043 assert(!"invalid ld/st type");
2044 break;
2045 }
2046 code[pos / 32] |= n << (pos % 32);
2047 }
2048
2049 void
2050 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
2051 {
2052 uint8_t n;
2053
2054 switch (c) {
2055 case CACHE_CA:
2056 // case CACHE_WB:
2057 n = 0;
2058 break;
2059 case CACHE_CG:
2060 n = 1;
2061 break;
2062 case CACHE_CS:
2063 n = 2;
2064 break;
2065 case CACHE_CV:
2066 // case CACHE_WT:
2067 n = 3;
2068 break;
2069 default:
2070 n = 0;
2071 assert(!"invalid caching mode");
2072 break;
2073 }
2074 code[pos / 32] |= n << (pos % 32);
2075 }
2076
2077 void
2078 CodeEmitterGK110::emitSTORE(const Instruction *i)
2079 {
2080 int32_t offset = SDATA(i->src(0)).offset;
2081
2082 switch (i->src(0).getFile()) {
2083 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
2084 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
2085 case FILE_MEMORY_SHARED:
2086 code[0] = 0x00000002;
2087 if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
2088 code[1] = 0x78400000;
2089 else
2090 code[1] = 0x7ac00000;
2091 break;
2092 default:
2093 assert(!"invalid memory file");
2094 break;
2095 }
2096
2097 if (code[0] & 0x2) {
2098 offset &= 0xffffff;
2099 emitLoadStoreType(i->dType, 0x33);
2100 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2101 emitCachingMode(i->cache, 0x2f);
2102 } else {
2103 emitLoadStoreType(i->dType, 0x38);
2104 emitCachingMode(i->cache, 0x3b);
2105 }
2106 code[0] |= offset << 23;
2107 code[1] |= offset >> 9;
2108
2109 // Unlocked store on shared memory can fail.
2110 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2111 i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
2112 assert(i->defExists(0));
2113 defId(i->def(0), 32 + 16);
2114 }
2115
2116 emitPredicate(i);
2117
2118 srcId(i->src(1), 2);
2119 srcId(i->src(0).getIndirect(0), 10);
2120 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2121 i->src(0).isIndirect(0) &&
2122 i->getIndirect(0, 0)->reg.size == 8)
2123 code[1] |= 1 << 23;
2124 }
2125
2126 void
2127 CodeEmitterGK110::emitLOAD(const Instruction *i)
2128 {
2129 int32_t offset = SDATA(i->src(0)).offset;
2130
2131 switch (i->src(0).getFile()) {
2132 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
2133 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
2134 case FILE_MEMORY_SHARED:
2135 code[0] = 0x00000002;
2136 if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
2137 code[1] = 0x77400000;
2138 else
2139 code[1] = 0x7a400000;
2140 break;
2141 case FILE_MEMORY_CONST:
2142 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
2143 emitMOV(i);
2144 return;
2145 }
2146 offset &= 0xffff;
2147 code[0] = 0x00000002;
2148 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
2149 code[1] |= i->subOp << 15;
2150 break;
2151 default:
2152 assert(!"invalid memory file");
2153 break;
2154 }
2155
2156 if (code[0] & 0x2) {
2157 offset &= 0xffffff;
2158 emitLoadStoreType(i->dType, 0x33);
2159 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2160 emitCachingMode(i->cache, 0x2f);
2161 } else {
2162 emitLoadStoreType(i->dType, 0x38);
2163 emitCachingMode(i->cache, 0x3b);
2164 }
2165 code[0] |= offset << 23;
2166 code[1] |= offset >> 9;
2167
2168 // Locked store on shared memory can fail.
2169 int r = 0, p = -1;
2170 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2171 i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
2172 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
2173 r = -1;
2174 p = 0;
2175 } else if (i->defExists(1)) { // r, p
2176 p = 1;
2177 } else {
2178 assert(!"Expected predicate dest for load locked");
2179 }
2180 }
2181
2182 emitPredicate(i);
2183
2184 if (r >= 0)
2185 defId(i->def(r), 2);
2186 else
2187 code[0] |= 255 << 2;
2188
2189 if (p >= 0)
2190 defId(i->def(p), 32 + 16);
2191
2192 if (i->getIndirect(0, 0)) {
2193 srcId(i->src(0).getIndirect(0), 10);
2194 if (i->getIndirect(0, 0)->reg.size == 8)
2195 code[1] |= 1 << 23;
2196 } else {
2197 code[0] |= 255 << 10;
2198 }
2199 }
2200
2201 uint8_t
2202 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
2203 {
2204 switch (SDATA(ref).sv.sv) {
2205 case SV_LANEID: return 0x00;
2206 case SV_PHYSID: return 0x03;
2207 case SV_VERTEX_COUNT: return 0x10;
2208 case SV_INVOCATION_ID: return 0x11;
2209 case SV_YDIR: return 0x12;
2210 case SV_THREAD_KILL: return 0x13;
2211 case SV_TID: return 0x21 + SDATA(ref).sv.index;
2212 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
2213 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
2214 case SV_GRIDID: return 0x2c;
2215 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
2216 case SV_LBASE: return 0x34;
2217 case SV_SBASE: return 0x30;
2218 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
2219 default:
2220 assert(!"no sreg for system value");
2221 return 0;
2222 }
2223 }
2224
2225 void
2226 CodeEmitterGK110::emitMOV(const Instruction *i)
2227 {
2228 if (i->def(0).getFile() == FILE_PREDICATE) {
2229 if (i->src(0).getFile() == FILE_GPR) {
2230 // Use ISETP.NE.AND dst, PT, src, RZ, PT
2231 code[0] = 0x00000002;
2232 code[1] = 0xdb500000;
2233
2234 code[0] |= 0x7 << 2;
2235 code[0] |= 0xff << 23;
2236 code[1] |= 0x7 << 10;
2237 srcId(i->src(0), 10);
2238 } else
2239 if (i->src(0).getFile() == FILE_PREDICATE) {
2240 // Use PSETP.AND.AND dst, PT, src, PT, PT
2241 code[0] = 0x00000002;
2242 code[1] = 0x84800000;
2243
2244 code[0] |= 0x7 << 2;
2245 code[1] |= 0x7 << 0;
2246 code[1] |= 0x7 << 10;
2247
2248 srcId(i->src(0), 14);
2249 } else {
2250 assert(!"Unexpected source for predicate destination");
2251 emitNOP(i);
2252 }
2253 emitPredicate(i);
2254 defId(i->def(0), 5);
2255 } else
2256 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
2257 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
2258 code[1] = 0x86400000;
2259 emitPredicate(i);
2260 defId(i->def(0), 2);
2261 } else
2262 if (i->src(0).getFile() == FILE_IMMEDIATE) {
2263 code[0] = 0x00000002 | (i->lanes << 14);
2264 code[1] = 0x74000000;
2265 emitPredicate(i);
2266 defId(i->def(0), 2);
2267 setImmediate32(i, 0, Modifier(0));
2268 } else
2269 if (i->src(0).getFile() == FILE_PREDICATE) {
2270 code[0] = 0x00000002;
2271 code[1] = 0x84401c07;
2272 emitPredicate(i);
2273 defId(i->def(0), 2);
2274 srcId(i->src(0), 14);
2275 } else {
2276 emitForm_C(i, 0x24c, 2);
2277 code[1] |= i->lanes << 10;
2278 }
2279 }
2280
2281 static inline bool
2282 uses64bitAddress(const Instruction *ldst)
2283 {
2284 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2285 ldst->src(0).isIndirect(0) &&
2286 ldst->getIndirect(0, 0)->reg.size == 8;
2287 }
2288
2289 void
2290 CodeEmitterGK110::emitATOM(const Instruction *i)
2291 {
2292 const bool hasDst = i->defExists(0);
2293 const bool exch = i->subOp == NV50_IR_SUBOP_ATOM_EXCH;
2294
2295 code[0] = 0x00000002;
2296 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
2297 code[1] = 0x77800000;
2298 else
2299 code[1] = 0x68000000;
2300
2301 switch (i->subOp) {
2302 case NV50_IR_SUBOP_ATOM_CAS: break;
2303 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
2304 default: code[1] |= i->subOp << 23; break;
2305 }
2306
2307 switch (i->dType) {
2308 case TYPE_U32: break;
2309 case TYPE_S32: code[1] |= 0x00100000; break;
2310 case TYPE_U64: code[1] |= 0x00200000; break;
2311 case TYPE_F32: code[1] |= 0x00300000; break;
2312 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
2313 case TYPE_S64: code[1] |= 0x00500000; break;
2314 default: assert(!"unsupported type"); break;
2315 }
2316
2317 emitPredicate(i);
2318
2319 /* TODO: cas: check that src regs line up */
2320 /* TODO: cas: flip bits if $r255 is used */
2321 srcId(i->src(1), 23);
2322
2323 if (hasDst) {
2324 defId(i->def(0), 2);
2325 } else
2326 if (!exch) {
2327 code[0] |= 255 << 2;
2328 }
2329
2330 if (hasDst || !exch) {
2331 const int32_t offset = SDATA(i->src(0)).offset;
2332 assert(offset < 0x80000 && offset >= -0x80000);
2333 code[0] |= (offset & 1) << 31;
2334 code[1] |= (offset & 0xffffe) >> 1;
2335 } else {
2336 srcAddr32(i->src(0), 31);
2337 }
2338
2339 if (i->getIndirect(0, 0)) {
2340 srcId(i->getIndirect(0, 0), 10);
2341 if (i->getIndirect(0, 0)->reg.size == 8)
2342 code[1] |= 1 << 19;
2343 } else {
2344 code[0] |= 255 << 10;
2345 }
2346 }
2347
2348 void
2349 CodeEmitterGK110::emitCCTL(const Instruction *i)
2350 {
2351 int32_t offset = SDATA(i->src(0)).offset;
2352
2353 code[0] = 0x00000002 | (i->subOp << 2);
2354
2355 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
2356 code[1] = 0x7b000000;
2357 } else {
2358 code[1] = 0x7c000000;
2359 offset &= 0xffffff;
2360 }
2361 code[0] |= offset << 23;
2362 code[1] |= offset >> 9;
2363
2364 if (uses64bitAddress(i))
2365 code[1] |= 1 << 23;
2366 srcId(i->src(0).getIndirect(0), 10);
2367
2368 emitPredicate(i);
2369 }
2370
2371 bool
2372 CodeEmitterGK110::emitInstruction(Instruction *insn)
2373 {
2374 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
2375
2376 if (insn->encSize != 8) {
2377 ERROR("skipping unencodable instruction: ");
2378 insn->print();
2379 return false;
2380 } else
2381 if (codeSize + size > codeSizeLimit) {
2382 ERROR("code emitter output buffer too small\n");
2383 return false;
2384 }
2385
2386 if (writeIssueDelays) {
2387 int id = (codeSize & 0x3f) / 8 - 1;
2388 if (id < 0) {
2389 id += 1;
2390 code[0] = 0x00000000; // cf issue delay "instruction"
2391 code[1] = 0x08000000;
2392 code += 2;
2393 codeSize += 8;
2394 }
2395 uint32_t *data = code - (id * 2 + 2);
2396
2397 switch (id) {
2398 case 0: data[0] |= insn->sched << 2; break;
2399 case 1: data[0] |= insn->sched << 10; break;
2400 case 2: data[0] |= insn->sched << 18; break;
2401 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
2402 case 4: data[1] |= insn->sched << 2; break;
2403 case 5: data[1] |= insn->sched << 10; break;
2404 case 6: data[1] |= insn->sched << 18; break;
2405 default:
2406 assert(0);
2407 break;
2408 }
2409 }
2410
2411 // assert that instructions with multiple defs don't corrupt registers
2412 for (int d = 0; insn->defExists(d); ++d)
2413 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
2414
2415 switch (insn->op) {
2416 case OP_MOV:
2417 case OP_RDSV:
2418 emitMOV(insn);
2419 break;
2420 case OP_NOP:
2421 break;
2422 case OP_LOAD:
2423 emitLOAD(insn);
2424 break;
2425 case OP_STORE:
2426 emitSTORE(insn);
2427 break;
2428 case OP_LINTERP:
2429 case OP_PINTERP:
2430 emitINTERP(insn);
2431 break;
2432 case OP_VFETCH:
2433 emitVFETCH(insn);
2434 break;
2435 case OP_EXPORT:
2436 emitEXPORT(insn);
2437 break;
2438 case OP_AFETCH:
2439 emitAFETCH(insn);
2440 break;
2441 case OP_PFETCH:
2442 emitPFETCH(insn);
2443 break;
2444 case OP_EMIT:
2445 case OP_RESTART:
2446 emitOUT(insn);
2447 break;
2448 case OP_ADD:
2449 case OP_SUB:
2450 if (insn->dType == TYPE_F64)
2451 emitDADD(insn);
2452 else if (isFloatType(insn->dType))
2453 emitFADD(insn);
2454 else
2455 emitUADD(insn);
2456 break;
2457 case OP_MUL:
2458 if (insn->dType == TYPE_F64)
2459 emitDMUL(insn);
2460 else if (isFloatType(insn->dType))
2461 emitFMUL(insn);
2462 else
2463 emitIMUL(insn);
2464 break;
2465 case OP_MAD:
2466 case OP_FMA:
2467 if (insn->dType == TYPE_F64)
2468 emitDMAD(insn);
2469 else if (isFloatType(insn->dType))
2470 emitFMAD(insn);
2471 else
2472 emitIMAD(insn);
2473 break;
2474 case OP_MADSP:
2475 emitMADSP(insn);
2476 break;
2477 case OP_SAD:
2478 emitISAD(insn);
2479 break;
2480 case OP_SHLADD:
2481 emitSHLADD(insn);
2482 break;
2483 case OP_NOT:
2484 emitNOT(insn);
2485 break;
2486 case OP_AND:
2487 emitLogicOp(insn, 0);
2488 break;
2489 case OP_OR:
2490 emitLogicOp(insn, 1);
2491 break;
2492 case OP_XOR:
2493 emitLogicOp(insn, 2);
2494 break;
2495 case OP_SHL:
2496 case OP_SHR:
2497 if (typeSizeof(insn->sType) == 8)
2498 emitShift64(insn);
2499 else
2500 emitShift(insn);
2501 break;
2502 case OP_SET:
2503 case OP_SET_AND:
2504 case OP_SET_OR:
2505 case OP_SET_XOR:
2506 emitSET(insn->asCmp());
2507 break;
2508 case OP_SELP:
2509 emitSELP(insn);
2510 break;
2511 case OP_SLCT:
2512 emitSLCT(insn->asCmp());
2513 break;
2514 case OP_MIN:
2515 case OP_MAX:
2516 emitMINMAX(insn);
2517 break;
2518 case OP_ABS:
2519 case OP_NEG:
2520 case OP_CEIL:
2521 case OP_FLOOR:
2522 case OP_TRUNC:
2523 case OP_SAT:
2524 emitCVT(insn);
2525 break;
2526 case OP_CVT:
2527 if (insn->def(0).getFile() == FILE_PREDICATE ||
2528 insn->src(0).getFile() == FILE_PREDICATE)
2529 emitMOV(insn);
2530 else
2531 emitCVT(insn);
2532 break;
2533 case OP_RSQ:
2534 emitSFnOp(insn, 5 + 2 * insn->subOp);
2535 break;
2536 case OP_RCP:
2537 emitSFnOp(insn, 4 + 2 * insn->subOp);
2538 break;
2539 case OP_LG2:
2540 emitSFnOp(insn, 3);
2541 break;
2542 case OP_EX2:
2543 emitSFnOp(insn, 2);
2544 break;
2545 case OP_SIN:
2546 emitSFnOp(insn, 1);
2547 break;
2548 case OP_COS:
2549 emitSFnOp(insn, 0);
2550 break;
2551 case OP_PRESIN:
2552 case OP_PREEX2:
2553 emitPreOp(insn);
2554 break;
2555 case OP_TEX:
2556 case OP_TXB:
2557 case OP_TXL:
2558 case OP_TXD:
2559 case OP_TXF:
2560 case OP_TXG:
2561 case OP_TXLQ:
2562 emitTEX(insn->asTex());
2563 break;
2564 case OP_TXQ:
2565 emitTXQ(insn->asTex());
2566 break;
2567 case OP_TEXBAR:
2568 emitTEXBAR(insn);
2569 break;
2570 case OP_PIXLD:
2571 emitPIXLD(insn);
2572 break;
2573 case OP_BRA:
2574 case OP_CALL:
2575 case OP_PRERET:
2576 case OP_RET:
2577 case OP_DISCARD:
2578 case OP_EXIT:
2579 case OP_PRECONT:
2580 case OP_CONT:
2581 case OP_PREBREAK:
2582 case OP_BREAK:
2583 case OP_JOINAT:
2584 case OP_BRKPT:
2585 case OP_QUADON:
2586 case OP_QUADPOP:
2587 emitFlow(insn);
2588 break;
2589 case OP_QUADOP:
2590 emitQUADOP(insn, insn->subOp, insn->lanes);
2591 break;
2592 case OP_DFDX:
2593 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2594 break;
2595 case OP_DFDY:
2596 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2597 break;
2598 case OP_POPCNT:
2599 emitPOPC(insn);
2600 break;
2601 case OP_INSBF:
2602 emitINSBF(insn);
2603 break;
2604 case OP_EXTBF:
2605 emitEXTBF(insn);
2606 break;
2607 case OP_BFIND:
2608 emitBFIND(insn);
2609 break;
2610 case OP_PERMT:
2611 emitPERMT(insn);
2612 break;
2613 case OP_JOIN:
2614 emitNOP(insn);
2615 insn->join = 1;
2616 break;
2617 case OP_BAR:
2618 emitBAR(insn);
2619 break;
2620 case OP_MEMBAR:
2621 emitMEMBAR(insn);
2622 break;
2623 case OP_ATOM:
2624 emitATOM(insn);
2625 break;
2626 case OP_CCTL:
2627 emitCCTL(insn);
2628 break;
2629 case OP_VOTE:
2630 emitVOTE(insn);
2631 break;
2632 case OP_SULDB:
2633 emitSULDGB(insn->asTex());
2634 break;
2635 case OP_SUSTB:
2636 case OP_SUSTP:
2637 emitSUSTGx(insn->asTex());
2638 break;
2639 case OP_SUBFM:
2640 case OP_SUCLAMP:
2641 case OP_SUEAU:
2642 emitSUCalc(insn);
2643 break;
2644 case OP_VSHL:
2645 emitVSHL(insn);
2646 break;
2647 case OP_PHI:
2648 case OP_UNION:
2649 case OP_CONSTRAINT:
2650 ERROR("operation should have been eliminated");
2651 return false;
2652 case OP_EXP:
2653 case OP_LOG:
2654 case OP_SQRT:
2655 case OP_POW:
2656 ERROR("operation should have been lowered\n");
2657 return false;
2658 default:
2659 ERROR("unknown op: %u\n", insn->op);
2660 return false;
2661 }
2662
2663 if (insn->join)
2664 code[0] |= 1 << 22;
2665
2666 code += 2;
2667 codeSize += 8;
2668 return true;
2669 }
2670
2671 uint32_t
2672 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2673 {
2674 // No more short instruction encodings.
2675 return 8;
2676 }
2677
2678 void
2679 CodeEmitterGK110::prepareEmission(Function *func)
2680 {
2681 const Target *targ = func->getProgram()->getTarget();
2682
2683 CodeEmitter::prepareEmission(func);
2684
2685 if (targ->hasSWSched)
2686 calculateSchedDataNVC0(targ, func);
2687 }
2688
2689 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2690 : CodeEmitter(target),
2691 targNVC0(target),
2692 writeIssueDelays(target->hasSWSched)
2693 {
2694 code = NULL;
2695 codeSize = codeSizeLimit = 0;
2696 relocInfo = NULL;
2697 }
2698
2699 CodeEmitter *
2700 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2701 {
2702 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2703 emit->setProgramType(type);
2704 return emit;
2705 }
2706
2707 } // namespace nv50_ir