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[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57 void setSUConst16(const Instruction *, const int s);
58
59 void modNegAbsF32_3b(const Instruction *, const int s);
60
61 void emitCondCode(CondCode cc, int pos, uint8_t mask);
62 void emitInterpMode(const Instruction *);
63 void emitLoadStoreType(DataType ty, const int pos);
64 void emitCachingMode(CacheMode c, const int pos);
65 void emitSUGType(DataType, const int pos);
66 void emitSUCachingMode(CacheMode c);
67
68 inline uint8_t getSRegEncoding(const ValueRef&);
69
70 void emitRoundMode(RoundMode, const int pos, const int rintPos);
71 void emitRoundModeF(RoundMode, const int pos);
72 void emitRoundModeI(RoundMode, const int pos);
73
74 void emitNegAbs12(const Instruction *);
75
76 void emitNOP(const Instruction *);
77
78 void emitLOAD(const Instruction *);
79 void emitSTORE(const Instruction *);
80 void emitMOV(const Instruction *);
81 void emitATOM(const Instruction *);
82 void emitCCTL(const Instruction *);
83
84 void emitINTERP(const Instruction *);
85 void emitAFETCH(const Instruction *);
86 void emitPFETCH(const Instruction *);
87 void emitVFETCH(const Instruction *);
88 void emitEXPORT(const Instruction *);
89 void emitOUT(const Instruction *);
90
91 void emitUADD(const Instruction *);
92 void emitFADD(const Instruction *);
93 void emitDADD(const Instruction *);
94 void emitIMUL(const Instruction *);
95 void emitFMUL(const Instruction *);
96 void emitDMUL(const Instruction *);
97 void emitIMAD(const Instruction *);
98 void emitISAD(const Instruction *);
99 void emitSHLADD(const Instruction *);
100 void emitFMAD(const Instruction *);
101 void emitDMAD(const Instruction *);
102 void emitMADSP(const Instruction *i);
103
104 void emitNOT(const Instruction *);
105 void emitLogicOp(const Instruction *, uint8_t subOp);
106 void emitPOPC(const Instruction *);
107 void emitINSBF(const Instruction *);
108 void emitEXTBF(const Instruction *);
109 void emitBFIND(const Instruction *);
110 void emitPERMT(const Instruction *);
111 void emitShift(const Instruction *);
112
113 void emitSFnOp(const Instruction *, uint8_t subOp);
114
115 void emitCVT(const Instruction *);
116 void emitMINMAX(const Instruction *);
117 void emitPreOp(const Instruction *);
118
119 void emitSET(const CmpInstruction *);
120 void emitSLCT(const CmpInstruction *);
121 void emitSELP(const Instruction *);
122
123 void emitTEXBAR(const Instruction *);
124 void emitTEX(const TexInstruction *);
125 void emitTEXCSAA(const TexInstruction *);
126 void emitTXQ(const TexInstruction *);
127
128 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
129
130 void emitPIXLD(const Instruction *);
131
132 void emitBAR(const Instruction *);
133 void emitMEMBAR(const Instruction *);
134
135 void emitFlow(const Instruction *);
136
137 void emitVOTE(const Instruction *);
138
139 void emitSULDGB(const TexInstruction *);
140 void emitSUSTGx(const TexInstruction *);
141 void emitSUCLAMPMode(uint16_t);
142 void emitSUCalc(Instruction *);
143
144 void emitVSHL(const Instruction *);
145 void emitVectorSubOp(const Instruction *);
146
147 inline void defId(const ValueDef&, const int pos);
148 inline void srcId(const ValueRef&, const int pos);
149 inline void srcId(const ValueRef *, const int pos);
150 inline void srcId(const Instruction *, int s, const int pos);
151
152 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
153
154 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
155 };
156
157 #define GK110_GPR_ZERO 255
158
159 #define NEG_(b, s) \
160 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
161 #define ABS_(b, s) \
162 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
163
164 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
165 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
166
167 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
168 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
169
170 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
171
172 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
173
174 #define SDATA(a) ((a).rep()->reg.data)
175 #define DDATA(a) ((a).rep()->reg.data)
176
177 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
178 {
179 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
180 }
181
182 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
183 {
184 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
185 }
186
187 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
188 {
189 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
190 code[pos / 32] |= r << (pos % 32);
191 }
192
193 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
194 {
195 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
196 }
197
198 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
199 {
200 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
201 }
202
203 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
204 {
205 const ImmediateValue *imm = ref.get()->asImm();
206
207 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
208 }
209
210 void
211 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
212 {
213 bool rint = false;
214 uint8_t n;
215
216 switch (rnd) {
217 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
218 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
219 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
220 default:
221 rint = rnd == ROUND_NI;
222 n = 0;
223 assert(rnd == ROUND_N || rnd == ROUND_NI);
224 break;
225 }
226 code[pos / 32] |= n << (pos % 32);
227 if (rint && rintPos >= 0)
228 code[rintPos / 32] |= 1 << (rintPos % 32);
229 }
230
231 void
232 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
233 {
234 uint8_t n;
235
236 switch (rnd) {
237 case ROUND_M: n = 1; break;
238 case ROUND_P: n = 2; break;
239 case ROUND_Z: n = 3; break;
240 default:
241 n = 0;
242 assert(rnd == ROUND_N);
243 break;
244 }
245 code[pos / 32] |= n << (pos % 32);
246 }
247
248 void
249 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
250 {
251 uint8_t n;
252
253 switch (rnd) {
254 case ROUND_MI: n = 1; break;
255 case ROUND_PI: n = 2; break;
256 case ROUND_ZI: n = 3; break;
257 default:
258 n = 0;
259 assert(rnd == ROUND_NI);
260 break;
261 }
262 code[pos / 32] |= n << (pos % 32);
263 }
264
265 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
266 {
267 uint8_t n;
268
269 switch (cc) {
270 case CC_FL: n = 0x00; break;
271 case CC_LT: n = 0x01; break;
272 case CC_EQ: n = 0x02; break;
273 case CC_LE: n = 0x03; break;
274 case CC_GT: n = 0x04; break;
275 case CC_NE: n = 0x05; break;
276 case CC_GE: n = 0x06; break;
277 case CC_LTU: n = 0x09; break;
278 case CC_EQU: n = 0x0a; break;
279 case CC_LEU: n = 0x0b; break;
280 case CC_GTU: n = 0x0c; break;
281 case CC_NEU: n = 0x0d; break;
282 case CC_GEU: n = 0x0e; break;
283 case CC_TR: n = 0x0f; break;
284 case CC_NO: n = 0x10; break;
285 case CC_NC: n = 0x11; break;
286 case CC_NS: n = 0x12; break;
287 case CC_NA: n = 0x13; break;
288 case CC_A: n = 0x14; break;
289 case CC_S: n = 0x15; break;
290 case CC_C: n = 0x16; break;
291 case CC_O: n = 0x17; break;
292 default:
293 n = 0;
294 assert(!"invalid condition code");
295 break;
296 }
297 code[pos / 32] |= (n & mask) << (pos % 32);
298 }
299
300 void
301 CodeEmitterGK110::emitPredicate(const Instruction *i)
302 {
303 if (i->predSrc >= 0) {
304 srcId(i->src(i->predSrc), 18);
305 if (i->cc == CC_NOT_P)
306 code[0] |= 8 << 18; // negate
307 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
308 } else {
309 code[0] |= 7 << 18;
310 }
311 }
312
313 void
314 CodeEmitterGK110::setCAddress14(const ValueRef& src)
315 {
316 const Storage& res = src.get()->asSym()->reg;
317 const int32_t addr = res.data.offset / 4;
318
319 code[0] |= (addr & 0x01ff) << 23;
320 code[1] |= (addr & 0x3e00) >> 9;
321 code[1] |= res.fileIndex << 5;
322 }
323
324 void
325 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
326 {
327 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
328 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
329
330 if (i->sType == TYPE_F32) {
331 assert(!(u32 & 0x00000fff));
332 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
333 code[1] |= ((u32 & 0x7fe00000) >> 21);
334 code[1] |= ((u32 & 0x80000000) >> 4);
335 } else
336 if (i->sType == TYPE_F64) {
337 assert(!(u64 & 0x00000fffffffffffULL));
338 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
339 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
340 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
341 } else {
342 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
343 code[0] |= (u32 & 0x001ff) << 23;
344 code[1] |= (u32 & 0x7fe00) >> 9;
345 code[1] |= (u32 & 0x80000) << 8;
346 }
347 }
348
349 void
350 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
351 Modifier mod)
352 {
353 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
354
355 if (mod) {
356 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
357 mod.applyTo(imm);
358 u32 = imm.reg.data.u32;
359 }
360
361 code[0] |= u32 << 23;
362 code[1] |= u32 >> 9;
363 }
364
365 void
366 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
367 Modifier mod)
368 {
369 code[0] = ctg;
370 code[1] = opc << 20;
371
372 emitPredicate(i);
373
374 defId(i->def(0), 2);
375
376 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
377 switch (i->src(s).getFile()) {
378 case FILE_GPR:
379 srcId(i->src(s), s ? 42 : 10);
380 break;
381 case FILE_IMMEDIATE:
382 setImmediate32(i, s, mod);
383 break;
384 default:
385 break;
386 }
387 }
388 }
389
390
391 void
392 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
393 {
394 code[0] = ctg;
395 code[1] = opc << 20;
396
397 emitPredicate(i);
398
399 defId(i->def(0), 2);
400
401 switch (i->src(0).getFile()) {
402 case FILE_MEMORY_CONST:
403 code[1] |= 0x4 << 28;
404 setCAddress14(i->src(0));
405 break;
406 case FILE_GPR:
407 code[1] |= 0xc << 28;
408 srcId(i->src(0), 23);
409 break;
410 default:
411 assert(0);
412 break;
413 }
414 }
415
416 // 0x2 for GPR, c[] and 0x1 for short immediate
417 void
418 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
419 uint32_t opc1)
420 {
421 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
422
423 int s1 = 23;
424 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
425 s1 = 42;
426
427 if (imm) {
428 code[0] = 0x1;
429 code[1] = opc1 << 20;
430 } else {
431 code[0] = 0x2;
432 code[1] = (0xc << 28) | (opc2 << 20);
433 }
434
435 emitPredicate(i);
436
437 defId(i->def(0), 2);
438
439 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
440 switch (i->src(s).getFile()) {
441 case FILE_MEMORY_CONST:
442 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
443 setCAddress14(i->src(s));
444 break;
445 case FILE_IMMEDIATE:
446 setShortImmediate(i, s);
447 break;
448 case FILE_GPR:
449 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
450 break;
451 default:
452 if (i->op == OP_SELP) {
453 assert(s == 2 && i->src(s).getFile() == FILE_PREDICATE);
454 srcId(i->src(s), 42);
455 }
456 // ignore here, can be predicate or flags, but must not be address
457 break;
458 }
459 }
460 // 0x0 = invalid
461 // 0xc = rrr
462 // 0x8 = rrc
463 // 0x4 = rcr
464 assert(imm || (code[1] & (0xc << 28)));
465 }
466
467 inline void
468 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
469 {
470 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
471 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
472 }
473
474 void
475 CodeEmitterGK110::emitNOP(const Instruction *i)
476 {
477 code[0] = 0x00003c02;
478 code[1] = 0x85800000;
479
480 if (i)
481 emitPredicate(i);
482 else
483 code[0] = 0x001c3c02;
484 }
485
486 void
487 CodeEmitterGK110::emitFMAD(const Instruction *i)
488 {
489 assert(!isLIMM(i->src(1), TYPE_F32));
490
491 emitForm_21(i, 0x0c0, 0x940);
492
493 NEG_(34, 2);
494 SAT_(35);
495 RND_(36, F);
496 FTZ_(38);
497 DNZ_(39);
498
499 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
500
501 if (code[0] & 0x1) {
502 if (neg1)
503 code[1] ^= 1 << 27;
504 } else
505 if (neg1) {
506 code[1] |= 1 << 19;
507 }
508 }
509
510 void
511 CodeEmitterGK110::emitDMAD(const Instruction *i)
512 {
513 assert(!i->saturate);
514 assert(!i->ftz);
515
516 emitForm_21(i, 0x1b8, 0xb38);
517
518 NEG_(34, 2);
519 RND_(36, F);
520
521 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
522
523 if (code[0] & 0x1) {
524 if (neg1)
525 code[1] ^= 1 << 27;
526 } else
527 if (neg1) {
528 code[1] |= 1 << 19;
529 }
530 }
531
532 void
533 CodeEmitterGK110::emitMADSP(const Instruction *i)
534 {
535 emitForm_21(i, 0x140, 0xa40);
536
537 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
538 code[1] |= 0x00c00000;
539 } else {
540 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
541 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
542 code[1] |= (i->subOp & 0x100) << 11; // imadp3
543 code[1] |= (i->subOp & 0x200) << 15; // imadp3
544 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
545 }
546
547 if (i->flagsDef >= 0)
548 code[1] |= 1 << 18;
549 }
550
551 void
552 CodeEmitterGK110::emitFMUL(const Instruction *i)
553 {
554 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
555
556 assert(i->postFactor >= -3 && i->postFactor <= 3);
557
558 if (isLIMM(i->src(1), TYPE_F32)) {
559 emitForm_L(i, 0x200, 0x2, Modifier(0));
560
561 FTZ_(38);
562 DNZ_(39);
563 SAT_(3a);
564 if (neg)
565 code[1] ^= 1 << 22;
566
567 assert(i->postFactor == 0);
568 } else {
569 emitForm_21(i, 0x234, 0xc34);
570 code[1] |= ((i->postFactor > 0) ?
571 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
572
573 RND_(2a, F);
574 FTZ_(2f);
575 DNZ_(30);
576 SAT_(35);
577
578 if (code[0] & 0x1) {
579 if (neg)
580 code[1] ^= 1 << 27;
581 } else
582 if (neg) {
583 code[1] |= 1 << 19;
584 }
585 }
586 }
587
588 void
589 CodeEmitterGK110::emitDMUL(const Instruction *i)
590 {
591 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
592
593 assert(!i->postFactor);
594 assert(!i->saturate);
595 assert(!i->ftz);
596 assert(!i->dnz);
597
598 emitForm_21(i, 0x240, 0xc40);
599
600 RND_(2a, F);
601
602 if (code[0] & 0x1) {
603 if (neg)
604 code[1] ^= 1 << 27;
605 } else
606 if (neg) {
607 code[1] |= 1 << 19;
608 }
609 }
610
611 void
612 CodeEmitterGK110::emitIMUL(const Instruction *i)
613 {
614 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
615 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
616
617 if (i->src(1).getFile() == FILE_IMMEDIATE) {
618 emitForm_L(i, 0x280, 2, Modifier(0));
619
620 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
621 code[1] |= 1 << 24;
622 if (i->sType == TYPE_S32)
623 code[1] |= 3 << 25;
624 } else {
625 emitForm_21(i, 0x21c, 0xc1c);
626
627 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
628 code[1] |= 1 << 10;
629 if (i->sType == TYPE_S32)
630 code[1] |= 3 << 11;
631 }
632 }
633
634 void
635 CodeEmitterGK110::emitFADD(const Instruction *i)
636 {
637 if (isLIMM(i->src(1), TYPE_F32)) {
638 assert(i->rnd == ROUND_N);
639 assert(!i->saturate);
640
641 Modifier mod = i->src(1).mod ^
642 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
643
644 emitForm_L(i, 0x400, 0, mod);
645
646 FTZ_(3a);
647 NEG_(3b, 0);
648 ABS_(39, 0);
649 } else {
650 emitForm_21(i, 0x22c, 0xc2c);
651
652 FTZ_(2f);
653 RND_(2a, F);
654 ABS_(31, 0);
655 NEG_(33, 0);
656 SAT_(35);
657
658 if (code[0] & 0x1) {
659 modNegAbsF32_3b(i, 1);
660 if (i->op == OP_SUB) code[1] ^= 1 << 27;
661 } else {
662 ABS_(34, 1);
663 NEG_(30, 1);
664 if (i->op == OP_SUB) code[1] ^= 1 << 16;
665 }
666 }
667 }
668
669 void
670 CodeEmitterGK110::emitDADD(const Instruction *i)
671 {
672 assert(!i->saturate);
673 assert(!i->ftz);
674
675 emitForm_21(i, 0x238, 0xc38);
676 RND_(2a, F);
677 ABS_(31, 0);
678 NEG_(33, 0);
679 if (code[0] & 0x1) {
680 modNegAbsF32_3b(i, 1);
681 if (i->op == OP_SUB) code[1] ^= 1 << 27;
682 } else {
683 NEG_(30, 1);
684 ABS_(34, 1);
685 if (i->op == OP_SUB) code[1] ^= 1 << 16;
686 }
687 }
688
689 void
690 CodeEmitterGK110::emitUADD(const Instruction *i)
691 {
692 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
693
694 if (i->op == OP_SUB)
695 addOp ^= 1;
696
697 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
698
699 if (isLIMM(i->src(1), TYPE_S32)) {
700 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
701
702 if (addOp & 2)
703 code[1] |= 1 << 27;
704
705 assert(!i->defExists(1));
706 assert(i->flagsSrc < 0);
707
708 SAT_(39);
709 } else {
710 emitForm_21(i, 0x208, 0xc08);
711
712 assert(addOp != 3); // would be add-plus-one
713
714 code[1] |= addOp << 19;
715
716 if (i->defExists(1))
717 code[1] |= 1 << 18; // write carry
718 if (i->flagsSrc >= 0)
719 code[1] |= 1 << 14; // add carry
720
721 SAT_(35);
722 }
723 }
724
725 void
726 CodeEmitterGK110::emitIMAD(const Instruction *i)
727 {
728 uint8_t addOp =
729 i->src(2).mod.neg() | ((i->src(0).mod.neg() ^ i->src(1).mod.neg()) << 1);
730
731 emitForm_21(i, 0x100, 0xa00);
732
733 assert(addOp != 3);
734 code[1] |= addOp << 26;
735
736 if (i->sType == TYPE_S32)
737 code[1] |= (1 << 19) | (1 << 24);
738
739 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
740 code[1] |= 1 << 25;
741
742 if (i->flagsDef >= 0) code[1] |= 1 << 18;
743 if (i->flagsSrc >= 0) code[1] |= 1 << 20;
744
745 SAT_(35);
746 }
747
748 void
749 CodeEmitterGK110::emitISAD(const Instruction *i)
750 {
751 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
752
753 emitForm_21(i, 0x1f4, 0xb74);
754
755 if (i->dType == TYPE_S32)
756 code[1] |= 1 << 19;
757 }
758
759 void
760 CodeEmitterGK110::emitSHLADD(const Instruction *i)
761 {
762 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(2).mod.neg();
763 const ImmediateValue *imm = i->src(1).get()->asImm();
764 assert(imm);
765
766 if (i->src(2).getFile() == FILE_IMMEDIATE) {
767 code[0] = 0x1;
768 code[1] = 0xc0c << 20;
769 } else {
770 code[0] = 0x2;
771 code[1] = 0x20c << 20;
772 }
773 code[1] |= addOp << 19;
774
775 emitPredicate(i);
776
777 defId(i->def(0), 2);
778 srcId(i->src(0), 10);
779
780 if (i->flagsDef >= 0)
781 code[1] |= 1 << 18;
782
783 assert(!(imm->reg.data.u32 & 0xffffffe0));
784 code[1] |= imm->reg.data.u32 << 10;
785
786 switch (i->src(2).getFile()) {
787 case FILE_GPR:
788 assert(code[0] & 0x2);
789 code[1] |= 0xc << 28;
790 srcId(i->src(2), 23);
791 break;
792 case FILE_MEMORY_CONST:
793 assert(code[0] & 0x2);
794 code[1] |= 0x4 << 28;
795 setCAddress14(i->src(2));
796 break;
797 case FILE_IMMEDIATE:
798 assert(code[0] & 0x1);
799 setShortImmediate(i, 2);
800 break;
801 default:
802 assert(!"bad src2 file");
803 break;
804 }
805 }
806
807 void
808 CodeEmitterGK110::emitNOT(const Instruction *i)
809 {
810 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
811 code[1] = 0x22003800;
812
813 emitPredicate(i);
814
815 defId(i->def(0), 2);
816
817 switch (i->src(0).getFile()) {
818 case FILE_GPR:
819 code[1] |= 0xc << 28;
820 srcId(i->src(0), 23);
821 break;
822 case FILE_MEMORY_CONST:
823 code[1] |= 0x4 << 28;
824 setCAddress14(i->src(0));
825 break;
826 default:
827 assert(0);
828 break;
829 }
830 }
831
832 void
833 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
834 {
835 if (i->def(0).getFile() == FILE_PREDICATE) {
836 code[0] = 0x00000002 | (subOp << 27);
837 code[1] = 0x84800000;
838
839 emitPredicate(i);
840
841 defId(i->def(0), 5);
842 srcId(i->src(0), 14);
843 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[0] |= 1 << 17;
844 srcId(i->src(1), 32);
845 if (i->src(1).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 3;
846
847 if (i->defExists(1)) {
848 defId(i->def(1), 2);
849 } else {
850 code[0] |= 7 << 2;
851 }
852 // (a OP b) OP c
853 if (i->predSrc != 2 && i->srcExists(2)) {
854 code[1] |= subOp << 16;
855 srcId(i->src(2), 42);
856 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 13;
857 } else {
858 code[1] |= 7 << 10;
859 }
860 } else
861 if (isLIMM(i->src(1), TYPE_S32)) {
862 emitForm_L(i, 0x200, 0, i->src(1).mod);
863 code[1] |= subOp << 24;
864 NOT_(3a, 0);
865 } else {
866 emitForm_21(i, 0x220, 0xc20);
867 code[1] |= subOp << 12;
868 NOT_(2a, 0);
869 NOT_(2b, 1);
870 }
871 }
872
873 void
874 CodeEmitterGK110::emitPOPC(const Instruction *i)
875 {
876 assert(!isLIMM(i->src(1), TYPE_S32, true));
877
878 emitForm_21(i, 0x204, 0xc04);
879
880 NOT_(2a, 0);
881 if (!(code[0] & 0x1))
882 NOT_(2b, 1);
883 }
884
885 void
886 CodeEmitterGK110::emitINSBF(const Instruction *i)
887 {
888 emitForm_21(i, 0x1f8, 0xb78);
889 }
890
891 void
892 CodeEmitterGK110::emitEXTBF(const Instruction *i)
893 {
894 emitForm_21(i, 0x600, 0xc00);
895
896 if (i->dType == TYPE_S32)
897 code[1] |= 0x80000;
898 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
899 code[1] |= 0x800;
900 }
901
902 void
903 CodeEmitterGK110::emitBFIND(const Instruction *i)
904 {
905 emitForm_C(i, 0x218, 0x2);
906
907 if (i->dType == TYPE_S32)
908 code[1] |= 0x80000;
909 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
910 code[1] |= 0x800;
911 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
912 code[1] |= 0x1000;
913 }
914
915 void
916 CodeEmitterGK110::emitPERMT(const Instruction *i)
917 {
918 emitForm_21(i, 0x1e0, 0xb60);
919
920 code[1] |= i->subOp << 19;
921 }
922
923 void
924 CodeEmitterGK110::emitShift(const Instruction *i)
925 {
926 if (i->op == OP_SHR) {
927 emitForm_21(i, 0x214, 0xc14);
928 if (isSignedType(i->dType))
929 code[1] |= 1 << 19;
930 } else {
931 emitForm_21(i, 0x224, 0xc24);
932 }
933
934 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
935 code[1] |= 1 << 10;
936 }
937
938 void
939 CodeEmitterGK110::emitPreOp(const Instruction *i)
940 {
941 emitForm_C(i, 0x248, 0x2);
942
943 if (i->op == OP_PREEX2)
944 code[1] |= 1 << 10;
945
946 NEG_(30, 0);
947 ABS_(34, 0);
948 }
949
950 void
951 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
952 {
953 code[0] = 0x00000002 | (subOp << 23);
954 code[1] = 0x84000000;
955
956 emitPredicate(i);
957
958 defId(i->def(0), 2);
959 srcId(i->src(0), 10);
960
961 NEG_(33, 0);
962 ABS_(31, 0);
963 SAT_(35);
964 }
965
966 void
967 CodeEmitterGK110::emitMINMAX(const Instruction *i)
968 {
969 uint32_t op2, op1;
970
971 switch (i->dType) {
972 case TYPE_U32:
973 case TYPE_S32:
974 op2 = 0x210;
975 op1 = 0xc10;
976 break;
977 case TYPE_F32:
978 op2 = 0x230;
979 op1 = 0xc30;
980 break;
981 case TYPE_F64:
982 op2 = 0x228;
983 op1 = 0xc28;
984 break;
985 default:
986 assert(0);
987 op2 = 0;
988 op1 = 0;
989 break;
990 }
991 emitForm_21(i, op2, op1);
992
993 if (i->dType == TYPE_S32)
994 code[1] |= 1 << 19;
995 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
996 code[1] |= i->subOp << 14;
997 if (i->flagsDef >= 0)
998 code[1] |= i->subOp << 18;
999
1000 FTZ_(2f);
1001 ABS_(31, 0);
1002 NEG_(33, 0);
1003 if (code[0] & 0x1) {
1004 modNegAbsF32_3b(i, 1);
1005 } else {
1006 ABS_(34, 1);
1007 NEG_(30, 1);
1008 }
1009 }
1010
1011 void
1012 CodeEmitterGK110::emitCVT(const Instruction *i)
1013 {
1014 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
1015 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
1016 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
1017
1018 bool sat = i->saturate;
1019 bool abs = i->src(0).mod.abs();
1020 bool neg = i->src(0).mod.neg();
1021
1022 RoundMode rnd = i->rnd;
1023
1024 switch (i->op) {
1025 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
1026 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
1027 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
1028 case OP_SAT: sat = true; break;
1029 case OP_NEG: neg = !neg; break;
1030 case OP_ABS: abs = true; neg = false; break;
1031 default:
1032 break;
1033 }
1034
1035 DataType dType;
1036
1037 if (i->op == OP_NEG && i->dType == TYPE_U32)
1038 dType = TYPE_S32;
1039 else
1040 dType = i->dType;
1041
1042
1043 uint32_t op;
1044
1045 if (f2f) op = 0x254;
1046 else if (f2i) op = 0x258;
1047 else if (i2f) op = 0x25c;
1048 else op = 0x260;
1049
1050 emitForm_C(i, op, 0x2);
1051
1052 FTZ_(2f);
1053 if (neg) code[1] |= 1 << 16;
1054 if (abs) code[1] |= 1 << 20;
1055 if (sat) code[1] |= 1 << 21;
1056
1057 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
1058
1059 code[0] |= typeSizeofLog2(dType) << 10;
1060 code[0] |= typeSizeofLog2(i->sType) << 12;
1061 code[1] |= i->subOp << 12;
1062
1063 if (isSignedIntType(dType))
1064 code[0] |= 0x4000;
1065 if (isSignedIntType(i->sType))
1066 code[0] |= 0x8000;
1067 }
1068
1069 void
1070 CodeEmitterGK110::emitSET(const CmpInstruction *i)
1071 {
1072 uint16_t op1, op2;
1073
1074 if (i->def(0).getFile() == FILE_PREDICATE) {
1075 switch (i->sType) {
1076 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1077 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1078 default:
1079 op2 = 0x1b0;
1080 op1 = 0xb30;
1081 break;
1082 }
1083 emitForm_21(i, op2, op1);
1084
1085 NEG_(2e, 0);
1086 ABS_(9, 0);
1087 if (!(code[0] & 0x1)) {
1088 NEG_(8, 1);
1089 ABS_(2f, 1);
1090 } else {
1091 modNegAbsF32_3b(i, 1);
1092 }
1093 FTZ_(32);
1094
1095 // normal DST field is negated predicate result
1096 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
1097 if (i->defExists(1))
1098 defId(i->def(1), 2);
1099 else
1100 code[0] |= 0x1c;
1101 } else {
1102 switch (i->sType) {
1103 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
1104 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
1105 default:
1106 op2 = 0x1a8;
1107 op1 = 0xb28;
1108 break;
1109 }
1110 emitForm_21(i, op2, op1);
1111
1112 NEG_(2e, 0);
1113 ABS_(39, 0);
1114 if (!(code[0] & 0x1)) {
1115 NEG_(38, 1);
1116 ABS_(2f, 1);
1117 } else {
1118 modNegAbsF32_3b(i, 1);
1119 }
1120 FTZ_(3a);
1121
1122 if (i->dType == TYPE_F32) {
1123 if (isFloatType(i->sType))
1124 code[1] |= 1 << 23;
1125 else
1126 code[1] |= 1 << 15;
1127 }
1128 }
1129 if (i->sType == TYPE_S32)
1130 code[1] |= 1 << 19;
1131
1132 if (i->op != OP_SET) {
1133 switch (i->op) {
1134 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1135 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1136 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1137 default:
1138 assert(0);
1139 break;
1140 }
1141 srcId(i->src(2), 0x2a);
1142 } else {
1143 code[1] |= 0x7 << 10;
1144 }
1145 if (i->flagsSrc >= 0)
1146 code[1] |= 1 << 14;
1147 emitCondCode(i->setCond,
1148 isFloatType(i->sType) ? 0x33 : 0x34,
1149 isFloatType(i->sType) ? 0xf : 0x7);
1150 }
1151
1152 void
1153 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1154 {
1155 CondCode cc = i->setCond;
1156 if (i->src(2).mod.neg())
1157 cc = reverseCondCode(cc);
1158
1159 if (i->dType == TYPE_F32) {
1160 emitForm_21(i, 0x1d0, 0xb50);
1161 FTZ_(32);
1162 emitCondCode(cc, 0x33, 0xf);
1163 } else {
1164 emitForm_21(i, 0x1a0, 0xb20);
1165 emitCondCode(cc, 0x34, 0x7);
1166 if (i->dType == TYPE_S32)
1167 code[1] |= 1 << 19;
1168 }
1169 }
1170
1171 static void
1172 selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1173 {
1174 int loc = entry->loc;
1175 if (data.force_persample_interp)
1176 code[loc + 1] |= 1 << 13;
1177 else
1178 code[loc + 1] &= ~(1 << 13);
1179 }
1180
1181 void CodeEmitterGK110::emitSELP(const Instruction *i)
1182 {
1183 emitForm_21(i, 0x250, 0x050);
1184
1185 if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
1186 code[1] |= 1 << 13;
1187
1188 if (i->subOp == 1) {
1189 addInterp(0, 0, selpFlip);
1190 }
1191 }
1192
1193 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1194 {
1195 code[0] = 0x0000003e | (i->subOp << 23);
1196 code[1] = 0x77000000;
1197
1198 emitPredicate(i);
1199 }
1200
1201 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1202 {
1203 code[0] = 0x00000002;
1204 code[1] = 0x76c00000;
1205
1206 code[1] |= i->tex.r << 9;
1207 // code[1] |= i->tex.s << (9 + 8);
1208
1209 if (i->tex.liveOnly)
1210 code[0] |= 0x80000000;
1211
1212 defId(i->def(0), 2);
1213 srcId(i->src(0), 10);
1214 }
1215
1216 static inline bool
1217 isNextIndependentTex(const TexInstruction *i)
1218 {
1219 if (!i->next || !isTextureOp(i->next->op))
1220 return false;
1221 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1222 return false;
1223 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1224 }
1225
1226 void
1227 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1228 {
1229 const bool ind = i->tex.rIndirectSrc >= 0;
1230
1231 if (ind) {
1232 code[0] = 0x00000002;
1233 switch (i->op) {
1234 case OP_TXD:
1235 code[1] = 0x7e000000;
1236 break;
1237 case OP_TXLQ:
1238 code[1] = 0x7e800000;
1239 break;
1240 case OP_TXF:
1241 code[1] = 0x78000000;
1242 break;
1243 case OP_TXG:
1244 code[1] = 0x7dc00000;
1245 break;
1246 default:
1247 code[1] = 0x7d800000;
1248 break;
1249 }
1250 } else {
1251 switch (i->op) {
1252 case OP_TXD:
1253 code[0] = 0x00000002;
1254 code[1] = 0x76000000;
1255 code[1] |= i->tex.r << 9;
1256 break;
1257 case OP_TXLQ:
1258 code[0] = 0x00000002;
1259 code[1] = 0x76800000;
1260 code[1] |= i->tex.r << 9;
1261 break;
1262 case OP_TXF:
1263 code[0] = 0x00000002;
1264 code[1] = 0x70000000;
1265 code[1] |= i->tex.r << 13;
1266 break;
1267 case OP_TXG:
1268 code[0] = 0x00000001;
1269 code[1] = 0x70000000;
1270 code[1] |= i->tex.r << 15;
1271 break;
1272 default:
1273 code[0] = 0x00000001;
1274 code[1] = 0x60000000;
1275 code[1] |= i->tex.r << 15;
1276 break;
1277 }
1278 }
1279
1280 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1281
1282 if (i->tex.liveOnly)
1283 code[0] |= 0x80000000;
1284
1285 switch (i->op) {
1286 case OP_TEX: break;
1287 case OP_TXB: code[1] |= 0x2000; break;
1288 case OP_TXL: code[1] |= 0x3000; break;
1289 case OP_TXF: break;
1290 case OP_TXG: break;
1291 case OP_TXD: break;
1292 case OP_TXLQ: break;
1293 default:
1294 assert(!"invalid texture op");
1295 break;
1296 }
1297
1298 if (i->op == OP_TXF) {
1299 if (!i->tex.levelZero)
1300 code[1] |= 0x1000;
1301 } else
1302 if (i->tex.levelZero) {
1303 code[1] |= 0x1000;
1304 }
1305
1306 if (i->op != OP_TXD && i->tex.derivAll)
1307 code[1] |= 0x200;
1308
1309 emitPredicate(i);
1310
1311 code[1] |= i->tex.mask << 2;
1312
1313 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1314
1315 defId(i->def(0), 2);
1316 srcId(i->src(0), 10);
1317 srcId(i, src1, 23);
1318
1319 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1320
1321 // texture target:
1322 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1323 if (i->tex.target.isArray())
1324 code[1] |= 0x40;
1325 if (i->tex.target.isShadow())
1326 code[1] |= 0x400;
1327 if (i->tex.target == TEX_TARGET_2D_MS ||
1328 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1329 code[1] |= 0x800;
1330
1331 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1332 // ?
1333 }
1334
1335 if (i->tex.useOffsets == 1) {
1336 switch (i->op) {
1337 case OP_TXF: code[1] |= 0x200; break;
1338 case OP_TXD: code[1] |= 0x00400000; break;
1339 default: code[1] |= 0x800; break;
1340 }
1341 }
1342 if (i->tex.useOffsets == 4)
1343 code[1] |= 0x1000;
1344 }
1345
1346 void
1347 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1348 {
1349 code[0] = 0x00000002;
1350 code[1] = 0x75400001;
1351
1352 switch (i->tex.query) {
1353 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1354 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1355 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1356 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1357 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1358 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1359 default:
1360 assert(!"invalid texture query");
1361 break;
1362 }
1363
1364 code[1] |= i->tex.mask << 2;
1365 code[1] |= i->tex.r << 9;
1366 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1367 code[1] |= 0x08000000;
1368
1369 defId(i->def(0), 2);
1370 srcId(i->src(0), 10);
1371
1372 emitPredicate(i);
1373 }
1374
1375 void
1376 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1377 {
1378 code[0] = 0x00000002 | ((qOp & 1) << 31);
1379 code[1] = 0x7fc00200 | (qOp >> 1) | (laneMask << 12); // dall
1380
1381 defId(i->def(0), 2);
1382 srcId(i->src(0), 10);
1383 srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
1384
1385 emitPredicate(i);
1386 }
1387
1388 void
1389 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1390 {
1391 emitForm_L(i, 0x7f4, 2, Modifier(0));
1392 code[1] |= i->subOp << 2;
1393 code[1] |= 0x00070000;
1394 }
1395
1396 void
1397 CodeEmitterGK110::emitBAR(const Instruction *i)
1398 {
1399 code[0] = 0x00000002;
1400 code[1] = 0x85400000;
1401
1402 switch (i->subOp) {
1403 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1404 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1405 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1406 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1407 default:
1408 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1409 break;
1410 }
1411
1412 emitPredicate(i);
1413
1414 // barrier id
1415 if (i->src(0).getFile() == FILE_GPR) {
1416 srcId(i->src(0), 10);
1417 } else {
1418 ImmediateValue *imm = i->getSrc(0)->asImm();
1419 assert(imm);
1420 code[0] |= imm->reg.data.u32 << 10;
1421 code[1] |= 0x8000;
1422 }
1423
1424 // thread count
1425 if (i->src(1).getFile() == FILE_GPR) {
1426 srcId(i->src(1), 23);
1427 } else {
1428 ImmediateValue *imm = i->getSrc(0)->asImm();
1429 assert(imm);
1430 assert(imm->reg.data.u32 <= 0xfff);
1431 code[0] |= imm->reg.data.u32 << 23;
1432 code[1] |= imm->reg.data.u32 >> 9;
1433 code[1] |= 0x4000;
1434 }
1435
1436 if (i->srcExists(2) && (i->predSrc != 2)) {
1437 srcId(i->src(2), 32 + 10);
1438 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1439 code[1] |= 1 << 13;
1440 } else {
1441 code[1] |= 7 << 10;
1442 }
1443 }
1444
1445 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1446 {
1447 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1448 code[1] = 0x7cc00000;
1449
1450 emitPredicate(i);
1451 }
1452
1453 void
1454 CodeEmitterGK110::emitFlow(const Instruction *i)
1455 {
1456 const FlowInstruction *f = i->asFlow();
1457
1458 unsigned mask; // bit 0: predicate, bit 1: target
1459
1460 code[0] = 0x00000000;
1461
1462 switch (i->op) {
1463 case OP_BRA:
1464 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1465 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1466 code[0] |= 0x80;
1467 mask = 3;
1468 break;
1469 case OP_CALL:
1470 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1471 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1472 code[0] |= 0x80;
1473 mask = 2;
1474 break;
1475
1476 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1477 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1478 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1479 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1480 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1481
1482 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1483 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1484 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1485 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1486
1487 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1488 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1489 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1490 default:
1491 assert(!"invalid flow operation");
1492 return;
1493 }
1494
1495 if (mask & 1) {
1496 emitPredicate(i);
1497 if (i->flagsSrc < 0)
1498 code[0] |= 0x3c;
1499 }
1500
1501 if (!f)
1502 return;
1503
1504 if (f->allWarp)
1505 code[0] |= 1 << 9;
1506 if (f->limit)
1507 code[0] |= 1 << 8;
1508
1509 if (f->op == OP_CALL) {
1510 if (f->builtin) {
1511 assert(f->absolute);
1512 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1513 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1514 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1515 } else {
1516 assert(!f->absolute);
1517 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1518 code[0] |= (pcRel & 0x1ff) << 23;
1519 code[1] |= (pcRel >> 9) & 0x7fff;
1520 }
1521 } else
1522 if (mask & 2) {
1523 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1524 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1525 pcRel += 8;
1526 // currently we don't want absolute branches
1527 assert(!f->absolute);
1528 code[0] |= (pcRel & 0x1ff) << 23;
1529 code[1] |= (pcRel >> 9) & 0x7fff;
1530 }
1531 }
1532
1533 void
1534 CodeEmitterGK110::emitVOTE(const Instruction *i)
1535 {
1536 assert(i->src(0).getFile() == FILE_PREDICATE);
1537
1538 code[0] = 0x00000002;
1539 code[1] = 0x86c00000 | (i->subOp << 19);
1540
1541 emitPredicate(i);
1542
1543 unsigned rp = 0;
1544 for (int d = 0; i->defExists(d); d++) {
1545 if (i->def(d).getFile() == FILE_PREDICATE) {
1546 assert(!(rp & 2));
1547 rp |= 2;
1548 defId(i->def(d), 48);
1549 } else if (i->def(d).getFile() == FILE_GPR) {
1550 assert(!(rp & 1));
1551 rp |= 1;
1552 defId(i->def(d), 2);
1553 } else {
1554 assert(!"Unhandled def");
1555 }
1556 }
1557 if (!(rp & 1))
1558 code[0] |= 255 << 2;
1559 if (!(rp & 2))
1560 code[1] |= 7 << 16;
1561 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
1562 code[1] |= 1 << 13;
1563 srcId(i->src(0), 42);
1564 }
1565
1566 void
1567 CodeEmitterGK110::emitSUGType(DataType ty, const int pos)
1568 {
1569 uint8_t n = 0;
1570
1571 switch (ty) {
1572 case TYPE_S32: n = 1; break;
1573 case TYPE_U8: n = 2; break;
1574 case TYPE_S8: n = 3; break;
1575 default:
1576 assert(ty == TYPE_U32);
1577 break;
1578 }
1579 code[pos / 32] |= n << (pos % 32);
1580 }
1581
1582 void
1583 CodeEmitterGK110::emitSUCachingMode(CacheMode c)
1584 {
1585 uint8_t n = 0;
1586
1587 switch (c) {
1588 case CACHE_CA:
1589 // case CACHE_WB:
1590 n = 0;
1591 break;
1592 case CACHE_CG:
1593 n = 1;
1594 break;
1595 case CACHE_CS:
1596 n = 2;
1597 break;
1598 case CACHE_CV:
1599 // case CACHE_WT:
1600 n = 3;
1601 break;
1602 default:
1603 assert(!"invalid caching mode");
1604 break;
1605 }
1606 code[0] |= (n & 1) << 31;
1607 code[1] |= (n & 2) >> 1;
1608 }
1609
1610 void
1611 CodeEmitterGK110::setSUConst16(const Instruction *i, const int s)
1612 {
1613 const uint32_t offset = i->getSrc(s)->reg.data.offset;
1614
1615 assert(offset == (offset & 0xfffc));
1616
1617 code[0] |= offset << 21;
1618 code[1] |= offset >> 11;
1619 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
1620 }
1621
1622 void
1623 CodeEmitterGK110::emitSULDGB(const TexInstruction *i)
1624 {
1625 code[0] = 0x00000002;
1626 code[1] = 0x30000000 | (i->subOp << 14);
1627
1628 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1629 emitLoadStoreType(i->dType, 0x38);
1630 emitCachingMode(i->cache, 0x36);
1631
1632 // format
1633 setSUConst16(i, 1);
1634 } else {
1635 assert(i->src(1).getFile() == FILE_GPR);
1636 code[1] |= 0x49800000;
1637
1638 emitLoadStoreType(i->dType, 0x21);
1639 emitSUCachingMode(i->cache);
1640
1641 srcId(i->src(1), 23);
1642 }
1643
1644 emitSUGType(i->sType, 0x34);
1645
1646 emitPredicate(i);
1647 defId(i->def(0), 2); // destination
1648 srcId(i->src(0), 10); // address
1649
1650 // surface predicate
1651 if (!i->srcExists(2) || (i->predSrc == 2)) {
1652 code[1] |= 0x7 << 10;
1653 } else {
1654 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1655 code[1] |= 1 << 13;
1656 srcId(i->src(2), 32 + 10);
1657 }
1658 }
1659
1660 void
1661 CodeEmitterGK110::emitSUSTGx(const TexInstruction *i)
1662 {
1663 assert(i->op == OP_SUSTP);
1664
1665 code[0] = 0x00000002;
1666 code[1] = 0x38000000;
1667
1668 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1669 code[0] |= i->subOp << 2;
1670
1671 if (i->op == OP_SUSTP)
1672 code[0] |= i->tex.mask << 4;
1673
1674 emitSUGType(i->sType, 0x8);
1675 emitCachingMode(i->cache, 0x36);
1676
1677 // format
1678 setSUConst16(i, 1);
1679 } else {
1680 assert(i->src(1).getFile() == FILE_GPR);
1681
1682 code[0] |= i->subOp << 23;
1683 code[1] |= 0x41c00000;
1684
1685 if (i->op == OP_SUSTP)
1686 code[0] |= i->tex.mask << 25;
1687
1688 emitSUGType(i->sType, 0x1d);
1689 emitSUCachingMode(i->cache);
1690
1691 srcId(i->src(1), 2);
1692 }
1693
1694 emitPredicate(i);
1695 srcId(i->src(0), 10); // address
1696 srcId(i->src(3), 42); // values
1697
1698 // surface predicate
1699 if (!i->srcExists(2) || (i->predSrc == 2)) {
1700 code[1] |= 0x7 << 18;
1701 } else {
1702 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1703 code[1] |= 1 << 21;
1704 srcId(i->src(2), 32 + 18);
1705 }
1706 }
1707
1708 void
1709 CodeEmitterGK110::emitSUCLAMPMode(uint16_t subOp)
1710 {
1711 uint8_t m;
1712 switch (subOp & ~NV50_IR_SUBOP_SUCLAMP_2D) {
1713 case NV50_IR_SUBOP_SUCLAMP_SD(0, 1): m = 0; break;
1714 case NV50_IR_SUBOP_SUCLAMP_SD(1, 1): m = 1; break;
1715 case NV50_IR_SUBOP_SUCLAMP_SD(2, 1): m = 2; break;
1716 case NV50_IR_SUBOP_SUCLAMP_SD(3, 1): m = 3; break;
1717 case NV50_IR_SUBOP_SUCLAMP_SD(4, 1): m = 4; break;
1718 case NV50_IR_SUBOP_SUCLAMP_PL(0, 1): m = 5; break;
1719 case NV50_IR_SUBOP_SUCLAMP_PL(1, 1): m = 6; break;
1720 case NV50_IR_SUBOP_SUCLAMP_PL(2, 1): m = 7; break;
1721 case NV50_IR_SUBOP_SUCLAMP_PL(3, 1): m = 8; break;
1722 case NV50_IR_SUBOP_SUCLAMP_PL(4, 1): m = 9; break;
1723 case NV50_IR_SUBOP_SUCLAMP_BL(0, 1): m = 10; break;
1724 case NV50_IR_SUBOP_SUCLAMP_BL(1, 1): m = 11; break;
1725 case NV50_IR_SUBOP_SUCLAMP_BL(2, 1): m = 12; break;
1726 case NV50_IR_SUBOP_SUCLAMP_BL(3, 1): m = 13; break;
1727 case NV50_IR_SUBOP_SUCLAMP_BL(4, 1): m = 14; break;
1728 default:
1729 return;
1730 }
1731 code[1] |= m << 20;
1732 if (subOp & NV50_IR_SUBOP_SUCLAMP_2D)
1733 code[1] |= 1 << 24;
1734 }
1735
1736 void
1737 CodeEmitterGK110::emitSUCalc(Instruction *i)
1738 {
1739 ImmediateValue *imm = NULL;
1740 uint64_t opc1, opc2;
1741
1742 if (i->srcExists(2)) {
1743 imm = i->getSrc(2)->asImm();
1744 if (imm)
1745 i->setSrc(2, NULL); // special case, make emitForm_21 not assert
1746 }
1747
1748 switch (i->op) {
1749 case OP_SUCLAMP: opc1 = 0xb00; opc2 = 0x580; break;
1750 case OP_SUBFM: opc1 = 0xb68; opc2 = 0x1e8; break;
1751 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1752 default:
1753 assert(0);
1754 return;
1755 }
1756 emitForm_21(i, opc2, opc1);
1757
1758 if (i->op == OP_SUCLAMP) {
1759 if (i->dType == TYPE_S32)
1760 code[1] |= 1 << 19;
1761 emitSUCLAMPMode(i->subOp);
1762 }
1763
1764 if (i->op == OP_SUBFM && i->subOp == NV50_IR_SUBOP_SUBFM_3D)
1765 code[1] |= 1 << 18;
1766
1767 if (i->op != OP_SUEAU) {
1768 const uint8_t pos = i->op == OP_SUBFM ? 19 : 16;
1769 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
1770 code[0] |= 255 << 2;
1771 code[1] |= i->getDef(1)->reg.data.id << pos;
1772 } else
1773 if (i->defExists(1)) { // r, p
1774 assert(i->def(1).getFile() == FILE_PREDICATE);
1775 code[1] |= i->getDef(1)->reg.data.id << pos;
1776 } else { // r, #
1777 code[1] |= 7 << pos;
1778 }
1779 }
1780
1781 if (imm) {
1782 assert(i->op == OP_SUCLAMP);
1783 i->setSrc(2, imm);
1784 code[1] |= (imm->reg.data.u32 & 0x3f) << 10; // sint6
1785 }
1786 }
1787
1788
1789 void
1790 CodeEmitterGK110::emitVectorSubOp(const Instruction *i)
1791 {
1792 switch (NV50_IR_SUBOP_Vn(i->subOp)) {
1793 case 0:
1794 code[1] |= (i->subOp & 0x000f) << 7; // vsrc1
1795 code[1] |= (i->subOp & 0x00e0) >> 6; // vsrc2
1796 code[1] |= (i->subOp & 0x0100) << 13; // vsrc2
1797 code[1] |= (i->subOp & 0x3c00) << 12; // vdst
1798 break;
1799 default:
1800 assert(0);
1801 break;
1802 }
1803 }
1804
1805 void
1806 CodeEmitterGK110::emitVSHL(const Instruction *i)
1807 {
1808 code[0] = 0x00000002;
1809 code[1] = 0xb8000000;
1810
1811 assert(NV50_IR_SUBOP_Vn(i->subOp) == 0);
1812
1813 if (isSignedType(i->dType)) code[1] |= 1 << 25;
1814 if (isSignedType(i->sType)) code[1] |= 1 << 19;
1815
1816 emitVectorSubOp(i);
1817
1818 emitPredicate(i);
1819 defId(i->def(0), 2);
1820 srcId(i->src(0), 10);
1821
1822 if (i->getSrc(1)->reg.file == FILE_IMMEDIATE) {
1823 ImmediateValue *imm = i->getSrc(1)->asImm();
1824 assert(imm);
1825 code[0] |= (imm->reg.data.u32 & 0x01ff) << 23;
1826 code[1] |= (imm->reg.data.u32 & 0xfe00) >> 9;
1827 } else {
1828 assert(i->getSrc(1)->reg.file == FILE_GPR);
1829 code[1] |= 1 << 21;
1830 srcId(i->src(1), 23);
1831 }
1832 srcId(i->src(2), 42);
1833
1834 if (i->saturate)
1835 code[0] |= 1 << 22;
1836 if (i->flagsDef >= 0)
1837 code[1] |= 1 << 18;
1838 }
1839
1840 void
1841 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1842 {
1843 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1844
1845 code[0] = 0x00000002 | (offset << 23);
1846 code[1] = 0x7d000000 | (offset >> 9);
1847
1848 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1849 code[1] |= 0x8;
1850
1851 emitPredicate(i);
1852
1853 defId(i->def(0), 2);
1854 srcId(i->src(0).getIndirect(0), 10);
1855 }
1856
1857 void
1858 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1859 {
1860 uint32_t prim = i->src(0).get()->reg.data.u32;
1861
1862 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1863 code[1] = 0x7f800000;
1864
1865 emitPredicate(i);
1866
1867 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1868
1869 defId(i->def(0), 2);
1870 srcId(i, src1, 10);
1871 }
1872
1873 void
1874 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1875 {
1876 unsigned int size = typeSizeof(i->dType);
1877 uint32_t offset = i->src(0).get()->reg.data.offset;
1878
1879 code[0] = 0x00000002 | (offset << 23);
1880 code[1] = 0x7ec00000 | (offset >> 9);
1881 code[1] |= (size / 4 - 1) << 18;
1882
1883 if (i->perPatch)
1884 code[1] |= 0x4;
1885 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1886 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1887
1888 emitPredicate(i);
1889
1890 defId(i->def(0), 2);
1891 srcId(i->src(0).getIndirect(0), 10);
1892 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1893 }
1894
1895 void
1896 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1897 {
1898 unsigned int size = typeSizeof(i->dType);
1899 uint32_t offset = i->src(0).get()->reg.data.offset;
1900
1901 code[0] = 0x00000002 | (offset << 23);
1902 code[1] = 0x7f000000 | (offset >> 9);
1903 code[1] |= (size / 4 - 1) << 18;
1904
1905 if (i->perPatch)
1906 code[1] |= 0x4;
1907
1908 emitPredicate(i);
1909
1910 assert(i->src(1).getFile() == FILE_GPR);
1911
1912 srcId(i->src(0).getIndirect(0), 10);
1913 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1914 srcId(i->src(1), 2);
1915 }
1916
1917 void
1918 CodeEmitterGK110::emitOUT(const Instruction *i)
1919 {
1920 assert(i->src(0).getFile() == FILE_GPR);
1921
1922 emitForm_21(i, 0x1f0, 0xb70);
1923
1924 if (i->op == OP_EMIT)
1925 code[1] |= 1 << 10;
1926 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1927 code[1] |= 1 << 11;
1928 }
1929
1930 void
1931 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1932 {
1933 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1934 code[1] |= (i->ipa & 0xc) << (19 - 2);
1935 }
1936
1937 static void
1938 interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1939 {
1940 int ipa = entry->ipa;
1941 int reg = entry->reg;
1942 int loc = entry->loc;
1943
1944 if (data.flatshade &&
1945 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1946 ipa = NV50_IR_INTERP_FLAT;
1947 reg = 0xff;
1948 } else if (data.force_persample_interp &&
1949 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1950 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1951 ipa |= NV50_IR_INTERP_CENTROID;
1952 }
1953 code[loc + 1] &= ~(0xf << 19);
1954 code[loc + 1] |= (ipa & 0x3) << 21;
1955 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1956 code[loc + 0] &= ~(0xff << 23);
1957 code[loc + 0] |= reg << 23;
1958 }
1959
1960 void
1961 CodeEmitterGK110::emitINTERP(const Instruction *i)
1962 {
1963 const uint32_t base = i->getSrc(0)->reg.data.offset;
1964
1965 code[0] = 0x00000002 | (base << 31);
1966 code[1] = 0x74800000 | (base >> 1);
1967
1968 if (i->saturate)
1969 code[1] |= 1 << 18;
1970
1971 if (i->op == OP_PINTERP) {
1972 srcId(i->src(1), 23);
1973 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1974 } else {
1975 code[0] |= 0xff << 23;
1976 addInterp(i->ipa, 0xff, interpApply);
1977 }
1978
1979 srcId(i->src(0).getIndirect(0), 10);
1980 emitInterpMode(i);
1981
1982 emitPredicate(i);
1983 defId(i->def(0), 2);
1984
1985 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1986 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1987 else
1988 code[1] |= 0xff << 10;
1989 }
1990
1991 void
1992 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1993 {
1994 uint8_t n;
1995
1996 switch (ty) {
1997 case TYPE_U8:
1998 n = 0;
1999 break;
2000 case TYPE_S8:
2001 n = 1;
2002 break;
2003 case TYPE_U16:
2004 n = 2;
2005 break;
2006 case TYPE_S16:
2007 n = 3;
2008 break;
2009 case TYPE_F32:
2010 case TYPE_U32:
2011 case TYPE_S32:
2012 n = 4;
2013 break;
2014 case TYPE_F64:
2015 case TYPE_U64:
2016 case TYPE_S64:
2017 n = 5;
2018 break;
2019 case TYPE_B128:
2020 n = 6;
2021 break;
2022 default:
2023 n = 0;
2024 assert(!"invalid ld/st type");
2025 break;
2026 }
2027 code[pos / 32] |= n << (pos % 32);
2028 }
2029
2030 void
2031 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
2032 {
2033 uint8_t n;
2034
2035 switch (c) {
2036 case CACHE_CA:
2037 // case CACHE_WB:
2038 n = 0;
2039 break;
2040 case CACHE_CG:
2041 n = 1;
2042 break;
2043 case CACHE_CS:
2044 n = 2;
2045 break;
2046 case CACHE_CV:
2047 // case CACHE_WT:
2048 n = 3;
2049 break;
2050 default:
2051 n = 0;
2052 assert(!"invalid caching mode");
2053 break;
2054 }
2055 code[pos / 32] |= n << (pos % 32);
2056 }
2057
2058 void
2059 CodeEmitterGK110::emitSTORE(const Instruction *i)
2060 {
2061 int32_t offset = SDATA(i->src(0)).offset;
2062
2063 switch (i->src(0).getFile()) {
2064 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
2065 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
2066 case FILE_MEMORY_SHARED:
2067 code[0] = 0x00000002;
2068 if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
2069 code[1] = 0x78400000;
2070 else
2071 code[1] = 0x7ac00000;
2072 break;
2073 default:
2074 assert(!"invalid memory file");
2075 break;
2076 }
2077
2078 if (code[0] & 0x2) {
2079 offset &= 0xffffff;
2080 emitLoadStoreType(i->dType, 0x33);
2081 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2082 emitCachingMode(i->cache, 0x2f);
2083 } else {
2084 emitLoadStoreType(i->dType, 0x38);
2085 emitCachingMode(i->cache, 0x3b);
2086 }
2087 code[0] |= offset << 23;
2088 code[1] |= offset >> 9;
2089
2090 // Unlocked store on shared memory can fail.
2091 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2092 i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
2093 assert(i->defExists(0));
2094 defId(i->def(0), 32 + 16);
2095 }
2096
2097 emitPredicate(i);
2098
2099 srcId(i->src(1), 2);
2100 srcId(i->src(0).getIndirect(0), 10);
2101 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2102 i->src(0).isIndirect(0) &&
2103 i->getIndirect(0, 0)->reg.size == 8)
2104 code[1] |= 1 << 23;
2105 }
2106
2107 void
2108 CodeEmitterGK110::emitLOAD(const Instruction *i)
2109 {
2110 int32_t offset = SDATA(i->src(0)).offset;
2111
2112 switch (i->src(0).getFile()) {
2113 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
2114 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
2115 case FILE_MEMORY_SHARED:
2116 code[0] = 0x00000002;
2117 if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
2118 code[1] = 0x77400000;
2119 else
2120 code[1] = 0x7a400000;
2121 break;
2122 case FILE_MEMORY_CONST:
2123 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
2124 emitMOV(i);
2125 return;
2126 }
2127 offset &= 0xffff;
2128 code[0] = 0x00000002;
2129 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
2130 code[1] |= i->subOp << 15;
2131 break;
2132 default:
2133 assert(!"invalid memory file");
2134 break;
2135 }
2136
2137 if (code[0] & 0x2) {
2138 offset &= 0xffffff;
2139 emitLoadStoreType(i->dType, 0x33);
2140 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2141 emitCachingMode(i->cache, 0x2f);
2142 } else {
2143 emitLoadStoreType(i->dType, 0x38);
2144 emitCachingMode(i->cache, 0x3b);
2145 }
2146 code[0] |= offset << 23;
2147 code[1] |= offset >> 9;
2148
2149 // Locked store on shared memory can fail.
2150 int r = 0, p = -1;
2151 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2152 i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
2153 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
2154 r = -1;
2155 p = 0;
2156 } else if (i->defExists(1)) { // r, p
2157 p = 1;
2158 } else {
2159 assert(!"Expected predicate dest for load locked");
2160 }
2161 }
2162
2163 emitPredicate(i);
2164
2165 if (r >= 0)
2166 defId(i->def(r), 2);
2167 else
2168 code[0] |= 255 << 2;
2169
2170 if (p >= 0)
2171 defId(i->def(p), 32 + 16);
2172
2173 if (i->getIndirect(0, 0)) {
2174 srcId(i->src(0).getIndirect(0), 10);
2175 if (i->getIndirect(0, 0)->reg.size == 8)
2176 code[1] |= 1 << 23;
2177 } else {
2178 code[0] |= 255 << 10;
2179 }
2180 }
2181
2182 uint8_t
2183 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
2184 {
2185 switch (SDATA(ref).sv.sv) {
2186 case SV_LANEID: return 0x00;
2187 case SV_PHYSID: return 0x03;
2188 case SV_VERTEX_COUNT: return 0x10;
2189 case SV_INVOCATION_ID: return 0x11;
2190 case SV_YDIR: return 0x12;
2191 case SV_THREAD_KILL: return 0x13;
2192 case SV_TID: return 0x21 + SDATA(ref).sv.index;
2193 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
2194 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
2195 case SV_GRIDID: return 0x2c;
2196 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
2197 case SV_LBASE: return 0x34;
2198 case SV_SBASE: return 0x30;
2199 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
2200 default:
2201 assert(!"no sreg for system value");
2202 return 0;
2203 }
2204 }
2205
2206 void
2207 CodeEmitterGK110::emitMOV(const Instruction *i)
2208 {
2209 if (i->def(0).getFile() == FILE_PREDICATE) {
2210 if (i->src(0).getFile() == FILE_GPR) {
2211 // Use ISETP.NE.AND dst, PT, src, RZ, PT
2212 code[0] = 0x00000002;
2213 code[1] = 0xdb500000;
2214
2215 code[0] |= 0x7 << 2;
2216 code[0] |= 0xff << 23;
2217 code[1] |= 0x7 << 10;
2218 srcId(i->src(0), 10);
2219 } else
2220 if (i->src(0).getFile() == FILE_PREDICATE) {
2221 // Use PSETP.AND.AND dst, PT, src, PT, PT
2222 code[0] = 0x00000002;
2223 code[1] = 0x84800000;
2224
2225 code[0] |= 0x7 << 2;
2226 code[1] |= 0x7 << 0;
2227 code[1] |= 0x7 << 10;
2228
2229 srcId(i->src(0), 14);
2230 } else {
2231 assert(!"Unexpected source for predicate destination");
2232 emitNOP(i);
2233 }
2234 emitPredicate(i);
2235 defId(i->def(0), 5);
2236 } else
2237 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
2238 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
2239 code[1] = 0x86400000;
2240 emitPredicate(i);
2241 defId(i->def(0), 2);
2242 } else
2243 if (i->src(0).getFile() == FILE_IMMEDIATE) {
2244 code[0] = 0x00000002 | (i->lanes << 14);
2245 code[1] = 0x74000000;
2246 emitPredicate(i);
2247 defId(i->def(0), 2);
2248 setImmediate32(i, 0, Modifier(0));
2249 } else
2250 if (i->src(0).getFile() == FILE_PREDICATE) {
2251 code[0] = 0x00000002;
2252 code[1] = 0x84401c07;
2253 emitPredicate(i);
2254 defId(i->def(0), 2);
2255 srcId(i->src(0), 14);
2256 } else {
2257 emitForm_C(i, 0x24c, 2);
2258 code[1] |= i->lanes << 10;
2259 }
2260 }
2261
2262 static inline bool
2263 uses64bitAddress(const Instruction *ldst)
2264 {
2265 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2266 ldst->src(0).isIndirect(0) &&
2267 ldst->getIndirect(0, 0)->reg.size == 8;
2268 }
2269
2270 void
2271 CodeEmitterGK110::emitATOM(const Instruction *i)
2272 {
2273 const bool hasDst = i->defExists(0);
2274 const bool exch = i->subOp == NV50_IR_SUBOP_ATOM_EXCH;
2275
2276 code[0] = 0x00000002;
2277 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
2278 code[1] = 0x77800000;
2279 else
2280 code[1] = 0x68000000;
2281
2282 switch (i->subOp) {
2283 case NV50_IR_SUBOP_ATOM_CAS: break;
2284 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
2285 default: code[1] |= i->subOp << 23; break;
2286 }
2287
2288 switch (i->dType) {
2289 case TYPE_U32: break;
2290 case TYPE_S32: code[1] |= 0x00100000; break;
2291 case TYPE_U64: code[1] |= 0x00200000; break;
2292 case TYPE_F32: code[1] |= 0x00300000; break;
2293 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
2294 case TYPE_S64: code[1] |= 0x00500000; break;
2295 default: assert(!"unsupported type"); break;
2296 }
2297
2298 emitPredicate(i);
2299
2300 /* TODO: cas: check that src regs line up */
2301 /* TODO: cas: flip bits if $r255 is used */
2302 srcId(i->src(1), 23);
2303
2304 if (hasDst) {
2305 defId(i->def(0), 2);
2306 } else
2307 if (!exch) {
2308 code[0] |= 255 << 2;
2309 }
2310
2311 if (hasDst || !exch) {
2312 const int32_t offset = SDATA(i->src(0)).offset;
2313 assert(offset < 0x80000 && offset >= -0x80000);
2314 code[0] |= (offset & 1) << 31;
2315 code[1] |= (offset & 0xffffe) >> 1;
2316 } else {
2317 srcAddr32(i->src(0), 31);
2318 }
2319
2320 if (i->getIndirect(0, 0)) {
2321 srcId(i->getIndirect(0, 0), 10);
2322 if (i->getIndirect(0, 0)->reg.size == 8)
2323 code[1] |= 1 << 19;
2324 } else {
2325 code[0] |= 255 << 10;
2326 }
2327 }
2328
2329 void
2330 CodeEmitterGK110::emitCCTL(const Instruction *i)
2331 {
2332 int32_t offset = SDATA(i->src(0)).offset;
2333
2334 code[0] = 0x00000002 | (i->subOp << 2);
2335
2336 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
2337 code[1] = 0x7b000000;
2338 } else {
2339 code[1] = 0x7c000000;
2340 offset &= 0xffffff;
2341 }
2342 code[0] |= offset << 23;
2343 code[1] |= offset >> 9;
2344
2345 if (uses64bitAddress(i))
2346 code[1] |= 1 << 23;
2347 srcId(i->src(0).getIndirect(0), 10);
2348
2349 emitPredicate(i);
2350 }
2351
2352 bool
2353 CodeEmitterGK110::emitInstruction(Instruction *insn)
2354 {
2355 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
2356
2357 if (insn->encSize != 8) {
2358 ERROR("skipping unencodable instruction: ");
2359 insn->print();
2360 return false;
2361 } else
2362 if (codeSize + size > codeSizeLimit) {
2363 ERROR("code emitter output buffer too small\n");
2364 return false;
2365 }
2366
2367 if (writeIssueDelays) {
2368 int id = (codeSize & 0x3f) / 8 - 1;
2369 if (id < 0) {
2370 id += 1;
2371 code[0] = 0x00000000; // cf issue delay "instruction"
2372 code[1] = 0x08000000;
2373 code += 2;
2374 codeSize += 8;
2375 }
2376 uint32_t *data = code - (id * 2 + 2);
2377
2378 switch (id) {
2379 case 0: data[0] |= insn->sched << 2; break;
2380 case 1: data[0] |= insn->sched << 10; break;
2381 case 2: data[0] |= insn->sched << 18; break;
2382 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
2383 case 4: data[1] |= insn->sched << 2; break;
2384 case 5: data[1] |= insn->sched << 10; break;
2385 case 6: data[1] |= insn->sched << 18; break;
2386 default:
2387 assert(0);
2388 break;
2389 }
2390 }
2391
2392 // assert that instructions with multiple defs don't corrupt registers
2393 for (int d = 0; insn->defExists(d); ++d)
2394 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
2395
2396 switch (insn->op) {
2397 case OP_MOV:
2398 case OP_RDSV:
2399 emitMOV(insn);
2400 break;
2401 case OP_NOP:
2402 break;
2403 case OP_LOAD:
2404 emitLOAD(insn);
2405 break;
2406 case OP_STORE:
2407 emitSTORE(insn);
2408 break;
2409 case OP_LINTERP:
2410 case OP_PINTERP:
2411 emitINTERP(insn);
2412 break;
2413 case OP_VFETCH:
2414 emitVFETCH(insn);
2415 break;
2416 case OP_EXPORT:
2417 emitEXPORT(insn);
2418 break;
2419 case OP_AFETCH:
2420 emitAFETCH(insn);
2421 break;
2422 case OP_PFETCH:
2423 emitPFETCH(insn);
2424 break;
2425 case OP_EMIT:
2426 case OP_RESTART:
2427 emitOUT(insn);
2428 break;
2429 case OP_ADD:
2430 case OP_SUB:
2431 if (insn->dType == TYPE_F64)
2432 emitDADD(insn);
2433 else if (isFloatType(insn->dType))
2434 emitFADD(insn);
2435 else
2436 emitUADD(insn);
2437 break;
2438 case OP_MUL:
2439 if (insn->dType == TYPE_F64)
2440 emitDMUL(insn);
2441 else if (isFloatType(insn->dType))
2442 emitFMUL(insn);
2443 else
2444 emitIMUL(insn);
2445 break;
2446 case OP_MAD:
2447 case OP_FMA:
2448 if (insn->dType == TYPE_F64)
2449 emitDMAD(insn);
2450 else if (isFloatType(insn->dType))
2451 emitFMAD(insn);
2452 else
2453 emitIMAD(insn);
2454 break;
2455 case OP_MADSP:
2456 emitMADSP(insn);
2457 break;
2458 case OP_SAD:
2459 emitISAD(insn);
2460 break;
2461 case OP_SHLADD:
2462 emitSHLADD(insn);
2463 break;
2464 case OP_NOT:
2465 emitNOT(insn);
2466 break;
2467 case OP_AND:
2468 emitLogicOp(insn, 0);
2469 break;
2470 case OP_OR:
2471 emitLogicOp(insn, 1);
2472 break;
2473 case OP_XOR:
2474 emitLogicOp(insn, 2);
2475 break;
2476 case OP_SHL:
2477 case OP_SHR:
2478 emitShift(insn);
2479 break;
2480 case OP_SET:
2481 case OP_SET_AND:
2482 case OP_SET_OR:
2483 case OP_SET_XOR:
2484 emitSET(insn->asCmp());
2485 break;
2486 case OP_SELP:
2487 emitSELP(insn);
2488 break;
2489 case OP_SLCT:
2490 emitSLCT(insn->asCmp());
2491 break;
2492 case OP_MIN:
2493 case OP_MAX:
2494 emitMINMAX(insn);
2495 break;
2496 case OP_ABS:
2497 case OP_NEG:
2498 case OP_CEIL:
2499 case OP_FLOOR:
2500 case OP_TRUNC:
2501 case OP_SAT:
2502 emitCVT(insn);
2503 break;
2504 case OP_CVT:
2505 if (insn->def(0).getFile() == FILE_PREDICATE ||
2506 insn->src(0).getFile() == FILE_PREDICATE)
2507 emitMOV(insn);
2508 else
2509 emitCVT(insn);
2510 break;
2511 case OP_RSQ:
2512 emitSFnOp(insn, 5 + 2 * insn->subOp);
2513 break;
2514 case OP_RCP:
2515 emitSFnOp(insn, 4 + 2 * insn->subOp);
2516 break;
2517 case OP_LG2:
2518 emitSFnOp(insn, 3);
2519 break;
2520 case OP_EX2:
2521 emitSFnOp(insn, 2);
2522 break;
2523 case OP_SIN:
2524 emitSFnOp(insn, 1);
2525 break;
2526 case OP_COS:
2527 emitSFnOp(insn, 0);
2528 break;
2529 case OP_PRESIN:
2530 case OP_PREEX2:
2531 emitPreOp(insn);
2532 break;
2533 case OP_TEX:
2534 case OP_TXB:
2535 case OP_TXL:
2536 case OP_TXD:
2537 case OP_TXF:
2538 case OP_TXG:
2539 case OP_TXLQ:
2540 emitTEX(insn->asTex());
2541 break;
2542 case OP_TXQ:
2543 emitTXQ(insn->asTex());
2544 break;
2545 case OP_TEXBAR:
2546 emitTEXBAR(insn);
2547 break;
2548 case OP_PIXLD:
2549 emitPIXLD(insn);
2550 break;
2551 case OP_BRA:
2552 case OP_CALL:
2553 case OP_PRERET:
2554 case OP_RET:
2555 case OP_DISCARD:
2556 case OP_EXIT:
2557 case OP_PRECONT:
2558 case OP_CONT:
2559 case OP_PREBREAK:
2560 case OP_BREAK:
2561 case OP_JOINAT:
2562 case OP_BRKPT:
2563 case OP_QUADON:
2564 case OP_QUADPOP:
2565 emitFlow(insn);
2566 break;
2567 case OP_QUADOP:
2568 emitQUADOP(insn, insn->subOp, insn->lanes);
2569 break;
2570 case OP_DFDX:
2571 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2572 break;
2573 case OP_DFDY:
2574 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2575 break;
2576 case OP_POPCNT:
2577 emitPOPC(insn);
2578 break;
2579 case OP_INSBF:
2580 emitINSBF(insn);
2581 break;
2582 case OP_EXTBF:
2583 emitEXTBF(insn);
2584 break;
2585 case OP_BFIND:
2586 emitBFIND(insn);
2587 break;
2588 case OP_PERMT:
2589 emitPERMT(insn);
2590 break;
2591 case OP_JOIN:
2592 emitNOP(insn);
2593 insn->join = 1;
2594 break;
2595 case OP_BAR:
2596 emitBAR(insn);
2597 break;
2598 case OP_MEMBAR:
2599 emitMEMBAR(insn);
2600 break;
2601 case OP_ATOM:
2602 emitATOM(insn);
2603 break;
2604 case OP_CCTL:
2605 emitCCTL(insn);
2606 break;
2607 case OP_VOTE:
2608 emitVOTE(insn);
2609 break;
2610 case OP_SULDB:
2611 emitSULDGB(insn->asTex());
2612 break;
2613 case OP_SUSTB:
2614 case OP_SUSTP:
2615 emitSUSTGx(insn->asTex());
2616 break;
2617 case OP_SUBFM:
2618 case OP_SUCLAMP:
2619 case OP_SUEAU:
2620 emitSUCalc(insn);
2621 break;
2622 case OP_VSHL:
2623 emitVSHL(insn);
2624 break;
2625 case OP_PHI:
2626 case OP_UNION:
2627 case OP_CONSTRAINT:
2628 ERROR("operation should have been eliminated");
2629 return false;
2630 case OP_EXP:
2631 case OP_LOG:
2632 case OP_SQRT:
2633 case OP_POW:
2634 ERROR("operation should have been lowered\n");
2635 return false;
2636 default:
2637 ERROR("unknown op: %u\n", insn->op);
2638 return false;
2639 }
2640
2641 if (insn->join)
2642 code[0] |= 1 << 22;
2643
2644 code += 2;
2645 codeSize += 8;
2646 return true;
2647 }
2648
2649 uint32_t
2650 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2651 {
2652 // No more short instruction encodings.
2653 return 8;
2654 }
2655
2656 void
2657 CodeEmitterGK110::prepareEmission(Function *func)
2658 {
2659 const Target *targ = func->getProgram()->getTarget();
2660
2661 CodeEmitter::prepareEmission(func);
2662
2663 if (targ->hasSWSched)
2664 calculateSchedDataNVC0(targ, func);
2665 }
2666
2667 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2668 : CodeEmitter(target),
2669 targNVC0(target),
2670 writeIssueDelays(target->hasSWSched)
2671 {
2672 code = NULL;
2673 codeSize = codeSizeLimit = 0;
2674 relocInfo = NULL;
2675 }
2676
2677 CodeEmitter *
2678 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2679 {
2680 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2681 emit->setProgramType(type);
2682 return emit;
2683 }
2684
2685 } // namespace nv50_ir