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nv50/ir: fix comments about instructions info
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57 void setSUConst16(const Instruction *, const int s);
58
59 void modNegAbsF32_3b(const Instruction *, const int s);
60
61 void emitCondCode(CondCode cc, int pos, uint8_t mask);
62 void emitInterpMode(const Instruction *);
63 void emitLoadStoreType(DataType ty, const int pos);
64 void emitCachingMode(CacheMode c, const int pos);
65 void emitSUGType(DataType, const int pos);
66 void emitSUCachingMode(CacheMode c);
67
68 inline uint8_t getSRegEncoding(const ValueRef&);
69
70 void emitRoundMode(RoundMode, const int pos, const int rintPos);
71 void emitRoundModeF(RoundMode, const int pos);
72 void emitRoundModeI(RoundMode, const int pos);
73
74 void emitNegAbs12(const Instruction *);
75
76 void emitNOP(const Instruction *);
77
78 void emitLOAD(const Instruction *);
79 void emitSTORE(const Instruction *);
80 void emitMOV(const Instruction *);
81 void emitATOM(const Instruction *);
82 void emitCCTL(const Instruction *);
83
84 void emitINTERP(const Instruction *);
85 void emitAFETCH(const Instruction *);
86 void emitPFETCH(const Instruction *);
87 void emitVFETCH(const Instruction *);
88 void emitEXPORT(const Instruction *);
89 void emitOUT(const Instruction *);
90
91 void emitUADD(const Instruction *);
92 void emitFADD(const Instruction *);
93 void emitDADD(const Instruction *);
94 void emitIMUL(const Instruction *);
95 void emitFMUL(const Instruction *);
96 void emitDMUL(const Instruction *);
97 void emitIMAD(const Instruction *);
98 void emitISAD(const Instruction *);
99 void emitFMAD(const Instruction *);
100 void emitDMAD(const Instruction *);
101 void emitMADSP(const Instruction *i);
102
103 void emitNOT(const Instruction *);
104 void emitLogicOp(const Instruction *, uint8_t subOp);
105 void emitPOPC(const Instruction *);
106 void emitINSBF(const Instruction *);
107 void emitEXTBF(const Instruction *);
108 void emitBFIND(const Instruction *);
109 void emitPERMT(const Instruction *);
110 void emitShift(const Instruction *);
111
112 void emitSFnOp(const Instruction *, uint8_t subOp);
113
114 void emitCVT(const Instruction *);
115 void emitMINMAX(const Instruction *);
116 void emitPreOp(const Instruction *);
117
118 void emitSET(const CmpInstruction *);
119 void emitSLCT(const CmpInstruction *);
120 void emitSELP(const Instruction *);
121
122 void emitTEXBAR(const Instruction *);
123 void emitTEX(const TexInstruction *);
124 void emitTEXCSAA(const TexInstruction *);
125 void emitTXQ(const TexInstruction *);
126
127 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
128
129 void emitPIXLD(const Instruction *);
130
131 void emitBAR(const Instruction *);
132 void emitMEMBAR(const Instruction *);
133
134 void emitFlow(const Instruction *);
135
136 void emitVOTE(const Instruction *);
137
138 void emitSULDGB(const TexInstruction *);
139 void emitSUSTGx(const TexInstruction *);
140 void emitSUCLAMPMode(uint16_t);
141 void emitSUCalc(Instruction *);
142
143 void emitVSHL(const Instruction *);
144 void emitVectorSubOp(const Instruction *);
145
146 inline void defId(const ValueDef&, const int pos);
147 inline void srcId(const ValueRef&, const int pos);
148 inline void srcId(const ValueRef *, const int pos);
149 inline void srcId(const Instruction *, int s, const int pos);
150
151 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
152
153 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
154 };
155
156 #define GK110_GPR_ZERO 255
157
158 #define NEG_(b, s) \
159 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
160 #define ABS_(b, s) \
161 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
162
163 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
164 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
165
166 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
167 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
168
169 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
170
171 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
172
173 #define SDATA(a) ((a).rep()->reg.data)
174 #define DDATA(a) ((a).rep()->reg.data)
175
176 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
177 {
178 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
179 }
180
181 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
182 {
183 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
184 }
185
186 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
187 {
188 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
189 code[pos / 32] |= r << (pos % 32);
190 }
191
192 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
193 {
194 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
195 }
196
197 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
198 {
199 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
200 }
201
202 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
203 {
204 const ImmediateValue *imm = ref.get()->asImm();
205
206 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
207 }
208
209 void
210 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
211 {
212 bool rint = false;
213 uint8_t n;
214
215 switch (rnd) {
216 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
217 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
218 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
219 default:
220 rint = rnd == ROUND_NI;
221 n = 0;
222 assert(rnd == ROUND_N || rnd == ROUND_NI);
223 break;
224 }
225 code[pos / 32] |= n << (pos % 32);
226 if (rint && rintPos >= 0)
227 code[rintPos / 32] |= 1 << (rintPos % 32);
228 }
229
230 void
231 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
232 {
233 uint8_t n;
234
235 switch (rnd) {
236 case ROUND_M: n = 1; break;
237 case ROUND_P: n = 2; break;
238 case ROUND_Z: n = 3; break;
239 default:
240 n = 0;
241 assert(rnd == ROUND_N);
242 break;
243 }
244 code[pos / 32] |= n << (pos % 32);
245 }
246
247 void
248 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
249 {
250 uint8_t n;
251
252 switch (rnd) {
253 case ROUND_MI: n = 1; break;
254 case ROUND_PI: n = 2; break;
255 case ROUND_ZI: n = 3; break;
256 default:
257 n = 0;
258 assert(rnd == ROUND_NI);
259 break;
260 }
261 code[pos / 32] |= n << (pos % 32);
262 }
263
264 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
265 {
266 uint8_t n;
267
268 switch (cc) {
269 case CC_FL: n = 0x00; break;
270 case CC_LT: n = 0x01; break;
271 case CC_EQ: n = 0x02; break;
272 case CC_LE: n = 0x03; break;
273 case CC_GT: n = 0x04; break;
274 case CC_NE: n = 0x05; break;
275 case CC_GE: n = 0x06; break;
276 case CC_LTU: n = 0x09; break;
277 case CC_EQU: n = 0x0a; break;
278 case CC_LEU: n = 0x0b; break;
279 case CC_GTU: n = 0x0c; break;
280 case CC_NEU: n = 0x0d; break;
281 case CC_GEU: n = 0x0e; break;
282 case CC_TR: n = 0x0f; break;
283 case CC_NO: n = 0x10; break;
284 case CC_NC: n = 0x11; break;
285 case CC_NS: n = 0x12; break;
286 case CC_NA: n = 0x13; break;
287 case CC_A: n = 0x14; break;
288 case CC_S: n = 0x15; break;
289 case CC_C: n = 0x16; break;
290 case CC_O: n = 0x17; break;
291 default:
292 n = 0;
293 assert(!"invalid condition code");
294 break;
295 }
296 code[pos / 32] |= (n & mask) << (pos % 32);
297 }
298
299 void
300 CodeEmitterGK110::emitPredicate(const Instruction *i)
301 {
302 if (i->predSrc >= 0) {
303 srcId(i->src(i->predSrc), 18);
304 if (i->cc == CC_NOT_P)
305 code[0] |= 8 << 18; // negate
306 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
307 } else {
308 code[0] |= 7 << 18;
309 }
310 }
311
312 void
313 CodeEmitterGK110::setCAddress14(const ValueRef& src)
314 {
315 const Storage& res = src.get()->asSym()->reg;
316 const int32_t addr = res.data.offset / 4;
317
318 code[0] |= (addr & 0x01ff) << 23;
319 code[1] |= (addr & 0x3e00) >> 9;
320 code[1] |= res.fileIndex << 5;
321 }
322
323 void
324 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
325 {
326 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
327 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
328
329 if (i->sType == TYPE_F32) {
330 assert(!(u32 & 0x00000fff));
331 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
332 code[1] |= ((u32 & 0x7fe00000) >> 21);
333 code[1] |= ((u32 & 0x80000000) >> 4);
334 } else
335 if (i->sType == TYPE_F64) {
336 assert(!(u64 & 0x00000fffffffffffULL));
337 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
338 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
339 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
340 } else {
341 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
342 code[0] |= (u32 & 0x001ff) << 23;
343 code[1] |= (u32 & 0x7fe00) >> 9;
344 code[1] |= (u32 & 0x80000) << 8;
345 }
346 }
347
348 void
349 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
350 Modifier mod)
351 {
352 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
353
354 if (mod) {
355 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
356 mod.applyTo(imm);
357 u32 = imm.reg.data.u32;
358 }
359
360 code[0] |= u32 << 23;
361 code[1] |= u32 >> 9;
362 }
363
364 void
365 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
366 Modifier mod)
367 {
368 code[0] = ctg;
369 code[1] = opc << 20;
370
371 emitPredicate(i);
372
373 defId(i->def(0), 2);
374
375 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
376 switch (i->src(s).getFile()) {
377 case FILE_GPR:
378 srcId(i->src(s), s ? 42 : 10);
379 break;
380 case FILE_IMMEDIATE:
381 setImmediate32(i, s, mod);
382 break;
383 default:
384 break;
385 }
386 }
387 }
388
389
390 void
391 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
392 {
393 code[0] = ctg;
394 code[1] = opc << 20;
395
396 emitPredicate(i);
397
398 defId(i->def(0), 2);
399
400 switch (i->src(0).getFile()) {
401 case FILE_MEMORY_CONST:
402 code[1] |= 0x4 << 28;
403 setCAddress14(i->src(0));
404 break;
405 case FILE_GPR:
406 code[1] |= 0xc << 28;
407 srcId(i->src(0), 23);
408 break;
409 default:
410 assert(0);
411 break;
412 }
413 }
414
415 // 0x2 for GPR, c[] and 0x1 for short immediate
416 void
417 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
418 uint32_t opc1)
419 {
420 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
421
422 int s1 = 23;
423 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
424 s1 = 42;
425
426 if (imm) {
427 code[0] = 0x1;
428 code[1] = opc1 << 20;
429 } else {
430 code[0] = 0x2;
431 code[1] = (0xc << 28) | (opc2 << 20);
432 }
433
434 emitPredicate(i);
435
436 defId(i->def(0), 2);
437
438 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
439 switch (i->src(s).getFile()) {
440 case FILE_MEMORY_CONST:
441 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
442 setCAddress14(i->src(s));
443 break;
444 case FILE_IMMEDIATE:
445 setShortImmediate(i, s);
446 break;
447 case FILE_GPR:
448 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
449 break;
450 default:
451 if (i->op == OP_SELP) {
452 assert(s == 2 && i->src(s).getFile() == FILE_PREDICATE);
453 srcId(i->src(s), 42);
454 }
455 // ignore here, can be predicate or flags, but must not be address
456 break;
457 }
458 }
459 // 0x0 = invalid
460 // 0xc = rrr
461 // 0x8 = rrc
462 // 0x4 = rcr
463 assert(imm || (code[1] & (0xc << 28)));
464 }
465
466 inline void
467 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
468 {
469 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
470 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
471 }
472
473 void
474 CodeEmitterGK110::emitNOP(const Instruction *i)
475 {
476 code[0] = 0x00003c02;
477 code[1] = 0x85800000;
478
479 if (i)
480 emitPredicate(i);
481 else
482 code[0] = 0x001c3c02;
483 }
484
485 void
486 CodeEmitterGK110::emitFMAD(const Instruction *i)
487 {
488 assert(!isLIMM(i->src(1), TYPE_F32));
489
490 emitForm_21(i, 0x0c0, 0x940);
491
492 NEG_(34, 2);
493 SAT_(35);
494 RND_(36, F);
495 FTZ_(38);
496 DNZ_(39);
497
498 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
499
500 if (code[0] & 0x1) {
501 if (neg1)
502 code[1] ^= 1 << 27;
503 } else
504 if (neg1) {
505 code[1] |= 1 << 19;
506 }
507 }
508
509 void
510 CodeEmitterGK110::emitDMAD(const Instruction *i)
511 {
512 assert(!i->saturate);
513 assert(!i->ftz);
514
515 emitForm_21(i, 0x1b8, 0xb38);
516
517 NEG_(34, 2);
518 RND_(36, F);
519
520 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
521
522 if (code[0] & 0x1) {
523 if (neg1)
524 code[1] ^= 1 << 27;
525 } else
526 if (neg1) {
527 code[1] |= 1 << 19;
528 }
529 }
530
531 void
532 CodeEmitterGK110::emitMADSP(const Instruction *i)
533 {
534 emitForm_21(i, 0x140, 0xa40);
535
536 if (i->subOp == NV50_IR_SUBOP_MADSP_SD) {
537 code[1] |= 0x00c00000;
538 } else {
539 code[1] |= (i->subOp & 0x00f) << 19; // imadp1
540 code[1] |= (i->subOp & 0x0f0) << 20; // imadp2
541 code[1] |= (i->subOp & 0x100) << 11; // imadp3
542 code[1] |= (i->subOp & 0x200) << 15; // imadp3
543 code[1] |= (i->subOp & 0xc00) << 12; // imadp3
544 }
545
546 if (i->flagsDef >= 0)
547 code[1] |= 1 << 18;
548 }
549
550 void
551 CodeEmitterGK110::emitFMUL(const Instruction *i)
552 {
553 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
554
555 assert(i->postFactor >= -3 && i->postFactor <= 3);
556
557 if (isLIMM(i->src(1), TYPE_F32)) {
558 emitForm_L(i, 0x200, 0x2, Modifier(0));
559
560 FTZ_(38);
561 DNZ_(39);
562 SAT_(3a);
563 if (neg)
564 code[1] ^= 1 << 22;
565
566 assert(i->postFactor == 0);
567 } else {
568 emitForm_21(i, 0x234, 0xc34);
569 code[1] |= ((i->postFactor > 0) ?
570 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
571
572 RND_(2a, F);
573 FTZ_(2f);
574 DNZ_(30);
575 SAT_(35);
576
577 if (code[0] & 0x1) {
578 if (neg)
579 code[1] ^= 1 << 27;
580 } else
581 if (neg) {
582 code[1] |= 1 << 19;
583 }
584 }
585 }
586
587 void
588 CodeEmitterGK110::emitDMUL(const Instruction *i)
589 {
590 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
591
592 assert(!i->postFactor);
593 assert(!i->saturate);
594 assert(!i->ftz);
595 assert(!i->dnz);
596
597 emitForm_21(i, 0x240, 0xc40);
598
599 RND_(2a, F);
600
601 if (code[0] & 0x1) {
602 if (neg)
603 code[1] ^= 1 << 27;
604 } else
605 if (neg) {
606 code[1] |= 1 << 19;
607 }
608 }
609
610 void
611 CodeEmitterGK110::emitIMUL(const Instruction *i)
612 {
613 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
614 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
615
616 if (i->src(1).getFile() == FILE_IMMEDIATE) {
617 emitForm_L(i, 0x280, 2, Modifier(0));
618
619 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
620 code[1] |= 1 << 24;
621 if (i->sType == TYPE_S32)
622 code[1] |= 3 << 25;
623 } else {
624 emitForm_21(i, 0x21c, 0xc1c);
625
626 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
627 code[1] |= 1 << 10;
628 if (i->sType == TYPE_S32)
629 code[1] |= 3 << 11;
630 }
631 }
632
633 void
634 CodeEmitterGK110::emitFADD(const Instruction *i)
635 {
636 if (isLIMM(i->src(1), TYPE_F32)) {
637 assert(i->rnd == ROUND_N);
638 assert(!i->saturate);
639
640 Modifier mod = i->src(1).mod ^
641 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
642
643 emitForm_L(i, 0x400, 0, mod);
644
645 FTZ_(3a);
646 NEG_(3b, 0);
647 ABS_(39, 0);
648 } else {
649 emitForm_21(i, 0x22c, 0xc2c);
650
651 FTZ_(2f);
652 RND_(2a, F);
653 ABS_(31, 0);
654 NEG_(33, 0);
655 SAT_(35);
656
657 if (code[0] & 0x1) {
658 modNegAbsF32_3b(i, 1);
659 if (i->op == OP_SUB) code[1] ^= 1 << 27;
660 } else {
661 ABS_(34, 1);
662 NEG_(30, 1);
663 if (i->op == OP_SUB) code[1] ^= 1 << 16;
664 }
665 }
666 }
667
668 void
669 CodeEmitterGK110::emitDADD(const Instruction *i)
670 {
671 assert(!i->saturate);
672 assert(!i->ftz);
673
674 emitForm_21(i, 0x238, 0xc38);
675 RND_(2a, F);
676 ABS_(31, 0);
677 NEG_(33, 0);
678 if (code[0] & 0x1) {
679 modNegAbsF32_3b(i, 1);
680 if (i->op == OP_SUB) code[1] ^= 1 << 27;
681 } else {
682 NEG_(30, 1);
683 ABS_(34, 1);
684 if (i->op == OP_SUB) code[1] ^= 1 << 16;
685 }
686 }
687
688 void
689 CodeEmitterGK110::emitUADD(const Instruction *i)
690 {
691 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
692
693 if (i->op == OP_SUB)
694 addOp ^= 1;
695
696 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
697
698 if (isLIMM(i->src(1), TYPE_S32)) {
699 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
700
701 if (addOp & 2)
702 code[1] |= 1 << 27;
703
704 assert(!i->defExists(1));
705 assert(i->flagsSrc < 0);
706
707 SAT_(39);
708 } else {
709 emitForm_21(i, 0x208, 0xc08);
710
711 assert(addOp != 3); // would be add-plus-one
712
713 code[1] |= addOp << 19;
714
715 if (i->defExists(1))
716 code[1] |= 1 << 18; // write carry
717 if (i->flagsSrc >= 0)
718 code[1] |= 1 << 14; // add carry
719
720 SAT_(35);
721 }
722 }
723
724 // TODO: shl-add
725 void
726 CodeEmitterGK110::emitIMAD(const Instruction *i)
727 {
728 uint8_t addOp =
729 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
730
731 emitForm_21(i, 0x100, 0xa00);
732
733 assert(addOp != 3);
734 code[1] |= addOp << 26;
735
736 if (i->sType == TYPE_S32)
737 code[1] |= (1 << 19) | (1 << 24);
738
739 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
740 code[1] |= 1 << 25;
741
742 if (i->flagsDef >= 0) code[1] |= 1 << 18;
743 if (i->flagsSrc >= 0) code[1] |= 1 << 20;
744
745 SAT_(35);
746 }
747
748 void
749 CodeEmitterGK110::emitISAD(const Instruction *i)
750 {
751 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
752
753 emitForm_21(i, 0x1f4, 0xb74);
754
755 if (i->dType == TYPE_S32)
756 code[1] |= 1 << 19;
757 }
758
759 void
760 CodeEmitterGK110::emitNOT(const Instruction *i)
761 {
762 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
763 code[1] = 0x22003800;
764
765 emitPredicate(i);
766
767 defId(i->def(0), 2);
768
769 switch (i->src(0).getFile()) {
770 case FILE_GPR:
771 code[1] |= 0xc << 28;
772 srcId(i->src(0), 23);
773 break;
774 case FILE_MEMORY_CONST:
775 code[1] |= 0x4 << 28;
776 setCAddress14(i->src(0));
777 break;
778 default:
779 assert(0);
780 break;
781 }
782 }
783
784 void
785 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
786 {
787 if (i->def(0).getFile() == FILE_PREDICATE) {
788 code[0] = 0x00000002 | (subOp << 27);
789 code[1] = 0x84800000;
790
791 emitPredicate(i);
792
793 defId(i->def(0), 5);
794 srcId(i->src(0), 14);
795 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT)) code[0] |= 1 << 17;
796 srcId(i->src(1), 32);
797 if (i->src(1).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 3;
798
799 if (i->defExists(1)) {
800 defId(i->def(1), 2);
801 } else {
802 code[0] |= 7 << 2;
803 }
804 // (a OP b) OP c
805 if (i->predSrc != 2 && i->srcExists(2)) {
806 code[1] |= subOp << 16;
807 srcId(i->src(2), 42);
808 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT)) code[1] |= 1 << 13;
809 } else {
810 code[1] |= 7 << 10;
811 }
812 } else
813 if (isLIMM(i->src(1), TYPE_S32)) {
814 emitForm_L(i, 0x200, 0, i->src(1).mod);
815 code[1] |= subOp << 24;
816 NOT_(3a, 0);
817 } else {
818 emitForm_21(i, 0x220, 0xc20);
819 code[1] |= subOp << 12;
820 NOT_(2a, 0);
821 NOT_(2b, 1);
822 }
823 }
824
825 void
826 CodeEmitterGK110::emitPOPC(const Instruction *i)
827 {
828 assert(!isLIMM(i->src(1), TYPE_S32, true));
829
830 emitForm_21(i, 0x204, 0xc04);
831
832 NOT_(2a, 0);
833 if (!(code[0] & 0x1))
834 NOT_(2b, 1);
835 }
836
837 void
838 CodeEmitterGK110::emitINSBF(const Instruction *i)
839 {
840 emitForm_21(i, 0x1f8, 0xb78);
841 }
842
843 void
844 CodeEmitterGK110::emitEXTBF(const Instruction *i)
845 {
846 emitForm_21(i, 0x600, 0xc00);
847
848 if (i->dType == TYPE_S32)
849 code[1] |= 0x80000;
850 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
851 code[1] |= 0x800;
852 }
853
854 void
855 CodeEmitterGK110::emitBFIND(const Instruction *i)
856 {
857 emitForm_C(i, 0x218, 0x2);
858
859 if (i->dType == TYPE_S32)
860 code[1] |= 0x80000;
861 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
862 code[1] |= 0x800;
863 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
864 code[1] |= 0x1000;
865 }
866
867 void
868 CodeEmitterGK110::emitPERMT(const Instruction *i)
869 {
870 emitForm_21(i, 0x1e0, 0xb60);
871
872 code[1] |= i->subOp << 19;
873 }
874
875 void
876 CodeEmitterGK110::emitShift(const Instruction *i)
877 {
878 if (i->op == OP_SHR) {
879 emitForm_21(i, 0x214, 0xc14);
880 if (isSignedType(i->dType))
881 code[1] |= 1 << 19;
882 } else {
883 emitForm_21(i, 0x224, 0xc24);
884 }
885
886 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
887 code[1] |= 1 << 10;
888 }
889
890 void
891 CodeEmitterGK110::emitPreOp(const Instruction *i)
892 {
893 emitForm_C(i, 0x248, 0x2);
894
895 if (i->op == OP_PREEX2)
896 code[1] |= 1 << 10;
897
898 NEG_(30, 0);
899 ABS_(34, 0);
900 }
901
902 void
903 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
904 {
905 code[0] = 0x00000002 | (subOp << 23);
906 code[1] = 0x84000000;
907
908 emitPredicate(i);
909
910 defId(i->def(0), 2);
911 srcId(i->src(0), 10);
912
913 NEG_(33, 0);
914 ABS_(31, 0);
915 SAT_(35);
916 }
917
918 void
919 CodeEmitterGK110::emitMINMAX(const Instruction *i)
920 {
921 uint32_t op2, op1;
922
923 switch (i->dType) {
924 case TYPE_U32:
925 case TYPE_S32:
926 op2 = 0x210;
927 op1 = 0xc10;
928 break;
929 case TYPE_F32:
930 op2 = 0x230;
931 op1 = 0xc30;
932 break;
933 case TYPE_F64:
934 op2 = 0x228;
935 op1 = 0xc28;
936 break;
937 default:
938 assert(0);
939 op2 = 0;
940 op1 = 0;
941 break;
942 }
943 emitForm_21(i, op2, op1);
944
945 if (i->dType == TYPE_S32)
946 code[1] |= 1 << 19;
947 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
948
949 FTZ_(2f);
950 ABS_(31, 0);
951 NEG_(33, 0);
952 if (code[0] & 0x1) {
953 modNegAbsF32_3b(i, 1);
954 } else {
955 ABS_(34, 1);
956 NEG_(30, 1);
957 }
958 }
959
960 void
961 CodeEmitterGK110::emitCVT(const Instruction *i)
962 {
963 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
964 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
965 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
966
967 bool sat = i->saturate;
968 bool abs = i->src(0).mod.abs();
969 bool neg = i->src(0).mod.neg();
970
971 RoundMode rnd = i->rnd;
972
973 switch (i->op) {
974 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
975 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
976 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
977 case OP_SAT: sat = true; break;
978 case OP_NEG: neg = !neg; break;
979 case OP_ABS: abs = true; neg = false; break;
980 default:
981 break;
982 }
983
984 DataType dType;
985
986 if (i->op == OP_NEG && i->dType == TYPE_U32)
987 dType = TYPE_S32;
988 else
989 dType = i->dType;
990
991
992 uint32_t op;
993
994 if (f2f) op = 0x254;
995 else if (f2i) op = 0x258;
996 else if (i2f) op = 0x25c;
997 else op = 0x260;
998
999 emitForm_C(i, op, 0x2);
1000
1001 FTZ_(2f);
1002 if (neg) code[1] |= 1 << 16;
1003 if (abs) code[1] |= 1 << 20;
1004 if (sat) code[1] |= 1 << 21;
1005
1006 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
1007
1008 code[0] |= typeSizeofLog2(dType) << 10;
1009 code[0] |= typeSizeofLog2(i->sType) << 12;
1010 code[1] |= i->subOp << 12;
1011
1012 if (isSignedIntType(dType))
1013 code[0] |= 0x4000;
1014 if (isSignedIntType(i->sType))
1015 code[0] |= 0x8000;
1016 }
1017
1018 void
1019 CodeEmitterGK110::emitSET(const CmpInstruction *i)
1020 {
1021 uint16_t op1, op2;
1022
1023 if (i->def(0).getFile() == FILE_PREDICATE) {
1024 switch (i->sType) {
1025 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
1026 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1027 default:
1028 op2 = 0x1b0;
1029 op1 = 0xb30;
1030 break;
1031 }
1032 emitForm_21(i, op2, op1);
1033
1034 NEG_(2e, 0);
1035 ABS_(9, 0);
1036 if (!(code[0] & 0x1)) {
1037 NEG_(8, 1);
1038 ABS_(2f, 1);
1039 } else {
1040 modNegAbsF32_3b(i, 1);
1041 }
1042 FTZ_(32);
1043
1044 // normal DST field is negated predicate result
1045 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
1046 if (i->defExists(1))
1047 defId(i->def(1), 2);
1048 else
1049 code[0] |= 0x1c;
1050 } else {
1051 switch (i->sType) {
1052 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
1053 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
1054 default:
1055 op2 = 0x1a8;
1056 op1 = 0xb28;
1057 break;
1058 }
1059 emitForm_21(i, op2, op1);
1060
1061 NEG_(2e, 0);
1062 ABS_(39, 0);
1063 if (!(code[0] & 0x1)) {
1064 NEG_(38, 1);
1065 ABS_(2f, 1);
1066 } else {
1067 modNegAbsF32_3b(i, 1);
1068 }
1069 FTZ_(3a);
1070
1071 if (i->dType == TYPE_F32) {
1072 if (isFloatType(i->sType))
1073 code[1] |= 1 << 23;
1074 else
1075 code[1] |= 1 << 15;
1076 }
1077 }
1078 if (i->sType == TYPE_S32)
1079 code[1] |= 1 << 19;
1080
1081 if (i->op != OP_SET) {
1082 switch (i->op) {
1083 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1084 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1085 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1086 default:
1087 assert(0);
1088 break;
1089 }
1090 srcId(i->src(2), 0x2a);
1091 } else {
1092 code[1] |= 0x7 << 10;
1093 }
1094 emitCondCode(i->setCond,
1095 isFloatType(i->sType) ? 0x33 : 0x34,
1096 isFloatType(i->sType) ? 0xf : 0x7);
1097 }
1098
1099 void
1100 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1101 {
1102 CondCode cc = i->setCond;
1103 if (i->src(2).mod.neg())
1104 cc = reverseCondCode(cc);
1105
1106 if (i->dType == TYPE_F32) {
1107 emitForm_21(i, 0x1d0, 0xb50);
1108 FTZ_(32);
1109 emitCondCode(cc, 0x33, 0xf);
1110 } else {
1111 emitForm_21(i, 0x1a0, 0xb20);
1112 emitCondCode(cc, 0x34, 0x7);
1113 }
1114 }
1115
1116 static void
1117 selpFlip(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1118 {
1119 int loc = entry->loc;
1120 if (data.force_persample_interp)
1121 code[loc + 1] |= 1 << 13;
1122 else
1123 code[loc + 1] &= ~(1 << 13);
1124 }
1125
1126 void CodeEmitterGK110::emitSELP(const Instruction *i)
1127 {
1128 emitForm_21(i, 0x250, 0x050);
1129
1130 if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
1131 code[1] |= 1 << 13;
1132
1133 if (i->subOp == 1) {
1134 addInterp(0, 0, selpFlip);
1135 }
1136 }
1137
1138 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1139 {
1140 code[0] = 0x0000003e | (i->subOp << 23);
1141 code[1] = 0x77000000;
1142
1143 emitPredicate(i);
1144 }
1145
1146 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1147 {
1148 code[0] = 0x00000002;
1149 code[1] = 0x76c00000;
1150
1151 code[1] |= i->tex.r << 9;
1152 // code[1] |= i->tex.s << (9 + 8);
1153
1154 if (i->tex.liveOnly)
1155 code[0] |= 0x80000000;
1156
1157 defId(i->def(0), 2);
1158 srcId(i->src(0), 10);
1159 }
1160
1161 static inline bool
1162 isNextIndependentTex(const TexInstruction *i)
1163 {
1164 if (!i->next || !isTextureOp(i->next->op))
1165 return false;
1166 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1167 return false;
1168 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1169 }
1170
1171 void
1172 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1173 {
1174 const bool ind = i->tex.rIndirectSrc >= 0;
1175
1176 if (ind) {
1177 code[0] = 0x00000002;
1178 switch (i->op) {
1179 case OP_TXD:
1180 code[1] = 0x7e000000;
1181 break;
1182 case OP_TXLQ:
1183 code[1] = 0x7e800000;
1184 break;
1185 case OP_TXF:
1186 code[1] = 0x78000000;
1187 break;
1188 case OP_TXG:
1189 code[1] = 0x7dc00000;
1190 break;
1191 default:
1192 code[1] = 0x7d800000;
1193 break;
1194 }
1195 } else {
1196 switch (i->op) {
1197 case OP_TXD:
1198 code[0] = 0x00000002;
1199 code[1] = 0x76000000;
1200 code[1] |= i->tex.r << 9;
1201 break;
1202 case OP_TXLQ:
1203 code[0] = 0x00000002;
1204 code[1] = 0x76800000;
1205 code[1] |= i->tex.r << 9;
1206 break;
1207 case OP_TXF:
1208 code[0] = 0x00000002;
1209 code[1] = 0x70000000;
1210 code[1] |= i->tex.r << 13;
1211 break;
1212 case OP_TXG:
1213 code[0] = 0x00000001;
1214 code[1] = 0x70000000;
1215 code[1] |= i->tex.r << 15;
1216 break;
1217 default:
1218 code[0] = 0x00000001;
1219 code[1] = 0x60000000;
1220 code[1] |= i->tex.r << 15;
1221 break;
1222 }
1223 }
1224
1225 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1226
1227 if (i->tex.liveOnly)
1228 code[0] |= 0x80000000;
1229
1230 switch (i->op) {
1231 case OP_TEX: break;
1232 case OP_TXB: code[1] |= 0x2000; break;
1233 case OP_TXL: code[1] |= 0x3000; break;
1234 case OP_TXF: break;
1235 case OP_TXG: break;
1236 case OP_TXD: break;
1237 case OP_TXLQ: break;
1238 default:
1239 assert(!"invalid texture op");
1240 break;
1241 }
1242
1243 if (i->op == OP_TXF) {
1244 if (!i->tex.levelZero)
1245 code[1] |= 0x1000;
1246 } else
1247 if (i->tex.levelZero) {
1248 code[1] |= 0x1000;
1249 }
1250
1251 if (i->op != OP_TXD && i->tex.derivAll)
1252 code[1] |= 0x200;
1253
1254 emitPredicate(i);
1255
1256 code[1] |= i->tex.mask << 2;
1257
1258 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1259
1260 defId(i->def(0), 2);
1261 srcId(i->src(0), 10);
1262 srcId(i, src1, 23);
1263
1264 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1265
1266 // texture target:
1267 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1268 if (i->tex.target.isArray())
1269 code[1] |= 0x40;
1270 if (i->tex.target.isShadow())
1271 code[1] |= 0x400;
1272 if (i->tex.target == TEX_TARGET_2D_MS ||
1273 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1274 code[1] |= 0x800;
1275
1276 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1277 // ?
1278 }
1279
1280 if (i->tex.useOffsets == 1) {
1281 switch (i->op) {
1282 case OP_TXF: code[1] |= 0x200; break;
1283 case OP_TXD: code[1] |= 0x00400000; break;
1284 default: code[1] |= 0x800; break;
1285 }
1286 }
1287 if (i->tex.useOffsets == 4)
1288 code[1] |= 0x1000;
1289 }
1290
1291 void
1292 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1293 {
1294 code[0] = 0x00000002;
1295 code[1] = 0x75400001;
1296
1297 switch (i->tex.query) {
1298 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1299 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1300 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1301 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1302 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1303 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1304 default:
1305 assert(!"invalid texture query");
1306 break;
1307 }
1308
1309 code[1] |= i->tex.mask << 2;
1310 code[1] |= i->tex.r << 9;
1311 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1312 code[1] |= 0x08000000;
1313
1314 defId(i->def(0), 2);
1315 srcId(i->src(0), 10);
1316
1317 emitPredicate(i);
1318 }
1319
1320 void
1321 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1322 {
1323 code[0] = 0x00000002 | ((qOp & 1) << 31);
1324 code[1] = 0x7fc00200 | (qOp >> 1) | (laneMask << 12); // dall
1325
1326 defId(i->def(0), 2);
1327 srcId(i->src(0), 10);
1328 srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
1329
1330 emitPredicate(i);
1331 }
1332
1333 void
1334 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1335 {
1336 emitForm_L(i, 0x7f4, 2, Modifier(0));
1337 code[1] |= i->subOp << 2;
1338 code[1] |= 0x00070000;
1339 }
1340
1341 void
1342 CodeEmitterGK110::emitBAR(const Instruction *i)
1343 {
1344 code[0] = 0x00000002;
1345 code[1] = 0x85400000;
1346
1347 switch (i->subOp) {
1348 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1349 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1350 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1351 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1352 default:
1353 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1354 break;
1355 }
1356
1357 emitPredicate(i);
1358
1359 // barrier id
1360 if (i->src(0).getFile() == FILE_GPR) {
1361 srcId(i->src(0), 10);
1362 } else {
1363 ImmediateValue *imm = i->getSrc(0)->asImm();
1364 assert(imm);
1365 code[0] |= imm->reg.data.u32 << 10;
1366 code[1] |= 0x8000;
1367 }
1368
1369 // thread count
1370 if (i->src(1).getFile() == FILE_GPR) {
1371 srcId(i->src(1), 23);
1372 } else {
1373 ImmediateValue *imm = i->getSrc(0)->asImm();
1374 assert(imm);
1375 assert(imm->reg.data.u32 <= 0xfff);
1376 code[0] |= imm->reg.data.u32 << 23;
1377 code[1] |= imm->reg.data.u32 >> 9;
1378 code[1] |= 0x4000;
1379 }
1380
1381 if (i->srcExists(2) && (i->predSrc != 2)) {
1382 srcId(i->src(2), 32 + 10);
1383 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1384 code[1] |= 1 << 13;
1385 } else {
1386 code[1] |= 7 << 10;
1387 }
1388 }
1389
1390 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1391 {
1392 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1393 code[1] = 0x7cc00000;
1394
1395 emitPredicate(i);
1396 }
1397
1398 void
1399 CodeEmitterGK110::emitFlow(const Instruction *i)
1400 {
1401 const FlowInstruction *f = i->asFlow();
1402
1403 unsigned mask; // bit 0: predicate, bit 1: target
1404
1405 code[0] = 0x00000000;
1406
1407 switch (i->op) {
1408 case OP_BRA:
1409 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1410 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1411 code[0] |= 0x80;
1412 mask = 3;
1413 break;
1414 case OP_CALL:
1415 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1416 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1417 code[0] |= 0x80;
1418 mask = 2;
1419 break;
1420
1421 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1422 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1423 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1424 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1425 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1426
1427 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1428 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1429 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1430 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1431
1432 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1433 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1434 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1435 default:
1436 assert(!"invalid flow operation");
1437 return;
1438 }
1439
1440 if (mask & 1) {
1441 emitPredicate(i);
1442 if (i->flagsSrc < 0)
1443 code[0] |= 0x3c;
1444 }
1445
1446 if (!f)
1447 return;
1448
1449 if (f->allWarp)
1450 code[0] |= 1 << 9;
1451 if (f->limit)
1452 code[0] |= 1 << 8;
1453
1454 if (f->op == OP_CALL) {
1455 if (f->builtin) {
1456 assert(f->absolute);
1457 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1458 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1459 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1460 } else {
1461 assert(!f->absolute);
1462 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1463 code[0] |= (pcRel & 0x1ff) << 23;
1464 code[1] |= (pcRel >> 9) & 0x7fff;
1465 }
1466 } else
1467 if (mask & 2) {
1468 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1469 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1470 pcRel += 8;
1471 // currently we don't want absolute branches
1472 assert(!f->absolute);
1473 code[0] |= (pcRel & 0x1ff) << 23;
1474 code[1] |= (pcRel >> 9) & 0x7fff;
1475 }
1476 }
1477
1478 void
1479 CodeEmitterGK110::emitVOTE(const Instruction *i)
1480 {
1481 assert(i->src(0).getFile() == FILE_PREDICATE);
1482
1483 code[0] = 0x00000002;
1484 code[1] = 0x86c00000 | (i->subOp << 19);
1485
1486 emitPredicate(i);
1487
1488 unsigned rp = 0;
1489 for (int d = 0; i->defExists(d); d++) {
1490 if (i->def(d).getFile() == FILE_PREDICATE) {
1491 assert(!(rp & 2));
1492 rp |= 2;
1493 defId(i->def(d), 48);
1494 } else if (i->def(d).getFile() == FILE_GPR) {
1495 assert(!(rp & 1));
1496 rp |= 1;
1497 defId(i->def(d), 2);
1498 } else {
1499 assert(!"Unhandled def");
1500 }
1501 }
1502 if (!(rp & 1))
1503 code[0] |= 255 << 2;
1504 if (!(rp & 2))
1505 code[1] |= 7 << 16;
1506 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
1507 code[1] |= 1 << 13;
1508 srcId(i->src(0), 42);
1509 }
1510
1511 void
1512 CodeEmitterGK110::emitSUGType(DataType ty, const int pos)
1513 {
1514 uint8_t n = 0;
1515
1516 switch (ty) {
1517 case TYPE_S32: n = 1; break;
1518 case TYPE_U8: n = 2; break;
1519 case TYPE_S8: n = 3; break;
1520 default:
1521 assert(ty == TYPE_U32);
1522 break;
1523 }
1524 code[pos / 32] |= n << (pos % 32);
1525 }
1526
1527 void
1528 CodeEmitterGK110::emitSUCachingMode(CacheMode c)
1529 {
1530 uint8_t n = 0;
1531
1532 switch (c) {
1533 case CACHE_CA:
1534 // case CACHE_WB:
1535 n = 0;
1536 break;
1537 case CACHE_CG:
1538 n = 1;
1539 break;
1540 case CACHE_CS:
1541 n = 2;
1542 break;
1543 case CACHE_CV:
1544 // case CACHE_WT:
1545 n = 3;
1546 break;
1547 default:
1548 assert(!"invalid caching mode");
1549 break;
1550 }
1551 code[0] |= (n & 1) << 31;
1552 code[1] |= (n & 2) >> 1;
1553 }
1554
1555 void
1556 CodeEmitterGK110::setSUConst16(const Instruction *i, const int s)
1557 {
1558 const uint32_t offset = i->getSrc(s)->reg.data.offset;
1559
1560 assert(offset == (offset & 0xfffc));
1561
1562 code[0] |= offset << 21;
1563 code[1] |= offset >> 11;
1564 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
1565 }
1566
1567 void
1568 CodeEmitterGK110::emitSULDGB(const TexInstruction *i)
1569 {
1570 code[0] = 0x00000002;
1571 code[1] = 0x30000000 | (i->subOp << 14);
1572
1573 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1574 emitLoadStoreType(i->dType, 0x38);
1575 emitCachingMode(i->cache, 0x36);
1576
1577 // format
1578 setSUConst16(i, 1);
1579 } else {
1580 assert(i->src(1).getFile() == FILE_GPR);
1581 code[1] |= 0x49800000;
1582
1583 emitLoadStoreType(i->dType, 0x21);
1584 emitSUCachingMode(i->cache);
1585
1586 srcId(i->src(1), 23);
1587 }
1588
1589 emitSUGType(i->sType, 0x34);
1590
1591 emitPredicate(i);
1592 defId(i->def(0), 2); // destination
1593 srcId(i->src(0), 10); // address
1594
1595 // surface predicate
1596 if (!i->srcExists(2) || (i->predSrc == 2)) {
1597 code[1] |= 0x7 << 10;
1598 } else {
1599 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1600 code[1] |= 1 << 13;
1601 srcId(i->src(2), 32 + 10);
1602 }
1603 }
1604
1605 void
1606 CodeEmitterGK110::emitSUSTGx(const TexInstruction *i)
1607 {
1608 assert(i->op == OP_SUSTP);
1609
1610 code[0] = 0x00000002;
1611 code[1] = 0x38000000;
1612
1613 if (i->src(1).getFile() == FILE_MEMORY_CONST) {
1614 code[0] |= i->subOp << 2;
1615
1616 if (i->op == OP_SUSTP)
1617 code[0] |= i->tex.mask << 4;
1618
1619 emitSUGType(i->sType, 0x8);
1620 emitCachingMode(i->cache, 0x36);
1621
1622 // format
1623 setSUConst16(i, 1);
1624 } else {
1625 assert(i->src(1).getFile() == FILE_GPR);
1626
1627 code[0] |= i->subOp << 23;
1628 code[1] |= 0x41c00000;
1629
1630 if (i->op == OP_SUSTP)
1631 code[0] |= i->tex.mask << 25;
1632
1633 emitSUGType(i->sType, 0x1d);
1634 emitSUCachingMode(i->cache);
1635
1636 srcId(i->src(1), 2);
1637 }
1638
1639 emitPredicate(i);
1640 srcId(i->src(0), 10); // address
1641 srcId(i->src(3), 42); // values
1642
1643 // surface predicate
1644 if (!i->srcExists(2) || (i->predSrc == 2)) {
1645 code[1] |= 0x7 << 18;
1646 } else {
1647 if (i->src(2).mod == Modifier(NV50_IR_MOD_NOT))
1648 code[1] |= 1 << 21;
1649 srcId(i->src(2), 32 + 18);
1650 }
1651 }
1652
1653 void
1654 CodeEmitterGK110::emitSUCLAMPMode(uint16_t subOp)
1655 {
1656 uint8_t m;
1657 switch (subOp & ~NV50_IR_SUBOP_SUCLAMP_2D) {
1658 case NV50_IR_SUBOP_SUCLAMP_SD(0, 1): m = 0; break;
1659 case NV50_IR_SUBOP_SUCLAMP_SD(1, 1): m = 1; break;
1660 case NV50_IR_SUBOP_SUCLAMP_SD(2, 1): m = 2; break;
1661 case NV50_IR_SUBOP_SUCLAMP_SD(3, 1): m = 3; break;
1662 case NV50_IR_SUBOP_SUCLAMP_SD(4, 1): m = 4; break;
1663 case NV50_IR_SUBOP_SUCLAMP_PL(0, 1): m = 5; break;
1664 case NV50_IR_SUBOP_SUCLAMP_PL(1, 1): m = 6; break;
1665 case NV50_IR_SUBOP_SUCLAMP_PL(2, 1): m = 7; break;
1666 case NV50_IR_SUBOP_SUCLAMP_PL(3, 1): m = 8; break;
1667 case NV50_IR_SUBOP_SUCLAMP_PL(4, 1): m = 9; break;
1668 case NV50_IR_SUBOP_SUCLAMP_BL(0, 1): m = 10; break;
1669 case NV50_IR_SUBOP_SUCLAMP_BL(1, 1): m = 11; break;
1670 case NV50_IR_SUBOP_SUCLAMP_BL(2, 1): m = 12; break;
1671 case NV50_IR_SUBOP_SUCLAMP_BL(3, 1): m = 13; break;
1672 case NV50_IR_SUBOP_SUCLAMP_BL(4, 1): m = 14; break;
1673 default:
1674 return;
1675 }
1676 code[1] |= m << 20;
1677 if (subOp & NV50_IR_SUBOP_SUCLAMP_2D)
1678 code[1] |= 1 << 24;
1679 }
1680
1681 void
1682 CodeEmitterGK110::emitSUCalc(Instruction *i)
1683 {
1684 ImmediateValue *imm = NULL;
1685 uint64_t opc1, opc2;
1686
1687 if (i->srcExists(2)) {
1688 imm = i->getSrc(2)->asImm();
1689 if (imm)
1690 i->setSrc(2, NULL); // special case, make emitForm_21 not assert
1691 }
1692
1693 switch (i->op) {
1694 case OP_SUCLAMP: opc1 = 0xb00; opc2 = 0x580; break;
1695 case OP_SUBFM: opc1 = 0xb68; opc2 = 0x1e8; break;
1696 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1697 default:
1698 assert(0);
1699 return;
1700 }
1701 emitForm_21(i, opc2, opc1);
1702
1703 if (i->op == OP_SUCLAMP) {
1704 if (i->dType == TYPE_S32)
1705 code[1] |= 1 << 19;
1706 emitSUCLAMPMode(i->subOp);
1707 }
1708
1709 if (i->op == OP_SUBFM && i->subOp == NV50_IR_SUBOP_SUBFM_3D)
1710 code[1] |= 1 << 18;
1711
1712 if (i->op != OP_SUEAU) {
1713 const uint8_t pos = i->op == OP_SUBFM ? 19 : 16;
1714 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
1715 code[0] |= 255 << 2;
1716 code[1] |= i->getDef(1)->reg.data.id << pos;
1717 } else
1718 if (i->defExists(1)) { // r, p
1719 assert(i->def(1).getFile() == FILE_PREDICATE);
1720 code[1] |= i->getDef(1)->reg.data.id << pos;
1721 } else { // r, #
1722 code[1] |= 7 << pos;
1723 }
1724 }
1725
1726 if (imm) {
1727 assert(i->op == OP_SUCLAMP);
1728 i->setSrc(2, imm);
1729 code[1] |= (imm->reg.data.u32 & 0x3f) << 10; // sint6
1730 }
1731 }
1732
1733
1734 void
1735 CodeEmitterGK110::emitVectorSubOp(const Instruction *i)
1736 {
1737 switch (NV50_IR_SUBOP_Vn(i->subOp)) {
1738 case 0:
1739 code[1] |= (i->subOp & 0x000f) << 7; // vsrc1
1740 code[1] |= (i->subOp & 0x00e0) >> 6; // vsrc2
1741 code[1] |= (i->subOp & 0x0100) << 13; // vsrc2
1742 code[1] |= (i->subOp & 0x3c00) << 12; // vdst
1743 break;
1744 default:
1745 assert(0);
1746 break;
1747 }
1748 }
1749
1750 void
1751 CodeEmitterGK110::emitVSHL(const Instruction *i)
1752 {
1753 code[0] = 0x00000002;
1754 code[1] = 0xb8000000;
1755
1756 assert(NV50_IR_SUBOP_Vn(i->subOp) == 0);
1757
1758 if (isSignedType(i->dType)) code[1] |= 1 << 25;
1759 if (isSignedType(i->sType)) code[1] |= 1 << 19;
1760
1761 emitVectorSubOp(i);
1762
1763 emitPredicate(i);
1764 defId(i->def(0), 2);
1765 srcId(i->src(0), 10);
1766
1767 if (i->getSrc(1)->reg.file == FILE_IMMEDIATE) {
1768 ImmediateValue *imm = i->getSrc(1)->asImm();
1769 assert(imm);
1770 code[0] |= (imm->reg.data.u32 & 0x01ff) << 23;
1771 code[1] |= (imm->reg.data.u32 & 0xfe00) >> 9;
1772 } else {
1773 assert(i->getSrc(1)->reg.file == FILE_GPR);
1774 code[1] |= 1 << 21;
1775 srcId(i->src(1), 23);
1776 }
1777 srcId(i->src(2), 42);
1778
1779 if (i->saturate)
1780 code[0] |= 1 << 22;
1781 if (i->flagsDef >= 0)
1782 code[1] |= 1 << 18;
1783 }
1784
1785 void
1786 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1787 {
1788 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1789
1790 code[0] = 0x00000002 | (offset << 23);
1791 code[1] = 0x7d000000 | (offset >> 9);
1792
1793 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1794 code[1] |= 0x8;
1795
1796 emitPredicate(i);
1797
1798 defId(i->def(0), 2);
1799 srcId(i->src(0).getIndirect(0), 10);
1800 }
1801
1802 void
1803 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1804 {
1805 uint32_t prim = i->src(0).get()->reg.data.u32;
1806
1807 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1808 code[1] = 0x7f800000;
1809
1810 emitPredicate(i);
1811
1812 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1813
1814 defId(i->def(0), 2);
1815 srcId(i, src1, 10);
1816 }
1817
1818 void
1819 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1820 {
1821 unsigned int size = typeSizeof(i->dType);
1822 uint32_t offset = i->src(0).get()->reg.data.offset;
1823
1824 code[0] = 0x00000002 | (offset << 23);
1825 code[1] = 0x7ec00000 | (offset >> 9);
1826 code[1] |= (size / 4 - 1) << 18;
1827
1828 if (i->perPatch)
1829 code[1] |= 0x4;
1830 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1831 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1832
1833 emitPredicate(i);
1834
1835 defId(i->def(0), 2);
1836 srcId(i->src(0).getIndirect(0), 10);
1837 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1838 }
1839
1840 void
1841 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1842 {
1843 unsigned int size = typeSizeof(i->dType);
1844 uint32_t offset = i->src(0).get()->reg.data.offset;
1845
1846 code[0] = 0x00000002 | (offset << 23);
1847 code[1] = 0x7f000000 | (offset >> 9);
1848 code[1] |= (size / 4 - 1) << 18;
1849
1850 if (i->perPatch)
1851 code[1] |= 0x4;
1852
1853 emitPredicate(i);
1854
1855 assert(i->src(1).getFile() == FILE_GPR);
1856
1857 srcId(i->src(0).getIndirect(0), 10);
1858 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1859 srcId(i->src(1), 2);
1860 }
1861
1862 void
1863 CodeEmitterGK110::emitOUT(const Instruction *i)
1864 {
1865 assert(i->src(0).getFile() == FILE_GPR);
1866
1867 emitForm_21(i, 0x1f0, 0xb70);
1868
1869 if (i->op == OP_EMIT)
1870 code[1] |= 1 << 10;
1871 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1872 code[1] |= 1 << 11;
1873 }
1874
1875 void
1876 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1877 {
1878 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1879 code[1] |= (i->ipa & 0xc) << (19 - 2);
1880 }
1881
1882 static void
1883 interpApply(const FixupEntry *entry, uint32_t *code, const FixupData& data)
1884 {
1885 int ipa = entry->ipa;
1886 int reg = entry->reg;
1887 int loc = entry->loc;
1888
1889 if (data.flatshade &&
1890 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1891 ipa = NV50_IR_INTERP_FLAT;
1892 reg = 0xff;
1893 } else if (data.force_persample_interp &&
1894 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1895 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1896 ipa |= NV50_IR_INTERP_CENTROID;
1897 }
1898 code[loc + 1] &= ~(0xf << 19);
1899 code[loc + 1] |= (ipa & 0x3) << 21;
1900 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1901 code[loc + 0] &= ~(0xff << 23);
1902 code[loc + 0] |= reg << 23;
1903 }
1904
1905 void
1906 CodeEmitterGK110::emitINTERP(const Instruction *i)
1907 {
1908 const uint32_t base = i->getSrc(0)->reg.data.offset;
1909
1910 code[0] = 0x00000002 | (base << 31);
1911 code[1] = 0x74800000 | (base >> 1);
1912
1913 if (i->saturate)
1914 code[1] |= 1 << 18;
1915
1916 if (i->op == OP_PINTERP) {
1917 srcId(i->src(1), 23);
1918 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1919 } else {
1920 code[0] |= 0xff << 23;
1921 addInterp(i->ipa, 0xff, interpApply);
1922 }
1923
1924 srcId(i->src(0).getIndirect(0), 10);
1925 emitInterpMode(i);
1926
1927 emitPredicate(i);
1928 defId(i->def(0), 2);
1929
1930 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1931 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1932 else
1933 code[1] |= 0xff << 10;
1934 }
1935
1936 void
1937 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1938 {
1939 uint8_t n;
1940
1941 switch (ty) {
1942 case TYPE_U8:
1943 n = 0;
1944 break;
1945 case TYPE_S8:
1946 n = 1;
1947 break;
1948 case TYPE_U16:
1949 n = 2;
1950 break;
1951 case TYPE_S16:
1952 n = 3;
1953 break;
1954 case TYPE_F32:
1955 case TYPE_U32:
1956 case TYPE_S32:
1957 n = 4;
1958 break;
1959 case TYPE_F64:
1960 case TYPE_U64:
1961 case TYPE_S64:
1962 n = 5;
1963 break;
1964 case TYPE_B128:
1965 n = 6;
1966 break;
1967 default:
1968 n = 0;
1969 assert(!"invalid ld/st type");
1970 break;
1971 }
1972 code[pos / 32] |= n << (pos % 32);
1973 }
1974
1975 void
1976 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1977 {
1978 uint8_t n;
1979
1980 switch (c) {
1981 case CACHE_CA:
1982 // case CACHE_WB:
1983 n = 0;
1984 break;
1985 case CACHE_CG:
1986 n = 1;
1987 break;
1988 case CACHE_CS:
1989 n = 2;
1990 break;
1991 case CACHE_CV:
1992 // case CACHE_WT:
1993 n = 3;
1994 break;
1995 default:
1996 n = 0;
1997 assert(!"invalid caching mode");
1998 break;
1999 }
2000 code[pos / 32] |= n << (pos % 32);
2001 }
2002
2003 void
2004 CodeEmitterGK110::emitSTORE(const Instruction *i)
2005 {
2006 int32_t offset = SDATA(i->src(0)).offset;
2007
2008 switch (i->src(0).getFile()) {
2009 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
2010 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
2011 case FILE_MEMORY_SHARED:
2012 code[0] = 0x00000002;
2013 if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
2014 code[1] = 0x78400000;
2015 else
2016 code[1] = 0x7ac00000;
2017 break;
2018 default:
2019 assert(!"invalid memory file");
2020 break;
2021 }
2022
2023 if (code[0] & 0x2) {
2024 offset &= 0xffffff;
2025 emitLoadStoreType(i->dType, 0x33);
2026 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2027 emitCachingMode(i->cache, 0x2f);
2028 } else {
2029 emitLoadStoreType(i->dType, 0x38);
2030 emitCachingMode(i->cache, 0x3b);
2031 }
2032 code[0] |= offset << 23;
2033 code[1] |= offset >> 9;
2034
2035 // Unlocked store on shared memory can fail.
2036 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2037 i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
2038 assert(i->defExists(0));
2039 defId(i->def(0), 32 + 16);
2040 }
2041
2042 emitPredicate(i);
2043
2044 srcId(i->src(1), 2);
2045 srcId(i->src(0).getIndirect(0), 10);
2046 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2047 i->src(0).isIndirect(0) &&
2048 i->getIndirect(0, 0)->reg.size == 8)
2049 code[1] |= 1 << 23;
2050 }
2051
2052 void
2053 CodeEmitterGK110::emitLOAD(const Instruction *i)
2054 {
2055 int32_t offset = SDATA(i->src(0)).offset;
2056
2057 switch (i->src(0).getFile()) {
2058 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
2059 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
2060 case FILE_MEMORY_SHARED:
2061 code[0] = 0x00000002;
2062 if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
2063 code[1] = 0x77400000;
2064 else
2065 code[1] = 0x7a400000;
2066 break;
2067 case FILE_MEMORY_CONST:
2068 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
2069 emitMOV(i);
2070 return;
2071 }
2072 offset &= 0xffff;
2073 code[0] = 0x00000002;
2074 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
2075 code[1] |= i->subOp << 15;
2076 break;
2077 default:
2078 assert(!"invalid memory file");
2079 break;
2080 }
2081
2082 if (code[0] & 0x2) {
2083 offset &= 0xffffff;
2084 emitLoadStoreType(i->dType, 0x33);
2085 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
2086 emitCachingMode(i->cache, 0x2f);
2087 } else {
2088 emitLoadStoreType(i->dType, 0x38);
2089 emitCachingMode(i->cache, 0x3b);
2090 }
2091 code[0] |= offset << 23;
2092 code[1] |= offset >> 9;
2093
2094 // Locked store on shared memory can fail.
2095 int r = 0, p = -1;
2096 if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
2097 i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
2098 if (i->def(0).getFile() == FILE_PREDICATE) { // p, #
2099 r = -1;
2100 p = 0;
2101 } else if (i->defExists(1)) { // r, p
2102 p = 1;
2103 } else {
2104 assert(!"Expected predicate dest for load locked");
2105 }
2106 }
2107
2108 emitPredicate(i);
2109
2110 if (r >= 0)
2111 defId(i->def(r), 2);
2112 else
2113 code[0] |= 255 << 2;
2114
2115 if (p >= 0)
2116 defId(i->def(p), 32 + 16);
2117
2118 if (i->getIndirect(0, 0)) {
2119 srcId(i->src(0).getIndirect(0), 10);
2120 if (i->getIndirect(0, 0)->reg.size == 8)
2121 code[1] |= 1 << 23;
2122 } else {
2123 code[0] |= 255 << 10;
2124 }
2125 }
2126
2127 uint8_t
2128 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
2129 {
2130 switch (SDATA(ref).sv.sv) {
2131 case SV_LANEID: return 0x00;
2132 case SV_PHYSID: return 0x03;
2133 case SV_VERTEX_COUNT: return 0x10;
2134 case SV_INVOCATION_ID: return 0x11;
2135 case SV_YDIR: return 0x12;
2136 case SV_THREAD_KILL: return 0x13;
2137 case SV_TID: return 0x21 + SDATA(ref).sv.index;
2138 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
2139 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
2140 case SV_GRIDID: return 0x2c;
2141 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
2142 case SV_LBASE: return 0x34;
2143 case SV_SBASE: return 0x30;
2144 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
2145 default:
2146 assert(!"no sreg for system value");
2147 return 0;
2148 }
2149 }
2150
2151 void
2152 CodeEmitterGK110::emitMOV(const Instruction *i)
2153 {
2154 if (i->def(0).getFile() == FILE_PREDICATE) {
2155 if (i->src(0).getFile() == FILE_GPR) {
2156 // Use ISETP.NE.AND dst, PT, src, RZ, PT
2157 code[0] = 0x00000002;
2158 code[1] = 0xdb500000;
2159
2160 code[0] |= 0x7 << 2;
2161 code[0] |= 0xff << 23;
2162 code[1] |= 0x7 << 10;
2163 srcId(i->src(0), 10);
2164 } else
2165 if (i->src(0).getFile() == FILE_PREDICATE) {
2166 // Use PSETP.AND.AND dst, PT, src, PT, PT
2167 code[0] = 0x00000002;
2168 code[1] = 0x84800000;
2169
2170 code[0] |= 0x7 << 2;
2171 code[1] |= 0x7 << 0;
2172 code[1] |= 0x7 << 10;
2173
2174 srcId(i->src(0), 14);
2175 } else {
2176 assert(!"Unexpected source for predicate destination");
2177 emitNOP(i);
2178 }
2179 emitPredicate(i);
2180 defId(i->def(0), 5);
2181 } else
2182 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
2183 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
2184 code[1] = 0x86400000;
2185 emitPredicate(i);
2186 defId(i->def(0), 2);
2187 } else
2188 if (i->src(0).getFile() == FILE_IMMEDIATE) {
2189 code[0] = 0x00000002 | (i->lanes << 14);
2190 code[1] = 0x74000000;
2191 emitPredicate(i);
2192 defId(i->def(0), 2);
2193 setImmediate32(i, 0, Modifier(0));
2194 } else
2195 if (i->src(0).getFile() == FILE_PREDICATE) {
2196 code[0] = 0x00000002;
2197 code[1] = 0x84401c07;
2198 emitPredicate(i);
2199 defId(i->def(0), 2);
2200 srcId(i->src(0), 14);
2201 } else {
2202 emitForm_C(i, 0x24c, 2);
2203 code[1] |= i->lanes << 10;
2204 }
2205 }
2206
2207 static inline bool
2208 uses64bitAddress(const Instruction *ldst)
2209 {
2210 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
2211 ldst->src(0).isIndirect(0) &&
2212 ldst->getIndirect(0, 0)->reg.size == 8;
2213 }
2214
2215 void
2216 CodeEmitterGK110::emitATOM(const Instruction *i)
2217 {
2218 const bool hasDst = i->defExists(0);
2219 const bool exch = i->subOp == NV50_IR_SUBOP_ATOM_EXCH;
2220
2221 code[0] = 0x00000002;
2222 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
2223 code[1] = 0x77800000;
2224 else
2225 code[1] = 0x68000000;
2226
2227 switch (i->subOp) {
2228 case NV50_IR_SUBOP_ATOM_CAS: break;
2229 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
2230 default: code[1] |= i->subOp << 23; break;
2231 }
2232
2233 switch (i->dType) {
2234 case TYPE_U32: break;
2235 case TYPE_S32: code[1] |= 0x00100000; break;
2236 case TYPE_U64: code[1] |= 0x00200000; break;
2237 case TYPE_F32: code[1] |= 0x00300000; break;
2238 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
2239 case TYPE_S64: code[1] |= 0x00500000; break;
2240 default: assert(!"unsupported type"); break;
2241 }
2242
2243 emitPredicate(i);
2244
2245 /* TODO: cas: check that src regs line up */
2246 /* TODO: cas: flip bits if $r255 is used */
2247 srcId(i->src(1), 23);
2248
2249 if (hasDst) {
2250 defId(i->def(0), 2);
2251 } else
2252 if (!exch) {
2253 code[0] |= 255 << 2;
2254 }
2255
2256 if (hasDst || !exch) {
2257 const int32_t offset = SDATA(i->src(0)).offset;
2258 assert(offset < 0x80000 && offset >= -0x80000);
2259 code[0] |= (offset & 1) << 31;
2260 code[1] |= (offset & 0xffffe) >> 1;
2261 } else {
2262 srcAddr32(i->src(0), 31);
2263 }
2264
2265 if (i->getIndirect(0, 0)) {
2266 srcId(i->getIndirect(0, 0), 10);
2267 if (i->getIndirect(0, 0)->reg.size == 8)
2268 code[1] |= 1 << 19;
2269 } else {
2270 code[0] |= 255 << 10;
2271 }
2272 }
2273
2274 void
2275 CodeEmitterGK110::emitCCTL(const Instruction *i)
2276 {
2277 int32_t offset = SDATA(i->src(0)).offset;
2278
2279 code[0] = 0x00000002 | (i->subOp << 2);
2280
2281 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
2282 code[1] = 0x7b000000;
2283 } else {
2284 code[1] = 0x7c000000;
2285 offset &= 0xffffff;
2286 }
2287 code[0] |= offset << 23;
2288 code[1] |= offset >> 9;
2289
2290 if (uses64bitAddress(i))
2291 code[1] |= 1 << 23;
2292 srcId(i->src(0).getIndirect(0), 10);
2293
2294 emitPredicate(i);
2295 }
2296
2297 bool
2298 CodeEmitterGK110::emitInstruction(Instruction *insn)
2299 {
2300 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
2301
2302 if (insn->encSize != 8) {
2303 ERROR("skipping unencodable instruction: ");
2304 insn->print();
2305 return false;
2306 } else
2307 if (codeSize + size > codeSizeLimit) {
2308 ERROR("code emitter output buffer too small\n");
2309 return false;
2310 }
2311
2312 if (writeIssueDelays) {
2313 int id = (codeSize & 0x3f) / 8 - 1;
2314 if (id < 0) {
2315 id += 1;
2316 code[0] = 0x00000000; // cf issue delay "instruction"
2317 code[1] = 0x08000000;
2318 code += 2;
2319 codeSize += 8;
2320 }
2321 uint32_t *data = code - (id * 2 + 2);
2322
2323 switch (id) {
2324 case 0: data[0] |= insn->sched << 2; break;
2325 case 1: data[0] |= insn->sched << 10; break;
2326 case 2: data[0] |= insn->sched << 18; break;
2327 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
2328 case 4: data[1] |= insn->sched << 2; break;
2329 case 5: data[1] |= insn->sched << 10; break;
2330 case 6: data[1] |= insn->sched << 18; break;
2331 default:
2332 assert(0);
2333 break;
2334 }
2335 }
2336
2337 // assert that instructions with multiple defs don't corrupt registers
2338 for (int d = 0; insn->defExists(d); ++d)
2339 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
2340
2341 switch (insn->op) {
2342 case OP_MOV:
2343 case OP_RDSV:
2344 emitMOV(insn);
2345 break;
2346 case OP_NOP:
2347 break;
2348 case OP_LOAD:
2349 emitLOAD(insn);
2350 break;
2351 case OP_STORE:
2352 emitSTORE(insn);
2353 break;
2354 case OP_LINTERP:
2355 case OP_PINTERP:
2356 emitINTERP(insn);
2357 break;
2358 case OP_VFETCH:
2359 emitVFETCH(insn);
2360 break;
2361 case OP_EXPORT:
2362 emitEXPORT(insn);
2363 break;
2364 case OP_AFETCH:
2365 emitAFETCH(insn);
2366 break;
2367 case OP_PFETCH:
2368 emitPFETCH(insn);
2369 break;
2370 case OP_EMIT:
2371 case OP_RESTART:
2372 emitOUT(insn);
2373 break;
2374 case OP_ADD:
2375 case OP_SUB:
2376 if (insn->dType == TYPE_F64)
2377 emitDADD(insn);
2378 else if (isFloatType(insn->dType))
2379 emitFADD(insn);
2380 else
2381 emitUADD(insn);
2382 break;
2383 case OP_MUL:
2384 if (insn->dType == TYPE_F64)
2385 emitDMUL(insn);
2386 else if (isFloatType(insn->dType))
2387 emitFMUL(insn);
2388 else
2389 emitIMUL(insn);
2390 break;
2391 case OP_MAD:
2392 case OP_FMA:
2393 if (insn->dType == TYPE_F64)
2394 emitDMAD(insn);
2395 else if (isFloatType(insn->dType))
2396 emitFMAD(insn);
2397 else
2398 emitIMAD(insn);
2399 break;
2400 case OP_MADSP:
2401 emitMADSP(insn);
2402 break;
2403 case OP_SAD:
2404 emitISAD(insn);
2405 break;
2406 case OP_NOT:
2407 emitNOT(insn);
2408 break;
2409 case OP_AND:
2410 emitLogicOp(insn, 0);
2411 break;
2412 case OP_OR:
2413 emitLogicOp(insn, 1);
2414 break;
2415 case OP_XOR:
2416 emitLogicOp(insn, 2);
2417 break;
2418 case OP_SHL:
2419 case OP_SHR:
2420 emitShift(insn);
2421 break;
2422 case OP_SET:
2423 case OP_SET_AND:
2424 case OP_SET_OR:
2425 case OP_SET_XOR:
2426 emitSET(insn->asCmp());
2427 break;
2428 case OP_SELP:
2429 emitSELP(insn);
2430 break;
2431 case OP_SLCT:
2432 emitSLCT(insn->asCmp());
2433 break;
2434 case OP_MIN:
2435 case OP_MAX:
2436 emitMINMAX(insn);
2437 break;
2438 case OP_ABS:
2439 case OP_NEG:
2440 case OP_CEIL:
2441 case OP_FLOOR:
2442 case OP_TRUNC:
2443 case OP_SAT:
2444 emitCVT(insn);
2445 break;
2446 case OP_CVT:
2447 if (insn->def(0).getFile() == FILE_PREDICATE ||
2448 insn->src(0).getFile() == FILE_PREDICATE)
2449 emitMOV(insn);
2450 else
2451 emitCVT(insn);
2452 break;
2453 case OP_RSQ:
2454 emitSFnOp(insn, 5 + 2 * insn->subOp);
2455 break;
2456 case OP_RCP:
2457 emitSFnOp(insn, 4 + 2 * insn->subOp);
2458 break;
2459 case OP_LG2:
2460 emitSFnOp(insn, 3);
2461 break;
2462 case OP_EX2:
2463 emitSFnOp(insn, 2);
2464 break;
2465 case OP_SIN:
2466 emitSFnOp(insn, 1);
2467 break;
2468 case OP_COS:
2469 emitSFnOp(insn, 0);
2470 break;
2471 case OP_PRESIN:
2472 case OP_PREEX2:
2473 emitPreOp(insn);
2474 break;
2475 case OP_TEX:
2476 case OP_TXB:
2477 case OP_TXL:
2478 case OP_TXD:
2479 case OP_TXF:
2480 case OP_TXG:
2481 case OP_TXLQ:
2482 emitTEX(insn->asTex());
2483 break;
2484 case OP_TXQ:
2485 emitTXQ(insn->asTex());
2486 break;
2487 case OP_TEXBAR:
2488 emitTEXBAR(insn);
2489 break;
2490 case OP_PIXLD:
2491 emitPIXLD(insn);
2492 break;
2493 case OP_BRA:
2494 case OP_CALL:
2495 case OP_PRERET:
2496 case OP_RET:
2497 case OP_DISCARD:
2498 case OP_EXIT:
2499 case OP_PRECONT:
2500 case OP_CONT:
2501 case OP_PREBREAK:
2502 case OP_BREAK:
2503 case OP_JOINAT:
2504 case OP_BRKPT:
2505 case OP_QUADON:
2506 case OP_QUADPOP:
2507 emitFlow(insn);
2508 break;
2509 case OP_QUADOP:
2510 emitQUADOP(insn, insn->subOp, insn->lanes);
2511 break;
2512 case OP_DFDX:
2513 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2514 break;
2515 case OP_DFDY:
2516 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2517 break;
2518 case OP_POPCNT:
2519 emitPOPC(insn);
2520 break;
2521 case OP_INSBF:
2522 emitINSBF(insn);
2523 break;
2524 case OP_EXTBF:
2525 emitEXTBF(insn);
2526 break;
2527 case OP_BFIND:
2528 emitBFIND(insn);
2529 break;
2530 case OP_PERMT:
2531 emitPERMT(insn);
2532 break;
2533 case OP_JOIN:
2534 emitNOP(insn);
2535 insn->join = 1;
2536 break;
2537 case OP_BAR:
2538 emitBAR(insn);
2539 break;
2540 case OP_MEMBAR:
2541 emitMEMBAR(insn);
2542 break;
2543 case OP_ATOM:
2544 emitATOM(insn);
2545 break;
2546 case OP_CCTL:
2547 emitCCTL(insn);
2548 break;
2549 case OP_VOTE:
2550 emitVOTE(insn);
2551 break;
2552 case OP_SULDB:
2553 emitSULDGB(insn->asTex());
2554 break;
2555 case OP_SUSTB:
2556 case OP_SUSTP:
2557 emitSUSTGx(insn->asTex());
2558 break;
2559 case OP_SUBFM:
2560 case OP_SUCLAMP:
2561 case OP_SUEAU:
2562 emitSUCalc(insn);
2563 break;
2564 case OP_VSHL:
2565 emitVSHL(insn);
2566 break;
2567 case OP_PHI:
2568 case OP_UNION:
2569 case OP_CONSTRAINT:
2570 ERROR("operation should have been eliminated");
2571 return false;
2572 case OP_EXP:
2573 case OP_LOG:
2574 case OP_SQRT:
2575 case OP_POW:
2576 ERROR("operation should have been lowered\n");
2577 return false;
2578 default:
2579 ERROR("unknown op: %u\n", insn->op);
2580 return false;
2581 }
2582
2583 if (insn->join)
2584 code[0] |= 1 << 22;
2585
2586 code += 2;
2587 codeSize += 8;
2588 return true;
2589 }
2590
2591 uint32_t
2592 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2593 {
2594 // No more short instruction encodings.
2595 return 8;
2596 }
2597
2598 void
2599 CodeEmitterGK110::prepareEmission(Function *func)
2600 {
2601 const Target *targ = func->getProgram()->getTarget();
2602
2603 CodeEmitter::prepareEmission(func);
2604
2605 if (targ->hasSWSched)
2606 calculateSchedDataNVC0(targ, func);
2607 }
2608
2609 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2610 : CodeEmitter(target),
2611 targNVC0(target),
2612 writeIssueDelays(target->hasSWSched)
2613 {
2614 code = NULL;
2615 codeSize = codeSizeLimit = 0;
2616 relocInfo = NULL;
2617 }
2618
2619 CodeEmitter *
2620 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2621 {
2622 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2623 emit->setProgramType(type);
2624 return emit;
2625 }
2626
2627 } // namespace nv50_ir