8a98c29035f1ab7040a5ca9cc931e3f6364eeadf
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78 void emitATOM(const Instruction *);
79
80 void emitINTERP(const Instruction *);
81 void emitAFETCH(const Instruction *);
82 void emitPFETCH(const Instruction *);
83 void emitVFETCH(const Instruction *);
84 void emitEXPORT(const Instruction *);
85 void emitOUT(const Instruction *);
86
87 void emitUADD(const Instruction *);
88 void emitFADD(const Instruction *);
89 void emitDADD(const Instruction *);
90 void emitIMUL(const Instruction *);
91 void emitFMUL(const Instruction *);
92 void emitDMUL(const Instruction *);
93 void emitIMAD(const Instruction *);
94 void emitISAD(const Instruction *);
95 void emitFMAD(const Instruction *);
96 void emitDMAD(const Instruction *);
97
98 void emitNOT(const Instruction *);
99 void emitLogicOp(const Instruction *, uint8_t subOp);
100 void emitPOPC(const Instruction *);
101 void emitINSBF(const Instruction *);
102 void emitEXTBF(const Instruction *);
103 void emitBFIND(const Instruction *);
104 void emitShift(const Instruction *);
105
106 void emitSFnOp(const Instruction *, uint8_t subOp);
107
108 void emitCVT(const Instruction *);
109 void emitMINMAX(const Instruction *);
110 void emitPreOp(const Instruction *);
111
112 void emitSET(const CmpInstruction *);
113 void emitSLCT(const CmpInstruction *);
114 void emitSELP(const Instruction *);
115
116 void emitTEXBAR(const Instruction *);
117 void emitTEX(const TexInstruction *);
118 void emitTEXCSAA(const TexInstruction *);
119 void emitTXQ(const TexInstruction *);
120
121 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
122
123 void emitPIXLD(const Instruction *);
124
125 void emitBAR(const Instruction *);
126 void emitMEMBAR(const Instruction *);
127
128 void emitFlow(const Instruction *);
129
130 inline void defId(const ValueDef&, const int pos);
131 inline void srcId(const ValueRef&, const int pos);
132 inline void srcId(const ValueRef *, const int pos);
133 inline void srcId(const Instruction *, int s, const int pos);
134
135 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
136
137 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
138 };
139
140 #define GK110_GPR_ZERO 255
141
142 #define NEG_(b, s) \
143 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
144 #define ABS_(b, s) \
145 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
146
147 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
148 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
149
150 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
151 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
152
153 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
154
155 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
156
157 #define SDATA(a) ((a).rep()->reg.data)
158 #define DDATA(a) ((a).rep()->reg.data)
159
160 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
161 {
162 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
163 }
164
165 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
166 {
167 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
168 }
169
170 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
171 {
172 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
173 code[pos / 32] |= r << (pos % 32);
174 }
175
176 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
177 {
178 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
179 }
180
181 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
182 {
183 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
184 }
185
186 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
187 {
188 const ImmediateValue *imm = ref.get()->asImm();
189
190 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
191 }
192
193 void
194 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
195 {
196 bool rint = false;
197 uint8_t n;
198
199 switch (rnd) {
200 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
201 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
202 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
203 default:
204 rint = rnd == ROUND_NI;
205 n = 0;
206 assert(rnd == ROUND_N || rnd == ROUND_NI);
207 break;
208 }
209 code[pos / 32] |= n << (pos % 32);
210 if (rint && rintPos >= 0)
211 code[rintPos / 32] |= 1 << (rintPos % 32);
212 }
213
214 void
215 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
216 {
217 uint8_t n;
218
219 switch (rnd) {
220 case ROUND_M: n = 1; break;
221 case ROUND_P: n = 2; break;
222 case ROUND_Z: n = 3; break;
223 default:
224 n = 0;
225 assert(rnd == ROUND_N);
226 break;
227 }
228 code[pos / 32] |= n << (pos % 32);
229 }
230
231 void
232 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
233 {
234 uint8_t n;
235
236 switch (rnd) {
237 case ROUND_MI: n = 1; break;
238 case ROUND_PI: n = 2; break;
239 case ROUND_ZI: n = 3; break;
240 default:
241 n = 0;
242 assert(rnd == ROUND_NI);
243 break;
244 }
245 code[pos / 32] |= n << (pos % 32);
246 }
247
248 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
249 {
250 uint8_t n;
251
252 switch (cc) {
253 case CC_FL: n = 0x00; break;
254 case CC_LT: n = 0x01; break;
255 case CC_EQ: n = 0x02; break;
256 case CC_LE: n = 0x03; break;
257 case CC_GT: n = 0x04; break;
258 case CC_NE: n = 0x05; break;
259 case CC_GE: n = 0x06; break;
260 case CC_LTU: n = 0x09; break;
261 case CC_EQU: n = 0x0a; break;
262 case CC_LEU: n = 0x0b; break;
263 case CC_GTU: n = 0x0c; break;
264 case CC_NEU: n = 0x0d; break;
265 case CC_GEU: n = 0x0e; break;
266 case CC_TR: n = 0x0f; break;
267 case CC_NO: n = 0x10; break;
268 case CC_NC: n = 0x11; break;
269 case CC_NS: n = 0x12; break;
270 case CC_NA: n = 0x13; break;
271 case CC_A: n = 0x14; break;
272 case CC_S: n = 0x15; break;
273 case CC_C: n = 0x16; break;
274 case CC_O: n = 0x17; break;
275 default:
276 n = 0;
277 assert(!"invalid condition code");
278 break;
279 }
280 code[pos / 32] |= (n & mask) << (pos % 32);
281 }
282
283 void
284 CodeEmitterGK110::emitPredicate(const Instruction *i)
285 {
286 if (i->predSrc >= 0) {
287 srcId(i->src(i->predSrc), 18);
288 if (i->cc == CC_NOT_P)
289 code[0] |= 8 << 18; // negate
290 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
291 } else {
292 code[0] |= 7 << 18;
293 }
294 }
295
296 void
297 CodeEmitterGK110::setCAddress14(const ValueRef& src)
298 {
299 const Storage& res = src.get()->asSym()->reg;
300 const int32_t addr = res.data.offset / 4;
301
302 code[0] |= (addr & 0x01ff) << 23;
303 code[1] |= (addr & 0x3e00) >> 9;
304 code[1] |= res.fileIndex << 5;
305 }
306
307 void
308 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
309 {
310 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
311 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
312
313 if (i->sType == TYPE_F32) {
314 assert(!(u32 & 0x00000fff));
315 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
316 code[1] |= ((u32 & 0x7fe00000) >> 21);
317 code[1] |= ((u32 & 0x80000000) >> 4);
318 } else
319 if (i->sType == TYPE_F64) {
320 assert(!(u64 & 0x00000fffffffffffULL));
321 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
322 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
323 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
324 } else {
325 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
326 code[0] |= (u32 & 0x001ff) << 23;
327 code[1] |= (u32 & 0x7fe00) >> 9;
328 code[1] |= (u32 & 0x80000) << 8;
329 }
330 }
331
332 void
333 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
334 Modifier mod)
335 {
336 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
337
338 if (mod) {
339 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
340 mod.applyTo(imm);
341 u32 = imm.reg.data.u32;
342 }
343
344 code[0] |= u32 << 23;
345 code[1] |= u32 >> 9;
346 }
347
348 void
349 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
350 Modifier mod)
351 {
352 code[0] = ctg;
353 code[1] = opc << 20;
354
355 emitPredicate(i);
356
357 defId(i->def(0), 2);
358
359 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
360 switch (i->src(s).getFile()) {
361 case FILE_GPR:
362 srcId(i->src(s), s ? 42 : 10);
363 break;
364 case FILE_IMMEDIATE:
365 setImmediate32(i, s, mod);
366 break;
367 default:
368 break;
369 }
370 }
371 }
372
373
374 void
375 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
376 {
377 code[0] = ctg;
378 code[1] = opc << 20;
379
380 emitPredicate(i);
381
382 defId(i->def(0), 2);
383
384 switch (i->src(0).getFile()) {
385 case FILE_MEMORY_CONST:
386 code[1] |= 0x4 << 28;
387 setCAddress14(i->src(0));
388 break;
389 case FILE_GPR:
390 code[1] |= 0xc << 28;
391 srcId(i->src(0), 23);
392 break;
393 default:
394 assert(0);
395 break;
396 }
397 }
398
399 // 0x2 for GPR, c[] and 0x1 for short immediate
400 void
401 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
402 uint32_t opc1)
403 {
404 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
405
406 int s1 = 23;
407 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
408 s1 = 42;
409
410 if (imm) {
411 code[0] = 0x1;
412 code[1] = opc1 << 20;
413 } else {
414 code[0] = 0x2;
415 code[1] = (0xc << 28) | (opc2 << 20);
416 }
417
418 emitPredicate(i);
419
420 defId(i->def(0), 2);
421
422 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
423 switch (i->src(s).getFile()) {
424 case FILE_MEMORY_CONST:
425 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
426 setCAddress14(i->src(s));
427 break;
428 case FILE_IMMEDIATE:
429 setShortImmediate(i, s);
430 break;
431 case FILE_GPR:
432 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
433 break;
434 default:
435 // ignore here, can be predicate or flags, but must not be address
436 break;
437 }
438 }
439 // 0x0 = invalid
440 // 0xc = rrr
441 // 0x8 = rrc
442 // 0x4 = rcr
443 assert(imm || (code[1] & (0xc << 28)));
444 }
445
446 inline void
447 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
448 {
449 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
450 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
451 }
452
453 void
454 CodeEmitterGK110::emitNOP(const Instruction *i)
455 {
456 code[0] = 0x00003c02;
457 code[1] = 0x85800000;
458
459 if (i)
460 emitPredicate(i);
461 else
462 code[0] = 0x001c3c02;
463 }
464
465 void
466 CodeEmitterGK110::emitFMAD(const Instruction *i)
467 {
468 assert(!isLIMM(i->src(1), TYPE_F32));
469
470 emitForm_21(i, 0x0c0, 0x940);
471
472 NEG_(34, 2);
473 SAT_(35);
474 RND_(36, F);
475 FTZ_(38);
476 DNZ_(39);
477
478 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
479
480 if (code[0] & 0x1) {
481 if (neg1)
482 code[1] ^= 1 << 27;
483 } else
484 if (neg1) {
485 code[1] |= 1 << 19;
486 }
487 }
488
489 void
490 CodeEmitterGK110::emitDMAD(const Instruction *i)
491 {
492 assert(!i->saturate);
493 assert(!i->ftz);
494
495 emitForm_21(i, 0x1b8, 0xb38);
496
497 NEG_(34, 2);
498 RND_(36, F);
499
500 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
501
502 if (code[0] & 0x1) {
503 if (neg1)
504 code[1] ^= 1 << 27;
505 } else
506 if (neg1) {
507 code[1] |= 1 << 19;
508 }
509 }
510
511 void
512 CodeEmitterGK110::emitFMUL(const Instruction *i)
513 {
514 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
515
516 assert(i->postFactor >= -3 && i->postFactor <= 3);
517
518 if (isLIMM(i->src(1), TYPE_F32)) {
519 emitForm_L(i, 0x200, 0x2, Modifier(0));
520
521 FTZ_(38);
522 DNZ_(39);
523 SAT_(3a);
524 if (neg)
525 code[1] ^= 1 << 22;
526
527 assert(i->postFactor == 0);
528 } else {
529 emitForm_21(i, 0x234, 0xc34);
530 code[1] |= ((i->postFactor > 0) ?
531 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
532
533 RND_(2a, F);
534 FTZ_(2f);
535 DNZ_(30);
536 SAT_(35);
537
538 if (code[0] & 0x1) {
539 if (neg)
540 code[1] ^= 1 << 27;
541 } else
542 if (neg) {
543 code[1] |= 1 << 19;
544 }
545 }
546 }
547
548 void
549 CodeEmitterGK110::emitDMUL(const Instruction *i)
550 {
551 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
552
553 assert(!i->postFactor);
554 assert(!i->saturate);
555 assert(!i->ftz);
556 assert(!i->dnz);
557
558 emitForm_21(i, 0x240, 0xc40);
559
560 RND_(2a, F);
561
562 if (code[0] & 0x1) {
563 if (neg)
564 code[1] ^= 1 << 27;
565 } else
566 if (neg) {
567 code[1] |= 1 << 19;
568 }
569 }
570
571 void
572 CodeEmitterGK110::emitIMUL(const Instruction *i)
573 {
574 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
575 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
576
577 if (isLIMM(i->src(1), TYPE_S32)) {
578 emitForm_L(i, 0x280, 2, Modifier(0));
579
580 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
581 code[1] |= 1 << 24;
582 if (i->sType == TYPE_S32)
583 code[1] |= 3 << 25;
584 } else {
585 emitForm_21(i, 0x21c, 0xc1c);
586
587 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
588 code[1] |= 1 << 10;
589 if (i->sType == TYPE_S32)
590 code[1] |= 3 << 11;
591 }
592 }
593
594 void
595 CodeEmitterGK110::emitFADD(const Instruction *i)
596 {
597 if (isLIMM(i->src(1), TYPE_F32)) {
598 assert(i->rnd == ROUND_N);
599 assert(!i->saturate);
600
601 Modifier mod = i->src(1).mod ^
602 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
603
604 emitForm_L(i, 0x400, 0, mod);
605
606 FTZ_(3a);
607 NEG_(3b, 0);
608 ABS_(39, 0);
609 } else {
610 emitForm_21(i, 0x22c, 0xc2c);
611
612 FTZ_(2f);
613 RND_(2a, F);
614 ABS_(31, 0);
615 NEG_(33, 0);
616 SAT_(35);
617
618 if (code[0] & 0x1) {
619 modNegAbsF32_3b(i, 1);
620 if (i->op == OP_SUB) code[1] ^= 1 << 27;
621 } else {
622 ABS_(34, 1);
623 NEG_(30, 1);
624 if (i->op == OP_SUB) code[1] ^= 1 << 16;
625 }
626 }
627 }
628
629 void
630 CodeEmitterGK110::emitDADD(const Instruction *i)
631 {
632 assert(!i->saturate);
633 assert(!i->ftz);
634
635 emitForm_21(i, 0x238, 0xc38);
636 RND_(2a, F);
637 ABS_(31, 0);
638 NEG_(33, 0);
639 if (code[0] & 0x1) {
640 modNegAbsF32_3b(i, 1);
641 if (i->op == OP_SUB) code[1] ^= 1 << 27;
642 } else {
643 NEG_(30, 1);
644 ABS_(34, 1);
645 if (i->op == OP_SUB) code[1] ^= 1 << 16;
646 }
647 }
648
649 void
650 CodeEmitterGK110::emitUADD(const Instruction *i)
651 {
652 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
653
654 if (i->op == OP_SUB)
655 addOp ^= 1;
656
657 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
658
659 if (isLIMM(i->src(1), TYPE_S32)) {
660 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
661
662 if (addOp & 2)
663 code[1] |= 1 << 27;
664
665 assert(!i->defExists(1));
666 assert(i->flagsSrc < 0);
667
668 SAT_(39);
669 } else {
670 emitForm_21(i, 0x208, 0xc08);
671
672 assert(addOp != 3); // would be add-plus-one
673
674 code[1] |= addOp << 19;
675
676 if (i->defExists(1))
677 code[1] |= 1 << 18; // write carry
678 if (i->flagsSrc >= 0)
679 code[1] |= 1 << 14; // add carry
680
681 SAT_(35);
682 }
683 }
684
685 // TODO: shl-add
686 void
687 CodeEmitterGK110::emitIMAD(const Instruction *i)
688 {
689 uint8_t addOp =
690 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
691
692 emitForm_21(i, 0x100, 0xa00);
693
694 assert(addOp != 3);
695 code[1] |= addOp << 26;
696
697 if (i->sType == TYPE_S32)
698 code[1] |= (1 << 19) | (1 << 24);
699
700 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
701 code[1] |= 1 << 25;
702 SAT_(35);
703 }
704
705 void
706 CodeEmitterGK110::emitISAD(const Instruction *i)
707 {
708 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
709
710 emitForm_21(i, 0x1f4, 0xb74);
711
712 if (i->dType == TYPE_S32)
713 code[1] |= 1 << 19;
714 }
715
716 void
717 CodeEmitterGK110::emitNOT(const Instruction *i)
718 {
719 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
720 code[1] = 0x22003800;
721
722 emitPredicate(i);
723
724 defId(i->def(0), 2);
725
726 switch (i->src(0).getFile()) {
727 case FILE_GPR:
728 code[1] |= 0xc << 28;
729 srcId(i->src(0), 23);
730 break;
731 case FILE_MEMORY_CONST:
732 code[1] |= 0x4 << 28;
733 setCAddress14(i->src(1));
734 break;
735 default:
736 assert(0);
737 break;
738 }
739 }
740
741 void
742 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
743 {
744 if (isLIMM(i->src(1), TYPE_S32)) {
745 emitForm_L(i, 0x200, 0, i->src(1).mod);
746 code[1] |= subOp << 24;
747 NOT_(3a, 0);
748 } else {
749 emitForm_21(i, 0x220, 0xc20);
750 code[1] |= subOp << 12;
751 NOT_(2a, 0);
752 NOT_(2b, 1);
753 }
754 }
755
756 void
757 CodeEmitterGK110::emitPOPC(const Instruction *i)
758 {
759 assert(!isLIMM(i->src(1), TYPE_S32, true));
760
761 emitForm_21(i, 0x204, 0xc04);
762
763 NOT_(2a, 0);
764 if (!(code[0] & 0x1))
765 NOT_(2b, 1);
766 }
767
768 void
769 CodeEmitterGK110::emitINSBF(const Instruction *i)
770 {
771 emitForm_21(i, 0x1f8, 0xb78);
772 }
773
774 void
775 CodeEmitterGK110::emitEXTBF(const Instruction *i)
776 {
777 emitForm_21(i, 0x600, 0xc00);
778
779 if (i->dType == TYPE_S32)
780 code[1] |= 0x80000;
781 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
782 code[1] |= 0x800;
783 }
784
785 void
786 CodeEmitterGK110::emitBFIND(const Instruction *i)
787 {
788 emitForm_C(i, 0x218, 0x2);
789
790 if (i->dType == TYPE_S32)
791 code[1] |= 0x80000;
792 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
793 code[1] |= 0x800;
794 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
795 code[1] |= 0x1000;
796 }
797
798 void
799 CodeEmitterGK110::emitShift(const Instruction *i)
800 {
801 if (i->op == OP_SHR) {
802 emitForm_21(i, 0x214, 0xc14);
803 if (isSignedType(i->dType))
804 code[1] |= 1 << 19;
805 } else {
806 emitForm_21(i, 0x224, 0xc24);
807 }
808
809 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
810 code[1] |= 1 << 10;
811 }
812
813 void
814 CodeEmitterGK110::emitPreOp(const Instruction *i)
815 {
816 emitForm_C(i, 0x248, 0x2);
817
818 if (i->op == OP_PREEX2)
819 code[1] |= 1 << 10;
820
821 NEG_(30, 0);
822 ABS_(34, 0);
823 }
824
825 void
826 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
827 {
828 code[0] = 0x00000002 | (subOp << 23);
829 code[1] = 0x84000000;
830
831 emitPredicate(i);
832
833 defId(i->def(0), 2);
834 srcId(i->src(0), 10);
835
836 NEG_(33, 0);
837 ABS_(31, 0);
838 SAT_(35);
839 }
840
841 void
842 CodeEmitterGK110::emitMINMAX(const Instruction *i)
843 {
844 uint32_t op2, op1;
845
846 switch (i->dType) {
847 case TYPE_U32:
848 case TYPE_S32:
849 op2 = 0x210;
850 op1 = 0xc10;
851 break;
852 case TYPE_F32:
853 op2 = 0x230;
854 op1 = 0xc30;
855 break;
856 case TYPE_F64:
857 op2 = 0x228;
858 op1 = 0xc28;
859 break;
860 default:
861 assert(0);
862 op2 = 0;
863 op1 = 0;
864 break;
865 }
866 emitForm_21(i, op2, op1);
867
868 if (i->dType == TYPE_S32)
869 code[1] |= 1 << 19;
870 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
871
872 FTZ_(2f);
873 ABS_(31, 0);
874 NEG_(33, 0);
875 if (code[0] & 0x1) {
876 modNegAbsF32_3b(i, 1);
877 } else {
878 ABS_(34, 1);
879 NEG_(30, 1);
880 }
881 }
882
883 void
884 CodeEmitterGK110::emitCVT(const Instruction *i)
885 {
886 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
887 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
888 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
889
890 bool sat = i->saturate;
891 bool abs = i->src(0).mod.abs();
892 bool neg = i->src(0).mod.neg();
893
894 RoundMode rnd = i->rnd;
895
896 switch (i->op) {
897 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
898 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
899 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
900 case OP_SAT: sat = true; break;
901 case OP_NEG: neg = !neg; break;
902 case OP_ABS: abs = true; neg = false; break;
903 default:
904 break;
905 }
906
907 DataType dType;
908
909 if (i->op == OP_NEG && i->dType == TYPE_U32)
910 dType = TYPE_S32;
911 else
912 dType = i->dType;
913
914
915 uint32_t op;
916
917 if (f2f) op = 0x254;
918 else if (f2i) op = 0x258;
919 else if (i2f) op = 0x25c;
920 else op = 0x260;
921
922 emitForm_C(i, op, 0x2);
923
924 FTZ_(2f);
925 if (neg) code[1] |= 1 << 16;
926 if (abs) code[1] |= 1 << 20;
927 if (sat) code[1] |= 1 << 21;
928
929 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
930
931 code[0] |= typeSizeofLog2(dType) << 10;
932 code[0] |= typeSizeofLog2(i->sType) << 12;
933 code[1] |= i->subOp << 12;
934
935 if (isSignedIntType(dType))
936 code[0] |= 0x4000;
937 if (isSignedIntType(i->sType))
938 code[0] |= 0x8000;
939 }
940
941 void
942 CodeEmitterGK110::emitSET(const CmpInstruction *i)
943 {
944 uint16_t op1, op2;
945
946 if (i->def(0).getFile() == FILE_PREDICATE) {
947 switch (i->sType) {
948 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
949 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
950 default:
951 op2 = 0x1b0;
952 op1 = 0xb30;
953 break;
954 }
955 emitForm_21(i, op2, op1);
956
957 NEG_(2e, 0);
958 ABS_(9, 0);
959 if (!(code[0] & 0x1)) {
960 NEG_(8, 1);
961 ABS_(2f, 1);
962 } else {
963 modNegAbsF32_3b(i, 1);
964 }
965 FTZ_(32);
966
967 // normal DST field is negated predicate result
968 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
969 if (i->defExists(1))
970 defId(i->def(1), 2);
971 else
972 code[0] |= 0x1c;
973 } else {
974 switch (i->sType) {
975 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
976 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
977 default:
978 op2 = 0x1a8;
979 op1 = 0xb28;
980 break;
981 }
982 emitForm_21(i, op2, op1);
983
984 NEG_(2e, 0);
985 ABS_(39, 0);
986 if (!(code[0] & 0x1)) {
987 NEG_(38, 1);
988 ABS_(2f, 1);
989 } else {
990 modNegAbsF32_3b(i, 1);
991 }
992 FTZ_(3a);
993
994 if (i->dType == TYPE_F32) {
995 if (isFloatType(i->sType))
996 code[1] |= 1 << 23;
997 else
998 code[1] |= 1 << 15;
999 }
1000 }
1001 if (i->sType == TYPE_S32)
1002 code[1] |= 1 << 19;
1003
1004 if (i->op != OP_SET) {
1005 switch (i->op) {
1006 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1007 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1008 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1009 default:
1010 assert(0);
1011 break;
1012 }
1013 srcId(i->src(2), 0x2a);
1014 } else {
1015 code[1] |= 0x7 << 10;
1016 }
1017 emitCondCode(i->setCond,
1018 isFloatType(i->sType) ? 0x33 : 0x34,
1019 isFloatType(i->sType) ? 0xf : 0x7);
1020 }
1021
1022 void
1023 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1024 {
1025 CondCode cc = i->setCond;
1026 if (i->src(2).mod.neg())
1027 cc = reverseCondCode(cc);
1028
1029 if (i->dType == TYPE_F32) {
1030 emitForm_21(i, 0x1d0, 0xb50);
1031 FTZ_(32);
1032 emitCondCode(cc, 0x33, 0xf);
1033 } else {
1034 emitForm_21(i, 0x1a0, 0xb20);
1035 emitCondCode(cc, 0x34, 0x7);
1036 }
1037 }
1038
1039 void CodeEmitterGK110::emitSELP(const Instruction *i)
1040 {
1041 emitForm_21(i, 0x250, 0x050);
1042
1043 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
1044 code[1] |= 1 << 13;
1045 }
1046
1047 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1048 {
1049 code[0] = 0x0000003e | (i->subOp << 23);
1050 code[1] = 0x77000000;
1051
1052 emitPredicate(i);
1053 }
1054
1055 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1056 {
1057 code[0] = 0x00000002;
1058 code[1] = 0x76c00000;
1059
1060 code[1] |= i->tex.r << 9;
1061 // code[1] |= i->tex.s << (9 + 8);
1062
1063 if (i->tex.liveOnly)
1064 code[0] |= 0x80000000;
1065
1066 defId(i->def(0), 2);
1067 srcId(i->src(0), 10);
1068 }
1069
1070 static inline bool
1071 isNextIndependentTex(const TexInstruction *i)
1072 {
1073 if (!i->next || !isTextureOp(i->next->op))
1074 return false;
1075 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1076 return false;
1077 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1078 }
1079
1080 void
1081 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1082 {
1083 const bool ind = i->tex.rIndirectSrc >= 0;
1084
1085 if (ind) {
1086 code[0] = 0x00000002;
1087 switch (i->op) {
1088 case OP_TXD:
1089 code[1] = 0x7e000000;
1090 break;
1091 case OP_TXLQ:
1092 code[1] = 0x7e800000;
1093 break;
1094 case OP_TXF:
1095 code[1] = 0x78000000;
1096 break;
1097 case OP_TXG:
1098 code[1] = 0x7dc00000;
1099 break;
1100 default:
1101 code[1] = 0x7d800000;
1102 break;
1103 }
1104 } else {
1105 switch (i->op) {
1106 case OP_TXD:
1107 code[0] = 0x00000002;
1108 code[1] = 0x76000000;
1109 code[1] |= i->tex.r << 9;
1110 break;
1111 case OP_TXLQ:
1112 code[0] = 0x00000002;
1113 code[1] = 0x76800000;
1114 code[1] |= i->tex.r << 9;
1115 break;
1116 case OP_TXF:
1117 code[0] = 0x00000002;
1118 code[1] = 0x70000000;
1119 code[1] |= i->tex.r << 13;
1120 break;
1121 case OP_TXG:
1122 code[0] = 0x00000001;
1123 code[1] = 0x70000000;
1124 code[1] |= i->tex.r << 15;
1125 break;
1126 default:
1127 code[0] = 0x00000001;
1128 code[1] = 0x60000000;
1129 code[1] |= i->tex.r << 15;
1130 break;
1131 }
1132 }
1133
1134 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1135
1136 if (i->tex.liveOnly)
1137 code[0] |= 0x80000000;
1138
1139 switch (i->op) {
1140 case OP_TEX: break;
1141 case OP_TXB: code[1] |= 0x2000; break;
1142 case OP_TXL: code[1] |= 0x3000; break;
1143 case OP_TXF: break;
1144 case OP_TXG: break;
1145 case OP_TXD: break;
1146 case OP_TXLQ: break;
1147 default:
1148 assert(!"invalid texture op");
1149 break;
1150 }
1151
1152 if (i->op == OP_TXF) {
1153 if (!i->tex.levelZero)
1154 code[1] |= 0x1000;
1155 } else
1156 if (i->tex.levelZero) {
1157 code[1] |= 0x1000;
1158 }
1159
1160 if (i->op != OP_TXD && i->tex.derivAll)
1161 code[1] |= 0x200;
1162
1163 emitPredicate(i);
1164
1165 code[1] |= i->tex.mask << 2;
1166
1167 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1168
1169 defId(i->def(0), 2);
1170 srcId(i->src(0), 10);
1171 srcId(i, src1, 23);
1172
1173 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1174
1175 // texture target:
1176 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1177 if (i->tex.target.isArray())
1178 code[1] |= 0x40;
1179 if (i->tex.target.isShadow())
1180 code[1] |= 0x400;
1181 if (i->tex.target == TEX_TARGET_2D_MS ||
1182 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1183 code[1] |= 0x800;
1184
1185 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1186 // ?
1187 }
1188
1189 if (i->tex.useOffsets == 1) {
1190 switch (i->op) {
1191 case OP_TXF: code[1] |= 0x200; break;
1192 case OP_TXD: code[1] |= 0x00400000; break;
1193 default: code[1] |= 0x800; break;
1194 }
1195 }
1196 if (i->tex.useOffsets == 4)
1197 code[1] |= 0x1000;
1198 }
1199
1200 void
1201 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1202 {
1203 code[0] = 0x00000002;
1204 code[1] = 0x75400001;
1205
1206 switch (i->tex.query) {
1207 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1208 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1209 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1210 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1211 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1212 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1213 default:
1214 assert(!"invalid texture query");
1215 break;
1216 }
1217
1218 code[1] |= i->tex.mask << 2;
1219 code[1] |= i->tex.r << 9;
1220 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1221 code[1] |= 0x08000000;
1222
1223 defId(i->def(0), 2);
1224 srcId(i->src(0), 10);
1225
1226 emitPredicate(i);
1227 }
1228
1229 void
1230 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1231 {
1232 code[0] = 0x00000002 | ((qOp & 1) << 31);
1233 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1234
1235 defId(i->def(0), 2);
1236 srcId(i->src(0), 10);
1237 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1238
1239 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1240 code[1] |= 1 << 9; // dall
1241
1242 emitPredicate(i);
1243 }
1244
1245 void
1246 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1247 {
1248 emitForm_L(i, 0x7f4, 2, Modifier(0));
1249 code[1] |= i->subOp << 2;
1250 code[1] |= 0x00070000;
1251 }
1252
1253 void
1254 CodeEmitterGK110::emitBAR(const Instruction *i)
1255 {
1256 code[0] = 0x00000002;
1257 code[1] = 0x85400000;
1258
1259 switch (i->subOp) {
1260 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1261 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1262 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1263 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1264 default:
1265 code[1] |= 0x20;
1266 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1267 break;
1268 }
1269
1270 emitPredicate(i);
1271
1272 srcId(i->src(0), 10);
1273 srcId(i->src(1), 23);
1274 }
1275
1276 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1277 {
1278 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1279 code[1] = 0x7cc00000;
1280
1281 emitPredicate(i);
1282 }
1283
1284 void
1285 CodeEmitterGK110::emitFlow(const Instruction *i)
1286 {
1287 const FlowInstruction *f = i->asFlow();
1288
1289 unsigned mask; // bit 0: predicate, bit 1: target
1290
1291 code[0] = 0x00000000;
1292
1293 switch (i->op) {
1294 case OP_BRA:
1295 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1296 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1297 code[0] |= 0x80;
1298 mask = 3;
1299 break;
1300 case OP_CALL:
1301 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1302 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1303 code[0] |= 0x80;
1304 mask = 2;
1305 break;
1306
1307 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1308 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1309 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1310 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1311 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1312
1313 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1314 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1315 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1316 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1317
1318 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1319 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1320 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1321 default:
1322 assert(!"invalid flow operation");
1323 return;
1324 }
1325
1326 if (mask & 1) {
1327 emitPredicate(i);
1328 if (i->flagsSrc < 0)
1329 code[0] |= 0x3c;
1330 }
1331
1332 if (!f)
1333 return;
1334
1335 if (f->allWarp)
1336 code[0] |= 1 << 9;
1337 if (f->limit)
1338 code[0] |= 1 << 8;
1339
1340 if (f->op == OP_CALL) {
1341 if (f->builtin) {
1342 assert(f->absolute);
1343 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1344 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1345 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1346 } else {
1347 assert(!f->absolute);
1348 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1349 code[0] |= (pcRel & 0x1ff) << 23;
1350 code[1] |= (pcRel >> 9) & 0x7fff;
1351 }
1352 } else
1353 if (mask & 2) {
1354 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1355 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1356 pcRel += 8;
1357 // currently we don't want absolute branches
1358 assert(!f->absolute);
1359 code[0] |= (pcRel & 0x1ff) << 23;
1360 code[1] |= (pcRel >> 9) & 0x7fff;
1361 }
1362 }
1363
1364 void
1365 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1366 {
1367 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1368
1369 code[0] = 0x00000002 | (offset << 23);
1370 code[1] = 0x7d000000 | (offset >> 9);
1371
1372 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1373 code[1] |= 0x8;
1374
1375 emitPredicate(i);
1376
1377 defId(i->def(0), 2);
1378 srcId(i->src(0).getIndirect(0), 10);
1379 }
1380
1381 void
1382 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1383 {
1384 uint32_t prim = i->src(0).get()->reg.data.u32;
1385
1386 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1387 code[1] = 0x7f800000;
1388
1389 emitPredicate(i);
1390
1391 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1392
1393 defId(i->def(0), 2);
1394 srcId(i, src1, 10);
1395 }
1396
1397 void
1398 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1399 {
1400 unsigned int size = typeSizeof(i->dType);
1401 uint32_t offset = i->src(0).get()->reg.data.offset;
1402
1403 code[0] = 0x00000002 | (offset << 23);
1404 code[1] = 0x7ec00000 | (offset >> 9);
1405 code[1] |= (size / 4 - 1) << 18;
1406
1407 if (i->perPatch)
1408 code[1] |= 0x4;
1409 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1410 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1411
1412 emitPredicate(i);
1413
1414 defId(i->def(0), 2);
1415 srcId(i->src(0).getIndirect(0), 10);
1416 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1417 }
1418
1419 void
1420 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1421 {
1422 unsigned int size = typeSizeof(i->dType);
1423 uint32_t offset = i->src(0).get()->reg.data.offset;
1424
1425 code[0] = 0x00000002 | (offset << 23);
1426 code[1] = 0x7f000000 | (offset >> 9);
1427 code[1] |= (size / 4 - 1) << 18;
1428
1429 if (i->perPatch)
1430 code[1] |= 0x4;
1431
1432 emitPredicate(i);
1433
1434 assert(i->src(1).getFile() == FILE_GPR);
1435
1436 srcId(i->src(0).getIndirect(0), 10);
1437 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1438 srcId(i->src(1), 2);
1439 }
1440
1441 void
1442 CodeEmitterGK110::emitOUT(const Instruction *i)
1443 {
1444 assert(i->src(0).getFile() == FILE_GPR);
1445
1446 emitForm_21(i, 0x1f0, 0xb70);
1447
1448 if (i->op == OP_EMIT)
1449 code[1] |= 1 << 10;
1450 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1451 code[1] |= 1 << 11;
1452 }
1453
1454 void
1455 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1456 {
1457 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1458 code[1] |= (i->ipa & 0xc) << (19 - 2);
1459 }
1460
1461 static void
1462 interpApply(const InterpEntry *entry, uint32_t *code,
1463 bool force_persample_interp, bool flatshade)
1464 {
1465 int ipa = entry->ipa;
1466 int reg = entry->reg;
1467 int loc = entry->loc;
1468
1469 if (flatshade &&
1470 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1471 ipa = NV50_IR_INTERP_FLAT;
1472 reg = 0xff;
1473 } else if (force_persample_interp &&
1474 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1475 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1476 ipa |= NV50_IR_INTERP_CENTROID;
1477 }
1478 code[loc + 1] &= ~(0xf << 19);
1479 code[loc + 1] |= (ipa & 0x3) << 21;
1480 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1481 code[loc + 0] &= ~(0xff << 23);
1482 code[loc + 0] |= reg << 23;
1483 }
1484
1485 void
1486 CodeEmitterGK110::emitINTERP(const Instruction *i)
1487 {
1488 const uint32_t base = i->getSrc(0)->reg.data.offset;
1489
1490 code[0] = 0x00000002 | (base << 31);
1491 code[1] = 0x74800000 | (base >> 1);
1492
1493 if (i->saturate)
1494 code[1] |= 1 << 18;
1495
1496 if (i->op == OP_PINTERP) {
1497 srcId(i->src(1), 23);
1498 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1499 } else {
1500 code[0] |= 0xff << 23;
1501 addInterp(i->ipa, 0xff, interpApply);
1502 }
1503
1504 srcId(i->src(0).getIndirect(0), 10);
1505 emitInterpMode(i);
1506
1507 emitPredicate(i);
1508 defId(i->def(0), 2);
1509
1510 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1511 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1512 else
1513 code[1] |= 0xff << 10;
1514 }
1515
1516 void
1517 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1518 {
1519 uint8_t n;
1520
1521 switch (ty) {
1522 case TYPE_U8:
1523 n = 0;
1524 break;
1525 case TYPE_S8:
1526 n = 1;
1527 break;
1528 case TYPE_U16:
1529 n = 2;
1530 break;
1531 case TYPE_S16:
1532 n = 3;
1533 break;
1534 case TYPE_F32:
1535 case TYPE_U32:
1536 case TYPE_S32:
1537 n = 4;
1538 break;
1539 case TYPE_F64:
1540 case TYPE_U64:
1541 case TYPE_S64:
1542 n = 5;
1543 break;
1544 case TYPE_B128:
1545 n = 6;
1546 break;
1547 default:
1548 n = 0;
1549 assert(!"invalid ld/st type");
1550 break;
1551 }
1552 code[pos / 32] |= n << (pos % 32);
1553 }
1554
1555 void
1556 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1557 {
1558 uint8_t n;
1559
1560 switch (c) {
1561 case CACHE_CA:
1562 // case CACHE_WB:
1563 n = 0;
1564 break;
1565 case CACHE_CG:
1566 n = 1;
1567 break;
1568 case CACHE_CS:
1569 n = 2;
1570 break;
1571 case CACHE_CV:
1572 // case CACHE_WT:
1573 n = 3;
1574 break;
1575 default:
1576 n = 0;
1577 assert(!"invalid caching mode");
1578 break;
1579 }
1580 code[pos / 32] |= n << (pos % 32);
1581 }
1582
1583 void
1584 CodeEmitterGK110::emitSTORE(const Instruction *i)
1585 {
1586 int32_t offset = SDATA(i->src(0)).offset;
1587
1588 switch (i->src(0).getFile()) {
1589 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1590 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1591 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1592 default:
1593 assert(!"invalid memory file");
1594 break;
1595 }
1596
1597 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1598 offset &= 0xffffff;
1599
1600 if (code[0] & 0x2) {
1601 emitLoadStoreType(i->dType, 0x33);
1602 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1603 emitCachingMode(i->cache, 0x2f);
1604 } else {
1605 emitLoadStoreType(i->dType, 0x38);
1606 emitCachingMode(i->cache, 0x3b);
1607 }
1608 code[0] |= offset << 23;
1609 code[1] |= offset >> 9;
1610
1611 emitPredicate(i);
1612
1613 srcId(i->src(1), 2);
1614 srcId(i->src(0).getIndirect(0), 10);
1615 }
1616
1617 void
1618 CodeEmitterGK110::emitLOAD(const Instruction *i)
1619 {
1620 int32_t offset = SDATA(i->src(0)).offset;
1621
1622 switch (i->src(0).getFile()) {
1623 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1624 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1625 case FILE_MEMORY_SHARED: code[1] = 0x7a400000; code[0] = 0x00000002; break;
1626 case FILE_MEMORY_CONST:
1627 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1628 emitMOV(i);
1629 return;
1630 }
1631 offset &= 0xffff;
1632 code[0] = 0x00000002;
1633 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1634 code[1] |= i->subOp << 15;
1635 break;
1636 default:
1637 assert(!"invalid memory file");
1638 break;
1639 }
1640
1641 if (code[0] & 0x2) {
1642 offset &= 0xffffff;
1643 emitLoadStoreType(i->dType, 0x33);
1644 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1645 emitCachingMode(i->cache, 0x2f);
1646 } else {
1647 emitLoadStoreType(i->dType, 0x38);
1648 emitCachingMode(i->cache, 0x3b);
1649 }
1650 code[0] |= offset << 23;
1651 code[1] |= offset >> 9;
1652
1653 emitPredicate(i);
1654
1655 defId(i->def(0), 2);
1656 if (i->getIndirect(0, 0)) {
1657 srcId(i->src(0).getIndirect(0), 10);
1658 if (i->getIndirect(0, 0)->reg.size == 8)
1659 code[1] |= 1 << 23;
1660 } else {
1661 code[0] |= 255 << 10;
1662 }
1663 }
1664
1665 uint8_t
1666 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1667 {
1668 switch (SDATA(ref).sv.sv) {
1669 case SV_LANEID: return 0x00;
1670 case SV_PHYSID: return 0x03;
1671 case SV_VERTEX_COUNT: return 0x10;
1672 case SV_INVOCATION_ID: return 0x11;
1673 case SV_YDIR: return 0x12;
1674 case SV_THREAD_KILL: return 0x13;
1675 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1676 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1677 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1678 case SV_GRIDID: return 0x2c;
1679 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1680 case SV_LBASE: return 0x34;
1681 case SV_SBASE: return 0x30;
1682 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1683 default:
1684 assert(!"no sreg for system value");
1685 return 0;
1686 }
1687 }
1688
1689 void
1690 CodeEmitterGK110::emitMOV(const Instruction *i)
1691 {
1692 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1693 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1694 code[1] = 0x86400000;
1695 emitPredicate(i);
1696 defId(i->def(0), 2);
1697 } else
1698 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1699 code[0] = 0x00000002 | (i->lanes << 14);
1700 code[1] = 0x74000000;
1701 emitPredicate(i);
1702 defId(i->def(0), 2);
1703 setImmediate32(i, 0, Modifier(0));
1704 } else
1705 if (i->src(0).getFile() == FILE_PREDICATE) {
1706 code[0] = 0x00000002;
1707 code[1] = 0x84401c07;
1708 emitPredicate(i);
1709 defId(i->def(0), 2);
1710 srcId(i->src(0), 14);
1711 } else {
1712 emitForm_C(i, 0x24c, 2);
1713 code[1] |= i->lanes << 10;
1714 }
1715 }
1716
1717 void
1718 CodeEmitterGK110::emitATOM(const Instruction *i)
1719 {
1720 code[0] = 0x00000002;
1721 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
1722 code[1] = 0x77800000;
1723 else
1724 code[1] = 0x68000000;
1725
1726 switch (i->subOp) {
1727 case NV50_IR_SUBOP_ATOM_CAS: break;
1728 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
1729 default: code[1] |= i->subOp << 23; break;
1730 }
1731
1732 switch (i->dType) {
1733 case TYPE_U32: break;
1734 case TYPE_S32: code[1] |= 0x00100000; break;
1735 case TYPE_U64: code[1] |= 0x00200000; break;
1736 case TYPE_F32: code[1] |= 0x00300000; break;
1737 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
1738 case TYPE_S64: code[1] |= 0x00500000; break;
1739 default: assert(!"unsupported type"); break;
1740 }
1741
1742 emitPredicate(i);
1743
1744 /* TODO: cas: check that src regs line up */
1745 /* TODO: cas: flip bits if $r255 is used */
1746 srcId(i->src(1), 23);
1747
1748 if (i->defExists(0))
1749 defId(i->def(0), 2);
1750 else
1751 code[0] |= 255 << 2;
1752
1753 const int32_t offset = SDATA(i->src(0)).offset;
1754 assert(offset < 0x80000 && offset >= -0x80000);
1755 code[0] |= (offset & 1) << 31;
1756 code[1] |= (offset & 0xffffe) >> 1;
1757
1758 if (i->getIndirect(0, 0)) {
1759 srcId(i->getIndirect(0, 0), 10);
1760 if (i->getIndirect(0, 0)->reg.size == 8)
1761 code[1] |= 1 << 19;
1762 } else {
1763 code[0] |= 255 << 10;
1764 }
1765 }
1766
1767 bool
1768 CodeEmitterGK110::emitInstruction(Instruction *insn)
1769 {
1770 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1771
1772 if (insn->encSize != 8) {
1773 ERROR("skipping unencodable instruction: ");
1774 insn->print();
1775 return false;
1776 } else
1777 if (codeSize + size > codeSizeLimit) {
1778 ERROR("code emitter output buffer too small\n");
1779 return false;
1780 }
1781
1782 if (writeIssueDelays) {
1783 int id = (codeSize & 0x3f) / 8 - 1;
1784 if (id < 0) {
1785 id += 1;
1786 code[0] = 0x00000000; // cf issue delay "instruction"
1787 code[1] = 0x08000000;
1788 code += 2;
1789 codeSize += 8;
1790 }
1791 uint32_t *data = code - (id * 2 + 2);
1792
1793 switch (id) {
1794 case 0: data[0] |= insn->sched << 2; break;
1795 case 1: data[0] |= insn->sched << 10; break;
1796 case 2: data[0] |= insn->sched << 18; break;
1797 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1798 case 4: data[1] |= insn->sched << 2; break;
1799 case 5: data[1] |= insn->sched << 10; break;
1800 case 6: data[1] |= insn->sched << 18; break;
1801 default:
1802 assert(0);
1803 break;
1804 }
1805 }
1806
1807 // assert that instructions with multiple defs don't corrupt registers
1808 for (int d = 0; insn->defExists(d); ++d)
1809 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1810
1811 switch (insn->op) {
1812 case OP_MOV:
1813 case OP_RDSV:
1814 emitMOV(insn);
1815 break;
1816 case OP_NOP:
1817 break;
1818 case OP_LOAD:
1819 emitLOAD(insn);
1820 break;
1821 case OP_STORE:
1822 emitSTORE(insn);
1823 break;
1824 case OP_LINTERP:
1825 case OP_PINTERP:
1826 emitINTERP(insn);
1827 break;
1828 case OP_VFETCH:
1829 emitVFETCH(insn);
1830 break;
1831 case OP_EXPORT:
1832 emitEXPORT(insn);
1833 break;
1834 case OP_AFETCH:
1835 emitAFETCH(insn);
1836 break;
1837 case OP_PFETCH:
1838 emitPFETCH(insn);
1839 break;
1840 case OP_EMIT:
1841 case OP_RESTART:
1842 emitOUT(insn);
1843 break;
1844 case OP_ADD:
1845 case OP_SUB:
1846 if (insn->dType == TYPE_F64)
1847 emitDADD(insn);
1848 else if (isFloatType(insn->dType))
1849 emitFADD(insn);
1850 else
1851 emitUADD(insn);
1852 break;
1853 case OP_MUL:
1854 if (insn->dType == TYPE_F64)
1855 emitDMUL(insn);
1856 else if (isFloatType(insn->dType))
1857 emitFMUL(insn);
1858 else
1859 emitIMUL(insn);
1860 break;
1861 case OP_MAD:
1862 case OP_FMA:
1863 if (insn->dType == TYPE_F64)
1864 emitDMAD(insn);
1865 else if (isFloatType(insn->dType))
1866 emitFMAD(insn);
1867 else
1868 emitIMAD(insn);
1869 break;
1870 case OP_SAD:
1871 emitISAD(insn);
1872 break;
1873 case OP_NOT:
1874 emitNOT(insn);
1875 break;
1876 case OP_AND:
1877 emitLogicOp(insn, 0);
1878 break;
1879 case OP_OR:
1880 emitLogicOp(insn, 1);
1881 break;
1882 case OP_XOR:
1883 emitLogicOp(insn, 2);
1884 break;
1885 case OP_SHL:
1886 case OP_SHR:
1887 emitShift(insn);
1888 break;
1889 case OP_SET:
1890 case OP_SET_AND:
1891 case OP_SET_OR:
1892 case OP_SET_XOR:
1893 emitSET(insn->asCmp());
1894 break;
1895 case OP_SELP:
1896 emitSELP(insn);
1897 break;
1898 case OP_SLCT:
1899 emitSLCT(insn->asCmp());
1900 break;
1901 case OP_MIN:
1902 case OP_MAX:
1903 emitMINMAX(insn);
1904 break;
1905 case OP_ABS:
1906 case OP_NEG:
1907 case OP_CEIL:
1908 case OP_FLOOR:
1909 case OP_TRUNC:
1910 case OP_CVT:
1911 case OP_SAT:
1912 emitCVT(insn);
1913 break;
1914 case OP_RSQ:
1915 emitSFnOp(insn, 5 + 2 * insn->subOp);
1916 break;
1917 case OP_RCP:
1918 emitSFnOp(insn, 4 + 2 * insn->subOp);
1919 break;
1920 case OP_LG2:
1921 emitSFnOp(insn, 3);
1922 break;
1923 case OP_EX2:
1924 emitSFnOp(insn, 2);
1925 break;
1926 case OP_SIN:
1927 emitSFnOp(insn, 1);
1928 break;
1929 case OP_COS:
1930 emitSFnOp(insn, 0);
1931 break;
1932 case OP_PRESIN:
1933 case OP_PREEX2:
1934 emitPreOp(insn);
1935 break;
1936 case OP_TEX:
1937 case OP_TXB:
1938 case OP_TXL:
1939 case OP_TXD:
1940 case OP_TXF:
1941 case OP_TXG:
1942 case OP_TXLQ:
1943 emitTEX(insn->asTex());
1944 break;
1945 case OP_TXQ:
1946 emitTXQ(insn->asTex());
1947 break;
1948 case OP_TEXBAR:
1949 emitTEXBAR(insn);
1950 break;
1951 case OP_PIXLD:
1952 emitPIXLD(insn);
1953 break;
1954 case OP_BRA:
1955 case OP_CALL:
1956 case OP_PRERET:
1957 case OP_RET:
1958 case OP_DISCARD:
1959 case OP_EXIT:
1960 case OP_PRECONT:
1961 case OP_CONT:
1962 case OP_PREBREAK:
1963 case OP_BREAK:
1964 case OP_JOINAT:
1965 case OP_BRKPT:
1966 case OP_QUADON:
1967 case OP_QUADPOP:
1968 emitFlow(insn);
1969 break;
1970 case OP_QUADOP:
1971 emitQUADOP(insn, insn->subOp, insn->lanes);
1972 break;
1973 case OP_DFDX:
1974 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1975 break;
1976 case OP_DFDY:
1977 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1978 break;
1979 case OP_POPCNT:
1980 emitPOPC(insn);
1981 break;
1982 case OP_INSBF:
1983 emitINSBF(insn);
1984 break;
1985 case OP_EXTBF:
1986 emitEXTBF(insn);
1987 break;
1988 case OP_BFIND:
1989 emitBFIND(insn);
1990 break;
1991 case OP_JOIN:
1992 emitNOP(insn);
1993 insn->join = 1;
1994 break;
1995 case OP_BAR:
1996 emitBAR(insn);
1997 break;
1998 case OP_MEMBAR:
1999 emitMEMBAR(insn);
2000 break;
2001 case OP_ATOM:
2002 emitATOM(insn);
2003 break;
2004 case OP_PHI:
2005 case OP_UNION:
2006 case OP_CONSTRAINT:
2007 ERROR("operation should have been eliminated");
2008 return false;
2009 case OP_EXP:
2010 case OP_LOG:
2011 case OP_SQRT:
2012 case OP_POW:
2013 ERROR("operation should have been lowered\n");
2014 return false;
2015 default:
2016 ERROR("unknown op: %u\n", insn->op);
2017 return false;
2018 }
2019
2020 if (insn->join)
2021 code[0] |= 1 << 22;
2022
2023 code += 2;
2024 codeSize += 8;
2025 return true;
2026 }
2027
2028 uint32_t
2029 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2030 {
2031 // No more short instruction encodings.
2032 return 8;
2033 }
2034
2035 void
2036 CodeEmitterGK110::prepareEmission(Function *func)
2037 {
2038 const Target *targ = func->getProgram()->getTarget();
2039
2040 CodeEmitter::prepareEmission(func);
2041
2042 if (targ->hasSWSched)
2043 calculateSchedDataNVC0(targ, func);
2044 }
2045
2046 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2047 : CodeEmitter(target),
2048 targNVC0(target),
2049 writeIssueDelays(target->hasSWSched)
2050 {
2051 code = NULL;
2052 codeSize = codeSizeLimit = 0;
2053 relocInfo = NULL;
2054 }
2055
2056 CodeEmitter *
2057 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2058 {
2059 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2060 emit->setProgramType(type);
2061 return emit;
2062 }
2063
2064 } // namespace nv50_ir