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nvc0: add support for texture gather
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitPFETCH(const Instruction *);
81 void emitVFETCH(const Instruction *);
82 void emitEXPORT(const Instruction *);
83 void emitOUT(const Instruction *);
84
85 void emitUADD(const Instruction *);
86 void emitFADD(const Instruction *);
87 void emitIMUL(const Instruction *);
88 void emitFMUL(const Instruction *);
89 void emitIMAD(const Instruction *);
90 void emitISAD(const Instruction *);
91 void emitFMAD(const Instruction *);
92
93 void emitNOT(const Instruction *);
94 void emitLogicOp(const Instruction *, uint8_t subOp);
95 void emitPOPC(const Instruction *);
96 void emitINSBF(const Instruction *);
97 void emitShift(const Instruction *);
98
99 void emitSFnOp(const Instruction *, uint8_t subOp);
100
101 void emitCVT(const Instruction *);
102 void emitMINMAX(const Instruction *);
103 void emitPreOp(const Instruction *);
104
105 void emitSET(const CmpInstruction *);
106 void emitSLCT(const CmpInstruction *);
107 void emitSELP(const Instruction *);
108
109 void emitTEXBAR(const Instruction *);
110 void emitTEX(const TexInstruction *);
111 void emitTEXCSAA(const TexInstruction *);
112 void emitTXQ(const TexInstruction *);
113
114 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
115
116 void emitFlow(const Instruction *);
117
118 inline void defId(const ValueDef&, const int pos);
119 inline void srcId(const ValueRef&, const int pos);
120 inline void srcId(const ValueRef *, const int pos);
121 inline void srcId(const Instruction *, int s, const int pos);
122
123 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
124
125 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
126 };
127
128 #define GK110_GPR_ZERO 255
129
130 #define NEG_(b, s) \
131 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
132 #define ABS_(b, s) \
133 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
134
135 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
136 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
137
138 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
139
140 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
141
142 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
143
144 #define SDATA(a) ((a).rep()->reg.data)
145 #define DDATA(a) ((a).rep()->reg.data)
146
147 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
148 {
149 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
150 }
151
152 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
153 {
154 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
155 }
156
157 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
158 {
159 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
160 code[pos / 32] |= r << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
164 {
165 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
169 {
170 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
171 }
172
173 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
174 {
175 const ImmediateValue *imm = ref.get()->asImm();
176
177 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
178 }
179
180 void
181 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
182 {
183 bool rint = false;
184 uint8_t n;
185
186 switch (rnd) {
187 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
188 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
189 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
190 default:
191 rint = rnd == ROUND_NI;
192 n = 0;
193 assert(rnd == ROUND_N || rnd == ROUND_NI);
194 break;
195 }
196 code[pos / 32] |= n << (pos % 32);
197 if (rint && rintPos >= 0)
198 code[rintPos / 32] |= 1 << (rintPos % 32);
199 }
200
201 void
202 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
203 {
204 uint8_t n;
205
206 switch (rnd) {
207 case ROUND_M: n = 1; break;
208 case ROUND_P: n = 2; break;
209 case ROUND_Z: n = 3; break;
210 default:
211 n = 0;
212 assert(rnd == ROUND_N);
213 break;
214 }
215 code[pos / 32] |= n << (pos % 32);
216 }
217
218 void
219 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
220 {
221 uint8_t n;
222
223 switch (rnd) {
224 case ROUND_MI: n = 1; break;
225 case ROUND_PI: n = 2; break;
226 case ROUND_ZI: n = 3; break;
227 default:
228 n = 0;
229 assert(rnd == ROUND_NI);
230 break;
231 }
232 code[pos / 32] |= n << (pos % 32);
233 }
234
235 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
236 {
237 uint8_t n;
238
239 switch (cc) {
240 case CC_FL: n = 0x00; break;
241 case CC_LT: n = 0x01; break;
242 case CC_EQ: n = 0x02; break;
243 case CC_LE: n = 0x03; break;
244 case CC_GT: n = 0x04; break;
245 case CC_NE: n = 0x05; break;
246 case CC_GE: n = 0x06; break;
247 case CC_LTU: n = 0x09; break;
248 case CC_EQU: n = 0x0a; break;
249 case CC_LEU: n = 0x0b; break;
250 case CC_GTU: n = 0x0c; break;
251 case CC_NEU: n = 0x0d; break;
252 case CC_GEU: n = 0x0e; break;
253 case CC_TR: n = 0x0f; break;
254 case CC_NO: n = 0x10; break;
255 case CC_NC: n = 0x11; break;
256 case CC_NS: n = 0x12; break;
257 case CC_NA: n = 0x13; break;
258 case CC_A: n = 0x14; break;
259 case CC_S: n = 0x15; break;
260 case CC_C: n = 0x16; break;
261 case CC_O: n = 0x17; break;
262 default:
263 n = 0;
264 assert(!"invalid condition code");
265 break;
266 }
267 code[pos / 32] |= (n & mask) << (pos % 32);
268 }
269
270 void
271 CodeEmitterGK110::emitPredicate(const Instruction *i)
272 {
273 if (i->predSrc >= 0) {
274 srcId(i->src(i->predSrc), 18);
275 if (i->cc == CC_NOT_P)
276 code[0] |= 8 << 18; // negate
277 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
278 } else {
279 code[0] |= 7 << 18;
280 }
281 }
282
283 void
284 CodeEmitterGK110::setCAddress14(const ValueRef& src)
285 {
286 const int32_t addr = src.get()->asSym()->reg.data.offset / 4;
287
288 code[0] |= (addr & 0x01ff) << 23;
289 code[1] |= (addr & 0x3e00) >> 9;
290 }
291
292 void
293 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
294 {
295 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
296 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
297
298 if (i->sType == TYPE_F32) {
299 assert(!(u32 & 0x00000fff));
300 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
301 code[1] |= ((u32 & 0x7fe00000) >> 21);
302 code[1] |= ((u32 & 0x80000000) >> 4);
303 } else
304 if (i->sType == TYPE_F64) {
305 assert(!(u64 & 0x00000fffffffffffULL));
306 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
307 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
308 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
309 } else {
310 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
311 code[0] |= (u32 & 0x001ff) << 23;
312 code[1] |= (u32 & 0x7fe00) >> 9;
313 code[1] |= (u32 & 0x80000) << 8;
314 }
315 }
316
317 void
318 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
319 Modifier mod)
320 {
321 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
322
323 if (mod) {
324 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
325 mod.applyTo(imm);
326 u32 = imm.reg.data.u32;
327 }
328
329 code[0] |= u32 << 23;
330 code[1] |= u32 >> 9;
331 }
332
333 void
334 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
335 Modifier mod)
336 {
337 code[0] = ctg;
338 code[1] = opc << 20;
339
340 emitPredicate(i);
341
342 defId(i->def(0), 2);
343
344 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
345 switch (i->src(s).getFile()) {
346 case FILE_GPR:
347 srcId(i->src(s), s ? 42 : 10);
348 break;
349 case FILE_IMMEDIATE:
350 setImmediate32(i, s, mod);
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358
359 void
360 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
361 {
362 code[0] = ctg;
363 code[1] = opc << 20;
364
365 emitPredicate(i);
366
367 defId(i->def(0), 2);
368
369 switch (i->src(0).getFile()) {
370 case FILE_MEMORY_CONST:
371 code[1] |= 0x4 << 28;
372 setCAddress14(i->src(0));
373 break;
374 case FILE_GPR:
375 code[1] |= 0xc << 28;
376 srcId(i->src(0), 23);
377 break;
378 default:
379 assert(0);
380 break;
381 }
382 }
383
384 // 0x2 for GPR, c[] and 0x1 for short immediate
385 void
386 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
387 uint32_t opc1)
388 {
389 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
390
391 int s1 = 23;
392 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
393 s1 = 42;
394
395 if (imm) {
396 code[0] = 0x1;
397 code[1] = opc1 << 20;
398 } else {
399 code[0] = 0x2;
400 code[1] = (0xc << 28) | (opc2 << 20);
401 }
402
403 emitPredicate(i);
404
405 defId(i->def(0), 2);
406
407 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
408 switch (i->src(s).getFile()) {
409 case FILE_MEMORY_CONST:
410 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
411 setCAddress14(i->src(s));
412 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
413 break;
414 case FILE_IMMEDIATE:
415 setShortImmediate(i, s);
416 break;
417 case FILE_GPR:
418 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
419 break;
420 default:
421 // ignore here, can be predicate or flags, but must not be address
422 break;
423 }
424 }
425 // 0x0 = invalid
426 // 0xc = rrr
427 // 0x8 = rrc
428 // 0x4 = rcr
429 assert(imm || (code[1] & (0xc << 28)));
430 }
431
432 inline void
433 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
434 {
435 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
436 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
437 }
438
439 void
440 CodeEmitterGK110::emitNOP(const Instruction *i)
441 {
442 code[0] = 0x00003c02;
443 code[1] = 0x85800000;
444
445 if (i)
446 emitPredicate(i);
447 else
448 code[0] = 0x001c3c02;
449 }
450
451 void
452 CodeEmitterGK110::emitFMAD(const Instruction *i)
453 {
454 assert(!isLIMM(i->src(1), TYPE_F32));
455
456 emitForm_21(i, 0x0c0, 0x940);
457
458 NEG_(34, 2);
459 SAT_(35);
460 RND_(36, F);
461 FTZ_(38);
462
463 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
464
465 if (code[0] & 0x1) {
466 if (neg1)
467 code[1] ^= 1 << 27;
468 } else
469 if (neg1) {
470 code[1] |= 1 << 19;
471 }
472 }
473
474 void
475 CodeEmitterGK110::emitFMUL(const Instruction *i)
476 {
477 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
478
479 assert(i->postFactor >= -3 && i->postFactor <= 3);
480
481 if (isLIMM(i->src(1), TYPE_F32)) {
482 emitForm_L(i, 0x200, 0x2, Modifier(0));
483
484 FTZ_(38);
485 SAT_(3a);
486 if (neg)
487 code[1] ^= 1 << 22;
488
489 assert(i->postFactor == 0);
490 } else {
491 emitForm_21(i, 0x234, 0xc34);
492 code[1] |= ((i->postFactor > 0) ?
493 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
494
495 RND_(2a, F);
496 FTZ_(2f);
497 SAT_(35);
498
499 if (code[0] & 0x1) {
500 if (neg)
501 code[1] ^= 1 << 27;
502 } else
503 if (neg) {
504 code[1] |= 1 << 19;
505 }
506 }
507 }
508
509 void
510 CodeEmitterGK110::emitIMUL(const Instruction *i)
511 {
512 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
513 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
514
515 if (isLIMM(i->src(1), TYPE_S32)) {
516 emitForm_L(i, 0x280, 2, Modifier(0));
517
518 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
519
520 if (i->sType == TYPE_S32)
521 code[1] |= 3 << 25;
522 } else {
523 emitForm_21(i, 0x21c, 0xc1c);
524
525 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
526 code[1] |= 1 << 10;
527 if (i->sType == TYPE_S32)
528 code[1] |= 3 << 11;
529 }
530 }
531
532 void
533 CodeEmitterGK110::emitFADD(const Instruction *i)
534 {
535 if (isLIMM(i->src(1), TYPE_F32)) {
536 assert(i->rnd == ROUND_N);
537 assert(!i->saturate);
538
539 Modifier mod = i->src(1).mod ^
540 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
541
542 emitForm_L(i, 0x400, 0, mod);
543
544 FTZ_(3a);
545 NEG_(3b, 0);
546 ABS_(39, 0);
547 } else {
548 emitForm_21(i, 0x22c, 0xc2c);
549
550 FTZ_(2f);
551 RND_(2a, F);
552 ABS_(31, 0);
553 NEG_(33, 0);
554
555 if (code[0] & 0x1) {
556 modNegAbsF32_3b(i, 1);
557 if (i->op == OP_SUB) code[1] ^= 1 << 27;
558 } else {
559 ABS_(34, 1);
560 NEG_(30, 1);
561 if (i->op == OP_SUB) code[1] ^= 1 << 16;
562 }
563 }
564 }
565
566 void
567 CodeEmitterGK110::emitUADD(const Instruction *i)
568 {
569 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
570
571 if (i->op == OP_SUB)
572 addOp ^= 1;
573
574 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
575
576 if (isLIMM(i->src(1), TYPE_S32)) {
577 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
578
579 if (addOp & 2)
580 code[1] |= 1 << 27;
581
582 assert(!i->defExists(1));
583 assert(i->flagsSrc < 0);
584
585 SAT_(39);
586 } else {
587 emitForm_21(i, 0x208, 0xc08);
588
589 assert(addOp != 3); // would be add-plus-one
590
591 code[1] |= addOp << 19;
592
593 if (i->defExists(1))
594 code[1] |= 1 << 18; // write carry
595 if (i->flagsSrc >= 0)
596 code[1] |= 1 << 14; // add carry
597
598 SAT_(35);
599 }
600 }
601
602 // TODO: shl-add
603 void
604 CodeEmitterGK110::emitIMAD(const Instruction *i)
605 {
606 uint8_t addOp =
607 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
608
609 emitForm_21(i, 0x100, 0xa00);
610
611 assert(addOp != 3);
612 code[1] |= addOp << 26;
613
614 if (i->sType == TYPE_S32)
615 code[1] |= (1 << 19) | (1 << 24);
616
617 if (code[0] & 0x1) {
618 assert(!i->subOp);
619 SAT_(39);
620 } else {
621 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
622 code[1] |= 1 << 25;
623 SAT_(35);
624 }
625 }
626
627 void
628 CodeEmitterGK110::emitISAD(const Instruction *i)
629 {
630 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
631
632 emitForm_21(i, 0x1fc, 0xb74);
633
634 if (i->dType == TYPE_S32)
635 code[1] |= 1 << 19;
636 }
637
638 void
639 CodeEmitterGK110::emitNOT(const Instruction *i)
640 {
641 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
642 code[1] = 0x22003800;
643
644 emitPredicate(i);
645
646 defId(i->def(0), 2);
647
648 switch (i->src(0).getFile()) {
649 case FILE_GPR:
650 code[1] |= 0xc << 28;
651 srcId(i->src(0), 23);
652 break;
653 case FILE_MEMORY_CONST:
654 code[1] |= 0x4 << 28;
655 setCAddress14(i->src(1));
656 break;
657 default:
658 assert(0);
659 break;
660 }
661 }
662
663 void
664 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
665 {
666 if (isLIMM(i->src(1), TYPE_S32)) {
667 emitForm_L(i, 0x200, 0, i->src(1).mod);
668 code[1] |= subOp << 24;
669 NOT_(3a, 0);
670 } else {
671 emitForm_21(i, 0x220, 0xc20);
672 code[1] |= subOp << 12;
673 NOT_(2a, 0);
674 NOT_(2b, 1);
675 }
676 }
677
678 void
679 CodeEmitterGK110::emitPOPC(const Instruction *i)
680 {
681 assert(!isLIMM(i->src(1), TYPE_S32, true));
682
683 emitForm_21(i, 0x204, 0xc04);
684
685 NOT_(2a, 0);
686 if (!(code[0] & 0x1))
687 NOT_(2b, 1);
688 }
689
690 void
691 CodeEmitterGK110::emitINSBF(const Instruction *i)
692 {
693 emitForm_21(i, 0x1f8, 0xb78);
694 }
695
696 void
697 CodeEmitterGK110::emitShift(const Instruction *i)
698 {
699 if (i->op == OP_SHR) {
700 emitForm_21(i, 0x214, 0xc14);
701 if (isSignedType(i->dType))
702 code[1] |= 1 << 19;
703 } else {
704 emitForm_21(i, 0x224, 0xc24);
705 }
706
707 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
708 code[1] |= 1 << 10;
709 }
710
711 void
712 CodeEmitterGK110::emitPreOp(const Instruction *i)
713 {
714 emitForm_C(i, 0x248, 0x2);
715
716 if (i->op == OP_PREEX2)
717 code[1] |= 1 << 10;
718
719 NEG_(30, 0);
720 ABS_(34, 0);
721 }
722
723 void
724 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
725 {
726 code[0] = 0x00000002 | (subOp << 23);
727 code[1] = 0x84000000;
728
729 emitPredicate(i);
730
731 defId(i->def(0), 2);
732 srcId(i->src(0), 10);
733
734 NEG_(33, 0);
735 ABS_(31, 0);
736 SAT_(35);
737 }
738
739 void
740 CodeEmitterGK110::emitMINMAX(const Instruction *i)
741 {
742 uint32_t op2, op1;
743
744 switch (i->dType) {
745 case TYPE_U32:
746 case TYPE_S32:
747 op2 = 0x210;
748 op1 = 0xc10;
749 break;
750 case TYPE_F32:
751 op2 = 0x230;
752 op1 = 0xc30;
753 break;
754 case TYPE_F64:
755 op2 = 0x228;
756 op1 = 0xc28;
757 break;
758 default:
759 assert(0);
760 op2 = 0;
761 op1 = 0;
762 break;
763 }
764 emitForm_21(i, op2, op1);
765
766 if (i->dType == TYPE_S32)
767 code[1] |= 1 << 19;
768 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
769
770 FTZ_(2f);
771 ABS_(31, 0);
772 NEG_(33, 0);
773 if (code[0] & 0x1) {
774 modNegAbsF32_3b(i, 1);
775 } else {
776 ABS_(34, 1);
777 NEG_(30, 1);
778 }
779 }
780
781 void
782 CodeEmitterGK110::emitCVT(const Instruction *i)
783 {
784 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
785 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
786 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
787
788 bool sat = i->saturate;
789 bool abs = i->src(0).mod.abs();
790 bool neg = i->src(0).mod.neg();
791
792 RoundMode rnd = i->rnd;
793
794 switch (i->op) {
795 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
796 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
797 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
798 case OP_SAT: sat = true; break;
799 case OP_NEG: neg = !neg; break;
800 case OP_ABS: abs = true; neg = false; break;
801 default:
802 break;
803 }
804
805 DataType dType;
806
807 if (i->op == OP_NEG && i->dType == TYPE_U32)
808 dType = TYPE_S32;
809 else
810 dType = i->dType;
811
812
813 uint32_t op;
814
815 if (f2f) op = 0x254;
816 else if (f2i) op = 0x258;
817 else if (i2f) op = 0x25c;
818 else op = 0x260;
819
820 emitForm_C(i, op, 0x2);
821
822 FTZ_(2f);
823 if (neg) code[1] |= 1 << 16;
824 if (abs) code[1] |= 1 << 20;
825 if (sat) code[1] |= 1 << 21;
826
827 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
828
829 code[0] |= typeSizeofLog2(dType) << 10;
830 code[0] |= typeSizeofLog2(i->sType) << 12;
831
832 if (isSignedIntType(dType))
833 code[0] |= 0x4000;
834 if (isSignedIntType(i->sType))
835 code[0] |= 0x8000;
836 }
837
838 void
839 CodeEmitterGK110::emitSET(const CmpInstruction *i)
840 {
841 uint16_t op1, op2;
842
843 if (i->def(0).getFile() == FILE_PREDICATE) {
844 switch (i->sType) {
845 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
846 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
847 default:
848 op2 = 0x1b0;
849 op1 = 0xb30;
850 break;
851 }
852 emitForm_21(i, op2, op1);
853
854 NEG_(2e, 0);
855 ABS_(9, 0);
856 if (!(code[0] & 0x1)) {
857 NEG_(8, 1);
858 ABS_(2f, 1);
859 } else {
860 modNegAbsF32_3b(i, 1);
861 }
862 FTZ_(32);
863
864 // normal DST field is negated predicate result
865 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
866 if (i->defExists(1))
867 defId(i->def(1), 2);
868 else
869 code[0] |= 0x1c;
870 } else {
871 switch (i->sType) {
872 case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
873 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
874 default:
875 op2 = 0x1a8;
876 op1 = 0xb28;
877 break;
878 }
879 emitForm_21(i, op2, op1);
880
881 NEG_(2e, 0);
882 ABS_(39, 0);
883 if (!(code[0] & 0x1)) {
884 NEG_(38, 1);
885 ABS_(2f, 1);
886 } else {
887 modNegAbsF32_3b(i, 1);
888 }
889 FTZ_(3a);
890 }
891 if (i->sType == TYPE_S32)
892 code[1] |= 1 << 19;
893
894 if (i->op != OP_SET) {
895 switch (i->op) {
896 case OP_SET_AND: code[1] |= 0x0 << 16; break;
897 case OP_SET_OR: code[1] |= 0x1 << 16; break;
898 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
899 default:
900 assert(0);
901 break;
902 }
903 srcId(i->src(2), 0x2a);
904 } else {
905 code[1] |= 0x7 << 10;
906 }
907 emitCondCode(i->setCond,
908 isFloatType(i->sType) ? 0x33 : 0x34,
909 isFloatType(i->sType) ? 0xf : 0x7);
910 }
911
912 void
913 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
914 {
915 CondCode cc = i->setCond;
916 if (i->src(2).mod.neg())
917 cc = reverseCondCode(cc);
918
919 if (i->dType == TYPE_F32) {
920 emitForm_21(i, 0x1d0, 0xb50);
921 FTZ_(32);
922 emitCondCode(cc, 0x33, 0xf);
923 } else {
924 emitForm_21(i, 0x1a4, 0xb20);
925 emitCondCode(cc, 0x34, 0x7);
926 }
927 }
928
929 void CodeEmitterGK110::emitSELP(const Instruction *i)
930 {
931 emitForm_21(i, 0x250, 0x050);
932
933 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
934 code[1] |= 1 << 13;
935 }
936
937 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
938 {
939 code[0] = 0x00000002 | (i->subOp << 23);
940 code[1] = 0x77000000;
941
942 emitPredicate(i);
943 }
944
945 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
946 {
947 code[0] = 0x00000002;
948 code[1] = 0x76c00000;
949
950 code[1] |= i->tex.r << 9;
951 // code[1] |= i->tex.s << (9 + 8);
952
953 if (i->tex.liveOnly)
954 code[0] |= 0x80000000;
955
956 defId(i->def(0), 2);
957 srcId(i->src(0), 10);
958 }
959
960 static inline bool
961 isNextIndependentTex(const TexInstruction *i)
962 {
963 if (!i->next || !isTextureOp(i->next->op))
964 return false;
965 if (i->getDef(0)->interfers(i->next->getSrc(0)))
966 return false;
967 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
968 }
969
970 void
971 CodeEmitterGK110::emitTEX(const TexInstruction *i)
972 {
973 const bool ind = i->tex.rIndirectSrc >= 0;
974
975 if (ind) {
976 code[0] = 0x00000002;
977 switch (i->op) {
978 case OP_TXD:
979 code[1] = 0x7e000000;
980 break;
981 case OP_TXLQ:
982 code[1] = 0x7e800000;
983 break;
984 case OP_TXF:
985 code[1] = 0x78000000;
986 break;
987 case OP_TXG:
988 code[1] = 0x7dc00000;
989 break;
990 default:
991 code[1] = 0x7d800000;
992 break;
993 }
994 } else {
995 switch (i->op) {
996 case OP_TXD:
997 code[0] = 0x00000002;
998 code[1] = 0x76000000;
999 code[1] |= i->tex.r << 9;
1000 break;
1001 case OP_TXLQ:
1002 code[0] = 0x00000002;
1003 code[1] = 0x76800000;
1004 code[1] |= i->tex.r << 9;
1005 break;
1006 case OP_TXF:
1007 code[0] = 0x00000002;
1008 code[1] = 0x70000000;
1009 code[1] |= i->tex.r << 13;
1010 break;
1011 case OP_TXG:
1012 code[0] = 0x00000001;
1013 code[1] = 0x70000000;
1014 code[1] |= i->tex.r << 15;
1015 break;
1016 default:
1017 code[0] = 0x00000001;
1018 code[1] = 0x60000000;
1019 code[1] |= i->tex.r << 15;
1020 break;
1021 }
1022 }
1023
1024 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1025
1026 if (i->tex.liveOnly)
1027 code[0] |= 0x80000000;
1028
1029 switch (i->op) {
1030 case OP_TEX: break;
1031 case OP_TXB: code[1] |= 0x2000; break;
1032 case OP_TXL: code[1] |= 0x3000; break;
1033 case OP_TXF: break;
1034 case OP_TXG: break;
1035 case OP_TXD: break;
1036 case OP_TXLQ: break;
1037 default:
1038 assert(!"invalid texture op");
1039 break;
1040 }
1041
1042 if (i->op == OP_TXF) {
1043 if (!i->tex.levelZero)
1044 code[1] |= 0x1000;
1045 } else
1046 if (i->tex.levelZero) {
1047 code[1] |= 0x1000;
1048 }
1049
1050 if (i->op != OP_TXD && i->tex.derivAll)
1051 code[1] |= 0x200;
1052
1053 emitPredicate(i);
1054
1055 code[1] |= i->tex.mask << 2;
1056
1057 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1058
1059 defId(i->def(0), 2);
1060 srcId(i->src(0), 10);
1061 srcId(i, src1, 23);
1062
1063 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1064
1065 // texture target:
1066 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1067 if (i->tex.target.isArray())
1068 code[1] |= 0x40;
1069 if (i->tex.target.isShadow())
1070 code[1] |= 0x400;
1071 if (i->tex.target == TEX_TARGET_2D_MS ||
1072 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1073 code[1] |= 0x800;
1074
1075 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1076 // ?
1077 }
1078
1079 if (i->tex.useOffsets) {
1080 switch (i->op) {
1081 case OP_TXF: code[1] |= 0x200; break;
1082 default: code[1] |= 0x800; break;
1083 }
1084 }
1085 }
1086
1087 void
1088 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1089 {
1090 code[0] = 0x00000002;
1091 code[1] = 0x75400001;
1092
1093 switch (i->tex.query) {
1094 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1095 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1096 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1097 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1098 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1099 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1100 default:
1101 assert(!"invalid texture query");
1102 break;
1103 }
1104
1105 code[1] |= i->tex.mask << 2;
1106 code[1] |= i->tex.r << 9;
1107 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1108 code[1] |= 0x08000000;
1109
1110 defId(i->def(0), 2);
1111 srcId(i->src(0), 10);
1112
1113 emitPredicate(i);
1114 }
1115
1116 void
1117 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1118 {
1119 code[0] = 0x00000002 | ((qOp & 1) << 31);
1120 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1121
1122 defId(i->def(0), 2);
1123 srcId(i->src(0), 10);
1124 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1125
1126 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1127 code[1] |= 1 << 9; // dall
1128
1129 emitPredicate(i);
1130 }
1131
1132 void
1133 CodeEmitterGK110::emitFlow(const Instruction *i)
1134 {
1135 const FlowInstruction *f = i->asFlow();
1136
1137 unsigned mask; // bit 0: predicate, bit 1: target
1138
1139 code[0] = 0x00000000;
1140
1141 switch (i->op) {
1142 case OP_BRA:
1143 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1144 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1145 code[0] |= 0x80;
1146 mask = 3;
1147 break;
1148 case OP_CALL:
1149 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1150 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1151 code[0] |= 0x80;
1152 mask = 2;
1153 break;
1154
1155 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1156 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1157 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1158 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1159 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1160
1161 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1162 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1163 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1164 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1165
1166 case OP_QUADON: code[1] = 0x1b000000; mask = 0; break;
1167 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1168 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1169 default:
1170 assert(!"invalid flow operation");
1171 return;
1172 }
1173
1174 if (mask & 1) {
1175 emitPredicate(i);
1176 if (i->flagsSrc < 0)
1177 code[0] |= 0x3c;
1178 }
1179
1180 if (!f)
1181 return;
1182
1183 if (f->allWarp)
1184 code[0] |= 1 << 9;
1185 if (f->limit)
1186 code[0] |= 1 << 8;
1187
1188 if (f->op == OP_CALL) {
1189 if (f->builtin) {
1190 assert(f->absolute);
1191 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1192 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1193 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1194 } else {
1195 assert(!f->absolute);
1196 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1197 code[0] |= (pcRel & 0x1ff) << 23;
1198 code[1] |= (pcRel >> 9) & 0x7fff;
1199 }
1200 } else
1201 if (mask & 2) {
1202 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1203 // currently we don't want absolute branches
1204 assert(!f->absolute);
1205 code[0] |= (pcRel & 0x1ff) << 23;
1206 code[1] |= (pcRel >> 9) & 0x7fff;
1207 }
1208 }
1209
1210 void
1211 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1212 {
1213 uint32_t prim = i->src(0).get()->reg.data.u32;
1214
1215 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1216 code[1] = 0x7f800000;
1217
1218 emitPredicate(i);
1219
1220 defId(i->def(0), 2);
1221 srcId(i->src(1), 10);
1222 }
1223
1224 void
1225 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1226 {
1227 unsigned int size = typeSizeof(i->dType);
1228 uint32_t offset = i->src(0).get()->reg.data.offset;
1229
1230 code[0] = 0x00000002 | (offset << 23);
1231 code[1] = 0x7ec00000 | (offset >> 9);
1232 code[1] |= (size / 4 - 1) << 18;
1233
1234 #if 0
1235 if (i->perPatch)
1236 code[0] |= 0x100;
1237 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1238 code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
1239 #endif
1240
1241 emitPredicate(i);
1242
1243 defId(i->def(0), 2);
1244 srcId(i->src(0).getIndirect(0), 10);
1245 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1246 }
1247
1248 void
1249 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1250 {
1251 unsigned int size = typeSizeof(i->dType);
1252 uint32_t offset = i->src(0).get()->reg.data.offset;
1253
1254 code[0] = 0x00000002 | (offset << 23);
1255 code[1] = 0x7f000000 | (offset >> 9);
1256 code[1] |= (size / 4 - 1) << 18;
1257
1258 #if 0
1259 if (i->perPatch)
1260 code[0] |= 0x100;
1261 #endif
1262
1263 emitPredicate(i);
1264
1265 assert(i->src(1).getFile() == FILE_GPR);
1266
1267 srcId(i->src(0).getIndirect(0), 10);
1268 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1269 srcId(i->src(1), 2);
1270 }
1271
1272 void
1273 CodeEmitterGK110::emitOUT(const Instruction *i)
1274 {
1275 assert(i->src(0).getFile() == FILE_GPR);
1276
1277 emitForm_21(i, 0x1f0, 0xb70);
1278
1279 if (i->op == OP_EMIT)
1280 code[1] |= 1 << 10;
1281 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1282 code[1] |= 1 << 11;
1283 }
1284
1285 void
1286 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1287 {
1288 code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
1289 }
1290
1291 void
1292 CodeEmitterGK110::emitINTERP(const Instruction *i)
1293 {
1294 const uint32_t base = i->getSrc(0)->reg.data.offset;
1295
1296 code[0] = 0x00000002 | (base << 31);
1297 code[1] = 0x74800000 | (base >> 1);
1298
1299 if (i->saturate)
1300 code[1] |= 1 << 18;
1301
1302 if (i->op == OP_PINTERP)
1303 srcId(i->src(1), 23);
1304 else
1305 code[0] |= 0xff << 23;
1306
1307 srcId(i->src(0).getIndirect(0), 10);
1308 emitInterpMode(i);
1309
1310 emitPredicate(i);
1311 defId(i->def(0), 2);
1312
1313 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1314 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1315 else
1316 code[1] |= 0xff << 10;
1317 }
1318
1319 void
1320 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1321 {
1322 uint8_t n;
1323
1324 switch (ty) {
1325 case TYPE_U8:
1326 n = 0;
1327 break;
1328 case TYPE_S8:
1329 n = 1;
1330 break;
1331 case TYPE_U16:
1332 n = 2;
1333 break;
1334 case TYPE_S16:
1335 n = 3;
1336 break;
1337 case TYPE_F32:
1338 case TYPE_U32:
1339 case TYPE_S32:
1340 n = 4;
1341 break;
1342 case TYPE_F64:
1343 case TYPE_U64:
1344 case TYPE_S64:
1345 n = 5;
1346 break;
1347 case TYPE_B128:
1348 n = 6;
1349 break;
1350 default:
1351 n = 0;
1352 assert(!"invalid ld/st type");
1353 break;
1354 }
1355 code[pos / 32] |= n << (pos % 32);
1356 }
1357
1358 void
1359 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1360 {
1361 uint8_t n;
1362
1363 switch (c) {
1364 case CACHE_CA:
1365 // case CACHE_WB:
1366 n = 0;
1367 break;
1368 case CACHE_CG:
1369 n = 1;
1370 break;
1371 case CACHE_CS:
1372 n = 2;
1373 break;
1374 case CACHE_CV:
1375 // case CACHE_WT:
1376 n = 3;
1377 break;
1378 default:
1379 n = 0;
1380 assert(!"invalid caching mode");
1381 break;
1382 }
1383 code[pos / 32] |= n << (pos % 32);
1384 }
1385
1386 void
1387 CodeEmitterGK110::emitSTORE(const Instruction *i)
1388 {
1389 int32_t offset = SDATA(i->src(0)).offset;
1390
1391 switch (i->src(0).getFile()) {
1392 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1393 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1394 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1395 default:
1396 assert(!"invalid memory file");
1397 break;
1398 }
1399
1400 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1401 offset &= 0xffffff;
1402
1403 if (code[0] & 0x2) {
1404 emitLoadStoreType(i->dType, 0x33);
1405 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1406 emitCachingMode(i->cache, 0x2f);
1407 } else {
1408 emitLoadStoreType(i->dType, 0x38);
1409 emitCachingMode(i->cache, 0x3b);
1410 }
1411 code[0] |= offset << 23;
1412 code[1] |= offset >> 9;
1413
1414 emitPredicate(i);
1415
1416 srcId(i->src(1), 2);
1417 srcId(i->src(0).getIndirect(0), 10);
1418 }
1419
1420 void
1421 CodeEmitterGK110::emitLOAD(const Instruction *i)
1422 {
1423 int32_t offset = SDATA(i->src(0)).offset;
1424
1425 switch (i->src(0).getFile()) {
1426 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1427 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1428 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1429 case FILE_MEMORY_CONST:
1430 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1431 emitMOV(i);
1432 return;
1433 }
1434 offset &= 0xffff;
1435 code[0] = 0x00000002;
1436 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1437 break;
1438 default:
1439 assert(!"invalid memory file");
1440 break;
1441 }
1442
1443 if (code[0] & 0x2) {
1444 offset &= 0xffffff;
1445 emitLoadStoreType(i->dType, 0x33);
1446 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1447 emitCachingMode(i->cache, 0x2f);
1448 } else {
1449 emitLoadStoreType(i->dType, 0x38);
1450 emitCachingMode(i->cache, 0x3b);
1451 }
1452 code[0] |= offset << 23;
1453 code[1] |= offset >> 9;
1454
1455 emitPredicate(i);
1456
1457 defId(i->def(0), 2);
1458 srcId(i->src(0).getIndirect(0), 10);
1459 }
1460
1461 uint8_t
1462 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1463 {
1464 switch (SDATA(ref).sv.sv) {
1465 case SV_LANEID: return 0x00;
1466 case SV_PHYSID: return 0x03;
1467 case SV_VERTEX_COUNT: return 0x10;
1468 case SV_INVOCATION_ID: return 0x11;
1469 case SV_YDIR: return 0x12;
1470 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1471 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1472 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1473 case SV_GRIDID: return 0x2c;
1474 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1475 case SV_LBASE: return 0x34;
1476 case SV_SBASE: return 0x30;
1477 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1478 default:
1479 assert(!"no sreg for system value");
1480 return 0;
1481 }
1482 }
1483
1484 void
1485 CodeEmitterGK110::emitMOV(const Instruction *i)
1486 {
1487 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1488 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1489 code[1] = 0x86400000;
1490 emitPredicate(i);
1491 defId(i->def(0), 2);
1492 } else
1493 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1494 code[0] = 0x00000002 | (i->lanes << 14);
1495 code[1] = 0x74000000;
1496 emitPredicate(i);
1497 defId(i->def(0), 2);
1498 setImmediate32(i, 0, Modifier(0));
1499 } else
1500 if (i->src(0).getFile() == FILE_PREDICATE) {
1501 code[0] = 0x00000002;
1502 code[1] = 0x84401c07;
1503 emitPredicate(i);
1504 defId(i->def(0), 2);
1505 srcId(i->src(0), 14);
1506 } else {
1507 emitForm_C(i, 0x24c, 2);
1508 code[1] |= i->lanes << 10;
1509 }
1510 }
1511
1512 bool
1513 CodeEmitterGK110::emitInstruction(Instruction *insn)
1514 {
1515 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1516
1517 if (insn->encSize != 8) {
1518 ERROR("skipping unencodable instruction: ");
1519 insn->print();
1520 return false;
1521 } else
1522 if (codeSize + size > codeSizeLimit) {
1523 ERROR("code emitter output buffer too small\n");
1524 return false;
1525 }
1526
1527 if (writeIssueDelays) {
1528 int id = (codeSize & 0x3f) / 8 - 1;
1529 if (id < 0) {
1530 id += 1;
1531 code[0] = 0x00000000; // cf issue delay "instruction"
1532 code[1] = 0x08000000;
1533 code += 2;
1534 codeSize += 8;
1535 }
1536 uint32_t *data = code - (id * 2 + 2);
1537
1538 switch (id) {
1539 case 0: data[0] |= insn->sched << 2; break;
1540 case 1: data[0] |= insn->sched << 10; break;
1541 case 2: data[0] |= insn->sched << 18; break;
1542 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1543 case 4: data[1] |= insn->sched << 2; break;
1544 case 5: data[1] |= insn->sched << 10; break;
1545 case 6: data[1] |= insn->sched << 18; break;
1546 default:
1547 assert(0);
1548 break;
1549 }
1550 }
1551
1552 // assert that instructions with multiple defs don't corrupt registers
1553 for (int d = 0; insn->defExists(d); ++d)
1554 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1555
1556 switch (insn->op) {
1557 case OP_MOV:
1558 case OP_RDSV:
1559 emitMOV(insn);
1560 break;
1561 case OP_NOP:
1562 break;
1563 case OP_LOAD:
1564 emitLOAD(insn);
1565 break;
1566 case OP_STORE:
1567 emitSTORE(insn);
1568 break;
1569 case OP_LINTERP:
1570 case OP_PINTERP:
1571 emitINTERP(insn);
1572 break;
1573 case OP_VFETCH:
1574 emitVFETCH(insn);
1575 break;
1576 case OP_EXPORT:
1577 emitEXPORT(insn);
1578 break;
1579 case OP_PFETCH:
1580 emitPFETCH(insn);
1581 break;
1582 case OP_EMIT:
1583 case OP_RESTART:
1584 emitOUT(insn);
1585 break;
1586 case OP_ADD:
1587 case OP_SUB:
1588 if (isFloatType(insn->dType))
1589 emitFADD(insn);
1590 else
1591 emitUADD(insn);
1592 break;
1593 case OP_MUL:
1594 if (isFloatType(insn->dType))
1595 emitFMUL(insn);
1596 else
1597 emitIMUL(insn);
1598 break;
1599 case OP_MAD:
1600 case OP_FMA:
1601 if (isFloatType(insn->dType))
1602 emitFMAD(insn);
1603 else
1604 emitIMAD(insn);
1605 break;
1606 case OP_SAD:
1607 emitISAD(insn);
1608 break;
1609 case OP_NOT:
1610 emitNOT(insn);
1611 break;
1612 case OP_AND:
1613 emitLogicOp(insn, 0);
1614 break;
1615 case OP_OR:
1616 emitLogicOp(insn, 1);
1617 break;
1618 case OP_XOR:
1619 emitLogicOp(insn, 2);
1620 break;
1621 case OP_SHL:
1622 case OP_SHR:
1623 emitShift(insn);
1624 break;
1625 case OP_SET:
1626 case OP_SET_AND:
1627 case OP_SET_OR:
1628 case OP_SET_XOR:
1629 emitSET(insn->asCmp());
1630 break;
1631 case OP_SELP:
1632 emitSELP(insn);
1633 break;
1634 case OP_SLCT:
1635 emitSLCT(insn->asCmp());
1636 break;
1637 case OP_MIN:
1638 case OP_MAX:
1639 emitMINMAX(insn);
1640 break;
1641 case OP_ABS:
1642 case OP_NEG:
1643 case OP_CEIL:
1644 case OP_FLOOR:
1645 case OP_TRUNC:
1646 case OP_CVT:
1647 case OP_SAT:
1648 emitCVT(insn);
1649 break;
1650 case OP_RSQ:
1651 emitSFnOp(insn, 5);
1652 break;
1653 case OP_RCP:
1654 emitSFnOp(insn, 4);
1655 break;
1656 case OP_LG2:
1657 emitSFnOp(insn, 3);
1658 break;
1659 case OP_EX2:
1660 emitSFnOp(insn, 2);
1661 break;
1662 case OP_SIN:
1663 emitSFnOp(insn, 1);
1664 break;
1665 case OP_COS:
1666 emitSFnOp(insn, 0);
1667 break;
1668 case OP_PRESIN:
1669 case OP_PREEX2:
1670 emitPreOp(insn);
1671 break;
1672 case OP_TEX:
1673 case OP_TXB:
1674 case OP_TXL:
1675 case OP_TXD:
1676 case OP_TXF:
1677 case OP_TXG:
1678 case OP_TXLQ:
1679 emitTEX(insn->asTex());
1680 break;
1681 case OP_TXQ:
1682 emitTXQ(insn->asTex());
1683 break;
1684 case OP_TEXBAR:
1685 emitTEXBAR(insn);
1686 break;
1687 case OP_BRA:
1688 case OP_CALL:
1689 case OP_PRERET:
1690 case OP_RET:
1691 case OP_DISCARD:
1692 case OP_EXIT:
1693 case OP_PRECONT:
1694 case OP_CONT:
1695 case OP_PREBREAK:
1696 case OP_BREAK:
1697 case OP_JOINAT:
1698 case OP_BRKPT:
1699 case OP_QUADON:
1700 case OP_QUADPOP:
1701 emitFlow(insn);
1702 break;
1703 case OP_QUADOP:
1704 emitQUADOP(insn, insn->subOp, insn->lanes);
1705 break;
1706 case OP_DFDX:
1707 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1708 break;
1709 case OP_DFDY:
1710 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1711 break;
1712 case OP_POPCNT:
1713 emitPOPC(insn);
1714 break;
1715 case OP_JOIN:
1716 emitNOP(insn);
1717 insn->join = 1;
1718 break;
1719 case OP_PHI:
1720 case OP_UNION:
1721 case OP_CONSTRAINT:
1722 ERROR("operation should have been eliminated");
1723 return false;
1724 case OP_EXP:
1725 case OP_LOG:
1726 case OP_SQRT:
1727 case OP_POW:
1728 ERROR("operation should have been lowered\n");
1729 return false;
1730 default:
1731 ERROR("unknow op\n");
1732 return false;
1733 }
1734
1735 if (insn->join)
1736 code[0] |= 1 << 22;
1737
1738 code += 2;
1739 codeSize += 8;
1740 return true;
1741 }
1742
1743 uint32_t
1744 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1745 {
1746 // No more short instruction encodings.
1747 return 8;
1748 }
1749
1750 void
1751 CodeEmitterGK110::prepareEmission(Function *func)
1752 {
1753 const Target *targ = func->getProgram()->getTarget();
1754
1755 CodeEmitter::prepareEmission(func);
1756
1757 if (targ->hasSWSched)
1758 calculateSchedDataNVC0(targ, func);
1759 }
1760
1761 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1762 : CodeEmitter(target),
1763 targNVC0(target),
1764 writeIssueDelays(target->hasSWSched)
1765 {
1766 code = NULL;
1767 codeSize = codeSizeLimit = 0;
1768 relocInfo = NULL;
1769 }
1770
1771 CodeEmitter *
1772 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1773 {
1774 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1775 emit->setProgramType(type);
1776 return emit;
1777 }
1778
1779 } // namespace nv50_ir