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[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78 void emitATOM(const Instruction *);
79 void emitCCTL(const Instruction *);
80
81 void emitINTERP(const Instruction *);
82 void emitAFETCH(const Instruction *);
83 void emitPFETCH(const Instruction *);
84 void emitVFETCH(const Instruction *);
85 void emitEXPORT(const Instruction *);
86 void emitOUT(const Instruction *);
87
88 void emitUADD(const Instruction *);
89 void emitFADD(const Instruction *);
90 void emitDADD(const Instruction *);
91 void emitIMUL(const Instruction *);
92 void emitFMUL(const Instruction *);
93 void emitDMUL(const Instruction *);
94 void emitIMAD(const Instruction *);
95 void emitISAD(const Instruction *);
96 void emitFMAD(const Instruction *);
97 void emitDMAD(const Instruction *);
98
99 void emitNOT(const Instruction *);
100 void emitLogicOp(const Instruction *, uint8_t subOp);
101 void emitPOPC(const Instruction *);
102 void emitINSBF(const Instruction *);
103 void emitEXTBF(const Instruction *);
104 void emitBFIND(const Instruction *);
105 void emitShift(const Instruction *);
106
107 void emitSFnOp(const Instruction *, uint8_t subOp);
108
109 void emitCVT(const Instruction *);
110 void emitMINMAX(const Instruction *);
111 void emitPreOp(const Instruction *);
112
113 void emitSET(const CmpInstruction *);
114 void emitSLCT(const CmpInstruction *);
115 void emitSELP(const Instruction *);
116
117 void emitTEXBAR(const Instruction *);
118 void emitTEX(const TexInstruction *);
119 void emitTEXCSAA(const TexInstruction *);
120 void emitTXQ(const TexInstruction *);
121
122 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
123
124 void emitPIXLD(const Instruction *);
125
126 void emitBAR(const Instruction *);
127 void emitMEMBAR(const Instruction *);
128
129 void emitFlow(const Instruction *);
130
131 inline void defId(const ValueDef&, const int pos);
132 inline void srcId(const ValueRef&, const int pos);
133 inline void srcId(const ValueRef *, const int pos);
134 inline void srcId(const Instruction *, int s, const int pos);
135
136 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
137
138 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
139 };
140
141 #define GK110_GPR_ZERO 255
142
143 #define NEG_(b, s) \
144 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
145 #define ABS_(b, s) \
146 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
147
148 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
149 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
150
151 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
152 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
153
154 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
155
156 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
157
158 #define SDATA(a) ((a).rep()->reg.data)
159 #define DDATA(a) ((a).rep()->reg.data)
160
161 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
162 {
163 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
164 }
165
166 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
167 {
168 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
169 }
170
171 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
172 {
173 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
174 code[pos / 32] |= r << (pos % 32);
175 }
176
177 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
178 {
179 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
180 }
181
182 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
183 {
184 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
185 }
186
187 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
188 {
189 const ImmediateValue *imm = ref.get()->asImm();
190
191 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
192 }
193
194 void
195 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
196 {
197 bool rint = false;
198 uint8_t n;
199
200 switch (rnd) {
201 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
202 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
203 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
204 default:
205 rint = rnd == ROUND_NI;
206 n = 0;
207 assert(rnd == ROUND_N || rnd == ROUND_NI);
208 break;
209 }
210 code[pos / 32] |= n << (pos % 32);
211 if (rint && rintPos >= 0)
212 code[rintPos / 32] |= 1 << (rintPos % 32);
213 }
214
215 void
216 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
217 {
218 uint8_t n;
219
220 switch (rnd) {
221 case ROUND_M: n = 1; break;
222 case ROUND_P: n = 2; break;
223 case ROUND_Z: n = 3; break;
224 default:
225 n = 0;
226 assert(rnd == ROUND_N);
227 break;
228 }
229 code[pos / 32] |= n << (pos % 32);
230 }
231
232 void
233 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
234 {
235 uint8_t n;
236
237 switch (rnd) {
238 case ROUND_MI: n = 1; break;
239 case ROUND_PI: n = 2; break;
240 case ROUND_ZI: n = 3; break;
241 default:
242 n = 0;
243 assert(rnd == ROUND_NI);
244 break;
245 }
246 code[pos / 32] |= n << (pos % 32);
247 }
248
249 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
250 {
251 uint8_t n;
252
253 switch (cc) {
254 case CC_FL: n = 0x00; break;
255 case CC_LT: n = 0x01; break;
256 case CC_EQ: n = 0x02; break;
257 case CC_LE: n = 0x03; break;
258 case CC_GT: n = 0x04; break;
259 case CC_NE: n = 0x05; break;
260 case CC_GE: n = 0x06; break;
261 case CC_LTU: n = 0x09; break;
262 case CC_EQU: n = 0x0a; break;
263 case CC_LEU: n = 0x0b; break;
264 case CC_GTU: n = 0x0c; break;
265 case CC_NEU: n = 0x0d; break;
266 case CC_GEU: n = 0x0e; break;
267 case CC_TR: n = 0x0f; break;
268 case CC_NO: n = 0x10; break;
269 case CC_NC: n = 0x11; break;
270 case CC_NS: n = 0x12; break;
271 case CC_NA: n = 0x13; break;
272 case CC_A: n = 0x14; break;
273 case CC_S: n = 0x15; break;
274 case CC_C: n = 0x16; break;
275 case CC_O: n = 0x17; break;
276 default:
277 n = 0;
278 assert(!"invalid condition code");
279 break;
280 }
281 code[pos / 32] |= (n & mask) << (pos % 32);
282 }
283
284 void
285 CodeEmitterGK110::emitPredicate(const Instruction *i)
286 {
287 if (i->predSrc >= 0) {
288 srcId(i->src(i->predSrc), 18);
289 if (i->cc == CC_NOT_P)
290 code[0] |= 8 << 18; // negate
291 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
292 } else {
293 code[0] |= 7 << 18;
294 }
295 }
296
297 void
298 CodeEmitterGK110::setCAddress14(const ValueRef& src)
299 {
300 const Storage& res = src.get()->asSym()->reg;
301 const int32_t addr = res.data.offset / 4;
302
303 code[0] |= (addr & 0x01ff) << 23;
304 code[1] |= (addr & 0x3e00) >> 9;
305 code[1] |= res.fileIndex << 5;
306 }
307
308 void
309 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
310 {
311 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
312 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
313
314 if (i->sType == TYPE_F32) {
315 assert(!(u32 & 0x00000fff));
316 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
317 code[1] |= ((u32 & 0x7fe00000) >> 21);
318 code[1] |= ((u32 & 0x80000000) >> 4);
319 } else
320 if (i->sType == TYPE_F64) {
321 assert(!(u64 & 0x00000fffffffffffULL));
322 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
323 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
324 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
325 } else {
326 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
327 code[0] |= (u32 & 0x001ff) << 23;
328 code[1] |= (u32 & 0x7fe00) >> 9;
329 code[1] |= (u32 & 0x80000) << 8;
330 }
331 }
332
333 void
334 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
335 Modifier mod)
336 {
337 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
338
339 if (mod) {
340 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
341 mod.applyTo(imm);
342 u32 = imm.reg.data.u32;
343 }
344
345 code[0] |= u32 << 23;
346 code[1] |= u32 >> 9;
347 }
348
349 void
350 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
351 Modifier mod)
352 {
353 code[0] = ctg;
354 code[1] = opc << 20;
355
356 emitPredicate(i);
357
358 defId(i->def(0), 2);
359
360 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
361 switch (i->src(s).getFile()) {
362 case FILE_GPR:
363 srcId(i->src(s), s ? 42 : 10);
364 break;
365 case FILE_IMMEDIATE:
366 setImmediate32(i, s, mod);
367 break;
368 default:
369 break;
370 }
371 }
372 }
373
374
375 void
376 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
377 {
378 code[0] = ctg;
379 code[1] = opc << 20;
380
381 emitPredicate(i);
382
383 defId(i->def(0), 2);
384
385 switch (i->src(0).getFile()) {
386 case FILE_MEMORY_CONST:
387 code[1] |= 0x4 << 28;
388 setCAddress14(i->src(0));
389 break;
390 case FILE_GPR:
391 code[1] |= 0xc << 28;
392 srcId(i->src(0), 23);
393 break;
394 default:
395 assert(0);
396 break;
397 }
398 }
399
400 // 0x2 for GPR, c[] and 0x1 for short immediate
401 void
402 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
403 uint32_t opc1)
404 {
405 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
406
407 int s1 = 23;
408 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
409 s1 = 42;
410
411 if (imm) {
412 code[0] = 0x1;
413 code[1] = opc1 << 20;
414 } else {
415 code[0] = 0x2;
416 code[1] = (0xc << 28) | (opc2 << 20);
417 }
418
419 emitPredicate(i);
420
421 defId(i->def(0), 2);
422
423 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
424 switch (i->src(s).getFile()) {
425 case FILE_MEMORY_CONST:
426 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
427 setCAddress14(i->src(s));
428 break;
429 case FILE_IMMEDIATE:
430 setShortImmediate(i, s);
431 break;
432 case FILE_GPR:
433 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
434 break;
435 default:
436 if (i->op == OP_SELP) {
437 assert(s == 2 && i->src(s).getFile() == FILE_PREDICATE);
438 srcId(i->src(s), 42);
439 }
440 // ignore here, can be predicate or flags, but must not be address
441 break;
442 }
443 }
444 // 0x0 = invalid
445 // 0xc = rrr
446 // 0x8 = rrc
447 // 0x4 = rcr
448 assert(imm || (code[1] & (0xc << 28)));
449 }
450
451 inline void
452 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
453 {
454 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
455 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
456 }
457
458 void
459 CodeEmitterGK110::emitNOP(const Instruction *i)
460 {
461 code[0] = 0x00003c02;
462 code[1] = 0x85800000;
463
464 if (i)
465 emitPredicate(i);
466 else
467 code[0] = 0x001c3c02;
468 }
469
470 void
471 CodeEmitterGK110::emitFMAD(const Instruction *i)
472 {
473 assert(!isLIMM(i->src(1), TYPE_F32));
474
475 emitForm_21(i, 0x0c0, 0x940);
476
477 NEG_(34, 2);
478 SAT_(35);
479 RND_(36, F);
480 FTZ_(38);
481 DNZ_(39);
482
483 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
484
485 if (code[0] & 0x1) {
486 if (neg1)
487 code[1] ^= 1 << 27;
488 } else
489 if (neg1) {
490 code[1] |= 1 << 19;
491 }
492 }
493
494 void
495 CodeEmitterGK110::emitDMAD(const Instruction *i)
496 {
497 assert(!i->saturate);
498 assert(!i->ftz);
499
500 emitForm_21(i, 0x1b8, 0xb38);
501
502 NEG_(34, 2);
503 RND_(36, F);
504
505 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
506
507 if (code[0] & 0x1) {
508 if (neg1)
509 code[1] ^= 1 << 27;
510 } else
511 if (neg1) {
512 code[1] |= 1 << 19;
513 }
514 }
515
516 void
517 CodeEmitterGK110::emitFMUL(const Instruction *i)
518 {
519 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
520
521 assert(i->postFactor >= -3 && i->postFactor <= 3);
522
523 if (isLIMM(i->src(1), TYPE_F32)) {
524 emitForm_L(i, 0x200, 0x2, Modifier(0));
525
526 FTZ_(38);
527 DNZ_(39);
528 SAT_(3a);
529 if (neg)
530 code[1] ^= 1 << 22;
531
532 assert(i->postFactor == 0);
533 } else {
534 emitForm_21(i, 0x234, 0xc34);
535 code[1] |= ((i->postFactor > 0) ?
536 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
537
538 RND_(2a, F);
539 FTZ_(2f);
540 DNZ_(30);
541 SAT_(35);
542
543 if (code[0] & 0x1) {
544 if (neg)
545 code[1] ^= 1 << 27;
546 } else
547 if (neg) {
548 code[1] |= 1 << 19;
549 }
550 }
551 }
552
553 void
554 CodeEmitterGK110::emitDMUL(const Instruction *i)
555 {
556 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
557
558 assert(!i->postFactor);
559 assert(!i->saturate);
560 assert(!i->ftz);
561 assert(!i->dnz);
562
563 emitForm_21(i, 0x240, 0xc40);
564
565 RND_(2a, F);
566
567 if (code[0] & 0x1) {
568 if (neg)
569 code[1] ^= 1 << 27;
570 } else
571 if (neg) {
572 code[1] |= 1 << 19;
573 }
574 }
575
576 void
577 CodeEmitterGK110::emitIMUL(const Instruction *i)
578 {
579 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
580 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
581
582 if (isLIMM(i->src(1), TYPE_S32)) {
583 emitForm_L(i, 0x280, 2, Modifier(0));
584
585 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
586 code[1] |= 1 << 24;
587 if (i->sType == TYPE_S32)
588 code[1] |= 3 << 25;
589 } else {
590 emitForm_21(i, 0x21c, 0xc1c);
591
592 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
593 code[1] |= 1 << 10;
594 if (i->sType == TYPE_S32)
595 code[1] |= 3 << 11;
596 }
597 }
598
599 void
600 CodeEmitterGK110::emitFADD(const Instruction *i)
601 {
602 if (isLIMM(i->src(1), TYPE_F32)) {
603 assert(i->rnd == ROUND_N);
604 assert(!i->saturate);
605
606 Modifier mod = i->src(1).mod ^
607 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
608
609 emitForm_L(i, 0x400, 0, mod);
610
611 FTZ_(3a);
612 NEG_(3b, 0);
613 ABS_(39, 0);
614 } else {
615 emitForm_21(i, 0x22c, 0xc2c);
616
617 FTZ_(2f);
618 RND_(2a, F);
619 ABS_(31, 0);
620 NEG_(33, 0);
621 SAT_(35);
622
623 if (code[0] & 0x1) {
624 modNegAbsF32_3b(i, 1);
625 if (i->op == OP_SUB) code[1] ^= 1 << 27;
626 } else {
627 ABS_(34, 1);
628 NEG_(30, 1);
629 if (i->op == OP_SUB) code[1] ^= 1 << 16;
630 }
631 }
632 }
633
634 void
635 CodeEmitterGK110::emitDADD(const Instruction *i)
636 {
637 assert(!i->saturate);
638 assert(!i->ftz);
639
640 emitForm_21(i, 0x238, 0xc38);
641 RND_(2a, F);
642 ABS_(31, 0);
643 NEG_(33, 0);
644 if (code[0] & 0x1) {
645 modNegAbsF32_3b(i, 1);
646 if (i->op == OP_SUB) code[1] ^= 1 << 27;
647 } else {
648 NEG_(30, 1);
649 ABS_(34, 1);
650 if (i->op == OP_SUB) code[1] ^= 1 << 16;
651 }
652 }
653
654 void
655 CodeEmitterGK110::emitUADD(const Instruction *i)
656 {
657 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
658
659 if (i->op == OP_SUB)
660 addOp ^= 1;
661
662 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
663
664 if (isLIMM(i->src(1), TYPE_S32)) {
665 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
666
667 if (addOp & 2)
668 code[1] |= 1 << 27;
669
670 assert(!i->defExists(1));
671 assert(i->flagsSrc < 0);
672
673 SAT_(39);
674 } else {
675 emitForm_21(i, 0x208, 0xc08);
676
677 assert(addOp != 3); // would be add-plus-one
678
679 code[1] |= addOp << 19;
680
681 if (i->defExists(1))
682 code[1] |= 1 << 18; // write carry
683 if (i->flagsSrc >= 0)
684 code[1] |= 1 << 14; // add carry
685
686 SAT_(35);
687 }
688 }
689
690 // TODO: shl-add
691 void
692 CodeEmitterGK110::emitIMAD(const Instruction *i)
693 {
694 uint8_t addOp =
695 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
696
697 emitForm_21(i, 0x100, 0xa00);
698
699 assert(addOp != 3);
700 code[1] |= addOp << 26;
701
702 if (i->sType == TYPE_S32)
703 code[1] |= (1 << 19) | (1 << 24);
704
705 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
706 code[1] |= 1 << 25;
707
708 if (i->flagsDef >= 0) code[1] |= 1 << 18;
709 if (i->flagsSrc >= 0) code[1] |= 1 << 20;
710
711 SAT_(35);
712 }
713
714 void
715 CodeEmitterGK110::emitISAD(const Instruction *i)
716 {
717 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
718
719 emitForm_21(i, 0x1f4, 0xb74);
720
721 if (i->dType == TYPE_S32)
722 code[1] |= 1 << 19;
723 }
724
725 void
726 CodeEmitterGK110::emitNOT(const Instruction *i)
727 {
728 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
729 code[1] = 0x22003800;
730
731 emitPredicate(i);
732
733 defId(i->def(0), 2);
734
735 switch (i->src(0).getFile()) {
736 case FILE_GPR:
737 code[1] |= 0xc << 28;
738 srcId(i->src(0), 23);
739 break;
740 case FILE_MEMORY_CONST:
741 code[1] |= 0x4 << 28;
742 setCAddress14(i->src(1));
743 break;
744 default:
745 assert(0);
746 break;
747 }
748 }
749
750 void
751 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
752 {
753 if (isLIMM(i->src(1), TYPE_S32)) {
754 emitForm_L(i, 0x200, 0, i->src(1).mod);
755 code[1] |= subOp << 24;
756 NOT_(3a, 0);
757 } else {
758 emitForm_21(i, 0x220, 0xc20);
759 code[1] |= subOp << 12;
760 NOT_(2a, 0);
761 NOT_(2b, 1);
762 }
763 }
764
765 void
766 CodeEmitterGK110::emitPOPC(const Instruction *i)
767 {
768 assert(!isLIMM(i->src(1), TYPE_S32, true));
769
770 emitForm_21(i, 0x204, 0xc04);
771
772 NOT_(2a, 0);
773 if (!(code[0] & 0x1))
774 NOT_(2b, 1);
775 }
776
777 void
778 CodeEmitterGK110::emitINSBF(const Instruction *i)
779 {
780 emitForm_21(i, 0x1f8, 0xb78);
781 }
782
783 void
784 CodeEmitterGK110::emitEXTBF(const Instruction *i)
785 {
786 emitForm_21(i, 0x600, 0xc00);
787
788 if (i->dType == TYPE_S32)
789 code[1] |= 0x80000;
790 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
791 code[1] |= 0x800;
792 }
793
794 void
795 CodeEmitterGK110::emitBFIND(const Instruction *i)
796 {
797 emitForm_C(i, 0x218, 0x2);
798
799 if (i->dType == TYPE_S32)
800 code[1] |= 0x80000;
801 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
802 code[1] |= 0x800;
803 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
804 code[1] |= 0x1000;
805 }
806
807 void
808 CodeEmitterGK110::emitShift(const Instruction *i)
809 {
810 if (i->op == OP_SHR) {
811 emitForm_21(i, 0x214, 0xc14);
812 if (isSignedType(i->dType))
813 code[1] |= 1 << 19;
814 } else {
815 emitForm_21(i, 0x224, 0xc24);
816 }
817
818 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
819 code[1] |= 1 << 10;
820 }
821
822 void
823 CodeEmitterGK110::emitPreOp(const Instruction *i)
824 {
825 emitForm_C(i, 0x248, 0x2);
826
827 if (i->op == OP_PREEX2)
828 code[1] |= 1 << 10;
829
830 NEG_(30, 0);
831 ABS_(34, 0);
832 }
833
834 void
835 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
836 {
837 code[0] = 0x00000002 | (subOp << 23);
838 code[1] = 0x84000000;
839
840 emitPredicate(i);
841
842 defId(i->def(0), 2);
843 srcId(i->src(0), 10);
844
845 NEG_(33, 0);
846 ABS_(31, 0);
847 SAT_(35);
848 }
849
850 void
851 CodeEmitterGK110::emitMINMAX(const Instruction *i)
852 {
853 uint32_t op2, op1;
854
855 switch (i->dType) {
856 case TYPE_U32:
857 case TYPE_S32:
858 op2 = 0x210;
859 op1 = 0xc10;
860 break;
861 case TYPE_F32:
862 op2 = 0x230;
863 op1 = 0xc30;
864 break;
865 case TYPE_F64:
866 op2 = 0x228;
867 op1 = 0xc28;
868 break;
869 default:
870 assert(0);
871 op2 = 0;
872 op1 = 0;
873 break;
874 }
875 emitForm_21(i, op2, op1);
876
877 if (i->dType == TYPE_S32)
878 code[1] |= 1 << 19;
879 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
880
881 FTZ_(2f);
882 ABS_(31, 0);
883 NEG_(33, 0);
884 if (code[0] & 0x1) {
885 modNegAbsF32_3b(i, 1);
886 } else {
887 ABS_(34, 1);
888 NEG_(30, 1);
889 }
890 }
891
892 void
893 CodeEmitterGK110::emitCVT(const Instruction *i)
894 {
895 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
896 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
897 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
898
899 bool sat = i->saturate;
900 bool abs = i->src(0).mod.abs();
901 bool neg = i->src(0).mod.neg();
902
903 RoundMode rnd = i->rnd;
904
905 switch (i->op) {
906 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
907 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
908 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
909 case OP_SAT: sat = true; break;
910 case OP_NEG: neg = !neg; break;
911 case OP_ABS: abs = true; neg = false; break;
912 default:
913 break;
914 }
915
916 DataType dType;
917
918 if (i->op == OP_NEG && i->dType == TYPE_U32)
919 dType = TYPE_S32;
920 else
921 dType = i->dType;
922
923
924 uint32_t op;
925
926 if (f2f) op = 0x254;
927 else if (f2i) op = 0x258;
928 else if (i2f) op = 0x25c;
929 else op = 0x260;
930
931 emitForm_C(i, op, 0x2);
932
933 FTZ_(2f);
934 if (neg) code[1] |= 1 << 16;
935 if (abs) code[1] |= 1 << 20;
936 if (sat) code[1] |= 1 << 21;
937
938 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
939
940 code[0] |= typeSizeofLog2(dType) << 10;
941 code[0] |= typeSizeofLog2(i->sType) << 12;
942 code[1] |= i->subOp << 12;
943
944 if (isSignedIntType(dType))
945 code[0] |= 0x4000;
946 if (isSignedIntType(i->sType))
947 code[0] |= 0x8000;
948 }
949
950 void
951 CodeEmitterGK110::emitSET(const CmpInstruction *i)
952 {
953 uint16_t op1, op2;
954
955 if (i->def(0).getFile() == FILE_PREDICATE) {
956 switch (i->sType) {
957 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
958 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
959 default:
960 op2 = 0x1b0;
961 op1 = 0xb30;
962 break;
963 }
964 emitForm_21(i, op2, op1);
965
966 NEG_(2e, 0);
967 ABS_(9, 0);
968 if (!(code[0] & 0x1)) {
969 NEG_(8, 1);
970 ABS_(2f, 1);
971 } else {
972 modNegAbsF32_3b(i, 1);
973 }
974 FTZ_(32);
975
976 // normal DST field is negated predicate result
977 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
978 if (i->defExists(1))
979 defId(i->def(1), 2);
980 else
981 code[0] |= 0x1c;
982 } else {
983 switch (i->sType) {
984 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
985 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
986 default:
987 op2 = 0x1a8;
988 op1 = 0xb28;
989 break;
990 }
991 emitForm_21(i, op2, op1);
992
993 NEG_(2e, 0);
994 ABS_(39, 0);
995 if (!(code[0] & 0x1)) {
996 NEG_(38, 1);
997 ABS_(2f, 1);
998 } else {
999 modNegAbsF32_3b(i, 1);
1000 }
1001 FTZ_(3a);
1002
1003 if (i->dType == TYPE_F32) {
1004 if (isFloatType(i->sType))
1005 code[1] |= 1 << 23;
1006 else
1007 code[1] |= 1 << 15;
1008 }
1009 }
1010 if (i->sType == TYPE_S32)
1011 code[1] |= 1 << 19;
1012
1013 if (i->op != OP_SET) {
1014 switch (i->op) {
1015 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1016 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1017 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1018 default:
1019 assert(0);
1020 break;
1021 }
1022 srcId(i->src(2), 0x2a);
1023 } else {
1024 code[1] |= 0x7 << 10;
1025 }
1026 emitCondCode(i->setCond,
1027 isFloatType(i->sType) ? 0x33 : 0x34,
1028 isFloatType(i->sType) ? 0xf : 0x7);
1029 }
1030
1031 void
1032 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1033 {
1034 CondCode cc = i->setCond;
1035 if (i->src(2).mod.neg())
1036 cc = reverseCondCode(cc);
1037
1038 if (i->dType == TYPE_F32) {
1039 emitForm_21(i, 0x1d0, 0xb50);
1040 FTZ_(32);
1041 emitCondCode(cc, 0x33, 0xf);
1042 } else {
1043 emitForm_21(i, 0x1a0, 0xb20);
1044 emitCondCode(cc, 0x34, 0x7);
1045 }
1046 }
1047
1048 void CodeEmitterGK110::emitSELP(const Instruction *i)
1049 {
1050 emitForm_21(i, 0x250, 0x050);
1051
1052 if (i->src(2).mod & Modifier(NV50_IR_MOD_NOT))
1053 code[1] |= 1 << 13;
1054 }
1055
1056 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1057 {
1058 code[0] = 0x0000003e | (i->subOp << 23);
1059 code[1] = 0x77000000;
1060
1061 emitPredicate(i);
1062 }
1063
1064 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1065 {
1066 code[0] = 0x00000002;
1067 code[1] = 0x76c00000;
1068
1069 code[1] |= i->tex.r << 9;
1070 // code[1] |= i->tex.s << (9 + 8);
1071
1072 if (i->tex.liveOnly)
1073 code[0] |= 0x80000000;
1074
1075 defId(i->def(0), 2);
1076 srcId(i->src(0), 10);
1077 }
1078
1079 static inline bool
1080 isNextIndependentTex(const TexInstruction *i)
1081 {
1082 if (!i->next || !isTextureOp(i->next->op))
1083 return false;
1084 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1085 return false;
1086 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1087 }
1088
1089 void
1090 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1091 {
1092 const bool ind = i->tex.rIndirectSrc >= 0;
1093
1094 if (ind) {
1095 code[0] = 0x00000002;
1096 switch (i->op) {
1097 case OP_TXD:
1098 code[1] = 0x7e000000;
1099 break;
1100 case OP_TXLQ:
1101 code[1] = 0x7e800000;
1102 break;
1103 case OP_TXF:
1104 code[1] = 0x78000000;
1105 break;
1106 case OP_TXG:
1107 code[1] = 0x7dc00000;
1108 break;
1109 default:
1110 code[1] = 0x7d800000;
1111 break;
1112 }
1113 } else {
1114 switch (i->op) {
1115 case OP_TXD:
1116 code[0] = 0x00000002;
1117 code[1] = 0x76000000;
1118 code[1] |= i->tex.r << 9;
1119 break;
1120 case OP_TXLQ:
1121 code[0] = 0x00000002;
1122 code[1] = 0x76800000;
1123 code[1] |= i->tex.r << 9;
1124 break;
1125 case OP_TXF:
1126 code[0] = 0x00000002;
1127 code[1] = 0x70000000;
1128 code[1] |= i->tex.r << 13;
1129 break;
1130 case OP_TXG:
1131 code[0] = 0x00000001;
1132 code[1] = 0x70000000;
1133 code[1] |= i->tex.r << 15;
1134 break;
1135 default:
1136 code[0] = 0x00000001;
1137 code[1] = 0x60000000;
1138 code[1] |= i->tex.r << 15;
1139 break;
1140 }
1141 }
1142
1143 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1144
1145 if (i->tex.liveOnly)
1146 code[0] |= 0x80000000;
1147
1148 switch (i->op) {
1149 case OP_TEX: break;
1150 case OP_TXB: code[1] |= 0x2000; break;
1151 case OP_TXL: code[1] |= 0x3000; break;
1152 case OP_TXF: break;
1153 case OP_TXG: break;
1154 case OP_TXD: break;
1155 case OP_TXLQ: break;
1156 default:
1157 assert(!"invalid texture op");
1158 break;
1159 }
1160
1161 if (i->op == OP_TXF) {
1162 if (!i->tex.levelZero)
1163 code[1] |= 0x1000;
1164 } else
1165 if (i->tex.levelZero) {
1166 code[1] |= 0x1000;
1167 }
1168
1169 if (i->op != OP_TXD && i->tex.derivAll)
1170 code[1] |= 0x200;
1171
1172 emitPredicate(i);
1173
1174 code[1] |= i->tex.mask << 2;
1175
1176 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1177
1178 defId(i->def(0), 2);
1179 srcId(i->src(0), 10);
1180 srcId(i, src1, 23);
1181
1182 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1183
1184 // texture target:
1185 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1186 if (i->tex.target.isArray())
1187 code[1] |= 0x40;
1188 if (i->tex.target.isShadow())
1189 code[1] |= 0x400;
1190 if (i->tex.target == TEX_TARGET_2D_MS ||
1191 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1192 code[1] |= 0x800;
1193
1194 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1195 // ?
1196 }
1197
1198 if (i->tex.useOffsets == 1) {
1199 switch (i->op) {
1200 case OP_TXF: code[1] |= 0x200; break;
1201 case OP_TXD: code[1] |= 0x00400000; break;
1202 default: code[1] |= 0x800; break;
1203 }
1204 }
1205 if (i->tex.useOffsets == 4)
1206 code[1] |= 0x1000;
1207 }
1208
1209 void
1210 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1211 {
1212 code[0] = 0x00000002;
1213 code[1] = 0x75400001;
1214
1215 switch (i->tex.query) {
1216 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1217 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1218 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1219 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1220 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1221 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1222 default:
1223 assert(!"invalid texture query");
1224 break;
1225 }
1226
1227 code[1] |= i->tex.mask << 2;
1228 code[1] |= i->tex.r << 9;
1229 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1230 code[1] |= 0x08000000;
1231
1232 defId(i->def(0), 2);
1233 srcId(i->src(0), 10);
1234
1235 emitPredicate(i);
1236 }
1237
1238 void
1239 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1240 {
1241 code[0] = 0x00000002 | ((qOp & 1) << 31);
1242 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1243
1244 defId(i->def(0), 2);
1245 srcId(i->src(0), 10);
1246 srcId((i->srcExists(1) && i->predSrc != 1) ? i->src(1) : i->src(0), 23);
1247
1248 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1249 code[1] |= 1 << 9; // dall
1250
1251 emitPredicate(i);
1252 }
1253
1254 void
1255 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1256 {
1257 emitForm_L(i, 0x7f4, 2, Modifier(0));
1258 code[1] |= i->subOp << 2;
1259 code[1] |= 0x00070000;
1260 }
1261
1262 void
1263 CodeEmitterGK110::emitBAR(const Instruction *i)
1264 {
1265 code[0] = 0x00000002;
1266 code[1] = 0x85400000;
1267
1268 switch (i->subOp) {
1269 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1270 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1271 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1272 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1273 default:
1274 code[1] |= 0x20;
1275 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1276 break;
1277 }
1278
1279 emitPredicate(i);
1280
1281 srcId(i->src(0), 10);
1282 srcId(i->src(1), 23);
1283 }
1284
1285 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1286 {
1287 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1288 code[1] = 0x7cc00000;
1289
1290 emitPredicate(i);
1291 }
1292
1293 void
1294 CodeEmitterGK110::emitFlow(const Instruction *i)
1295 {
1296 const FlowInstruction *f = i->asFlow();
1297
1298 unsigned mask; // bit 0: predicate, bit 1: target
1299
1300 code[0] = 0x00000000;
1301
1302 switch (i->op) {
1303 case OP_BRA:
1304 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1305 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1306 code[0] |= 0x80;
1307 mask = 3;
1308 break;
1309 case OP_CALL:
1310 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1311 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1312 code[0] |= 0x80;
1313 mask = 2;
1314 break;
1315
1316 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1317 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1318 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1319 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1320 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1321
1322 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1323 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1324 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1325 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1326
1327 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1328 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1329 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1330 default:
1331 assert(!"invalid flow operation");
1332 return;
1333 }
1334
1335 if (mask & 1) {
1336 emitPredicate(i);
1337 if (i->flagsSrc < 0)
1338 code[0] |= 0x3c;
1339 }
1340
1341 if (!f)
1342 return;
1343
1344 if (f->allWarp)
1345 code[0] |= 1 << 9;
1346 if (f->limit)
1347 code[0] |= 1 << 8;
1348
1349 if (f->op == OP_CALL) {
1350 if (f->builtin) {
1351 assert(f->absolute);
1352 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1353 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1354 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1355 } else {
1356 assert(!f->absolute);
1357 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1358 code[0] |= (pcRel & 0x1ff) << 23;
1359 code[1] |= (pcRel >> 9) & 0x7fff;
1360 }
1361 } else
1362 if (mask & 2) {
1363 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1364 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1365 pcRel += 8;
1366 // currently we don't want absolute branches
1367 assert(!f->absolute);
1368 code[0] |= (pcRel & 0x1ff) << 23;
1369 code[1] |= (pcRel >> 9) & 0x7fff;
1370 }
1371 }
1372
1373 void
1374 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1375 {
1376 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1377
1378 code[0] = 0x00000002 | (offset << 23);
1379 code[1] = 0x7d000000 | (offset >> 9);
1380
1381 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1382 code[1] |= 0x8;
1383
1384 emitPredicate(i);
1385
1386 defId(i->def(0), 2);
1387 srcId(i->src(0).getIndirect(0), 10);
1388 }
1389
1390 void
1391 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1392 {
1393 uint32_t prim = i->src(0).get()->reg.data.u32;
1394
1395 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1396 code[1] = 0x7f800000;
1397
1398 emitPredicate(i);
1399
1400 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1401
1402 defId(i->def(0), 2);
1403 srcId(i, src1, 10);
1404 }
1405
1406 void
1407 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1408 {
1409 unsigned int size = typeSizeof(i->dType);
1410 uint32_t offset = i->src(0).get()->reg.data.offset;
1411
1412 code[0] = 0x00000002 | (offset << 23);
1413 code[1] = 0x7ec00000 | (offset >> 9);
1414 code[1] |= (size / 4 - 1) << 18;
1415
1416 if (i->perPatch)
1417 code[1] |= 0x4;
1418 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1419 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1420
1421 emitPredicate(i);
1422
1423 defId(i->def(0), 2);
1424 srcId(i->src(0).getIndirect(0), 10);
1425 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1426 }
1427
1428 void
1429 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1430 {
1431 unsigned int size = typeSizeof(i->dType);
1432 uint32_t offset = i->src(0).get()->reg.data.offset;
1433
1434 code[0] = 0x00000002 | (offset << 23);
1435 code[1] = 0x7f000000 | (offset >> 9);
1436 code[1] |= (size / 4 - 1) << 18;
1437
1438 if (i->perPatch)
1439 code[1] |= 0x4;
1440
1441 emitPredicate(i);
1442
1443 assert(i->src(1).getFile() == FILE_GPR);
1444
1445 srcId(i->src(0).getIndirect(0), 10);
1446 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1447 srcId(i->src(1), 2);
1448 }
1449
1450 void
1451 CodeEmitterGK110::emitOUT(const Instruction *i)
1452 {
1453 assert(i->src(0).getFile() == FILE_GPR);
1454
1455 emitForm_21(i, 0x1f0, 0xb70);
1456
1457 if (i->op == OP_EMIT)
1458 code[1] |= 1 << 10;
1459 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1460 code[1] |= 1 << 11;
1461 }
1462
1463 void
1464 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1465 {
1466 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1467 code[1] |= (i->ipa & 0xc) << (19 - 2);
1468 }
1469
1470 static void
1471 interpApply(const InterpEntry *entry, uint32_t *code,
1472 bool force_persample_interp, bool flatshade)
1473 {
1474 int ipa = entry->ipa;
1475 int reg = entry->reg;
1476 int loc = entry->loc;
1477
1478 if (flatshade &&
1479 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1480 ipa = NV50_IR_INTERP_FLAT;
1481 reg = 0xff;
1482 } else if (force_persample_interp &&
1483 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1484 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1485 ipa |= NV50_IR_INTERP_CENTROID;
1486 }
1487 code[loc + 1] &= ~(0xf << 19);
1488 code[loc + 1] |= (ipa & 0x3) << 21;
1489 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1490 code[loc + 0] &= ~(0xff << 23);
1491 code[loc + 0] |= reg << 23;
1492 }
1493
1494 void
1495 CodeEmitterGK110::emitINTERP(const Instruction *i)
1496 {
1497 const uint32_t base = i->getSrc(0)->reg.data.offset;
1498
1499 code[0] = 0x00000002 | (base << 31);
1500 code[1] = 0x74800000 | (base >> 1);
1501
1502 if (i->saturate)
1503 code[1] |= 1 << 18;
1504
1505 if (i->op == OP_PINTERP) {
1506 srcId(i->src(1), 23);
1507 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1508 } else {
1509 code[0] |= 0xff << 23;
1510 addInterp(i->ipa, 0xff, interpApply);
1511 }
1512
1513 srcId(i->src(0).getIndirect(0), 10);
1514 emitInterpMode(i);
1515
1516 emitPredicate(i);
1517 defId(i->def(0), 2);
1518
1519 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1520 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1521 else
1522 code[1] |= 0xff << 10;
1523 }
1524
1525 void
1526 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1527 {
1528 uint8_t n;
1529
1530 switch (ty) {
1531 case TYPE_U8:
1532 n = 0;
1533 break;
1534 case TYPE_S8:
1535 n = 1;
1536 break;
1537 case TYPE_U16:
1538 n = 2;
1539 break;
1540 case TYPE_S16:
1541 n = 3;
1542 break;
1543 case TYPE_F32:
1544 case TYPE_U32:
1545 case TYPE_S32:
1546 n = 4;
1547 break;
1548 case TYPE_F64:
1549 case TYPE_U64:
1550 case TYPE_S64:
1551 n = 5;
1552 break;
1553 case TYPE_B128:
1554 n = 6;
1555 break;
1556 default:
1557 n = 0;
1558 assert(!"invalid ld/st type");
1559 break;
1560 }
1561 code[pos / 32] |= n << (pos % 32);
1562 }
1563
1564 void
1565 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1566 {
1567 uint8_t n;
1568
1569 switch (c) {
1570 case CACHE_CA:
1571 // case CACHE_WB:
1572 n = 0;
1573 break;
1574 case CACHE_CG:
1575 n = 1;
1576 break;
1577 case CACHE_CS:
1578 n = 2;
1579 break;
1580 case CACHE_CV:
1581 // case CACHE_WT:
1582 n = 3;
1583 break;
1584 default:
1585 n = 0;
1586 assert(!"invalid caching mode");
1587 break;
1588 }
1589 code[pos / 32] |= n << (pos % 32);
1590 }
1591
1592 void
1593 CodeEmitterGK110::emitSTORE(const Instruction *i)
1594 {
1595 int32_t offset = SDATA(i->src(0)).offset;
1596
1597 switch (i->src(0).getFile()) {
1598 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1599 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1600 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1601 default:
1602 assert(!"invalid memory file");
1603 break;
1604 }
1605
1606 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1607 offset &= 0xffffff;
1608
1609 if (code[0] & 0x2) {
1610 emitLoadStoreType(i->dType, 0x33);
1611 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1612 emitCachingMode(i->cache, 0x2f);
1613 } else {
1614 emitLoadStoreType(i->dType, 0x38);
1615 emitCachingMode(i->cache, 0x3b);
1616 }
1617 code[0] |= offset << 23;
1618 code[1] |= offset >> 9;
1619
1620 emitPredicate(i);
1621
1622 srcId(i->src(1), 2);
1623 srcId(i->src(0).getIndirect(0), 10);
1624 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
1625 i->src(0).isIndirect(0) &&
1626 i->getIndirect(0, 0)->reg.size == 8)
1627 code[1] |= 1 << 23;
1628 }
1629
1630 void
1631 CodeEmitterGK110::emitLOAD(const Instruction *i)
1632 {
1633 int32_t offset = SDATA(i->src(0)).offset;
1634
1635 switch (i->src(0).getFile()) {
1636 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1637 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1638 case FILE_MEMORY_SHARED: code[1] = 0x7a400000; code[0] = 0x00000002; break;
1639 case FILE_MEMORY_CONST:
1640 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1641 emitMOV(i);
1642 return;
1643 }
1644 offset &= 0xffff;
1645 code[0] = 0x00000002;
1646 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1647 code[1] |= i->subOp << 15;
1648 break;
1649 default:
1650 assert(!"invalid memory file");
1651 break;
1652 }
1653
1654 if (code[0] & 0x2) {
1655 offset &= 0xffffff;
1656 emitLoadStoreType(i->dType, 0x33);
1657 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1658 emitCachingMode(i->cache, 0x2f);
1659 } else {
1660 emitLoadStoreType(i->dType, 0x38);
1661 emitCachingMode(i->cache, 0x3b);
1662 }
1663 code[0] |= offset << 23;
1664 code[1] |= offset >> 9;
1665
1666 emitPredicate(i);
1667
1668 defId(i->def(0), 2);
1669 if (i->getIndirect(0, 0)) {
1670 srcId(i->src(0).getIndirect(0), 10);
1671 if (i->getIndirect(0, 0)->reg.size == 8)
1672 code[1] |= 1 << 23;
1673 } else {
1674 code[0] |= 255 << 10;
1675 }
1676 }
1677
1678 uint8_t
1679 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1680 {
1681 switch (SDATA(ref).sv.sv) {
1682 case SV_LANEID: return 0x00;
1683 case SV_PHYSID: return 0x03;
1684 case SV_VERTEX_COUNT: return 0x10;
1685 case SV_INVOCATION_ID: return 0x11;
1686 case SV_YDIR: return 0x12;
1687 case SV_THREAD_KILL: return 0x13;
1688 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1689 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1690 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1691 case SV_GRIDID: return 0x2c;
1692 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1693 case SV_LBASE: return 0x34;
1694 case SV_SBASE: return 0x30;
1695 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1696 default:
1697 assert(!"no sreg for system value");
1698 return 0;
1699 }
1700 }
1701
1702 void
1703 CodeEmitterGK110::emitMOV(const Instruction *i)
1704 {
1705 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1706 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1707 code[1] = 0x86400000;
1708 emitPredicate(i);
1709 defId(i->def(0), 2);
1710 } else
1711 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1712 code[0] = 0x00000002 | (i->lanes << 14);
1713 code[1] = 0x74000000;
1714 emitPredicate(i);
1715 defId(i->def(0), 2);
1716 setImmediate32(i, 0, Modifier(0));
1717 } else
1718 if (i->src(0).getFile() == FILE_PREDICATE) {
1719 code[0] = 0x00000002;
1720 code[1] = 0x84401c07;
1721 emitPredicate(i);
1722 defId(i->def(0), 2);
1723 srcId(i->src(0), 14);
1724 } else {
1725 emitForm_C(i, 0x24c, 2);
1726 code[1] |= i->lanes << 10;
1727 }
1728 }
1729
1730 static inline bool
1731 uses64bitAddress(const Instruction *ldst)
1732 {
1733 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
1734 ldst->src(0).isIndirect(0) &&
1735 ldst->getIndirect(0, 0)->reg.size == 8;
1736 }
1737
1738 void
1739 CodeEmitterGK110::emitATOM(const Instruction *i)
1740 {
1741 code[0] = 0x00000002;
1742 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
1743 code[1] = 0x77800000;
1744 else
1745 code[1] = 0x68000000;
1746
1747 switch (i->subOp) {
1748 case NV50_IR_SUBOP_ATOM_CAS: break;
1749 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
1750 default: code[1] |= i->subOp << 23; break;
1751 }
1752
1753 switch (i->dType) {
1754 case TYPE_U32: break;
1755 case TYPE_S32: code[1] |= 0x00100000; break;
1756 case TYPE_U64: code[1] |= 0x00200000; break;
1757 case TYPE_F32: code[1] |= 0x00300000; break;
1758 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
1759 case TYPE_S64: code[1] |= 0x00500000; break;
1760 default: assert(!"unsupported type"); break;
1761 }
1762
1763 emitPredicate(i);
1764
1765 /* TODO: cas: check that src regs line up */
1766 /* TODO: cas: flip bits if $r255 is used */
1767 srcId(i->src(1), 23);
1768
1769 if (i->defExists(0))
1770 defId(i->def(0), 2);
1771 else
1772 code[0] |= 255 << 2;
1773
1774 const int32_t offset = SDATA(i->src(0)).offset;
1775 assert(offset < 0x80000 && offset >= -0x80000);
1776 code[0] |= (offset & 1) << 31;
1777 code[1] |= (offset & 0xffffe) >> 1;
1778
1779 if (i->getIndirect(0, 0)) {
1780 srcId(i->getIndirect(0, 0), 10);
1781 if (i->getIndirect(0, 0)->reg.size == 8)
1782 code[1] |= 1 << 19;
1783 } else {
1784 code[0] |= 255 << 10;
1785 }
1786 }
1787
1788 void
1789 CodeEmitterGK110::emitCCTL(const Instruction *i)
1790 {
1791 int32_t offset = SDATA(i->src(0)).offset;
1792
1793 code[0] = 0x00000002 | (i->subOp << 2);
1794
1795 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
1796 code[1] = 0x7b000000;
1797 } else {
1798 code[1] = 0x7c000000;
1799 offset &= 0xffffff;
1800 }
1801 code[0] |= offset << 23;
1802 code[1] |= offset >> 9;
1803
1804 if (uses64bitAddress(i))
1805 code[1] |= 1 << 23;
1806 srcId(i->src(0).getIndirect(0), 10);
1807
1808 emitPredicate(i);
1809 }
1810
1811 bool
1812 CodeEmitterGK110::emitInstruction(Instruction *insn)
1813 {
1814 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1815
1816 if (insn->encSize != 8) {
1817 ERROR("skipping unencodable instruction: ");
1818 insn->print();
1819 return false;
1820 } else
1821 if (codeSize + size > codeSizeLimit) {
1822 ERROR("code emitter output buffer too small\n");
1823 return false;
1824 }
1825
1826 if (writeIssueDelays) {
1827 int id = (codeSize & 0x3f) / 8 - 1;
1828 if (id < 0) {
1829 id += 1;
1830 code[0] = 0x00000000; // cf issue delay "instruction"
1831 code[1] = 0x08000000;
1832 code += 2;
1833 codeSize += 8;
1834 }
1835 uint32_t *data = code - (id * 2 + 2);
1836
1837 switch (id) {
1838 case 0: data[0] |= insn->sched << 2; break;
1839 case 1: data[0] |= insn->sched << 10; break;
1840 case 2: data[0] |= insn->sched << 18; break;
1841 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1842 case 4: data[1] |= insn->sched << 2; break;
1843 case 5: data[1] |= insn->sched << 10; break;
1844 case 6: data[1] |= insn->sched << 18; break;
1845 default:
1846 assert(0);
1847 break;
1848 }
1849 }
1850
1851 // assert that instructions with multiple defs don't corrupt registers
1852 for (int d = 0; insn->defExists(d); ++d)
1853 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1854
1855 switch (insn->op) {
1856 case OP_MOV:
1857 case OP_RDSV:
1858 emitMOV(insn);
1859 break;
1860 case OP_NOP:
1861 break;
1862 case OP_LOAD:
1863 emitLOAD(insn);
1864 break;
1865 case OP_STORE:
1866 emitSTORE(insn);
1867 break;
1868 case OP_LINTERP:
1869 case OP_PINTERP:
1870 emitINTERP(insn);
1871 break;
1872 case OP_VFETCH:
1873 emitVFETCH(insn);
1874 break;
1875 case OP_EXPORT:
1876 emitEXPORT(insn);
1877 break;
1878 case OP_AFETCH:
1879 emitAFETCH(insn);
1880 break;
1881 case OP_PFETCH:
1882 emitPFETCH(insn);
1883 break;
1884 case OP_EMIT:
1885 case OP_RESTART:
1886 emitOUT(insn);
1887 break;
1888 case OP_ADD:
1889 case OP_SUB:
1890 if (insn->dType == TYPE_F64)
1891 emitDADD(insn);
1892 else if (isFloatType(insn->dType))
1893 emitFADD(insn);
1894 else
1895 emitUADD(insn);
1896 break;
1897 case OP_MUL:
1898 if (insn->dType == TYPE_F64)
1899 emitDMUL(insn);
1900 else if (isFloatType(insn->dType))
1901 emitFMUL(insn);
1902 else
1903 emitIMUL(insn);
1904 break;
1905 case OP_MAD:
1906 case OP_FMA:
1907 if (insn->dType == TYPE_F64)
1908 emitDMAD(insn);
1909 else if (isFloatType(insn->dType))
1910 emitFMAD(insn);
1911 else
1912 emitIMAD(insn);
1913 break;
1914 case OP_SAD:
1915 emitISAD(insn);
1916 break;
1917 case OP_NOT:
1918 emitNOT(insn);
1919 break;
1920 case OP_AND:
1921 emitLogicOp(insn, 0);
1922 break;
1923 case OP_OR:
1924 emitLogicOp(insn, 1);
1925 break;
1926 case OP_XOR:
1927 emitLogicOp(insn, 2);
1928 break;
1929 case OP_SHL:
1930 case OP_SHR:
1931 emitShift(insn);
1932 break;
1933 case OP_SET:
1934 case OP_SET_AND:
1935 case OP_SET_OR:
1936 case OP_SET_XOR:
1937 emitSET(insn->asCmp());
1938 break;
1939 case OP_SELP:
1940 emitSELP(insn);
1941 break;
1942 case OP_SLCT:
1943 emitSLCT(insn->asCmp());
1944 break;
1945 case OP_MIN:
1946 case OP_MAX:
1947 emitMINMAX(insn);
1948 break;
1949 case OP_ABS:
1950 case OP_NEG:
1951 case OP_CEIL:
1952 case OP_FLOOR:
1953 case OP_TRUNC:
1954 case OP_SAT:
1955 emitCVT(insn);
1956 break;
1957 case OP_CVT:
1958 if (insn->def(0).getFile() == FILE_PREDICATE ||
1959 insn->src(0).getFile() == FILE_PREDICATE)
1960 emitMOV(insn);
1961 else
1962 emitCVT(insn);
1963 break;
1964 case OP_RSQ:
1965 emitSFnOp(insn, 5 + 2 * insn->subOp);
1966 break;
1967 case OP_RCP:
1968 emitSFnOp(insn, 4 + 2 * insn->subOp);
1969 break;
1970 case OP_LG2:
1971 emitSFnOp(insn, 3);
1972 break;
1973 case OP_EX2:
1974 emitSFnOp(insn, 2);
1975 break;
1976 case OP_SIN:
1977 emitSFnOp(insn, 1);
1978 break;
1979 case OP_COS:
1980 emitSFnOp(insn, 0);
1981 break;
1982 case OP_PRESIN:
1983 case OP_PREEX2:
1984 emitPreOp(insn);
1985 break;
1986 case OP_TEX:
1987 case OP_TXB:
1988 case OP_TXL:
1989 case OP_TXD:
1990 case OP_TXF:
1991 case OP_TXG:
1992 case OP_TXLQ:
1993 emitTEX(insn->asTex());
1994 break;
1995 case OP_TXQ:
1996 emitTXQ(insn->asTex());
1997 break;
1998 case OP_TEXBAR:
1999 emitTEXBAR(insn);
2000 break;
2001 case OP_PIXLD:
2002 emitPIXLD(insn);
2003 break;
2004 case OP_BRA:
2005 case OP_CALL:
2006 case OP_PRERET:
2007 case OP_RET:
2008 case OP_DISCARD:
2009 case OP_EXIT:
2010 case OP_PRECONT:
2011 case OP_CONT:
2012 case OP_PREBREAK:
2013 case OP_BREAK:
2014 case OP_JOINAT:
2015 case OP_BRKPT:
2016 case OP_QUADON:
2017 case OP_QUADPOP:
2018 emitFlow(insn);
2019 break;
2020 case OP_QUADOP:
2021 emitQUADOP(insn, insn->subOp, insn->lanes);
2022 break;
2023 case OP_DFDX:
2024 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2025 break;
2026 case OP_DFDY:
2027 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2028 break;
2029 case OP_POPCNT:
2030 emitPOPC(insn);
2031 break;
2032 case OP_INSBF:
2033 emitINSBF(insn);
2034 break;
2035 case OP_EXTBF:
2036 emitEXTBF(insn);
2037 break;
2038 case OP_BFIND:
2039 emitBFIND(insn);
2040 break;
2041 case OP_JOIN:
2042 emitNOP(insn);
2043 insn->join = 1;
2044 break;
2045 case OP_BAR:
2046 emitBAR(insn);
2047 break;
2048 case OP_MEMBAR:
2049 emitMEMBAR(insn);
2050 break;
2051 case OP_ATOM:
2052 emitATOM(insn);
2053 break;
2054 case OP_CCTL:
2055 emitCCTL(insn);
2056 break;
2057 case OP_PHI:
2058 case OP_UNION:
2059 case OP_CONSTRAINT:
2060 ERROR("operation should have been eliminated");
2061 return false;
2062 case OP_EXP:
2063 case OP_LOG:
2064 case OP_SQRT:
2065 case OP_POW:
2066 ERROR("operation should have been lowered\n");
2067 return false;
2068 default:
2069 ERROR("unknown op: %u\n", insn->op);
2070 return false;
2071 }
2072
2073 if (insn->join)
2074 code[0] |= 1 << 22;
2075
2076 code += 2;
2077 codeSize += 8;
2078 return true;
2079 }
2080
2081 uint32_t
2082 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2083 {
2084 // No more short instruction encodings.
2085 return 8;
2086 }
2087
2088 void
2089 CodeEmitterGK110::prepareEmission(Function *func)
2090 {
2091 const Target *targ = func->getProgram()->getTarget();
2092
2093 CodeEmitter::prepareEmission(func);
2094
2095 if (targ->hasSWSched)
2096 calculateSchedDataNVC0(targ, func);
2097 }
2098
2099 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2100 : CodeEmitter(target),
2101 targNVC0(target),
2102 writeIssueDelays(target->hasSWSched)
2103 {
2104 code = NULL;
2105 codeSize = codeSizeLimit = 0;
2106 relocInfo = NULL;
2107 }
2108
2109 CodeEmitter *
2110 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2111 {
2112 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2113 emit->setProgramType(type);
2114 return emit;
2115 }
2116
2117 } // namespace nv50_ir