projects / mesa.git / blob
? search:


adb61d55501c0561c3c18ac192c5d46139582d26
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78 void emitATOM(const Instruction *);
79 void emitCCTL(const Instruction *);
80
81 void emitINTERP(const Instruction *);
82 void emitAFETCH(const Instruction *);
83 void emitPFETCH(const Instruction *);
84 void emitVFETCH(const Instruction *);
85 void emitEXPORT(const Instruction *);
86 void emitOUT(const Instruction *);
87
88 void emitUADD(const Instruction *);
89 void emitFADD(const Instruction *);
90 void emitDADD(const Instruction *);
91 void emitIMUL(const Instruction *);
92 void emitFMUL(const Instruction *);
93 void emitDMUL(const Instruction *);
94 void emitIMAD(const Instruction *);
95 void emitISAD(const Instruction *);
96 void emitFMAD(const Instruction *);
97 void emitDMAD(const Instruction *);
98
99 void emitNOT(const Instruction *);
100 void emitLogicOp(const Instruction *, uint8_t subOp);
101 void emitPOPC(const Instruction *);
102 void emitINSBF(const Instruction *);
103 void emitEXTBF(const Instruction *);
104 void emitBFIND(const Instruction *);
105 void emitShift(const Instruction *);
106
107 void emitSFnOp(const Instruction *, uint8_t subOp);
108
109 void emitCVT(const Instruction *);
110 void emitMINMAX(const Instruction *);
111 void emitPreOp(const Instruction *);
112
113 void emitSET(const CmpInstruction *);
114 void emitSLCT(const CmpInstruction *);
115 void emitSELP(const Instruction *);
116
117 void emitTEXBAR(const Instruction *);
118 void emitTEX(const TexInstruction *);
119 void emitTEXCSAA(const TexInstruction *);
120 void emitTXQ(const TexInstruction *);
121
122 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
123
124 void emitPIXLD(const Instruction *);
125
126 void emitBAR(const Instruction *);
127 void emitMEMBAR(const Instruction *);
128
129 void emitFlow(const Instruction *);
130
131 inline void defId(const ValueDef&, const int pos);
132 inline void srcId(const ValueRef&, const int pos);
133 inline void srcId(const ValueRef *, const int pos);
134 inline void srcId(const Instruction *, int s, const int pos);
135
136 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
137
138 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
139 };
140
141 #define GK110_GPR_ZERO 255
142
143 #define NEG_(b, s) \
144 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
145 #define ABS_(b, s) \
146 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
147
148 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
149 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
150
151 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
152 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
153
154 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
155
156 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
157
158 #define SDATA(a) ((a).rep()->reg.data)
159 #define DDATA(a) ((a).rep()->reg.data)
160
161 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
162 {
163 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
164 }
165
166 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
167 {
168 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
169 }
170
171 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
172 {
173 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
174 code[pos / 32] |= r << (pos % 32);
175 }
176
177 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
178 {
179 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
180 }
181
182 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
183 {
184 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
185 }
186
187 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
188 {
189 const ImmediateValue *imm = ref.get()->asImm();
190
191 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
192 }
193
194 void
195 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
196 {
197 bool rint = false;
198 uint8_t n;
199
200 switch (rnd) {
201 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
202 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
203 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
204 default:
205 rint = rnd == ROUND_NI;
206 n = 0;
207 assert(rnd == ROUND_N || rnd == ROUND_NI);
208 break;
209 }
210 code[pos / 32] |= n << (pos % 32);
211 if (rint && rintPos >= 0)
212 code[rintPos / 32] |= 1 << (rintPos % 32);
213 }
214
215 void
216 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
217 {
218 uint8_t n;
219
220 switch (rnd) {
221 case ROUND_M: n = 1; break;
222 case ROUND_P: n = 2; break;
223 case ROUND_Z: n = 3; break;
224 default:
225 n = 0;
226 assert(rnd == ROUND_N);
227 break;
228 }
229 code[pos / 32] |= n << (pos % 32);
230 }
231
232 void
233 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
234 {
235 uint8_t n;
236
237 switch (rnd) {
238 case ROUND_MI: n = 1; break;
239 case ROUND_PI: n = 2; break;
240 case ROUND_ZI: n = 3; break;
241 default:
242 n = 0;
243 assert(rnd == ROUND_NI);
244 break;
245 }
246 code[pos / 32] |= n << (pos % 32);
247 }
248
249 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
250 {
251 uint8_t n;
252
253 switch (cc) {
254 case CC_FL: n = 0x00; break;
255 case CC_LT: n = 0x01; break;
256 case CC_EQ: n = 0x02; break;
257 case CC_LE: n = 0x03; break;
258 case CC_GT: n = 0x04; break;
259 case CC_NE: n = 0x05; break;
260 case CC_GE: n = 0x06; break;
261 case CC_LTU: n = 0x09; break;
262 case CC_EQU: n = 0x0a; break;
263 case CC_LEU: n = 0x0b; break;
264 case CC_GTU: n = 0x0c; break;
265 case CC_NEU: n = 0x0d; break;
266 case CC_GEU: n = 0x0e; break;
267 case CC_TR: n = 0x0f; break;
268 case CC_NO: n = 0x10; break;
269 case CC_NC: n = 0x11; break;
270 case CC_NS: n = 0x12; break;
271 case CC_NA: n = 0x13; break;
272 case CC_A: n = 0x14; break;
273 case CC_S: n = 0x15; break;
274 case CC_C: n = 0x16; break;
275 case CC_O: n = 0x17; break;
276 default:
277 n = 0;
278 assert(!"invalid condition code");
279 break;
280 }
281 code[pos / 32] |= (n & mask) << (pos % 32);
282 }
283
284 void
285 CodeEmitterGK110::emitPredicate(const Instruction *i)
286 {
287 if (i->predSrc >= 0) {
288 srcId(i->src(i->predSrc), 18);
289 if (i->cc == CC_NOT_P)
290 code[0] |= 8 << 18; // negate
291 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
292 } else {
293 code[0] |= 7 << 18;
294 }
295 }
296
297 void
298 CodeEmitterGK110::setCAddress14(const ValueRef& src)
299 {
300 const Storage& res = src.get()->asSym()->reg;
301 const int32_t addr = res.data.offset / 4;
302
303 code[0] |= (addr & 0x01ff) << 23;
304 code[1] |= (addr & 0x3e00) >> 9;
305 code[1] |= res.fileIndex << 5;
306 }
307
308 void
309 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
310 {
311 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
312 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
313
314 if (i->sType == TYPE_F32) {
315 assert(!(u32 & 0x00000fff));
316 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
317 code[1] |= ((u32 & 0x7fe00000) >> 21);
318 code[1] |= ((u32 & 0x80000000) >> 4);
319 } else
320 if (i->sType == TYPE_F64) {
321 assert(!(u64 & 0x00000fffffffffffULL));
322 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
323 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
324 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
325 } else {
326 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
327 code[0] |= (u32 & 0x001ff) << 23;
328 code[1] |= (u32 & 0x7fe00) >> 9;
329 code[1] |= (u32 & 0x80000) << 8;
330 }
331 }
332
333 void
334 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
335 Modifier mod)
336 {
337 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
338
339 if (mod) {
340 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
341 mod.applyTo(imm);
342 u32 = imm.reg.data.u32;
343 }
344
345 code[0] |= u32 << 23;
346 code[1] |= u32 >> 9;
347 }
348
349 void
350 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
351 Modifier mod)
352 {
353 code[0] = ctg;
354 code[1] = opc << 20;
355
356 emitPredicate(i);
357
358 defId(i->def(0), 2);
359
360 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
361 switch (i->src(s).getFile()) {
362 case FILE_GPR:
363 srcId(i->src(s), s ? 42 : 10);
364 break;
365 case FILE_IMMEDIATE:
366 setImmediate32(i, s, mod);
367 break;
368 default:
369 break;
370 }
371 }
372 }
373
374
375 void
376 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
377 {
378 code[0] = ctg;
379 code[1] = opc << 20;
380
381 emitPredicate(i);
382
383 defId(i->def(0), 2);
384
385 switch (i->src(0).getFile()) {
386 case FILE_MEMORY_CONST:
387 code[1] |= 0x4 << 28;
388 setCAddress14(i->src(0));
389 break;
390 case FILE_GPR:
391 code[1] |= 0xc << 28;
392 srcId(i->src(0), 23);
393 break;
394 default:
395 assert(0);
396 break;
397 }
398 }
399
400 // 0x2 for GPR, c[] and 0x1 for short immediate
401 void
402 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
403 uint32_t opc1)
404 {
405 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
406
407 int s1 = 23;
408 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
409 s1 = 42;
410
411 if (imm) {
412 code[0] = 0x1;
413 code[1] = opc1 << 20;
414 } else {
415 code[0] = 0x2;
416 code[1] = (0xc << 28) | (opc2 << 20);
417 }
418
419 emitPredicate(i);
420
421 defId(i->def(0), 2);
422
423 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
424 switch (i->src(s).getFile()) {
425 case FILE_MEMORY_CONST:
426 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
427 setCAddress14(i->src(s));
428 break;
429 case FILE_IMMEDIATE:
430 setShortImmediate(i, s);
431 break;
432 case FILE_GPR:
433 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
434 break;
435 default:
436 // ignore here, can be predicate or flags, but must not be address
437 break;
438 }
439 }
440 // 0x0 = invalid
441 // 0xc = rrr
442 // 0x8 = rrc
443 // 0x4 = rcr
444 assert(imm || (code[1] & (0xc << 28)));
445 }
446
447 inline void
448 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
449 {
450 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
451 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
452 }
453
454 void
455 CodeEmitterGK110::emitNOP(const Instruction *i)
456 {
457 code[0] = 0x00003c02;
458 code[1] = 0x85800000;
459
460 if (i)
461 emitPredicate(i);
462 else
463 code[0] = 0x001c3c02;
464 }
465
466 void
467 CodeEmitterGK110::emitFMAD(const Instruction *i)
468 {
469 assert(!isLIMM(i->src(1), TYPE_F32));
470
471 emitForm_21(i, 0x0c0, 0x940);
472
473 NEG_(34, 2);
474 SAT_(35);
475 RND_(36, F);
476 FTZ_(38);
477 DNZ_(39);
478
479 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
480
481 if (code[0] & 0x1) {
482 if (neg1)
483 code[1] ^= 1 << 27;
484 } else
485 if (neg1) {
486 code[1] |= 1 << 19;
487 }
488 }
489
490 void
491 CodeEmitterGK110::emitDMAD(const Instruction *i)
492 {
493 assert(!i->saturate);
494 assert(!i->ftz);
495
496 emitForm_21(i, 0x1b8, 0xb38);
497
498 NEG_(34, 2);
499 RND_(36, F);
500
501 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
502
503 if (code[0] & 0x1) {
504 if (neg1)
505 code[1] ^= 1 << 27;
506 } else
507 if (neg1) {
508 code[1] |= 1 << 19;
509 }
510 }
511
512 void
513 CodeEmitterGK110::emitFMUL(const Instruction *i)
514 {
515 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
516
517 assert(i->postFactor >= -3 && i->postFactor <= 3);
518
519 if (isLIMM(i->src(1), TYPE_F32)) {
520 emitForm_L(i, 0x200, 0x2, Modifier(0));
521
522 FTZ_(38);
523 DNZ_(39);
524 SAT_(3a);
525 if (neg)
526 code[1] ^= 1 << 22;
527
528 assert(i->postFactor == 0);
529 } else {
530 emitForm_21(i, 0x234, 0xc34);
531 code[1] |= ((i->postFactor > 0) ?
532 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
533
534 RND_(2a, F);
535 FTZ_(2f);
536 DNZ_(30);
537 SAT_(35);
538
539 if (code[0] & 0x1) {
540 if (neg)
541 code[1] ^= 1 << 27;
542 } else
543 if (neg) {
544 code[1] |= 1 << 19;
545 }
546 }
547 }
548
549 void
550 CodeEmitterGK110::emitDMUL(const Instruction *i)
551 {
552 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
553
554 assert(!i->postFactor);
555 assert(!i->saturate);
556 assert(!i->ftz);
557 assert(!i->dnz);
558
559 emitForm_21(i, 0x240, 0xc40);
560
561 RND_(2a, F);
562
563 if (code[0] & 0x1) {
564 if (neg)
565 code[1] ^= 1 << 27;
566 } else
567 if (neg) {
568 code[1] |= 1 << 19;
569 }
570 }
571
572 void
573 CodeEmitterGK110::emitIMUL(const Instruction *i)
574 {
575 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
576 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
577
578 if (isLIMM(i->src(1), TYPE_S32)) {
579 emitForm_L(i, 0x280, 2, Modifier(0));
580
581 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
582 code[1] |= 1 << 24;
583 if (i->sType == TYPE_S32)
584 code[1] |= 3 << 25;
585 } else {
586 emitForm_21(i, 0x21c, 0xc1c);
587
588 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
589 code[1] |= 1 << 10;
590 if (i->sType == TYPE_S32)
591 code[1] |= 3 << 11;
592 }
593 }
594
595 void
596 CodeEmitterGK110::emitFADD(const Instruction *i)
597 {
598 if (isLIMM(i->src(1), TYPE_F32)) {
599 assert(i->rnd == ROUND_N);
600 assert(!i->saturate);
601
602 Modifier mod = i->src(1).mod ^
603 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
604
605 emitForm_L(i, 0x400, 0, mod);
606
607 FTZ_(3a);
608 NEG_(3b, 0);
609 ABS_(39, 0);
610 } else {
611 emitForm_21(i, 0x22c, 0xc2c);
612
613 FTZ_(2f);
614 RND_(2a, F);
615 ABS_(31, 0);
616 NEG_(33, 0);
617 SAT_(35);
618
619 if (code[0] & 0x1) {
620 modNegAbsF32_3b(i, 1);
621 if (i->op == OP_SUB) code[1] ^= 1 << 27;
622 } else {
623 ABS_(34, 1);
624 NEG_(30, 1);
625 if (i->op == OP_SUB) code[1] ^= 1 << 16;
626 }
627 }
628 }
629
630 void
631 CodeEmitterGK110::emitDADD(const Instruction *i)
632 {
633 assert(!i->saturate);
634 assert(!i->ftz);
635
636 emitForm_21(i, 0x238, 0xc38);
637 RND_(2a, F);
638 ABS_(31, 0);
639 NEG_(33, 0);
640 if (code[0] & 0x1) {
641 modNegAbsF32_3b(i, 1);
642 if (i->op == OP_SUB) code[1] ^= 1 << 27;
643 } else {
644 NEG_(30, 1);
645 ABS_(34, 1);
646 if (i->op == OP_SUB) code[1] ^= 1 << 16;
647 }
648 }
649
650 void
651 CodeEmitterGK110::emitUADD(const Instruction *i)
652 {
653 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
654
655 if (i->op == OP_SUB)
656 addOp ^= 1;
657
658 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
659
660 if (isLIMM(i->src(1), TYPE_S32)) {
661 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
662
663 if (addOp & 2)
664 code[1] |= 1 << 27;
665
666 assert(!i->defExists(1));
667 assert(i->flagsSrc < 0);
668
669 SAT_(39);
670 } else {
671 emitForm_21(i, 0x208, 0xc08);
672
673 assert(addOp != 3); // would be add-plus-one
674
675 code[1] |= addOp << 19;
676
677 if (i->defExists(1))
678 code[1] |= 1 << 18; // write carry
679 if (i->flagsSrc >= 0)
680 code[1] |= 1 << 14; // add carry
681
682 SAT_(35);
683 }
684 }
685
686 // TODO: shl-add
687 void
688 CodeEmitterGK110::emitIMAD(const Instruction *i)
689 {
690 uint8_t addOp =
691 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
692
693 emitForm_21(i, 0x100, 0xa00);
694
695 assert(addOp != 3);
696 code[1] |= addOp << 26;
697
698 if (i->sType == TYPE_S32)
699 code[1] |= (1 << 19) | (1 << 24);
700
701 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
702 code[1] |= 1 << 25;
703 SAT_(35);
704 }
705
706 void
707 CodeEmitterGK110::emitISAD(const Instruction *i)
708 {
709 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
710
711 emitForm_21(i, 0x1f4, 0xb74);
712
713 if (i->dType == TYPE_S32)
714 code[1] |= 1 << 19;
715 }
716
717 void
718 CodeEmitterGK110::emitNOT(const Instruction *i)
719 {
720 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
721 code[1] = 0x22003800;
722
723 emitPredicate(i);
724
725 defId(i->def(0), 2);
726
727 switch (i->src(0).getFile()) {
728 case FILE_GPR:
729 code[1] |= 0xc << 28;
730 srcId(i->src(0), 23);
731 break;
732 case FILE_MEMORY_CONST:
733 code[1] |= 0x4 << 28;
734 setCAddress14(i->src(1));
735 break;
736 default:
737 assert(0);
738 break;
739 }
740 }
741
742 void
743 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
744 {
745 if (isLIMM(i->src(1), TYPE_S32)) {
746 emitForm_L(i, 0x200, 0, i->src(1).mod);
747 code[1] |= subOp << 24;
748 NOT_(3a, 0);
749 } else {
750 emitForm_21(i, 0x220, 0xc20);
751 code[1] |= subOp << 12;
752 NOT_(2a, 0);
753 NOT_(2b, 1);
754 }
755 }
756
757 void
758 CodeEmitterGK110::emitPOPC(const Instruction *i)
759 {
760 assert(!isLIMM(i->src(1), TYPE_S32, true));
761
762 emitForm_21(i, 0x204, 0xc04);
763
764 NOT_(2a, 0);
765 if (!(code[0] & 0x1))
766 NOT_(2b, 1);
767 }
768
769 void
770 CodeEmitterGK110::emitINSBF(const Instruction *i)
771 {
772 emitForm_21(i, 0x1f8, 0xb78);
773 }
774
775 void
776 CodeEmitterGK110::emitEXTBF(const Instruction *i)
777 {
778 emitForm_21(i, 0x600, 0xc00);
779
780 if (i->dType == TYPE_S32)
781 code[1] |= 0x80000;
782 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
783 code[1] |= 0x800;
784 }
785
786 void
787 CodeEmitterGK110::emitBFIND(const Instruction *i)
788 {
789 emitForm_C(i, 0x218, 0x2);
790
791 if (i->dType == TYPE_S32)
792 code[1] |= 0x80000;
793 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
794 code[1] |= 0x800;
795 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
796 code[1] |= 0x1000;
797 }
798
799 void
800 CodeEmitterGK110::emitShift(const Instruction *i)
801 {
802 if (i->op == OP_SHR) {
803 emitForm_21(i, 0x214, 0xc14);
804 if (isSignedType(i->dType))
805 code[1] |= 1 << 19;
806 } else {
807 emitForm_21(i, 0x224, 0xc24);
808 }
809
810 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
811 code[1] |= 1 << 10;
812 }
813
814 void
815 CodeEmitterGK110::emitPreOp(const Instruction *i)
816 {
817 emitForm_C(i, 0x248, 0x2);
818
819 if (i->op == OP_PREEX2)
820 code[1] |= 1 << 10;
821
822 NEG_(30, 0);
823 ABS_(34, 0);
824 }
825
826 void
827 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
828 {
829 code[0] = 0x00000002 | (subOp << 23);
830 code[1] = 0x84000000;
831
832 emitPredicate(i);
833
834 defId(i->def(0), 2);
835 srcId(i->src(0), 10);
836
837 NEG_(33, 0);
838 ABS_(31, 0);
839 SAT_(35);
840 }
841
842 void
843 CodeEmitterGK110::emitMINMAX(const Instruction *i)
844 {
845 uint32_t op2, op1;
846
847 switch (i->dType) {
848 case TYPE_U32:
849 case TYPE_S32:
850 op2 = 0x210;
851 op1 = 0xc10;
852 break;
853 case TYPE_F32:
854 op2 = 0x230;
855 op1 = 0xc30;
856 break;
857 case TYPE_F64:
858 op2 = 0x228;
859 op1 = 0xc28;
860 break;
861 default:
862 assert(0);
863 op2 = 0;
864 op1 = 0;
865 break;
866 }
867 emitForm_21(i, op2, op1);
868
869 if (i->dType == TYPE_S32)
870 code[1] |= 1 << 19;
871 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
872
873 FTZ_(2f);
874 ABS_(31, 0);
875 NEG_(33, 0);
876 if (code[0] & 0x1) {
877 modNegAbsF32_3b(i, 1);
878 } else {
879 ABS_(34, 1);
880 NEG_(30, 1);
881 }
882 }
883
884 void
885 CodeEmitterGK110::emitCVT(const Instruction *i)
886 {
887 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
888 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
889 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
890
891 bool sat = i->saturate;
892 bool abs = i->src(0).mod.abs();
893 bool neg = i->src(0).mod.neg();
894
895 RoundMode rnd = i->rnd;
896
897 switch (i->op) {
898 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
899 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
900 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
901 case OP_SAT: sat = true; break;
902 case OP_NEG: neg = !neg; break;
903 case OP_ABS: abs = true; neg = false; break;
904 default:
905 break;
906 }
907
908 DataType dType;
909
910 if (i->op == OP_NEG && i->dType == TYPE_U32)
911 dType = TYPE_S32;
912 else
913 dType = i->dType;
914
915
916 uint32_t op;
917
918 if (f2f) op = 0x254;
919 else if (f2i) op = 0x258;
920 else if (i2f) op = 0x25c;
921 else op = 0x260;
922
923 emitForm_C(i, op, 0x2);
924
925 FTZ_(2f);
926 if (neg) code[1] |= 1 << 16;
927 if (abs) code[1] |= 1 << 20;
928 if (sat) code[1] |= 1 << 21;
929
930 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
931
932 code[0] |= typeSizeofLog2(dType) << 10;
933 code[0] |= typeSizeofLog2(i->sType) << 12;
934 code[1] |= i->subOp << 12;
935
936 if (isSignedIntType(dType))
937 code[0] |= 0x4000;
938 if (isSignedIntType(i->sType))
939 code[0] |= 0x8000;
940 }
941
942 void
943 CodeEmitterGK110::emitSET(const CmpInstruction *i)
944 {
945 uint16_t op1, op2;
946
947 if (i->def(0).getFile() == FILE_PREDICATE) {
948 switch (i->sType) {
949 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
950 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
951 default:
952 op2 = 0x1b0;
953 op1 = 0xb30;
954 break;
955 }
956 emitForm_21(i, op2, op1);
957
958 NEG_(2e, 0);
959 ABS_(9, 0);
960 if (!(code[0] & 0x1)) {
961 NEG_(8, 1);
962 ABS_(2f, 1);
963 } else {
964 modNegAbsF32_3b(i, 1);
965 }
966 FTZ_(32);
967
968 // normal DST field is negated predicate result
969 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
970 if (i->defExists(1))
971 defId(i->def(1), 2);
972 else
973 code[0] |= 0x1c;
974 } else {
975 switch (i->sType) {
976 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
977 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
978 default:
979 op2 = 0x1a8;
980 op1 = 0xb28;
981 break;
982 }
983 emitForm_21(i, op2, op1);
984
985 NEG_(2e, 0);
986 ABS_(39, 0);
987 if (!(code[0] & 0x1)) {
988 NEG_(38, 1);
989 ABS_(2f, 1);
990 } else {
991 modNegAbsF32_3b(i, 1);
992 }
993 FTZ_(3a);
994
995 if (i->dType == TYPE_F32) {
996 if (isFloatType(i->sType))
997 code[1] |= 1 << 23;
998 else
999 code[1] |= 1 << 15;
1000 }
1001 }
1002 if (i->sType == TYPE_S32)
1003 code[1] |= 1 << 19;
1004
1005 if (i->op != OP_SET) {
1006 switch (i->op) {
1007 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1008 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1009 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1010 default:
1011 assert(0);
1012 break;
1013 }
1014 srcId(i->src(2), 0x2a);
1015 } else {
1016 code[1] |= 0x7 << 10;
1017 }
1018 emitCondCode(i->setCond,
1019 isFloatType(i->sType) ? 0x33 : 0x34,
1020 isFloatType(i->sType) ? 0xf : 0x7);
1021 }
1022
1023 void
1024 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1025 {
1026 CondCode cc = i->setCond;
1027 if (i->src(2).mod.neg())
1028 cc = reverseCondCode(cc);
1029
1030 if (i->dType == TYPE_F32) {
1031 emitForm_21(i, 0x1d0, 0xb50);
1032 FTZ_(32);
1033 emitCondCode(cc, 0x33, 0xf);
1034 } else {
1035 emitForm_21(i, 0x1a0, 0xb20);
1036 emitCondCode(cc, 0x34, 0x7);
1037 }
1038 }
1039
1040 void CodeEmitterGK110::emitSELP(const Instruction *i)
1041 {
1042 emitForm_21(i, 0x250, 0x050);
1043
1044 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
1045 code[1] |= 1 << 13;
1046 }
1047
1048 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1049 {
1050 code[0] = 0x0000003e | (i->subOp << 23);
1051 code[1] = 0x77000000;
1052
1053 emitPredicate(i);
1054 }
1055
1056 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1057 {
1058 code[0] = 0x00000002;
1059 code[1] = 0x76c00000;
1060
1061 code[1] |= i->tex.r << 9;
1062 // code[1] |= i->tex.s << (9 + 8);
1063
1064 if (i->tex.liveOnly)
1065 code[0] |= 0x80000000;
1066
1067 defId(i->def(0), 2);
1068 srcId(i->src(0), 10);
1069 }
1070
1071 static inline bool
1072 isNextIndependentTex(const TexInstruction *i)
1073 {
1074 if (!i->next || !isTextureOp(i->next->op))
1075 return false;
1076 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1077 return false;
1078 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1079 }
1080
1081 void
1082 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1083 {
1084 const bool ind = i->tex.rIndirectSrc >= 0;
1085
1086 if (ind) {
1087 code[0] = 0x00000002;
1088 switch (i->op) {
1089 case OP_TXD:
1090 code[1] = 0x7e000000;
1091 break;
1092 case OP_TXLQ:
1093 code[1] = 0x7e800000;
1094 break;
1095 case OP_TXF:
1096 code[1] = 0x78000000;
1097 break;
1098 case OP_TXG:
1099 code[1] = 0x7dc00000;
1100 break;
1101 default:
1102 code[1] = 0x7d800000;
1103 break;
1104 }
1105 } else {
1106 switch (i->op) {
1107 case OP_TXD:
1108 code[0] = 0x00000002;
1109 code[1] = 0x76000000;
1110 code[1] |= i->tex.r << 9;
1111 break;
1112 case OP_TXLQ:
1113 code[0] = 0x00000002;
1114 code[1] = 0x76800000;
1115 code[1] |= i->tex.r << 9;
1116 break;
1117 case OP_TXF:
1118 code[0] = 0x00000002;
1119 code[1] = 0x70000000;
1120 code[1] |= i->tex.r << 13;
1121 break;
1122 case OP_TXG:
1123 code[0] = 0x00000001;
1124 code[1] = 0x70000000;
1125 code[1] |= i->tex.r << 15;
1126 break;
1127 default:
1128 code[0] = 0x00000001;
1129 code[1] = 0x60000000;
1130 code[1] |= i->tex.r << 15;
1131 break;
1132 }
1133 }
1134
1135 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1136
1137 if (i->tex.liveOnly)
1138 code[0] |= 0x80000000;
1139
1140 switch (i->op) {
1141 case OP_TEX: break;
1142 case OP_TXB: code[1] |= 0x2000; break;
1143 case OP_TXL: code[1] |= 0x3000; break;
1144 case OP_TXF: break;
1145 case OP_TXG: break;
1146 case OP_TXD: break;
1147 case OP_TXLQ: break;
1148 default:
1149 assert(!"invalid texture op");
1150 break;
1151 }
1152
1153 if (i->op == OP_TXF) {
1154 if (!i->tex.levelZero)
1155 code[1] |= 0x1000;
1156 } else
1157 if (i->tex.levelZero) {
1158 code[1] |= 0x1000;
1159 }
1160
1161 if (i->op != OP_TXD && i->tex.derivAll)
1162 code[1] |= 0x200;
1163
1164 emitPredicate(i);
1165
1166 code[1] |= i->tex.mask << 2;
1167
1168 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1169
1170 defId(i->def(0), 2);
1171 srcId(i->src(0), 10);
1172 srcId(i, src1, 23);
1173
1174 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1175
1176 // texture target:
1177 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1178 if (i->tex.target.isArray())
1179 code[1] |= 0x40;
1180 if (i->tex.target.isShadow())
1181 code[1] |= 0x400;
1182 if (i->tex.target == TEX_TARGET_2D_MS ||
1183 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1184 code[1] |= 0x800;
1185
1186 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1187 // ?
1188 }
1189
1190 if (i->tex.useOffsets == 1) {
1191 switch (i->op) {
1192 case OP_TXF: code[1] |= 0x200; break;
1193 case OP_TXD: code[1] |= 0x00400000; break;
1194 default: code[1] |= 0x800; break;
1195 }
1196 }
1197 if (i->tex.useOffsets == 4)
1198 code[1] |= 0x1000;
1199 }
1200
1201 void
1202 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1203 {
1204 code[0] = 0x00000002;
1205 code[1] = 0x75400001;
1206
1207 switch (i->tex.query) {
1208 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1209 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1210 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1211 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1212 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1213 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1214 default:
1215 assert(!"invalid texture query");
1216 break;
1217 }
1218
1219 code[1] |= i->tex.mask << 2;
1220 code[1] |= i->tex.r << 9;
1221 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1222 code[1] |= 0x08000000;
1223
1224 defId(i->def(0), 2);
1225 srcId(i->src(0), 10);
1226
1227 emitPredicate(i);
1228 }
1229
1230 void
1231 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1232 {
1233 code[0] = 0x00000002 | ((qOp & 1) << 31);
1234 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1235
1236 defId(i->def(0), 2);
1237 srcId(i->src(0), 10);
1238 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1239
1240 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1241 code[1] |= 1 << 9; // dall
1242
1243 emitPredicate(i);
1244 }
1245
1246 void
1247 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1248 {
1249 emitForm_L(i, 0x7f4, 2, Modifier(0));
1250 code[1] |= i->subOp << 2;
1251 code[1] |= 0x00070000;
1252 }
1253
1254 void
1255 CodeEmitterGK110::emitBAR(const Instruction *i)
1256 {
1257 code[0] = 0x00000002;
1258 code[1] = 0x85400000;
1259
1260 switch (i->subOp) {
1261 case NV50_IR_SUBOP_BAR_ARRIVE: code[1] |= 0x08; break;
1262 case NV50_IR_SUBOP_BAR_RED_AND: code[1] |= 0x50; break;
1263 case NV50_IR_SUBOP_BAR_RED_OR: code[1] |= 0x90; break;
1264 case NV50_IR_SUBOP_BAR_RED_POPC: code[1] |= 0x10; break;
1265 default:
1266 code[1] |= 0x20;
1267 assert(i->subOp == NV50_IR_SUBOP_BAR_SYNC);
1268 break;
1269 }
1270
1271 emitPredicate(i);
1272
1273 srcId(i->src(0), 10);
1274 srcId(i->src(1), 23);
1275 }
1276
1277 void CodeEmitterGK110::emitMEMBAR(const Instruction *i)
1278 {
1279 code[0] = 0x00000002 | NV50_IR_SUBOP_MEMBAR_SCOPE(i->subOp) << 8;
1280 code[1] = 0x7cc00000;
1281
1282 emitPredicate(i);
1283 }
1284
1285 void
1286 CodeEmitterGK110::emitFlow(const Instruction *i)
1287 {
1288 const FlowInstruction *f = i->asFlow();
1289
1290 unsigned mask; // bit 0: predicate, bit 1: target
1291
1292 code[0] = 0x00000000;
1293
1294 switch (i->op) {
1295 case OP_BRA:
1296 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1297 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1298 code[0] |= 0x80;
1299 mask = 3;
1300 break;
1301 case OP_CALL:
1302 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1303 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1304 code[0] |= 0x80;
1305 mask = 2;
1306 break;
1307
1308 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1309 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1310 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1311 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1312 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1313
1314 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1315 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1316 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1317 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1318
1319 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1320 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1321 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1322 default:
1323 assert(!"invalid flow operation");
1324 return;
1325 }
1326
1327 if (mask & 1) {
1328 emitPredicate(i);
1329 if (i->flagsSrc < 0)
1330 code[0] |= 0x3c;
1331 }
1332
1333 if (!f)
1334 return;
1335
1336 if (f->allWarp)
1337 code[0] |= 1 << 9;
1338 if (f->limit)
1339 code[0] |= 1 << 8;
1340
1341 if (f->op == OP_CALL) {
1342 if (f->builtin) {
1343 assert(f->absolute);
1344 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1345 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1346 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1347 } else {
1348 assert(!f->absolute);
1349 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1350 code[0] |= (pcRel & 0x1ff) << 23;
1351 code[1] |= (pcRel >> 9) & 0x7fff;
1352 }
1353 } else
1354 if (mask & 2) {
1355 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1356 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1357 pcRel += 8;
1358 // currently we don't want absolute branches
1359 assert(!f->absolute);
1360 code[0] |= (pcRel & 0x1ff) << 23;
1361 code[1] |= (pcRel >> 9) & 0x7fff;
1362 }
1363 }
1364
1365 void
1366 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1367 {
1368 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1369
1370 code[0] = 0x00000002 | (offset << 23);
1371 code[1] = 0x7d000000 | (offset >> 9);
1372
1373 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1374 code[1] |= 0x8;
1375
1376 emitPredicate(i);
1377
1378 defId(i->def(0), 2);
1379 srcId(i->src(0).getIndirect(0), 10);
1380 }
1381
1382 void
1383 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1384 {
1385 uint32_t prim = i->src(0).get()->reg.data.u32;
1386
1387 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1388 code[1] = 0x7f800000;
1389
1390 emitPredicate(i);
1391
1392 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1393
1394 defId(i->def(0), 2);
1395 srcId(i, src1, 10);
1396 }
1397
1398 void
1399 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1400 {
1401 unsigned int size = typeSizeof(i->dType);
1402 uint32_t offset = i->src(0).get()->reg.data.offset;
1403
1404 code[0] = 0x00000002 | (offset << 23);
1405 code[1] = 0x7ec00000 | (offset >> 9);
1406 code[1] |= (size / 4 - 1) << 18;
1407
1408 if (i->perPatch)
1409 code[1] |= 0x4;
1410 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1411 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1412
1413 emitPredicate(i);
1414
1415 defId(i->def(0), 2);
1416 srcId(i->src(0).getIndirect(0), 10);
1417 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1418 }
1419
1420 void
1421 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1422 {
1423 unsigned int size = typeSizeof(i->dType);
1424 uint32_t offset = i->src(0).get()->reg.data.offset;
1425
1426 code[0] = 0x00000002 | (offset << 23);
1427 code[1] = 0x7f000000 | (offset >> 9);
1428 code[1] |= (size / 4 - 1) << 18;
1429
1430 if (i->perPatch)
1431 code[1] |= 0x4;
1432
1433 emitPredicate(i);
1434
1435 assert(i->src(1).getFile() == FILE_GPR);
1436
1437 srcId(i->src(0).getIndirect(0), 10);
1438 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1439 srcId(i->src(1), 2);
1440 }
1441
1442 void
1443 CodeEmitterGK110::emitOUT(const Instruction *i)
1444 {
1445 assert(i->src(0).getFile() == FILE_GPR);
1446
1447 emitForm_21(i, 0x1f0, 0xb70);
1448
1449 if (i->op == OP_EMIT)
1450 code[1] |= 1 << 10;
1451 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1452 code[1] |= 1 << 11;
1453 }
1454
1455 void
1456 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1457 {
1458 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1459 code[1] |= (i->ipa & 0xc) << (19 - 2);
1460 }
1461
1462 static void
1463 interpApply(const InterpEntry *entry, uint32_t *code,
1464 bool force_persample_interp, bool flatshade)
1465 {
1466 int ipa = entry->ipa;
1467 int reg = entry->reg;
1468 int loc = entry->loc;
1469
1470 if (flatshade &&
1471 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1472 ipa = NV50_IR_INTERP_FLAT;
1473 reg = 0xff;
1474 } else if (force_persample_interp &&
1475 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1476 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1477 ipa |= NV50_IR_INTERP_CENTROID;
1478 }
1479 code[loc + 1] &= ~(0xf << 19);
1480 code[loc + 1] |= (ipa & 0x3) << 21;
1481 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1482 code[loc + 0] &= ~(0xff << 23);
1483 code[loc + 0] |= reg << 23;
1484 }
1485
1486 void
1487 CodeEmitterGK110::emitINTERP(const Instruction *i)
1488 {
1489 const uint32_t base = i->getSrc(0)->reg.data.offset;
1490
1491 code[0] = 0x00000002 | (base << 31);
1492 code[1] = 0x74800000 | (base >> 1);
1493
1494 if (i->saturate)
1495 code[1] |= 1 << 18;
1496
1497 if (i->op == OP_PINTERP) {
1498 srcId(i->src(1), 23);
1499 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1500 } else {
1501 code[0] |= 0xff << 23;
1502 addInterp(i->ipa, 0xff, interpApply);
1503 }
1504
1505 srcId(i->src(0).getIndirect(0), 10);
1506 emitInterpMode(i);
1507
1508 emitPredicate(i);
1509 defId(i->def(0), 2);
1510
1511 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1512 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1513 else
1514 code[1] |= 0xff << 10;
1515 }
1516
1517 void
1518 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1519 {
1520 uint8_t n;
1521
1522 switch (ty) {
1523 case TYPE_U8:
1524 n = 0;
1525 break;
1526 case TYPE_S8:
1527 n = 1;
1528 break;
1529 case TYPE_U16:
1530 n = 2;
1531 break;
1532 case TYPE_S16:
1533 n = 3;
1534 break;
1535 case TYPE_F32:
1536 case TYPE_U32:
1537 case TYPE_S32:
1538 n = 4;
1539 break;
1540 case TYPE_F64:
1541 case TYPE_U64:
1542 case TYPE_S64:
1543 n = 5;
1544 break;
1545 case TYPE_B128:
1546 n = 6;
1547 break;
1548 default:
1549 n = 0;
1550 assert(!"invalid ld/st type");
1551 break;
1552 }
1553 code[pos / 32] |= n << (pos % 32);
1554 }
1555
1556 void
1557 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1558 {
1559 uint8_t n;
1560
1561 switch (c) {
1562 case CACHE_CA:
1563 // case CACHE_WB:
1564 n = 0;
1565 break;
1566 case CACHE_CG:
1567 n = 1;
1568 break;
1569 case CACHE_CS:
1570 n = 2;
1571 break;
1572 case CACHE_CV:
1573 // case CACHE_WT:
1574 n = 3;
1575 break;
1576 default:
1577 n = 0;
1578 assert(!"invalid caching mode");
1579 break;
1580 }
1581 code[pos / 32] |= n << (pos % 32);
1582 }
1583
1584 void
1585 CodeEmitterGK110::emitSTORE(const Instruction *i)
1586 {
1587 int32_t offset = SDATA(i->src(0)).offset;
1588
1589 switch (i->src(0).getFile()) {
1590 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1591 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1592 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1593 default:
1594 assert(!"invalid memory file");
1595 break;
1596 }
1597
1598 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1599 offset &= 0xffffff;
1600
1601 if (code[0] & 0x2) {
1602 emitLoadStoreType(i->dType, 0x33);
1603 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1604 emitCachingMode(i->cache, 0x2f);
1605 } else {
1606 emitLoadStoreType(i->dType, 0x38);
1607 emitCachingMode(i->cache, 0x3b);
1608 }
1609 code[0] |= offset << 23;
1610 code[1] |= offset >> 9;
1611
1612 emitPredicate(i);
1613
1614 srcId(i->src(1), 2);
1615 srcId(i->src(0).getIndirect(0), 10);
1616 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL &&
1617 i->src(0).isIndirect(0) &&
1618 i->getIndirect(0, 0)->reg.size == 8)
1619 code[1] |= 1 << 23;
1620 }
1621
1622 void
1623 CodeEmitterGK110::emitLOAD(const Instruction *i)
1624 {
1625 int32_t offset = SDATA(i->src(0)).offset;
1626
1627 switch (i->src(0).getFile()) {
1628 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1629 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1630 case FILE_MEMORY_SHARED: code[1] = 0x7a400000; code[0] = 0x00000002; break;
1631 case FILE_MEMORY_CONST:
1632 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1633 emitMOV(i);
1634 return;
1635 }
1636 offset &= 0xffff;
1637 code[0] = 0x00000002;
1638 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1639 code[1] |= i->subOp << 15;
1640 break;
1641 default:
1642 assert(!"invalid memory file");
1643 break;
1644 }
1645
1646 if (code[0] & 0x2) {
1647 offset &= 0xffffff;
1648 emitLoadStoreType(i->dType, 0x33);
1649 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1650 emitCachingMode(i->cache, 0x2f);
1651 } else {
1652 emitLoadStoreType(i->dType, 0x38);
1653 emitCachingMode(i->cache, 0x3b);
1654 }
1655 code[0] |= offset << 23;
1656 code[1] |= offset >> 9;
1657
1658 emitPredicate(i);
1659
1660 defId(i->def(0), 2);
1661 if (i->getIndirect(0, 0)) {
1662 srcId(i->src(0).getIndirect(0), 10);
1663 if (i->getIndirect(0, 0)->reg.size == 8)
1664 code[1] |= 1 << 23;
1665 } else {
1666 code[0] |= 255 << 10;
1667 }
1668 }
1669
1670 uint8_t
1671 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1672 {
1673 switch (SDATA(ref).sv.sv) {
1674 case SV_LANEID: return 0x00;
1675 case SV_PHYSID: return 0x03;
1676 case SV_VERTEX_COUNT: return 0x10;
1677 case SV_INVOCATION_ID: return 0x11;
1678 case SV_YDIR: return 0x12;
1679 case SV_THREAD_KILL: return 0x13;
1680 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1681 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1682 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1683 case SV_GRIDID: return 0x2c;
1684 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1685 case SV_LBASE: return 0x34;
1686 case SV_SBASE: return 0x30;
1687 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1688 default:
1689 assert(!"no sreg for system value");
1690 return 0;
1691 }
1692 }
1693
1694 void
1695 CodeEmitterGK110::emitMOV(const Instruction *i)
1696 {
1697 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1698 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1699 code[1] = 0x86400000;
1700 emitPredicate(i);
1701 defId(i->def(0), 2);
1702 } else
1703 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1704 code[0] = 0x00000002 | (i->lanes << 14);
1705 code[1] = 0x74000000;
1706 emitPredicate(i);
1707 defId(i->def(0), 2);
1708 setImmediate32(i, 0, Modifier(0));
1709 } else
1710 if (i->src(0).getFile() == FILE_PREDICATE) {
1711 code[0] = 0x00000002;
1712 code[1] = 0x84401c07;
1713 emitPredicate(i);
1714 defId(i->def(0), 2);
1715 srcId(i->src(0), 14);
1716 } else {
1717 emitForm_C(i, 0x24c, 2);
1718 code[1] |= i->lanes << 10;
1719 }
1720 }
1721
1722 static inline bool
1723 uses64bitAddress(const Instruction *ldst)
1724 {
1725 return ldst->src(0).getFile() == FILE_MEMORY_GLOBAL &&
1726 ldst->src(0).isIndirect(0) &&
1727 ldst->getIndirect(0, 0)->reg.size == 8;
1728 }
1729
1730 void
1731 CodeEmitterGK110::emitATOM(const Instruction *i)
1732 {
1733 code[0] = 0x00000002;
1734 if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
1735 code[1] = 0x77800000;
1736 else
1737 code[1] = 0x68000000;
1738
1739 switch (i->subOp) {
1740 case NV50_IR_SUBOP_ATOM_CAS: break;
1741 case NV50_IR_SUBOP_ATOM_EXCH: code[1] |= 0x04000000; break;
1742 default: code[1] |= i->subOp << 23; break;
1743 }
1744
1745 switch (i->dType) {
1746 case TYPE_U32: break;
1747 case TYPE_S32: code[1] |= 0x00100000; break;
1748 case TYPE_U64: code[1] |= 0x00200000; break;
1749 case TYPE_F32: code[1] |= 0x00300000; break;
1750 case TYPE_B128: code[1] |= 0x00400000; break; /* TODO: U128 */
1751 case TYPE_S64: code[1] |= 0x00500000; break;
1752 default: assert(!"unsupported type"); break;
1753 }
1754
1755 emitPredicate(i);
1756
1757 /* TODO: cas: check that src regs line up */
1758 /* TODO: cas: flip bits if $r255 is used */
1759 srcId(i->src(1), 23);
1760
1761 if (i->defExists(0))
1762 defId(i->def(0), 2);
1763 else
1764 code[0] |= 255 << 2;
1765
1766 const int32_t offset = SDATA(i->src(0)).offset;
1767 assert(offset < 0x80000 && offset >= -0x80000);
1768 code[0] |= (offset & 1) << 31;
1769 code[1] |= (offset & 0xffffe) >> 1;
1770
1771 if (i->getIndirect(0, 0)) {
1772 srcId(i->getIndirect(0, 0), 10);
1773 if (i->getIndirect(0, 0)->reg.size == 8)
1774 code[1] |= 1 << 19;
1775 } else {
1776 code[0] |= 255 << 10;
1777 }
1778 }
1779
1780 void
1781 CodeEmitterGK110::emitCCTL(const Instruction *i)
1782 {
1783 int32_t offset = SDATA(i->src(0)).offset;
1784
1785 code[0] = 0x00000002 | (i->subOp << 2);
1786
1787 if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
1788 code[1] = 0x7b000000;
1789 } else {
1790 code[1] = 0x7c000000;
1791 offset &= 0xffffff;
1792 }
1793 code[0] |= offset << 23;
1794 code[1] |= offset >> 9;
1795
1796 if (uses64bitAddress(i))
1797 code[1] |= 1 << 23;
1798 srcId(i->src(0).getIndirect(0), 10);
1799
1800 emitPredicate(i);
1801 }
1802
1803 bool
1804 CodeEmitterGK110::emitInstruction(Instruction *insn)
1805 {
1806 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1807
1808 if (insn->encSize != 8) {
1809 ERROR("skipping unencodable instruction: ");
1810 insn->print();
1811 return false;
1812 } else
1813 if (codeSize + size > codeSizeLimit) {
1814 ERROR("code emitter output buffer too small\n");
1815 return false;
1816 }
1817
1818 if (writeIssueDelays) {
1819 int id = (codeSize & 0x3f) / 8 - 1;
1820 if (id < 0) {
1821 id += 1;
1822 code[0] = 0x00000000; // cf issue delay "instruction"
1823 code[1] = 0x08000000;
1824 code += 2;
1825 codeSize += 8;
1826 }
1827 uint32_t *data = code - (id * 2 + 2);
1828
1829 switch (id) {
1830 case 0: data[0] |= insn->sched << 2; break;
1831 case 1: data[0] |= insn->sched << 10; break;
1832 case 2: data[0] |= insn->sched << 18; break;
1833 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1834 case 4: data[1] |= insn->sched << 2; break;
1835 case 5: data[1] |= insn->sched << 10; break;
1836 case 6: data[1] |= insn->sched << 18; break;
1837 default:
1838 assert(0);
1839 break;
1840 }
1841 }
1842
1843 // assert that instructions with multiple defs don't corrupt registers
1844 for (int d = 0; insn->defExists(d); ++d)
1845 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1846
1847 switch (insn->op) {
1848 case OP_MOV:
1849 case OP_RDSV:
1850 emitMOV(insn);
1851 break;
1852 case OP_NOP:
1853 break;
1854 case OP_LOAD:
1855 emitLOAD(insn);
1856 break;
1857 case OP_STORE:
1858 emitSTORE(insn);
1859 break;
1860 case OP_LINTERP:
1861 case OP_PINTERP:
1862 emitINTERP(insn);
1863 break;
1864 case OP_VFETCH:
1865 emitVFETCH(insn);
1866 break;
1867 case OP_EXPORT:
1868 emitEXPORT(insn);
1869 break;
1870 case OP_AFETCH:
1871 emitAFETCH(insn);
1872 break;
1873 case OP_PFETCH:
1874 emitPFETCH(insn);
1875 break;
1876 case OP_EMIT:
1877 case OP_RESTART:
1878 emitOUT(insn);
1879 break;
1880 case OP_ADD:
1881 case OP_SUB:
1882 if (insn->dType == TYPE_F64)
1883 emitDADD(insn);
1884 else if (isFloatType(insn->dType))
1885 emitFADD(insn);
1886 else
1887 emitUADD(insn);
1888 break;
1889 case OP_MUL:
1890 if (insn->dType == TYPE_F64)
1891 emitDMUL(insn);
1892 else if (isFloatType(insn->dType))
1893 emitFMUL(insn);
1894 else
1895 emitIMUL(insn);
1896 break;
1897 case OP_MAD:
1898 case OP_FMA:
1899 if (insn->dType == TYPE_F64)
1900 emitDMAD(insn);
1901 else if (isFloatType(insn->dType))
1902 emitFMAD(insn);
1903 else
1904 emitIMAD(insn);
1905 break;
1906 case OP_SAD:
1907 emitISAD(insn);
1908 break;
1909 case OP_NOT:
1910 emitNOT(insn);
1911 break;
1912 case OP_AND:
1913 emitLogicOp(insn, 0);
1914 break;
1915 case OP_OR:
1916 emitLogicOp(insn, 1);
1917 break;
1918 case OP_XOR:
1919 emitLogicOp(insn, 2);
1920 break;
1921 case OP_SHL:
1922 case OP_SHR:
1923 emitShift(insn);
1924 break;
1925 case OP_SET:
1926 case OP_SET_AND:
1927 case OP_SET_OR:
1928 case OP_SET_XOR:
1929 emitSET(insn->asCmp());
1930 break;
1931 case OP_SELP:
1932 emitSELP(insn);
1933 break;
1934 case OP_SLCT:
1935 emitSLCT(insn->asCmp());
1936 break;
1937 case OP_MIN:
1938 case OP_MAX:
1939 emitMINMAX(insn);
1940 break;
1941 case OP_ABS:
1942 case OP_NEG:
1943 case OP_CEIL:
1944 case OP_FLOOR:
1945 case OP_TRUNC:
1946 case OP_CVT:
1947 case OP_SAT:
1948 emitCVT(insn);
1949 break;
1950 case OP_RSQ:
1951 emitSFnOp(insn, 5 + 2 * insn->subOp);
1952 break;
1953 case OP_RCP:
1954 emitSFnOp(insn, 4 + 2 * insn->subOp);
1955 break;
1956 case OP_LG2:
1957 emitSFnOp(insn, 3);
1958 break;
1959 case OP_EX2:
1960 emitSFnOp(insn, 2);
1961 break;
1962 case OP_SIN:
1963 emitSFnOp(insn, 1);
1964 break;
1965 case OP_COS:
1966 emitSFnOp(insn, 0);
1967 break;
1968 case OP_PRESIN:
1969 case OP_PREEX2:
1970 emitPreOp(insn);
1971 break;
1972 case OP_TEX:
1973 case OP_TXB:
1974 case OP_TXL:
1975 case OP_TXD:
1976 case OP_TXF:
1977 case OP_TXG:
1978 case OP_TXLQ:
1979 emitTEX(insn->asTex());
1980 break;
1981 case OP_TXQ:
1982 emitTXQ(insn->asTex());
1983 break;
1984 case OP_TEXBAR:
1985 emitTEXBAR(insn);
1986 break;
1987 case OP_PIXLD:
1988 emitPIXLD(insn);
1989 break;
1990 case OP_BRA:
1991 case OP_CALL:
1992 case OP_PRERET:
1993 case OP_RET:
1994 case OP_DISCARD:
1995 case OP_EXIT:
1996 case OP_PRECONT:
1997 case OP_CONT:
1998 case OP_PREBREAK:
1999 case OP_BREAK:
2000 case OP_JOINAT:
2001 case OP_BRKPT:
2002 case OP_QUADON:
2003 case OP_QUADPOP:
2004 emitFlow(insn);
2005 break;
2006 case OP_QUADOP:
2007 emitQUADOP(insn, insn->subOp, insn->lanes);
2008 break;
2009 case OP_DFDX:
2010 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
2011 break;
2012 case OP_DFDY:
2013 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
2014 break;
2015 case OP_POPCNT:
2016 emitPOPC(insn);
2017 break;
2018 case OP_INSBF:
2019 emitINSBF(insn);
2020 break;
2021 case OP_EXTBF:
2022 emitEXTBF(insn);
2023 break;
2024 case OP_BFIND:
2025 emitBFIND(insn);
2026 break;
2027 case OP_JOIN:
2028 emitNOP(insn);
2029 insn->join = 1;
2030 break;
2031 case OP_BAR:
2032 emitBAR(insn);
2033 break;
2034 case OP_MEMBAR:
2035 emitMEMBAR(insn);
2036 break;
2037 case OP_ATOM:
2038 emitATOM(insn);
2039 break;
2040 case OP_CCTL:
2041 emitCCTL(insn);
2042 break;
2043 case OP_PHI:
2044 case OP_UNION:
2045 case OP_CONSTRAINT:
2046 ERROR("operation should have been eliminated");
2047 return false;
2048 case OP_EXP:
2049 case OP_LOG:
2050 case OP_SQRT:
2051 case OP_POW:
2052 ERROR("operation should have been lowered\n");
2053 return false;
2054 default:
2055 ERROR("unknown op: %u\n", insn->op);
2056 return false;
2057 }
2058
2059 if (insn->join)
2060 code[0] |= 1 << 22;
2061
2062 code += 2;
2063 codeSize += 8;
2064 return true;
2065 }
2066
2067 uint32_t
2068 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
2069 {
2070 // No more short instruction encodings.
2071 return 8;
2072 }
2073
2074 void
2075 CodeEmitterGK110::prepareEmission(Function *func)
2076 {
2077 const Target *targ = func->getProgram()->getTarget();
2078
2079 CodeEmitter::prepareEmission(func);
2080
2081 if (targ->hasSWSched)
2082 calculateSchedDataNVC0(targ, func);
2083 }
2084
2085 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
2086 : CodeEmitter(target),
2087 targNVC0(target),
2088 writeIssueDelays(target->hasSWSched)
2089 {
2090 code = NULL;
2091 codeSize = codeSizeLimit = 0;
2092 relocInfo = NULL;
2093 }
2094
2095 CodeEmitter *
2096 TargetNVC0::createCodeEmitterGK110(Program::Type type)
2097 {
2098 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
2099 emit->setProgramType(type);
2100 return emit;
2101 }
2102
2103 } // namespace nv50_ir