projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
nv50/ir/gk110: fill in mov from predicate
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitPFETCH(const Instruction *);
81 void emitVFETCH(const Instruction *);
82 void emitEXPORT(const Instruction *);
83 void emitOUT(const Instruction *);
84
85 void emitUADD(const Instruction *);
86 void emitFADD(const Instruction *);
87 void emitIMUL(const Instruction *);
88 void emitFMUL(const Instruction *);
89 void emitIMAD(const Instruction *);
90 void emitISAD(const Instruction *);
91 void emitFMAD(const Instruction *);
92
93 void emitNOT(const Instruction *);
94 void emitLogicOp(const Instruction *, uint8_t subOp);
95 void emitPOPC(const Instruction *);
96 void emitINSBF(const Instruction *);
97 void emitShift(const Instruction *);
98
99 void emitSFnOp(const Instruction *, uint8_t subOp);
100
101 void emitCVT(const Instruction *);
102 void emitMINMAX(const Instruction *);
103 void emitPreOp(const Instruction *);
104
105 void emitSET(const CmpInstruction *);
106 void emitSLCT(const CmpInstruction *);
107 void emitSELP(const Instruction *);
108
109 void emitTEXBAR(const Instruction *);
110 void emitTEX(const TexInstruction *);
111 void emitTEXCSAA(const TexInstruction *);
112 void emitTXQ(const TexInstruction *);
113
114 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
115
116 void emitFlow(const Instruction *);
117
118 inline void defId(const ValueDef&, const int pos);
119 inline void srcId(const ValueRef&, const int pos);
120 inline void srcId(const ValueRef *, const int pos);
121 inline void srcId(const Instruction *, int s, const int pos);
122
123 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
124
125 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
126 };
127
128 #define GK110_GPR_ZERO 255
129
130 #define NEG_(b, s) \
131 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
132 #define ABS_(b, s) \
133 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
134
135 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
136 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
137
138 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
139
140 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
141
142 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
143
144 #define SDATA(a) ((a).rep()->reg.data)
145 #define DDATA(a) ((a).rep()->reg.data)
146
147 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
148 {
149 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
150 }
151
152 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
153 {
154 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
155 }
156
157 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
158 {
159 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
160 code[pos / 32] |= r << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
164 {
165 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
169 {
170 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
171 }
172
173 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
174 {
175 const ImmediateValue *imm = ref.get()->asImm();
176
177 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
178 }
179
180 void
181 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
182 {
183 bool rint = false;
184 uint8_t n;
185
186 switch (rnd) {
187 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
188 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
189 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
190 default:
191 rint = rnd == ROUND_NI;
192 n = 0;
193 assert(rnd == ROUND_N || rnd == ROUND_NI);
194 break;
195 }
196 code[pos / 32] |= n << (pos % 32);
197 if (rint && rintPos >= 0)
198 code[rintPos / 32] |= 1 << (rintPos % 32);
199 }
200
201 void
202 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
203 {
204 uint8_t n;
205
206 switch (rnd) {
207 case ROUND_M: n = 1; break;
208 case ROUND_P: n = 2; break;
209 case ROUND_Z: n = 3; break;
210 default:
211 n = 0;
212 assert(rnd == ROUND_N);
213 break;
214 }
215 code[pos / 32] |= n << (pos % 32);
216 }
217
218 void
219 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
220 {
221 uint8_t n;
222
223 switch (rnd) {
224 case ROUND_MI: n = 1; break;
225 case ROUND_PI: n = 2; break;
226 case ROUND_ZI: n = 3; break;
227 default:
228 n = 0;
229 assert(rnd == ROUND_NI);
230 break;
231 }
232 code[pos / 32] |= n << (pos % 32);
233 }
234
235 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
236 {
237 uint8_t n;
238
239 switch (cc) {
240 case CC_FL: n = 0x00; break;
241 case CC_LT: n = 0x01; break;
242 case CC_EQ: n = 0x02; break;
243 case CC_LE: n = 0x03; break;
244 case CC_GT: n = 0x04; break;
245 case CC_NE: n = 0x05; break;
246 case CC_GE: n = 0x06; break;
247 case CC_LTU: n = 0x09; break;
248 case CC_EQU: n = 0x0a; break;
249 case CC_LEU: n = 0x0b; break;
250 case CC_GTU: n = 0x0c; break;
251 case CC_NEU: n = 0x0d; break;
252 case CC_GEU: n = 0x0e; break;
253 case CC_TR: n = 0x0f; break;
254 case CC_NO: n = 0x10; break;
255 case CC_NC: n = 0x11; break;
256 case CC_NS: n = 0x12; break;
257 case CC_NA: n = 0x13; break;
258 case CC_A: n = 0x14; break;
259 case CC_S: n = 0x15; break;
260 case CC_C: n = 0x16; break;
261 case CC_O: n = 0x17; break;
262 default:
263 n = 0;
264 assert(!"invalid condition code");
265 break;
266 }
267 code[pos / 32] |= (n & mask) << (pos % 32);
268 }
269
270 void
271 CodeEmitterGK110::emitPredicate(const Instruction *i)
272 {
273 if (i->predSrc >= 0) {
274 srcId(i->src(i->predSrc), 18);
275 if (i->cc == CC_NOT_P)
276 code[0] |= 8 << 18; // negate
277 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
278 } else {
279 code[0] |= 7 << 18;
280 }
281 }
282
283 void
284 CodeEmitterGK110::setCAddress14(const ValueRef& src)
285 {
286 const int32_t addr = src.get()->asSym()->reg.data.offset / 4;
287
288 code[0] |= (addr & 0x01ff) << 23;
289 code[1] |= (addr & 0x3e00) >> 9;
290 }
291
292 void
293 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
294 {
295 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
296 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
297
298 if (i->sType == TYPE_F32) {
299 assert(!(u32 & 0x00000fff));
300 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
301 code[1] |= ((u32 & 0x7fe00000) >> 21);
302 code[1] |= ((u32 & 0x80000000) >> 4);
303 } else
304 if (i->sType == TYPE_F64) {
305 assert(!(u64 & 0x00000fffffffffffULL));
306 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
307 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
308 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
309 } else {
310 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
311 code[0] |= (u32 & 0x001ff) << 23;
312 code[1] |= (u32 & 0x7fe00) >> 9;
313 code[1] |= (u32 & 0x80000) << 8;
314 }
315 }
316
317 void
318 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
319 Modifier mod)
320 {
321 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
322
323 if (mod) {
324 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
325 mod.applyTo(imm);
326 u32 = imm.reg.data.u32;
327 }
328
329 code[0] |= u32 << 23;
330 code[1] |= u32 >> 9;
331 }
332
333 void
334 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
335 Modifier mod)
336 {
337 code[0] = ctg;
338 code[1] = opc << 20;
339
340 emitPredicate(i);
341
342 defId(i->def(0), 2);
343
344 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
345 switch (i->src(s).getFile()) {
346 case FILE_GPR:
347 srcId(i->src(s), s ? 42 : 10);
348 break;
349 case FILE_IMMEDIATE:
350 setImmediate32(i, s, mod);
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358
359 void
360 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
361 {
362 code[0] = ctg;
363 code[1] = opc << 20;
364
365 emitPredicate(i);
366
367 defId(i->def(0), 2);
368
369 switch (i->src(0).getFile()) {
370 case FILE_MEMORY_CONST:
371 code[1] |= 0x4 << 28;
372 setCAddress14(i->src(0));
373 break;
374 case FILE_GPR:
375 code[1] |= 0xc << 28;
376 srcId(i->src(0), 23);
377 break;
378 default:
379 assert(0);
380 break;
381 }
382 }
383
384 // 0x2 for GPR, c[] and 0x1 for short immediate
385 void
386 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
387 uint32_t opc1)
388 {
389 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
390
391 int s1 = 23;
392 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
393 s1 = 42;
394
395 if (imm) {
396 code[0] = 0x1;
397 code[1] = opc1 << 20;
398 } else {
399 code[0] = 0x2;
400 code[1] = (0xc << 28) | (opc2 << 20);
401 }
402
403 emitPredicate(i);
404
405 defId(i->def(0), 2);
406
407 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
408 switch (i->src(s).getFile()) {
409 case FILE_MEMORY_CONST:
410 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
411 setCAddress14(i->src(s));
412 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
413 break;
414 case FILE_IMMEDIATE:
415 setShortImmediate(i, s);
416 break;
417 case FILE_GPR:
418 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
419 break;
420 default:
421 // ignore here, can be predicate or flags, but must not be address
422 break;
423 }
424 }
425 // 0x0 = invalid
426 // 0xc = rrr
427 // 0x8 = rrc
428 // 0x4 = rcr
429 assert(imm || (code[1] & (0xc << 28)));
430 }
431
432 inline void
433 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
434 {
435 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
436 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
437 }
438
439 void
440 CodeEmitterGK110::emitNOP(const Instruction *i)
441 {
442 code[0] = 0x00003c02;
443 code[1] = 0x85800000;
444
445 if (i)
446 emitPredicate(i);
447 else
448 code[0] = 0x001c3c02;
449 }
450
451 void
452 CodeEmitterGK110::emitFMAD(const Instruction *i)
453 {
454 assert(!isLIMM(i->src(1), TYPE_F32));
455
456 emitForm_21(i, 0x0c0, 0x940);
457
458 NEG_(34, 2);
459 SAT_(35);
460 RND_(36, F);
461 FTZ_(38);
462
463 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
464
465 if (code[0] & 0x1) {
466 if (neg1)
467 code[1] ^= 1 << 27;
468 } else
469 if (neg1) {
470 code[1] |= 1 << 19;
471 }
472 }
473
474 void
475 CodeEmitterGK110::emitFMUL(const Instruction *i)
476 {
477 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
478
479 assert(i->postFactor >= -3 && i->postFactor <= 3);
480
481 if (isLIMM(i->src(1), TYPE_F32)) {
482 emitForm_L(i, 0x200, 0x2, Modifier(0));
483
484 FTZ_(38);
485 SAT_(3a);
486 if (neg)
487 code[1] ^= 1 << 22;
488
489 assert(i->postFactor == 0);
490 } else {
491 emitForm_21(i, 0x234, 0xc34);
492
493 RND_(2a, F);
494 FTZ_(2f);
495 SAT_(35);
496
497 if (code[0] & 0x1) {
498 if (neg)
499 code[1] ^= 1 << 27;
500 } else
501 if (neg) {
502 code[1] |= 1 << 19;
503 }
504 }
505 }
506
507 void
508 CodeEmitterGK110::emitIMUL(const Instruction *i)
509 {
510 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
511 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
512
513 if (isLIMM(i->src(1), TYPE_S32)) {
514 emitForm_L(i, 0x280, 2, Modifier(0));
515
516 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
517
518 if (i->sType == TYPE_S32)
519 code[1] |= 3 << 25;
520 } else {
521 emitForm_21(i, 0x21c, 0xc1c);
522
523 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
524 code[1] |= 1 << 10;
525 if (i->sType == TYPE_S32)
526 code[1] |= 3 << 11;
527 }
528 }
529
530 void
531 CodeEmitterGK110::emitFADD(const Instruction *i)
532 {
533 if (isLIMM(i->src(1), TYPE_F32)) {
534 assert(i->rnd == ROUND_N);
535 assert(!i->saturate);
536
537 emitForm_L(i, 0x400, 0, i->src(1).mod);
538
539 FTZ_(3a);
540 NEG_(3b, 0);
541 ABS_(39, 0);
542 } else {
543 emitForm_21(i, 0x22c, 0xc2c);
544
545 FTZ_(2f);
546 RND_(2a, F);
547 ABS_(31, 0);
548 NEG_(33, 0);
549
550 if (code[0] & 0x1) {
551 modNegAbsF32_3b(i, 1);
552 } else {
553 ABS_(34, 1);
554 NEG_(30, 1);
555 }
556 }
557 }
558
559 void
560 CodeEmitterGK110::emitUADD(const Instruction *i)
561 {
562 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
563
564 if (i->op == OP_SUB)
565 addOp ^= 1;
566
567 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
568
569 if (isLIMM(i->src(1), TYPE_S32)) {
570 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
571
572 if (addOp & 2)
573 code[1] |= 1 << 27;
574
575 assert(!i->defExists(1));
576 assert(i->flagsSrc < 0);
577
578 SAT_(39);
579 } else {
580 emitForm_21(i, 0x208, 0xc08);
581
582 assert(addOp != 3); // would be add-plus-one
583
584 code[1] |= addOp << 19;
585
586 if (i->defExists(1))
587 code[1] |= 1 << 18; // write carry
588 if (i->flagsSrc >= 0)
589 code[1] |= 1 << 14; // add carry
590
591 SAT_(35);
592 }
593 }
594
595 // TODO: shl-add
596 void
597 CodeEmitterGK110::emitIMAD(const Instruction *i)
598 {
599 uint8_t addOp =
600 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
601
602 emitForm_21(i, 0x100, 0xa00);
603
604 assert(addOp != 3);
605 code[1] |= addOp << 26;
606
607 if (i->sType == TYPE_S32)
608 code[1] |= (1 << 19) | (1 << 24);
609
610 if (code[0] & 0x1) {
611 assert(!i->subOp);
612 SAT_(39);
613 } else {
614 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
615 code[1] |= 1 << 25;
616 SAT_(35);
617 }
618 }
619
620 void
621 CodeEmitterGK110::emitISAD(const Instruction *i)
622 {
623 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
624
625 emitForm_21(i, 0x1fc, 0xb74);
626
627 if (i->dType == TYPE_S32)
628 code[1] |= 1 << 19;
629 }
630
631 void
632 CodeEmitterGK110::emitNOT(const Instruction *i)
633 {
634 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
635 code[1] = 0x22003800;
636
637 emitPredicate(i);
638
639 defId(i->def(0), 2);
640
641 switch (i->src(0).getFile()) {
642 case FILE_GPR:
643 code[1] |= 0xc << 28;
644 srcId(i->src(0), 23);
645 break;
646 case FILE_MEMORY_CONST:
647 code[1] |= 0x4 << 28;
648 setCAddress14(i->src(1));
649 break;
650 default:
651 assert(0);
652 break;
653 }
654 }
655
656 void
657 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
658 {
659 assert(!(i->src(0).mod & Modifier(NV50_IR_MOD_NOT))); // XXX: find me
660
661 if (isLIMM(i->src(1), TYPE_S32)) {
662 emitForm_L(i, 0x200, 0, i->src(1).mod);
663 code[1] |= subOp << 24;
664 } else {
665 emitForm_21(i, 0x220, 0xc20);
666 code[1] |= subOp << 12;
667 NOT_(2b, 1);
668 }
669 assert(!(code[0] & 0x1) || !(i->src(1).mod & Modifier(NV50_IR_MOD_NOT)));
670 }
671
672 void
673 CodeEmitterGK110::emitPOPC(const Instruction *i)
674 {
675 assert(!isLIMM(i->src(1), TYPE_S32, true));
676
677 emitForm_21(i, 0x204, 0xc04);
678
679 NOT_(2a, 0);
680 if (!(code[0] & 0x1))
681 NOT_(2b, 1);
682 }
683
684 void
685 CodeEmitterGK110::emitINSBF(const Instruction *i)
686 {
687 emitForm_21(i, 0x1f8, 0xb78);
688 }
689
690 void
691 CodeEmitterGK110::emitShift(const Instruction *i)
692 {
693 const bool sar = i->op == OP_SHR && isSignedType(i->sType);
694
695 if (sar) {
696 emitForm_21(i, 0x214, 0x014);
697 code[1] |= 1 << 19;
698 } else
699 if (i->op == OP_SHR) {
700 // this is actually RSHF
701 emitForm_21(i, 0x27c, 0x87c);
702 code[1] |= GK110_GPR_ZERO << 10;
703 } else {
704 // this is actually LSHF
705 emitForm_21(i, 0x1fc, 0xb7c);
706 code[1] |= GK110_GPR_ZERO << 10;
707 }
708
709 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP) {
710 if (!sar)
711 code[1] |= 1 << 21;
712 // XXX: find wrap modifier for SHR S32
713 }
714 }
715
716 void
717 CodeEmitterGK110::emitPreOp(const Instruction *i)
718 {
719 emitForm_21(i, 0x248, -1);
720
721 if (i->op == OP_PREEX2)
722 code[1] |= 1 << 10;
723
724 NEG_(30, 0);
725 ABS_(34, 0);
726 }
727
728 void
729 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
730 {
731 code[0] = 0x00000002 | (subOp << 23);
732 code[1] = 0x84000000;
733
734 emitPredicate(i);
735
736 defId(i->def(0), 2);
737 srcId(i->src(0), 10);
738
739 NEG_(33, 0);
740 ABS_(31, 0);
741 SAT_(35);
742 }
743
744 void
745 CodeEmitterGK110::emitMINMAX(const Instruction *i)
746 {
747 uint32_t op2, op1;
748
749 switch (i->dType) {
750 case TYPE_U32:
751 case TYPE_S32:
752 op2 = 0x210;
753 op1 = 0xc10;
754 break;
755 case TYPE_F32:
756 op2 = 0x230;
757 op1 = 0xc30;
758 break;
759 case TYPE_F64:
760 op2 = 0x228;
761 op1 = 0xc28;
762 break;
763 default:
764 assert(0);
765 op2 = 0;
766 op1 = 0;
767 break;
768 }
769 emitForm_21(i, op2, op1);
770
771 if (i->dType == TYPE_S32)
772 code[1] |= 1 << 19;
773 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
774
775 FTZ_(2f);
776 ABS_(31, 0);
777 NEG_(33, 0);
778 if (code[0] & 0x1) {
779 modNegAbsF32_3b(i, 1);
780 } else {
781 ABS_(34, 1);
782 NEG_(30, 1);
783 }
784 }
785
786 void
787 CodeEmitterGK110::emitCVT(const Instruction *i)
788 {
789 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
790 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
791 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
792
793 bool sat = i->saturate;
794 bool abs = i->src(0).mod.abs();
795 bool neg = i->src(0).mod.neg();
796
797 RoundMode rnd = i->rnd;
798
799 switch (i->op) {
800 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
801 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
802 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
803 case OP_SAT: sat = true; break;
804 case OP_NEG: neg = !neg; break;
805 case OP_ABS: abs = true; neg = false; break;
806 default:
807 break;
808 }
809
810 DataType dType;
811
812 if (i->op == OP_NEG && i->dType == TYPE_U32)
813 dType = TYPE_S32;
814 else
815 dType = i->dType;
816
817
818 uint32_t op;
819
820 if (f2f) op = 0x254;
821 else if (f2i) op = 0x258;
822 else if (i2f) op = 0x25c;
823 else op = 0x260;
824
825 emitForm_C(i, op, 0x2);
826
827 FTZ_(2f);
828 if (neg) code[1] |= 1 << 16;
829 if (abs) code[1] |= 1 << 20;
830 if (sat) code[1] |= 1 << 21;
831
832 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
833
834 code[0] |= typeSizeofLog2(dType) << 10;
835 code[0] |= typeSizeofLog2(i->sType) << 12;
836
837 if (isSignedIntType(dType))
838 code[0] |= 0x4000;
839 if (isSignedIntType(i->sType))
840 code[0] |= 0x8000;
841 }
842
843 void
844 CodeEmitterGK110::emitSET(const CmpInstruction *i)
845 {
846 uint16_t op1, op2;
847
848 if (i->def(0).getFile() == FILE_PREDICATE) {
849 switch (i->sType) {
850 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
851 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
852 default:
853 op2 = 0x1b0;
854 op1 = 0xb30;
855 break;
856 }
857 emitForm_21(i, op2, op1);
858
859 NEG_(2e, 0);
860 ABS_(9, 0);
861 if (!(code[0] & 0x1)) {
862 NEG_(8, 1);
863 ABS_(2f, 1);
864 } else {
865 modNegAbsF32_3b(i, 1);
866 }
867 FTZ_(32);
868
869 // normal DST field is negated predicate result
870 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
871 if (i->defExists(1))
872 defId(i->def(1), 2);
873 else
874 code[0] |= 0x1c;
875 } else {
876 switch (i->sType) {
877 case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
878 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
879 default:
880 op2 = 0x1a8;
881 op1 = 0xb28;
882 break;
883 }
884 emitForm_21(i, op2, op1);
885
886 NEG_(2e, 0);
887 ABS_(39, 0);
888 if (!(code[0] & 0x1)) {
889 NEG_(38, 1);
890 ABS_(2f, 1);
891 } else {
892 modNegAbsF32_3b(i, 1);
893 }
894 FTZ_(3a);
895 }
896 if (i->sType == TYPE_S32)
897 code[1] |= 1 << 19;
898
899 if (i->op != OP_SET) {
900 switch (i->op) {
901 case OP_SET_AND: code[1] |= 0x0 << 16; break;
902 case OP_SET_OR: code[1] |= 0x1 << 16; break;
903 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
904 default:
905 assert(0);
906 break;
907 }
908 srcId(i->src(2), 0x2a);
909 } else {
910 code[1] |= 0x7 << 10;
911 }
912 emitCondCode(i->setCond,
913 isFloatType(i->sType) ? 0x33 : 0x34,
914 isFloatType(i->sType) ? 0xf : 0x7);
915 }
916
917 void
918 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
919 {
920 CondCode cc = i->setCond;
921 if (i->src(2).mod.neg())
922 cc = reverseCondCode(cc);
923
924 if (i->dType == TYPE_F32) {
925 emitForm_21(i, 0x1d0, 0xb50);
926 FTZ_(32);
927 emitCondCode(cc, 0x33, 0xf);
928 } else {
929 emitForm_21(i, 0x1a4, 0xb20);
930 emitCondCode(cc, 0x34, 0x7);
931 }
932 }
933
934 void CodeEmitterGK110::emitSELP(const Instruction *i)
935 {
936 emitForm_21(i, 0x250, 0x050);
937
938 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
939 code[1] |= 1 << 13;
940 }
941
942 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
943 {
944 code[0] = 0x00000002 | (i->subOp << 23);
945 code[1] = 0x77000000;
946
947 emitPredicate(i);
948 }
949
950 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
951 {
952 code[0] = 0x00000002;
953 code[1] = 0x76c00000;
954
955 code[1] |= i->tex.r << 9;
956 // code[1] |= i->tex.s << (9 + 8);
957
958 if (i->tex.liveOnly)
959 code[0] |= 0x80000000;
960
961 defId(i->def(0), 2);
962 srcId(i->src(0), 10);
963 }
964
965 static inline bool
966 isNextIndependentTex(const TexInstruction *i)
967 {
968 if (!i->next || !isTextureOp(i->next->op))
969 return false;
970 if (i->getDef(0)->interfers(i->next->getSrc(0)))
971 return false;
972 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
973 }
974
975 void
976 CodeEmitterGK110::emitTEX(const TexInstruction *i)
977 {
978 const bool ind = i->tex.rIndirectSrc >= 0;
979
980 if (ind) {
981 code[0] = 0x00000002;
982 switch (i->op) {
983 case OP_TXD:
984 code[1] = 0x7e000000;
985 break;
986 case OP_TXF:
987 code[1] = 0x78000000;
988 break;
989 default:
990 code[1] = 0x7d800000;
991 break;
992 }
993 } else {
994 switch (i->op) {
995 case OP_TXD:
996 code[0] = 0x00000002;
997 code[1] = 0x76000000;
998 code[1] |= i->tex.r << 9;
999 break;
1000 case OP_TXF:
1001 code[0] = 0x00000002;
1002 code[1] = 0x70000000;
1003 code[1] |= i->tex.r << 13;
1004 break;
1005 default:
1006 code[0] = 0x00000001;
1007 code[1] = 0x60000000;
1008 code[1] |= i->tex.r << 15;
1009 break;
1010 }
1011 }
1012
1013 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1014
1015 if (i->tex.liveOnly)
1016 code[0] |= 0x80000000;
1017
1018 switch (i->op) {
1019 case OP_TEX: break;
1020 case OP_TXB: code[1] |= 0x2000; break;
1021 case OP_TXL: code[1] |= 0x3000; break;
1022 case OP_TXF: break;
1023 case OP_TXG: break; // XXX
1024 case OP_TXD: break;
1025 default:
1026 assert(!"invalid texture op");
1027 break;
1028 }
1029
1030 if (i->op == OP_TXF) {
1031 if (!i->tex.levelZero)
1032 code[1] |= 0x1000;
1033 } else
1034 if (i->tex.levelZero) {
1035 code[1] |= 0x1000;
1036 }
1037
1038 if (i->op != OP_TXD && i->tex.derivAll)
1039 code[1] |= 0x200;
1040
1041 emitPredicate(i);
1042
1043 code[1] |= i->tex.mask << 2;
1044
1045 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1046
1047 defId(i->def(0), 2);
1048 srcId(i->src(0), 10);
1049 srcId(i, src1, 23);
1050
1051 // if (i->op == OP_TXG) code[0] |= i->tex.gatherComp << 5;
1052
1053 // texture target:
1054 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1055 if (i->tex.target.isArray())
1056 code[1] |= 0x40;
1057 if (i->tex.target.isShadow())
1058 code[1] |= 0x400;
1059 if (i->tex.target == TEX_TARGET_2D_MS ||
1060 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1061 code[1] |= 0x800;
1062
1063 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1064 // ?
1065 }
1066
1067 if (i->tex.useOffsets) {
1068 switch (i->op) {
1069 case OP_TXF: code[1] |= 0x200; break;
1070 default: code[1] |= 0x800; break;
1071 }
1072 }
1073 }
1074
1075 void
1076 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1077 {
1078 code[0] = 0x00000002;
1079 code[1] = 0x75400001;
1080
1081 switch (i->tex.query) {
1082 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1083 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1084 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1085 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1086 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1087 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1088 default:
1089 assert(!"invalid texture query");
1090 break;
1091 }
1092
1093 code[1] |= i->tex.mask << 2;
1094 code[1] |= i->tex.r << 9;
1095 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1096 code[1] |= 0x08000000;
1097
1098 defId(i->def(0), 2);
1099 srcId(i->src(0), 10);
1100
1101 emitPredicate(i);
1102 }
1103
1104 void
1105 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1106 {
1107 emitNOP(i); // TODO
1108 }
1109
1110 void
1111 CodeEmitterGK110::emitFlow(const Instruction *i)
1112 {
1113 const FlowInstruction *f = i->asFlow();
1114
1115 unsigned mask; // bit 0: predicate, bit 1: target
1116
1117 code[0] = 0x00000000;
1118
1119 switch (i->op) {
1120 case OP_BRA:
1121 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1122 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1123 code[0] |= 0x80;
1124 mask = 3;
1125 break;
1126 case OP_CALL:
1127 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1128 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1129 code[0] |= 0x80;
1130 mask = 2;
1131 break;
1132
1133 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1134 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1135 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1136 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1137 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1138
1139 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1140 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1141 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1142 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1143
1144 case OP_QUADON: code[1] = 0x1b000000; mask = 0; break;
1145 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1146 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1147 default:
1148 assert(!"invalid flow operation");
1149 return;
1150 }
1151
1152 if (mask & 1) {
1153 emitPredicate(i);
1154 if (i->flagsSrc < 0)
1155 code[0] |= 0x3c;
1156 }
1157
1158 if (!f)
1159 return;
1160
1161 if (f->allWarp)
1162 code[0] |= 1 << 9;
1163 if (f->limit)
1164 code[0] |= 1 << 8;
1165
1166 if (f->op == OP_CALL) {
1167 if (f->builtin) {
1168 assert(f->absolute);
1169 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1170 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1171 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1172 } else {
1173 assert(!f->absolute);
1174 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1175 code[0] |= (pcRel & 0x1ff) << 23;
1176 code[1] |= (pcRel >> 9) & 0x7fff;
1177 }
1178 } else
1179 if (mask & 2) {
1180 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1181 // currently we don't want absolute branches
1182 assert(!f->absolute);
1183 code[0] |= (pcRel & 0x1ff) << 23;
1184 code[1] |= (pcRel >> 9) & 0x7fff;
1185 }
1186 }
1187
1188 void
1189 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1190 {
1191 uint32_t prim = i->src(0).get()->reg.data.u32;
1192
1193 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1194 code[1] = 0x7f800000;
1195
1196 emitPredicate(i);
1197
1198 defId(i->def(0), 2);
1199 srcId(i->src(1), 10);
1200 }
1201
1202 void
1203 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1204 {
1205 uint32_t offset = i->src(0).get()->reg.data.offset;
1206
1207 code[0] = 0x00000002 | (offset << 23);
1208 code[1] = 0x7ec00000 | (offset >> 9);
1209
1210 #if 0
1211 if (i->perPatch)
1212 code[0] |= 0x100;
1213 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1214 code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
1215 #endif
1216
1217 emitPredicate(i);
1218
1219 defId(i->def(0), 2);
1220 srcId(i->src(0).getIndirect(0), 10);
1221 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1222 }
1223
1224 void
1225 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1226 {
1227 uint32_t offset = i->src(0).get()->reg.data.offset;
1228
1229 code[0] = 0x00000002 | (offset << 23);
1230 code[1] = 0x7f000000 | (offset >> 9);
1231
1232 #if 0
1233 if (i->perPatch)
1234 code[0] |= 0x100;
1235 #endif
1236
1237 emitPredicate(i);
1238
1239 assert(i->src(1).getFile() == FILE_GPR);
1240
1241 srcId(i->src(0).getIndirect(0), 10);
1242 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1243 srcId(i->src(1), 2);
1244 }
1245
1246 void
1247 CodeEmitterGK110::emitOUT(const Instruction *i)
1248 {
1249 assert(i->src(0).getFile() == FILE_GPR);
1250
1251 emitForm_21(i, 0x1f0, 0xb70);
1252
1253 if (i->op == OP_EMIT)
1254 code[1] |= 1 << 10;
1255 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1256 code[1] |= 1 << 11;
1257 }
1258
1259 void
1260 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1261 {
1262 code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
1263 }
1264
1265 void
1266 CodeEmitterGK110::emitINTERP(const Instruction *i)
1267 {
1268 const uint32_t base = i->getSrc(0)->reg.data.offset;
1269
1270 code[0] = 0x00000002 | (base << 31);
1271 code[1] = 0x74800000 | (base >> 1);
1272
1273 if (i->saturate)
1274 code[1] |= 1 << 18;
1275
1276 if (i->op == OP_PINTERP)
1277 srcId(i->src(1), 23);
1278 else
1279 code[0] |= 0xff << 23;
1280
1281 srcId(i->src(0).getIndirect(0), 10);
1282 emitInterpMode(i);
1283
1284 emitPredicate(i);
1285 defId(i->def(0), 2);
1286
1287 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1288 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1289 else
1290 code[1] |= 0xff << 10;
1291 }
1292
1293 void
1294 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1295 {
1296 uint8_t n;
1297
1298 switch (ty) {
1299 case TYPE_U8:
1300 n = 0;
1301 break;
1302 case TYPE_S8:
1303 n = 1;
1304 break;
1305 case TYPE_U16:
1306 n = 2;
1307 break;
1308 case TYPE_S16:
1309 n = 3;
1310 break;
1311 case TYPE_F32:
1312 case TYPE_U32:
1313 case TYPE_S32:
1314 n = 4;
1315 break;
1316 case TYPE_F64:
1317 case TYPE_U64:
1318 case TYPE_S64:
1319 n = 5;
1320 break;
1321 case TYPE_B128:
1322 n = 6;
1323 break;
1324 default:
1325 n = 0;
1326 assert(!"invalid ld/st type");
1327 break;
1328 }
1329 code[pos / 32] |= n << (pos % 32);
1330 }
1331
1332 void
1333 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1334 {
1335 uint8_t n;
1336
1337 switch (c) {
1338 case CACHE_CA:
1339 // case CACHE_WB:
1340 n = 0;
1341 break;
1342 case CACHE_CG:
1343 n = 1;
1344 break;
1345 case CACHE_CS:
1346 n = 2;
1347 break;
1348 case CACHE_CV:
1349 // case CACHE_WT:
1350 n = 3;
1351 break;
1352 default:
1353 n = 0;
1354 assert(!"invalid caching mode");
1355 break;
1356 }
1357 code[pos / 32] |= n << (pos % 32);
1358 }
1359
1360 void
1361 CodeEmitterGK110::emitSTORE(const Instruction *i)
1362 {
1363 int32_t offset = SDATA(i->src(0)).offset;
1364
1365 switch (i->src(0).getFile()) {
1366 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1367 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1368 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1369 default:
1370 assert(!"invalid memory file");
1371 break;
1372 }
1373
1374 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1375 offset &= 0xffffff;
1376
1377 if (code[0] & 0x2) {
1378 emitLoadStoreType(i->dType, 0x33);
1379 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1380 emitCachingMode(i->cache, 0x2f);
1381 } else {
1382 emitLoadStoreType(i->dType, 0x38);
1383 emitCachingMode(i->cache, 0x3b);
1384 }
1385 code[0] |= offset << 23;
1386 code[1] |= offset >> 9;
1387
1388 emitPredicate(i);
1389
1390 srcId(i->src(1), 2);
1391 srcId(i->src(0).getIndirect(0), 10);
1392 }
1393
1394 void
1395 CodeEmitterGK110::emitLOAD(const Instruction *i)
1396 {
1397 int32_t offset = SDATA(i->src(0)).offset;
1398
1399 switch (i->src(0).getFile()) {
1400 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1401 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1402 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1403 case FILE_MEMORY_CONST:
1404 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1405 emitMOV(i);
1406 return;
1407 }
1408 offset &= 0xffff;
1409 code[0] = 0x00000002;
1410 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1411 break;
1412 default:
1413 assert(!"invalid memory file");
1414 break;
1415 }
1416
1417 if (code[0] & 0x2) {
1418 offset &= 0xffffff;
1419 emitLoadStoreType(i->dType, 0x33);
1420 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1421 emitCachingMode(i->cache, 0x2f);
1422 } else {
1423 emitLoadStoreType(i->dType, 0x38);
1424 emitCachingMode(i->cache, 0x3b);
1425 }
1426 code[0] |= offset << 23;
1427 code[1] |= offset >> 9;
1428
1429 emitPredicate(i);
1430
1431 defId(i->def(0), 2);
1432 srcId(i->src(0).getIndirect(0), 10);
1433 }
1434
1435 uint8_t
1436 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1437 {
1438 switch (SDATA(ref).sv.sv) {
1439 case SV_LANEID: return 0x00;
1440 case SV_PHYSID: return 0x03;
1441 case SV_VERTEX_COUNT: return 0x10;
1442 case SV_INVOCATION_ID: return 0x11;
1443 case SV_YDIR: return 0x12;
1444 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1445 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1446 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1447 case SV_GRIDID: return 0x2c;
1448 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1449 case SV_LBASE: return 0x34;
1450 case SV_SBASE: return 0x30;
1451 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1452 default:
1453 assert(!"no sreg for system value");
1454 return 0;
1455 }
1456 }
1457
1458 void
1459 CodeEmitterGK110::emitMOV(const Instruction *i)
1460 {
1461 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1462 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1463 code[1] = 0x86400000;
1464 emitPredicate(i);
1465 defId(i->def(0), 2);
1466 } else
1467 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1468 code[0] = 0x00000002 | (i->lanes << 14);
1469 code[1] = 0x74000000;
1470 emitPredicate(i);
1471 defId(i->def(0), 2);
1472 setImmediate32(i, 0, Modifier(0));
1473 } else
1474 if (i->src(0).getFile() == FILE_PREDICATE) {
1475 code[0] = 0x00000002;
1476 code[1] = 0x84401c07;
1477 emitPredicate(i);
1478 defId(i->def(0), 2);
1479 srcId(i->src(0), 14);
1480 } else {
1481 emitForm_C(i, 0x24c, 2);
1482 code[1] |= i->lanes << 10;
1483 }
1484 }
1485
1486 bool
1487 CodeEmitterGK110::emitInstruction(Instruction *insn)
1488 {
1489 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1490
1491 if (insn->encSize != 8) {
1492 ERROR("skipping unencodable instruction: ");
1493 insn->print();
1494 return false;
1495 } else
1496 if (codeSize + size > codeSizeLimit) {
1497 ERROR("code emitter output buffer too small\n");
1498 return false;
1499 }
1500
1501 if (writeIssueDelays) {
1502 int id = (codeSize & 0x3f) / 8 - 1;
1503 if (id < 0) {
1504 id += 1;
1505 code[0] = 0x00000000; // cf issue delay "instruction"
1506 code[1] = 0x08000000;
1507 code += 2;
1508 codeSize += 8;
1509 }
1510 uint32_t *data = code - (id * 2 + 2);
1511
1512 switch (id) {
1513 case 0: data[0] |= insn->sched << 2; break;
1514 case 1: data[0] |= insn->sched << 10; break;
1515 case 2: data[0] |= insn->sched << 18; break;
1516 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1517 case 4: data[1] |= insn->sched << 2; break;
1518 case 5: data[1] |= insn->sched << 10; break;
1519 case 6: data[1] |= insn->sched << 18; break;
1520 default:
1521 assert(0);
1522 break;
1523 }
1524 }
1525
1526 // assert that instructions with multiple defs don't corrupt registers
1527 for (int d = 0; insn->defExists(d); ++d)
1528 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1529
1530 switch (insn->op) {
1531 case OP_MOV:
1532 case OP_RDSV:
1533 emitMOV(insn);
1534 break;
1535 case OP_NOP:
1536 break;
1537 case OP_LOAD:
1538 emitLOAD(insn);
1539 break;
1540 case OP_STORE:
1541 emitSTORE(insn);
1542 break;
1543 case OP_LINTERP:
1544 case OP_PINTERP:
1545 emitINTERP(insn);
1546 break;
1547 case OP_VFETCH:
1548 emitVFETCH(insn);
1549 break;
1550 case OP_EXPORT:
1551 emitEXPORT(insn);
1552 break;
1553 case OP_PFETCH:
1554 emitPFETCH(insn);
1555 break;
1556 case OP_EMIT:
1557 case OP_RESTART:
1558 emitOUT(insn);
1559 break;
1560 case OP_ADD:
1561 case OP_SUB:
1562 if (isFloatType(insn->dType))
1563 emitFADD(insn);
1564 else
1565 emitUADD(insn);
1566 break;
1567 case OP_MUL:
1568 if (isFloatType(insn->dType))
1569 emitFMUL(insn);
1570 else
1571 emitIMUL(insn);
1572 break;
1573 case OP_MAD:
1574 case OP_FMA:
1575 if (isFloatType(insn->dType))
1576 emitFMAD(insn);
1577 else
1578 emitIMAD(insn);
1579 break;
1580 case OP_SAD:
1581 emitISAD(insn);
1582 break;
1583 case OP_NOT:
1584 emitNOT(insn);
1585 break;
1586 case OP_AND:
1587 emitLogicOp(insn, 0);
1588 break;
1589 case OP_OR:
1590 emitLogicOp(insn, 1);
1591 break;
1592 case OP_XOR:
1593 emitLogicOp(insn, 2);
1594 break;
1595 case OP_SHL:
1596 case OP_SHR:
1597 emitShift(insn);
1598 break;
1599 case OP_SET:
1600 case OP_SET_AND:
1601 case OP_SET_OR:
1602 case OP_SET_XOR:
1603 emitSET(insn->asCmp());
1604 break;
1605 case OP_SELP:
1606 emitSELP(insn);
1607 break;
1608 case OP_SLCT:
1609 emitSLCT(insn->asCmp());
1610 break;
1611 case OP_MIN:
1612 case OP_MAX:
1613 emitMINMAX(insn);
1614 break;
1615 case OP_ABS:
1616 case OP_NEG:
1617 case OP_CEIL:
1618 case OP_FLOOR:
1619 case OP_TRUNC:
1620 case OP_CVT:
1621 case OP_SAT:
1622 emitCVT(insn);
1623 break;
1624 case OP_RSQ:
1625 emitSFnOp(insn, 5);
1626 break;
1627 case OP_RCP:
1628 emitSFnOp(insn, 4);
1629 break;
1630 case OP_LG2:
1631 emitSFnOp(insn, 3);
1632 break;
1633 case OP_EX2:
1634 emitSFnOp(insn, 2);
1635 break;
1636 case OP_SIN:
1637 emitSFnOp(insn, 1);
1638 break;
1639 case OP_COS:
1640 emitSFnOp(insn, 0);
1641 break;
1642 case OP_PRESIN:
1643 case OP_PREEX2:
1644 emitPreOp(insn);
1645 break;
1646 case OP_TEX:
1647 case OP_TXB:
1648 case OP_TXL:
1649 case OP_TXD:
1650 case OP_TXF:
1651 emitTEX(insn->asTex());
1652 break;
1653 case OP_TXQ:
1654 emitTXQ(insn->asTex());
1655 break;
1656 case OP_TEXBAR:
1657 emitTEXBAR(insn);
1658 break;
1659 case OP_BRA:
1660 case OP_CALL:
1661 case OP_PRERET:
1662 case OP_RET:
1663 case OP_DISCARD:
1664 case OP_EXIT:
1665 case OP_PRECONT:
1666 case OP_CONT:
1667 case OP_PREBREAK:
1668 case OP_BREAK:
1669 case OP_JOINAT:
1670 case OP_BRKPT:
1671 case OP_QUADON:
1672 case OP_QUADPOP:
1673 emitFlow(insn);
1674 break;
1675 case OP_QUADOP:
1676 emitQUADOP(insn, insn->subOp, insn->lanes);
1677 break;
1678 case OP_DFDX:
1679 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1680 break;
1681 case OP_DFDY:
1682 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1683 break;
1684 case OP_POPCNT:
1685 emitPOPC(insn);
1686 break;
1687 case OP_JOIN:
1688 emitNOP(insn);
1689 insn->join = 1;
1690 break;
1691 case OP_PHI:
1692 case OP_UNION:
1693 case OP_CONSTRAINT:
1694 ERROR("operation should have been eliminated");
1695 return false;
1696 case OP_EXP:
1697 case OP_LOG:
1698 case OP_SQRT:
1699 case OP_POW:
1700 ERROR("operation should have been lowered\n");
1701 return false;
1702 default:
1703 ERROR("unknow op\n");
1704 return false;
1705 }
1706
1707 if (insn->join)
1708 code[0] |= 1 << 22;
1709
1710 code += 2;
1711 codeSize += 8;
1712 return true;
1713 }
1714
1715 uint32_t
1716 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1717 {
1718 // No more short instruction encodings.
1719 return 8;
1720 }
1721
1722 void
1723 CodeEmitterGK110::prepareEmission(Function *func)
1724 {
1725 const Target *targ = func->getProgram()->getTarget();
1726
1727 CodeEmitter::prepareEmission(func);
1728
1729 if (targ->hasSWSched)
1730 calculateSchedDataNVC0(targ, func);
1731 }
1732
1733 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1734 : CodeEmitter(target),
1735 targNVC0(target),
1736 writeIssueDelays(target->hasSWSched)
1737 {
1738 code = NULL;
1739 codeSize = codeSizeLimit = 0;
1740 relocInfo = NULL;
1741 }
1742
1743 CodeEmitter *
1744 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1745 {
1746 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1747 emit->setProgramType(type);
1748 return emit;
1749 }
1750
1751 } // namespace nv50_ir