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[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitPFETCH(const Instruction *);
81 void emitVFETCH(const Instruction *);
82 void emitEXPORT(const Instruction *);
83 void emitOUT(const Instruction *);
84
85 void emitUADD(const Instruction *);
86 void emitFADD(const Instruction *);
87 void emitIMUL(const Instruction *);
88 void emitFMUL(const Instruction *);
89 void emitIMAD(const Instruction *);
90 void emitISAD(const Instruction *);
91 void emitFMAD(const Instruction *);
92
93 void emitNOT(const Instruction *);
94 void emitLogicOp(const Instruction *, uint8_t subOp);
95 void emitPOPC(const Instruction *);
96 void emitINSBF(const Instruction *);
97 void emitShift(const Instruction *);
98
99 void emitSFnOp(const Instruction *, uint8_t subOp);
100
101 void emitCVT(const Instruction *);
102 void emitMINMAX(const Instruction *);
103 void emitPreOp(const Instruction *);
104
105 void emitSET(const CmpInstruction *);
106 void emitSLCT(const CmpInstruction *);
107 void emitSELP(const Instruction *);
108
109 void emitTEXBAR(const Instruction *);
110 void emitTEX(const TexInstruction *);
111 void emitTEXCSAA(const TexInstruction *);
112 void emitTXQ(const TexInstruction *);
113
114 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
115
116 void emitFlow(const Instruction *);
117
118 inline void defId(const ValueDef&, const int pos);
119 inline void srcId(const ValueRef&, const int pos);
120 inline void srcId(const ValueRef *, const int pos);
121 inline void srcId(const Instruction *, int s, const int pos);
122
123 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
124
125 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
126 };
127
128 #define GK110_GPR_ZERO 255
129
130 #define NEG_(b, s) \
131 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
132 #define ABS_(b, s) \
133 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
134
135 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
136 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
137
138 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
139
140 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
141
142 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
143
144 #define SDATA(a) ((a).rep()->reg.data)
145 #define DDATA(a) ((a).rep()->reg.data)
146
147 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
148 {
149 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
150 }
151
152 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
153 {
154 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
155 }
156
157 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
158 {
159 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
160 code[pos / 32] |= r << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
164 {
165 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
169 {
170 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
171 }
172
173 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
174 {
175 const ImmediateValue *imm = ref.get()->asImm();
176
177 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
178 }
179
180 void
181 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
182 {
183 bool rint = false;
184 uint8_t n;
185
186 switch (rnd) {
187 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
188 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
189 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
190 default:
191 rint = rnd == ROUND_NI;
192 n = 0;
193 assert(rnd == ROUND_N || rnd == ROUND_NI);
194 break;
195 }
196 code[pos / 32] |= n << (pos % 32);
197 if (rint && rintPos >= 0)
198 code[rintPos / 32] |= 1 << (rintPos % 32);
199 }
200
201 void
202 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
203 {
204 uint8_t n;
205
206 switch (rnd) {
207 case ROUND_M: n = 1; break;
208 case ROUND_P: n = 2; break;
209 case ROUND_Z: n = 3; break;
210 default:
211 n = 0;
212 assert(rnd == ROUND_N);
213 break;
214 }
215 code[pos / 32] |= n << (pos % 32);
216 }
217
218 void
219 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
220 {
221 uint8_t n;
222
223 switch (rnd) {
224 case ROUND_MI: n = 1; break;
225 case ROUND_PI: n = 2; break;
226 case ROUND_ZI: n = 3; break;
227 default:
228 n = 0;
229 assert(rnd == ROUND_NI);
230 break;
231 }
232 code[pos / 32] |= n << (pos % 32);
233 }
234
235 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
236 {
237 uint8_t n;
238
239 switch (cc) {
240 case CC_FL: n = 0x00; break;
241 case CC_LT: n = 0x01; break;
242 case CC_EQ: n = 0x02; break;
243 case CC_LE: n = 0x03; break;
244 case CC_GT: n = 0x04; break;
245 case CC_NE: n = 0x05; break;
246 case CC_GE: n = 0x06; break;
247 case CC_LTU: n = 0x09; break;
248 case CC_EQU: n = 0x0a; break;
249 case CC_LEU: n = 0x0b; break;
250 case CC_GTU: n = 0x0c; break;
251 case CC_NEU: n = 0x0d; break;
252 case CC_GEU: n = 0x0e; break;
253 case CC_TR: n = 0x0f; break;
254 case CC_NO: n = 0x10; break;
255 case CC_NC: n = 0x11; break;
256 case CC_NS: n = 0x12; break;
257 case CC_NA: n = 0x13; break;
258 case CC_A: n = 0x14; break;
259 case CC_S: n = 0x15; break;
260 case CC_C: n = 0x16; break;
261 case CC_O: n = 0x17; break;
262 default:
263 n = 0;
264 assert(!"invalid condition code");
265 break;
266 }
267 code[pos / 32] |= (n & mask) << (pos % 32);
268 }
269
270 void
271 CodeEmitterGK110::emitPredicate(const Instruction *i)
272 {
273 if (i->predSrc >= 0) {
274 srcId(i->src(i->predSrc), 18);
275 if (i->cc == CC_NOT_P)
276 code[0] |= 8 << 18; // negate
277 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
278 } else {
279 code[0] |= 7 << 18;
280 }
281 }
282
283 void
284 CodeEmitterGK110::setCAddress14(const ValueRef& src)
285 {
286 const int32_t addr = src.get()->asSym()->reg.data.offset / 4;
287
288 code[0] |= (addr & 0x01ff) << 23;
289 code[1] |= (addr & 0x3e00) >> 9;
290 }
291
292 void
293 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
294 {
295 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
296 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
297
298 if (i->sType == TYPE_F32) {
299 assert(!(u32 & 0x00000fff));
300 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
301 code[1] |= ((u32 & 0x7fe00000) >> 21);
302 code[1] |= ((u32 & 0x80000000) >> 4);
303 } else
304 if (i->sType == TYPE_F64) {
305 assert(!(u64 & 0x00000fffffffffffULL));
306 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
307 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
308 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
309 } else {
310 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
311 code[0] |= (u32 & 0x001ff) << 23;
312 code[1] |= (u32 & 0x7fe00) >> 9;
313 code[1] |= (u32 & 0x80000) << 8;
314 }
315 }
316
317 void
318 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
319 Modifier mod)
320 {
321 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
322
323 if (mod) {
324 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
325 mod.applyTo(imm);
326 u32 = imm.reg.data.u32;
327 }
328
329 code[0] |= u32 << 23;
330 code[1] |= u32 >> 9;
331 }
332
333 void
334 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
335 Modifier mod)
336 {
337 code[0] = ctg;
338 code[1] = opc << 20;
339
340 emitPredicate(i);
341
342 defId(i->def(0), 2);
343
344 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
345 switch (i->src(s).getFile()) {
346 case FILE_GPR:
347 srcId(i->src(s), s ? 42 : 10);
348 break;
349 case FILE_IMMEDIATE:
350 setImmediate32(i, s, mod);
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358
359 void
360 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
361 {
362 code[0] = ctg;
363 code[1] = opc << 20;
364
365 emitPredicate(i);
366
367 defId(i->def(0), 2);
368
369 switch (i->src(0).getFile()) {
370 case FILE_MEMORY_CONST:
371 code[1] |= 0x4 << 28;
372 setCAddress14(i->src(0));
373 break;
374 case FILE_GPR:
375 code[1] |= 0xc << 28;
376 srcId(i->src(0), 23);
377 break;
378 default:
379 assert(0);
380 break;
381 }
382 }
383
384 // 0x2 for GPR, c[] and 0x1 for short immediate
385 void
386 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
387 uint32_t opc1)
388 {
389 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
390
391 int s1 = 23;
392 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
393 s1 = 42;
394
395 if (imm) {
396 code[0] = 0x1;
397 code[1] = opc1 << 20;
398 } else {
399 code[0] = 0x2;
400 code[1] = (0xc << 28) | (opc2 << 20);
401 }
402
403 emitPredicate(i);
404
405 defId(i->def(0), 2);
406
407 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
408 switch (i->src(s).getFile()) {
409 case FILE_MEMORY_CONST:
410 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
411 setCAddress14(i->src(s));
412 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
413 break;
414 case FILE_IMMEDIATE:
415 setShortImmediate(i, s);
416 break;
417 case FILE_GPR:
418 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
419 break;
420 default:
421 // ignore here, can be predicate or flags, but must not be address
422 break;
423 }
424 }
425 // 0x0 = invalid
426 // 0xc = rrr
427 // 0x8 = rrc
428 // 0x4 = rcr
429 assert(imm || (code[1] & (0xc << 28)));
430 }
431
432 inline void
433 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
434 {
435 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
436 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
437 }
438
439 void
440 CodeEmitterGK110::emitNOP(const Instruction *i)
441 {
442 code[0] = 0x00003c02;
443 code[1] = 0x85800000;
444
445 if (i)
446 emitPredicate(i);
447 else
448 code[0] = 0x001c3c02;
449 }
450
451 void
452 CodeEmitterGK110::emitFMAD(const Instruction *i)
453 {
454 assert(!isLIMM(i->src(1), TYPE_F32));
455
456 emitForm_21(i, 0x0c0, 0x940);
457
458 NEG_(34, 2);
459 SAT_(35);
460 RND_(36, F);
461 FTZ_(38);
462
463 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
464
465 if (code[0] & 0x1) {
466 if (neg1)
467 code[1] ^= 1 << 27;
468 } else
469 if (neg1) {
470 code[1] |= 1 << 19;
471 }
472 }
473
474 void
475 CodeEmitterGK110::emitFMUL(const Instruction *i)
476 {
477 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
478
479 assert(i->postFactor >= -3 && i->postFactor <= 3);
480
481 if (isLIMM(i->src(1), TYPE_F32)) {
482 emitForm_L(i, 0x200, 0x2, Modifier(0));
483
484 FTZ_(38);
485 SAT_(3a);
486 if (neg)
487 code[1] ^= 1 << 22;
488
489 assert(i->postFactor == 0);
490 } else {
491 emitForm_21(i, 0x234, 0xc34);
492
493 RND_(2a, F);
494 FTZ_(2f);
495 SAT_(35);
496
497 if (code[0] & 0x1) {
498 if (neg)
499 code[1] ^= 1 << 27;
500 } else
501 if (neg) {
502 code[1] |= 1 << 19;
503 }
504 }
505 }
506
507 void
508 CodeEmitterGK110::emitIMUL(const Instruction *i)
509 {
510 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
511 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
512
513 if (isLIMM(i->src(1), TYPE_S32)) {
514 emitForm_L(i, 0x280, 2, Modifier(0));
515
516 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
517
518 if (i->sType == TYPE_S32)
519 code[1] |= 3 << 25;
520 } else {
521 emitForm_21(i, 0x21c, 0xc1c);
522
523 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
524 code[1] |= 1 << 10;
525 if (i->sType == TYPE_S32)
526 code[1] |= 3 << 11;
527 }
528 }
529
530 void
531 CodeEmitterGK110::emitFADD(const Instruction *i)
532 {
533 if (isLIMM(i->src(1), TYPE_F32)) {
534 assert(i->rnd == ROUND_N);
535 assert(!i->saturate);
536
537 Modifier mod = i->src(1).mod ^
538 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
539
540 emitForm_L(i, 0x400, 0, mod);
541
542 FTZ_(3a);
543 NEG_(3b, 0);
544 ABS_(39, 0);
545 } else {
546 emitForm_21(i, 0x22c, 0xc2c);
547
548 FTZ_(2f);
549 RND_(2a, F);
550 ABS_(31, 0);
551 NEG_(33, 0);
552
553 if (code[0] & 0x1) {
554 modNegAbsF32_3b(i, 1);
555 if (i->op == OP_SUB) code[1] ^= 1 << 27;
556 } else {
557 ABS_(34, 1);
558 NEG_(30, 1);
559 if (i->op == OP_SUB) code[1] ^= 1 << 16;
560 }
561 }
562 }
563
564 void
565 CodeEmitterGK110::emitUADD(const Instruction *i)
566 {
567 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
568
569 if (i->op == OP_SUB)
570 addOp ^= 1;
571
572 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
573
574 if (isLIMM(i->src(1), TYPE_S32)) {
575 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
576
577 if (addOp & 2)
578 code[1] |= 1 << 27;
579
580 assert(!i->defExists(1));
581 assert(i->flagsSrc < 0);
582
583 SAT_(39);
584 } else {
585 emitForm_21(i, 0x208, 0xc08);
586
587 assert(addOp != 3); // would be add-plus-one
588
589 code[1] |= addOp << 19;
590
591 if (i->defExists(1))
592 code[1] |= 1 << 18; // write carry
593 if (i->flagsSrc >= 0)
594 code[1] |= 1 << 14; // add carry
595
596 SAT_(35);
597 }
598 }
599
600 // TODO: shl-add
601 void
602 CodeEmitterGK110::emitIMAD(const Instruction *i)
603 {
604 uint8_t addOp =
605 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
606
607 emitForm_21(i, 0x100, 0xa00);
608
609 assert(addOp != 3);
610 code[1] |= addOp << 26;
611
612 if (i->sType == TYPE_S32)
613 code[1] |= (1 << 19) | (1 << 24);
614
615 if (code[0] & 0x1) {
616 assert(!i->subOp);
617 SAT_(39);
618 } else {
619 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
620 code[1] |= 1 << 25;
621 SAT_(35);
622 }
623 }
624
625 void
626 CodeEmitterGK110::emitISAD(const Instruction *i)
627 {
628 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
629
630 emitForm_21(i, 0x1fc, 0xb74);
631
632 if (i->dType == TYPE_S32)
633 code[1] |= 1 << 19;
634 }
635
636 void
637 CodeEmitterGK110::emitNOT(const Instruction *i)
638 {
639 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
640 code[1] = 0x22003800;
641
642 emitPredicate(i);
643
644 defId(i->def(0), 2);
645
646 switch (i->src(0).getFile()) {
647 case FILE_GPR:
648 code[1] |= 0xc << 28;
649 srcId(i->src(0), 23);
650 break;
651 case FILE_MEMORY_CONST:
652 code[1] |= 0x4 << 28;
653 setCAddress14(i->src(1));
654 break;
655 default:
656 assert(0);
657 break;
658 }
659 }
660
661 void
662 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
663 {
664 assert(!(i->src(0).mod & Modifier(NV50_IR_MOD_NOT))); // XXX: find me
665
666 if (isLIMM(i->src(1), TYPE_S32)) {
667 emitForm_L(i, 0x200, 0, i->src(1).mod);
668 code[1] |= subOp << 24;
669 } else {
670 emitForm_21(i, 0x220, 0xc20);
671 code[1] |= subOp << 12;
672 NOT_(2b, 1);
673 }
674 assert(!(code[0] & 0x1) || !(i->src(1).mod & Modifier(NV50_IR_MOD_NOT)));
675 }
676
677 void
678 CodeEmitterGK110::emitPOPC(const Instruction *i)
679 {
680 assert(!isLIMM(i->src(1), TYPE_S32, true));
681
682 emitForm_21(i, 0x204, 0xc04);
683
684 NOT_(2a, 0);
685 if (!(code[0] & 0x1))
686 NOT_(2b, 1);
687 }
688
689 void
690 CodeEmitterGK110::emitINSBF(const Instruction *i)
691 {
692 emitForm_21(i, 0x1f8, 0xb78);
693 }
694
695 void
696 CodeEmitterGK110::emitShift(const Instruction *i)
697 {
698 const bool sar = i->op == OP_SHR && isSignedType(i->sType);
699
700 if (sar) {
701 emitForm_21(i, 0x214, 0x014);
702 code[1] |= 1 << 19;
703 } else
704 if (i->op == OP_SHR) {
705 // this is actually RSHF
706 emitForm_21(i, 0x27c, 0x87c);
707 code[1] |= GK110_GPR_ZERO << 10;
708 } else {
709 // this is actually LSHF
710 emitForm_21(i, 0x1fc, 0xb7c);
711 code[1] |= GK110_GPR_ZERO << 10;
712 }
713
714 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP) {
715 if (!sar)
716 code[1] |= 1 << 21;
717 // XXX: find wrap modifier for SHR S32
718 }
719 }
720
721 void
722 CodeEmitterGK110::emitPreOp(const Instruction *i)
723 {
724 emitForm_C(i, 0x248, 0x2);
725
726 if (i->op == OP_PREEX2)
727 code[1] |= 1 << 10;
728
729 NEG_(30, 0);
730 ABS_(34, 0);
731 }
732
733 void
734 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
735 {
736 code[0] = 0x00000002 | (subOp << 23);
737 code[1] = 0x84000000;
738
739 emitPredicate(i);
740
741 defId(i->def(0), 2);
742 srcId(i->src(0), 10);
743
744 NEG_(33, 0);
745 ABS_(31, 0);
746 SAT_(35);
747 }
748
749 void
750 CodeEmitterGK110::emitMINMAX(const Instruction *i)
751 {
752 uint32_t op2, op1;
753
754 switch (i->dType) {
755 case TYPE_U32:
756 case TYPE_S32:
757 op2 = 0x210;
758 op1 = 0xc10;
759 break;
760 case TYPE_F32:
761 op2 = 0x230;
762 op1 = 0xc30;
763 break;
764 case TYPE_F64:
765 op2 = 0x228;
766 op1 = 0xc28;
767 break;
768 default:
769 assert(0);
770 op2 = 0;
771 op1 = 0;
772 break;
773 }
774 emitForm_21(i, op2, op1);
775
776 if (i->dType == TYPE_S32)
777 code[1] |= 1 << 19;
778 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
779
780 FTZ_(2f);
781 ABS_(31, 0);
782 NEG_(33, 0);
783 if (code[0] & 0x1) {
784 modNegAbsF32_3b(i, 1);
785 } else {
786 ABS_(34, 1);
787 NEG_(30, 1);
788 }
789 }
790
791 void
792 CodeEmitterGK110::emitCVT(const Instruction *i)
793 {
794 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
795 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
796 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
797
798 bool sat = i->saturate;
799 bool abs = i->src(0).mod.abs();
800 bool neg = i->src(0).mod.neg();
801
802 RoundMode rnd = i->rnd;
803
804 switch (i->op) {
805 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
806 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
807 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
808 case OP_SAT: sat = true; break;
809 case OP_NEG: neg = !neg; break;
810 case OP_ABS: abs = true; neg = false; break;
811 default:
812 break;
813 }
814
815 DataType dType;
816
817 if (i->op == OP_NEG && i->dType == TYPE_U32)
818 dType = TYPE_S32;
819 else
820 dType = i->dType;
821
822
823 uint32_t op;
824
825 if (f2f) op = 0x254;
826 else if (f2i) op = 0x258;
827 else if (i2f) op = 0x25c;
828 else op = 0x260;
829
830 emitForm_C(i, op, 0x2);
831
832 FTZ_(2f);
833 if (neg) code[1] |= 1 << 16;
834 if (abs) code[1] |= 1 << 20;
835 if (sat) code[1] |= 1 << 21;
836
837 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
838
839 code[0] |= typeSizeofLog2(dType) << 10;
840 code[0] |= typeSizeofLog2(i->sType) << 12;
841
842 if (isSignedIntType(dType))
843 code[0] |= 0x4000;
844 if (isSignedIntType(i->sType))
845 code[0] |= 0x8000;
846 }
847
848 void
849 CodeEmitterGK110::emitSET(const CmpInstruction *i)
850 {
851 uint16_t op1, op2;
852
853 if (i->def(0).getFile() == FILE_PREDICATE) {
854 switch (i->sType) {
855 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
856 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
857 default:
858 op2 = 0x1b0;
859 op1 = 0xb30;
860 break;
861 }
862 emitForm_21(i, op2, op1);
863
864 NEG_(2e, 0);
865 ABS_(9, 0);
866 if (!(code[0] & 0x1)) {
867 NEG_(8, 1);
868 ABS_(2f, 1);
869 } else {
870 modNegAbsF32_3b(i, 1);
871 }
872 FTZ_(32);
873
874 // normal DST field is negated predicate result
875 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
876 if (i->defExists(1))
877 defId(i->def(1), 2);
878 else
879 code[0] |= 0x1c;
880 } else {
881 switch (i->sType) {
882 case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
883 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
884 default:
885 op2 = 0x1a8;
886 op1 = 0xb28;
887 break;
888 }
889 emitForm_21(i, op2, op1);
890
891 NEG_(2e, 0);
892 ABS_(39, 0);
893 if (!(code[0] & 0x1)) {
894 NEG_(38, 1);
895 ABS_(2f, 1);
896 } else {
897 modNegAbsF32_3b(i, 1);
898 }
899 FTZ_(3a);
900 }
901 if (i->sType == TYPE_S32)
902 code[1] |= 1 << 19;
903
904 if (i->op != OP_SET) {
905 switch (i->op) {
906 case OP_SET_AND: code[1] |= 0x0 << 16; break;
907 case OP_SET_OR: code[1] |= 0x1 << 16; break;
908 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
909 default:
910 assert(0);
911 break;
912 }
913 srcId(i->src(2), 0x2a);
914 } else {
915 code[1] |= 0x7 << 10;
916 }
917 emitCondCode(i->setCond,
918 isFloatType(i->sType) ? 0x33 : 0x34,
919 isFloatType(i->sType) ? 0xf : 0x7);
920 }
921
922 void
923 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
924 {
925 CondCode cc = i->setCond;
926 if (i->src(2).mod.neg())
927 cc = reverseCondCode(cc);
928
929 if (i->dType == TYPE_F32) {
930 emitForm_21(i, 0x1d0, 0xb50);
931 FTZ_(32);
932 emitCondCode(cc, 0x33, 0xf);
933 } else {
934 emitForm_21(i, 0x1a4, 0xb20);
935 emitCondCode(cc, 0x34, 0x7);
936 }
937 }
938
939 void CodeEmitterGK110::emitSELP(const Instruction *i)
940 {
941 emitForm_21(i, 0x250, 0x050);
942
943 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
944 code[1] |= 1 << 13;
945 }
946
947 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
948 {
949 code[0] = 0x00000002 | (i->subOp << 23);
950 code[1] = 0x77000000;
951
952 emitPredicate(i);
953 }
954
955 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
956 {
957 code[0] = 0x00000002;
958 code[1] = 0x76c00000;
959
960 code[1] |= i->tex.r << 9;
961 // code[1] |= i->tex.s << (9 + 8);
962
963 if (i->tex.liveOnly)
964 code[0] |= 0x80000000;
965
966 defId(i->def(0), 2);
967 srcId(i->src(0), 10);
968 }
969
970 static inline bool
971 isNextIndependentTex(const TexInstruction *i)
972 {
973 if (!i->next || !isTextureOp(i->next->op))
974 return false;
975 if (i->getDef(0)->interfers(i->next->getSrc(0)))
976 return false;
977 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
978 }
979
980 void
981 CodeEmitterGK110::emitTEX(const TexInstruction *i)
982 {
983 const bool ind = i->tex.rIndirectSrc >= 0;
984
985 if (ind) {
986 code[0] = 0x00000002;
987 switch (i->op) {
988 case OP_TXD:
989 code[1] = 0x7e000000;
990 break;
991 case OP_TXF:
992 code[1] = 0x78000000;
993 break;
994 default:
995 code[1] = 0x7d800000;
996 break;
997 }
998 } else {
999 switch (i->op) {
1000 case OP_TXD:
1001 code[0] = 0x00000002;
1002 code[1] = 0x76000000;
1003 code[1] |= i->tex.r << 9;
1004 break;
1005 case OP_TXF:
1006 code[0] = 0x00000002;
1007 code[1] = 0x70000000;
1008 code[1] |= i->tex.r << 13;
1009 break;
1010 default:
1011 code[0] = 0x00000001;
1012 code[1] = 0x60000000;
1013 code[1] |= i->tex.r << 15;
1014 break;
1015 }
1016 }
1017
1018 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1019
1020 if (i->tex.liveOnly)
1021 code[0] |= 0x80000000;
1022
1023 switch (i->op) {
1024 case OP_TEX: break;
1025 case OP_TXB: code[1] |= 0x2000; break;
1026 case OP_TXL: code[1] |= 0x3000; break;
1027 case OP_TXF: break;
1028 case OP_TXG: break; // XXX
1029 case OP_TXD: break;
1030 default:
1031 assert(!"invalid texture op");
1032 break;
1033 }
1034
1035 if (i->op == OP_TXF) {
1036 if (!i->tex.levelZero)
1037 code[1] |= 0x1000;
1038 } else
1039 if (i->tex.levelZero) {
1040 code[1] |= 0x1000;
1041 }
1042
1043 if (i->op != OP_TXD && i->tex.derivAll)
1044 code[1] |= 0x200;
1045
1046 emitPredicate(i);
1047
1048 code[1] |= i->tex.mask << 2;
1049
1050 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1051
1052 defId(i->def(0), 2);
1053 srcId(i->src(0), 10);
1054 srcId(i, src1, 23);
1055
1056 // if (i->op == OP_TXG) code[0] |= i->tex.gatherComp << 5;
1057
1058 // texture target:
1059 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1060 if (i->tex.target.isArray())
1061 code[1] |= 0x40;
1062 if (i->tex.target.isShadow())
1063 code[1] |= 0x400;
1064 if (i->tex.target == TEX_TARGET_2D_MS ||
1065 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1066 code[1] |= 0x800;
1067
1068 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1069 // ?
1070 }
1071
1072 if (i->tex.useOffsets) {
1073 switch (i->op) {
1074 case OP_TXF: code[1] |= 0x200; break;
1075 default: code[1] |= 0x800; break;
1076 }
1077 }
1078 }
1079
1080 void
1081 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1082 {
1083 code[0] = 0x00000002;
1084 code[1] = 0x75400001;
1085
1086 switch (i->tex.query) {
1087 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1088 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1089 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1090 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1091 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1092 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1093 default:
1094 assert(!"invalid texture query");
1095 break;
1096 }
1097
1098 code[1] |= i->tex.mask << 2;
1099 code[1] |= i->tex.r << 9;
1100 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1101 code[1] |= 0x08000000;
1102
1103 defId(i->def(0), 2);
1104 srcId(i->src(0), 10);
1105
1106 emitPredicate(i);
1107 }
1108
1109 void
1110 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1111 {
1112 code[0] = 0x00000002 | ((qOp & 1) << 31);
1113 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1114
1115 defId(i->def(0), 2);
1116 srcId(i->src(0), 10);
1117 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1118
1119 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1120 code[1] |= 1 << 9; // dall
1121
1122 emitPredicate(i);
1123 }
1124
1125 void
1126 CodeEmitterGK110::emitFlow(const Instruction *i)
1127 {
1128 const FlowInstruction *f = i->asFlow();
1129
1130 unsigned mask; // bit 0: predicate, bit 1: target
1131
1132 code[0] = 0x00000000;
1133
1134 switch (i->op) {
1135 case OP_BRA:
1136 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1137 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1138 code[0] |= 0x80;
1139 mask = 3;
1140 break;
1141 case OP_CALL:
1142 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1143 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1144 code[0] |= 0x80;
1145 mask = 2;
1146 break;
1147
1148 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1149 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1150 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1151 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1152 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1153
1154 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1155 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1156 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1157 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1158
1159 case OP_QUADON: code[1] = 0x1b000000; mask = 0; break;
1160 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1161 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1162 default:
1163 assert(!"invalid flow operation");
1164 return;
1165 }
1166
1167 if (mask & 1) {
1168 emitPredicate(i);
1169 if (i->flagsSrc < 0)
1170 code[0] |= 0x3c;
1171 }
1172
1173 if (!f)
1174 return;
1175
1176 if (f->allWarp)
1177 code[0] |= 1 << 9;
1178 if (f->limit)
1179 code[0] |= 1 << 8;
1180
1181 if (f->op == OP_CALL) {
1182 if (f->builtin) {
1183 assert(f->absolute);
1184 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1185 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1186 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1187 } else {
1188 assert(!f->absolute);
1189 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1190 code[0] |= (pcRel & 0x1ff) << 23;
1191 code[1] |= (pcRel >> 9) & 0x7fff;
1192 }
1193 } else
1194 if (mask & 2) {
1195 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1196 // currently we don't want absolute branches
1197 assert(!f->absolute);
1198 code[0] |= (pcRel & 0x1ff) << 23;
1199 code[1] |= (pcRel >> 9) & 0x7fff;
1200 }
1201 }
1202
1203 void
1204 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1205 {
1206 uint32_t prim = i->src(0).get()->reg.data.u32;
1207
1208 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1209 code[1] = 0x7f800000;
1210
1211 emitPredicate(i);
1212
1213 defId(i->def(0), 2);
1214 srcId(i->src(1), 10);
1215 }
1216
1217 void
1218 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1219 {
1220 unsigned int size = typeSizeof(i->dType);
1221 uint32_t offset = i->src(0).get()->reg.data.offset;
1222
1223 code[0] = 0x00000002 | (offset << 23);
1224 code[1] = 0x7ec00000 | (offset >> 9);
1225 code[1] |= (size / 4 - 1) << 18;
1226
1227 #if 0
1228 if (i->perPatch)
1229 code[0] |= 0x100;
1230 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1231 code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
1232 #endif
1233
1234 emitPredicate(i);
1235
1236 defId(i->def(0), 2);
1237 srcId(i->src(0).getIndirect(0), 10);
1238 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1239 }
1240
1241 void
1242 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1243 {
1244 unsigned int size = typeSizeof(i->dType);
1245 uint32_t offset = i->src(0).get()->reg.data.offset;
1246
1247 code[0] = 0x00000002 | (offset << 23);
1248 code[1] = 0x7f000000 | (offset >> 9);
1249 code[1] |= (size / 4 - 1) << 18;
1250
1251 #if 0
1252 if (i->perPatch)
1253 code[0] |= 0x100;
1254 #endif
1255
1256 emitPredicate(i);
1257
1258 assert(i->src(1).getFile() == FILE_GPR);
1259
1260 srcId(i->src(0).getIndirect(0), 10);
1261 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1262 srcId(i->src(1), 2);
1263 }
1264
1265 void
1266 CodeEmitterGK110::emitOUT(const Instruction *i)
1267 {
1268 assert(i->src(0).getFile() == FILE_GPR);
1269
1270 emitForm_21(i, 0x1f0, 0xb70);
1271
1272 if (i->op == OP_EMIT)
1273 code[1] |= 1 << 10;
1274 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1275 code[1] |= 1 << 11;
1276 }
1277
1278 void
1279 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1280 {
1281 code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
1282 }
1283
1284 void
1285 CodeEmitterGK110::emitINTERP(const Instruction *i)
1286 {
1287 const uint32_t base = i->getSrc(0)->reg.data.offset;
1288
1289 code[0] = 0x00000002 | (base << 31);
1290 code[1] = 0x74800000 | (base >> 1);
1291
1292 if (i->saturate)
1293 code[1] |= 1 << 18;
1294
1295 if (i->op == OP_PINTERP)
1296 srcId(i->src(1), 23);
1297 else
1298 code[0] |= 0xff << 23;
1299
1300 srcId(i->src(0).getIndirect(0), 10);
1301 emitInterpMode(i);
1302
1303 emitPredicate(i);
1304 defId(i->def(0), 2);
1305
1306 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1307 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1308 else
1309 code[1] |= 0xff << 10;
1310 }
1311
1312 void
1313 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1314 {
1315 uint8_t n;
1316
1317 switch (ty) {
1318 case TYPE_U8:
1319 n = 0;
1320 break;
1321 case TYPE_S8:
1322 n = 1;
1323 break;
1324 case TYPE_U16:
1325 n = 2;
1326 break;
1327 case TYPE_S16:
1328 n = 3;
1329 break;
1330 case TYPE_F32:
1331 case TYPE_U32:
1332 case TYPE_S32:
1333 n = 4;
1334 break;
1335 case TYPE_F64:
1336 case TYPE_U64:
1337 case TYPE_S64:
1338 n = 5;
1339 break;
1340 case TYPE_B128:
1341 n = 6;
1342 break;
1343 default:
1344 n = 0;
1345 assert(!"invalid ld/st type");
1346 break;
1347 }
1348 code[pos / 32] |= n << (pos % 32);
1349 }
1350
1351 void
1352 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1353 {
1354 uint8_t n;
1355
1356 switch (c) {
1357 case CACHE_CA:
1358 // case CACHE_WB:
1359 n = 0;
1360 break;
1361 case CACHE_CG:
1362 n = 1;
1363 break;
1364 case CACHE_CS:
1365 n = 2;
1366 break;
1367 case CACHE_CV:
1368 // case CACHE_WT:
1369 n = 3;
1370 break;
1371 default:
1372 n = 0;
1373 assert(!"invalid caching mode");
1374 break;
1375 }
1376 code[pos / 32] |= n << (pos % 32);
1377 }
1378
1379 void
1380 CodeEmitterGK110::emitSTORE(const Instruction *i)
1381 {
1382 int32_t offset = SDATA(i->src(0)).offset;
1383
1384 switch (i->src(0).getFile()) {
1385 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1386 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1387 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1388 default:
1389 assert(!"invalid memory file");
1390 break;
1391 }
1392
1393 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1394 offset &= 0xffffff;
1395
1396 if (code[0] & 0x2) {
1397 emitLoadStoreType(i->dType, 0x33);
1398 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1399 emitCachingMode(i->cache, 0x2f);
1400 } else {
1401 emitLoadStoreType(i->dType, 0x38);
1402 emitCachingMode(i->cache, 0x3b);
1403 }
1404 code[0] |= offset << 23;
1405 code[1] |= offset >> 9;
1406
1407 emitPredicate(i);
1408
1409 srcId(i->src(1), 2);
1410 srcId(i->src(0).getIndirect(0), 10);
1411 }
1412
1413 void
1414 CodeEmitterGK110::emitLOAD(const Instruction *i)
1415 {
1416 int32_t offset = SDATA(i->src(0)).offset;
1417
1418 switch (i->src(0).getFile()) {
1419 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1420 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1421 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1422 case FILE_MEMORY_CONST:
1423 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1424 emitMOV(i);
1425 return;
1426 }
1427 offset &= 0xffff;
1428 code[0] = 0x00000002;
1429 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1430 break;
1431 default:
1432 assert(!"invalid memory file");
1433 break;
1434 }
1435
1436 if (code[0] & 0x2) {
1437 offset &= 0xffffff;
1438 emitLoadStoreType(i->dType, 0x33);
1439 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1440 emitCachingMode(i->cache, 0x2f);
1441 } else {
1442 emitLoadStoreType(i->dType, 0x38);
1443 emitCachingMode(i->cache, 0x3b);
1444 }
1445 code[0] |= offset << 23;
1446 code[1] |= offset >> 9;
1447
1448 emitPredicate(i);
1449
1450 defId(i->def(0), 2);
1451 srcId(i->src(0).getIndirect(0), 10);
1452 }
1453
1454 uint8_t
1455 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1456 {
1457 switch (SDATA(ref).sv.sv) {
1458 case SV_LANEID: return 0x00;
1459 case SV_PHYSID: return 0x03;
1460 case SV_VERTEX_COUNT: return 0x10;
1461 case SV_INVOCATION_ID: return 0x11;
1462 case SV_YDIR: return 0x12;
1463 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1464 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1465 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1466 case SV_GRIDID: return 0x2c;
1467 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1468 case SV_LBASE: return 0x34;
1469 case SV_SBASE: return 0x30;
1470 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1471 default:
1472 assert(!"no sreg for system value");
1473 return 0;
1474 }
1475 }
1476
1477 void
1478 CodeEmitterGK110::emitMOV(const Instruction *i)
1479 {
1480 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1481 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1482 code[1] = 0x86400000;
1483 emitPredicate(i);
1484 defId(i->def(0), 2);
1485 } else
1486 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1487 code[0] = 0x00000002 | (i->lanes << 14);
1488 code[1] = 0x74000000;
1489 emitPredicate(i);
1490 defId(i->def(0), 2);
1491 setImmediate32(i, 0, Modifier(0));
1492 } else
1493 if (i->src(0).getFile() == FILE_PREDICATE) {
1494 code[0] = 0x00000002;
1495 code[1] = 0x84401c07;
1496 emitPredicate(i);
1497 defId(i->def(0), 2);
1498 srcId(i->src(0), 14);
1499 } else {
1500 emitForm_C(i, 0x24c, 2);
1501 code[1] |= i->lanes << 10;
1502 }
1503 }
1504
1505 bool
1506 CodeEmitterGK110::emitInstruction(Instruction *insn)
1507 {
1508 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1509
1510 if (insn->encSize != 8) {
1511 ERROR("skipping unencodable instruction: ");
1512 insn->print();
1513 return false;
1514 } else
1515 if (codeSize + size > codeSizeLimit) {
1516 ERROR("code emitter output buffer too small\n");
1517 return false;
1518 }
1519
1520 if (writeIssueDelays) {
1521 int id = (codeSize & 0x3f) / 8 - 1;
1522 if (id < 0) {
1523 id += 1;
1524 code[0] = 0x00000000; // cf issue delay "instruction"
1525 code[1] = 0x08000000;
1526 code += 2;
1527 codeSize += 8;
1528 }
1529 uint32_t *data = code - (id * 2 + 2);
1530
1531 switch (id) {
1532 case 0: data[0] |= insn->sched << 2; break;
1533 case 1: data[0] |= insn->sched << 10; break;
1534 case 2: data[0] |= insn->sched << 18; break;
1535 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1536 case 4: data[1] |= insn->sched << 2; break;
1537 case 5: data[1] |= insn->sched << 10; break;
1538 case 6: data[1] |= insn->sched << 18; break;
1539 default:
1540 assert(0);
1541 break;
1542 }
1543 }
1544
1545 // assert that instructions with multiple defs don't corrupt registers
1546 for (int d = 0; insn->defExists(d); ++d)
1547 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1548
1549 switch (insn->op) {
1550 case OP_MOV:
1551 case OP_RDSV:
1552 emitMOV(insn);
1553 break;
1554 case OP_NOP:
1555 break;
1556 case OP_LOAD:
1557 emitLOAD(insn);
1558 break;
1559 case OP_STORE:
1560 emitSTORE(insn);
1561 break;
1562 case OP_LINTERP:
1563 case OP_PINTERP:
1564 emitINTERP(insn);
1565 break;
1566 case OP_VFETCH:
1567 emitVFETCH(insn);
1568 break;
1569 case OP_EXPORT:
1570 emitEXPORT(insn);
1571 break;
1572 case OP_PFETCH:
1573 emitPFETCH(insn);
1574 break;
1575 case OP_EMIT:
1576 case OP_RESTART:
1577 emitOUT(insn);
1578 break;
1579 case OP_ADD:
1580 case OP_SUB:
1581 if (isFloatType(insn->dType))
1582 emitFADD(insn);
1583 else
1584 emitUADD(insn);
1585 break;
1586 case OP_MUL:
1587 if (isFloatType(insn->dType))
1588 emitFMUL(insn);
1589 else
1590 emitIMUL(insn);
1591 break;
1592 case OP_MAD:
1593 case OP_FMA:
1594 if (isFloatType(insn->dType))
1595 emitFMAD(insn);
1596 else
1597 emitIMAD(insn);
1598 break;
1599 case OP_SAD:
1600 emitISAD(insn);
1601 break;
1602 case OP_NOT:
1603 emitNOT(insn);
1604 break;
1605 case OP_AND:
1606 emitLogicOp(insn, 0);
1607 break;
1608 case OP_OR:
1609 emitLogicOp(insn, 1);
1610 break;
1611 case OP_XOR:
1612 emitLogicOp(insn, 2);
1613 break;
1614 case OP_SHL:
1615 case OP_SHR:
1616 emitShift(insn);
1617 break;
1618 case OP_SET:
1619 case OP_SET_AND:
1620 case OP_SET_OR:
1621 case OP_SET_XOR:
1622 emitSET(insn->asCmp());
1623 break;
1624 case OP_SELP:
1625 emitSELP(insn);
1626 break;
1627 case OP_SLCT:
1628 emitSLCT(insn->asCmp());
1629 break;
1630 case OP_MIN:
1631 case OP_MAX:
1632 emitMINMAX(insn);
1633 break;
1634 case OP_ABS:
1635 case OP_NEG:
1636 case OP_CEIL:
1637 case OP_FLOOR:
1638 case OP_TRUNC:
1639 case OP_CVT:
1640 case OP_SAT:
1641 emitCVT(insn);
1642 break;
1643 case OP_RSQ:
1644 emitSFnOp(insn, 5);
1645 break;
1646 case OP_RCP:
1647 emitSFnOp(insn, 4);
1648 break;
1649 case OP_LG2:
1650 emitSFnOp(insn, 3);
1651 break;
1652 case OP_EX2:
1653 emitSFnOp(insn, 2);
1654 break;
1655 case OP_SIN:
1656 emitSFnOp(insn, 1);
1657 break;
1658 case OP_COS:
1659 emitSFnOp(insn, 0);
1660 break;
1661 case OP_PRESIN:
1662 case OP_PREEX2:
1663 emitPreOp(insn);
1664 break;
1665 case OP_TEX:
1666 case OP_TXB:
1667 case OP_TXL:
1668 case OP_TXD:
1669 case OP_TXF:
1670 emitTEX(insn->asTex());
1671 break;
1672 case OP_TXQ:
1673 emitTXQ(insn->asTex());
1674 break;
1675 case OP_TEXBAR:
1676 emitTEXBAR(insn);
1677 break;
1678 case OP_BRA:
1679 case OP_CALL:
1680 case OP_PRERET:
1681 case OP_RET:
1682 case OP_DISCARD:
1683 case OP_EXIT:
1684 case OP_PRECONT:
1685 case OP_CONT:
1686 case OP_PREBREAK:
1687 case OP_BREAK:
1688 case OP_JOINAT:
1689 case OP_BRKPT:
1690 case OP_QUADON:
1691 case OP_QUADPOP:
1692 emitFlow(insn);
1693 break;
1694 case OP_QUADOP:
1695 emitQUADOP(insn, insn->subOp, insn->lanes);
1696 break;
1697 case OP_DFDX:
1698 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1699 break;
1700 case OP_DFDY:
1701 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1702 break;
1703 case OP_POPCNT:
1704 emitPOPC(insn);
1705 break;
1706 case OP_JOIN:
1707 emitNOP(insn);
1708 insn->join = 1;
1709 break;
1710 case OP_PHI:
1711 case OP_UNION:
1712 case OP_CONSTRAINT:
1713 ERROR("operation should have been eliminated");
1714 return false;
1715 case OP_EXP:
1716 case OP_LOG:
1717 case OP_SQRT:
1718 case OP_POW:
1719 ERROR("operation should have been lowered\n");
1720 return false;
1721 default:
1722 ERROR("unknow op\n");
1723 return false;
1724 }
1725
1726 if (insn->join)
1727 code[0] |= 1 << 22;
1728
1729 code += 2;
1730 codeSize += 8;
1731 return true;
1732 }
1733
1734 uint32_t
1735 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1736 {
1737 // No more short instruction encodings.
1738 return 8;
1739 }
1740
1741 void
1742 CodeEmitterGK110::prepareEmission(Function *func)
1743 {
1744 const Target *targ = func->getProgram()->getTarget();
1745
1746 CodeEmitter::prepareEmission(func);
1747
1748 if (targ->hasSWSched)
1749 calculateSchedDataNVC0(targ, func);
1750 }
1751
1752 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1753 : CodeEmitter(target),
1754 targNVC0(target),
1755 writeIssueDelays(target->hasSWSched)
1756 {
1757 code = NULL;
1758 codeSize = codeSizeLimit = 0;
1759 relocInfo = NULL;
1760 }
1761
1762 CodeEmitter *
1763 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1764 {
1765 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1766 emit->setProgramType(type);
1767 return emit;
1768 }
1769
1770 } // namespace nv50_ir