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[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitAFETCH(const Instruction *);
81 void emitPFETCH(const Instruction *);
82 void emitVFETCH(const Instruction *);
83 void emitEXPORT(const Instruction *);
84 void emitOUT(const Instruction *);
85
86 void emitUADD(const Instruction *);
87 void emitFADD(const Instruction *);
88 void emitDADD(const Instruction *);
89 void emitIMUL(const Instruction *);
90 void emitFMUL(const Instruction *);
91 void emitDMUL(const Instruction *);
92 void emitIMAD(const Instruction *);
93 void emitISAD(const Instruction *);
94 void emitFMAD(const Instruction *);
95 void emitDMAD(const Instruction *);
96
97 void emitNOT(const Instruction *);
98 void emitLogicOp(const Instruction *, uint8_t subOp);
99 void emitPOPC(const Instruction *);
100 void emitINSBF(const Instruction *);
101 void emitEXTBF(const Instruction *);
102 void emitBFIND(const Instruction *);
103 void emitShift(const Instruction *);
104
105 void emitSFnOp(const Instruction *, uint8_t subOp);
106
107 void emitCVT(const Instruction *);
108 void emitMINMAX(const Instruction *);
109 void emitPreOp(const Instruction *);
110
111 void emitSET(const CmpInstruction *);
112 void emitSLCT(const CmpInstruction *);
113 void emitSELP(const Instruction *);
114
115 void emitTEXBAR(const Instruction *);
116 void emitTEX(const TexInstruction *);
117 void emitTEXCSAA(const TexInstruction *);
118 void emitTXQ(const TexInstruction *);
119
120 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
121
122 void emitPIXLD(const Instruction *);
123
124 void emitBAR(const Instruction *);
125
126 void emitFlow(const Instruction *);
127
128 inline void defId(const ValueDef&, const int pos);
129 inline void srcId(const ValueRef&, const int pos);
130 inline void srcId(const ValueRef *, const int pos);
131 inline void srcId(const Instruction *, int s, const int pos);
132
133 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
134
135 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
136 };
137
138 #define GK110_GPR_ZERO 255
139
140 #define NEG_(b, s) \
141 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
142 #define ABS_(b, s) \
143 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
144
145 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
146 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
147
148 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
149 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
150
151 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
152
153 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
154
155 #define SDATA(a) ((a).rep()->reg.data)
156 #define DDATA(a) ((a).rep()->reg.data)
157
158 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
159 {
160 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
164 {
165 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
169 {
170 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
171 code[pos / 32] |= r << (pos % 32);
172 }
173
174 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
175 {
176 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
177 }
178
179 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
180 {
181 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
182 }
183
184 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
185 {
186 const ImmediateValue *imm = ref.get()->asImm();
187
188 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
189 }
190
191 void
192 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
193 {
194 bool rint = false;
195 uint8_t n;
196
197 switch (rnd) {
198 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
199 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
200 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
201 default:
202 rint = rnd == ROUND_NI;
203 n = 0;
204 assert(rnd == ROUND_N || rnd == ROUND_NI);
205 break;
206 }
207 code[pos / 32] |= n << (pos % 32);
208 if (rint && rintPos >= 0)
209 code[rintPos / 32] |= 1 << (rintPos % 32);
210 }
211
212 void
213 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
214 {
215 uint8_t n;
216
217 switch (rnd) {
218 case ROUND_M: n = 1; break;
219 case ROUND_P: n = 2; break;
220 case ROUND_Z: n = 3; break;
221 default:
222 n = 0;
223 assert(rnd == ROUND_N);
224 break;
225 }
226 code[pos / 32] |= n << (pos % 32);
227 }
228
229 void
230 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
231 {
232 uint8_t n;
233
234 switch (rnd) {
235 case ROUND_MI: n = 1; break;
236 case ROUND_PI: n = 2; break;
237 case ROUND_ZI: n = 3; break;
238 default:
239 n = 0;
240 assert(rnd == ROUND_NI);
241 break;
242 }
243 code[pos / 32] |= n << (pos % 32);
244 }
245
246 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
247 {
248 uint8_t n;
249
250 switch (cc) {
251 case CC_FL: n = 0x00; break;
252 case CC_LT: n = 0x01; break;
253 case CC_EQ: n = 0x02; break;
254 case CC_LE: n = 0x03; break;
255 case CC_GT: n = 0x04; break;
256 case CC_NE: n = 0x05; break;
257 case CC_GE: n = 0x06; break;
258 case CC_LTU: n = 0x09; break;
259 case CC_EQU: n = 0x0a; break;
260 case CC_LEU: n = 0x0b; break;
261 case CC_GTU: n = 0x0c; break;
262 case CC_NEU: n = 0x0d; break;
263 case CC_GEU: n = 0x0e; break;
264 case CC_TR: n = 0x0f; break;
265 case CC_NO: n = 0x10; break;
266 case CC_NC: n = 0x11; break;
267 case CC_NS: n = 0x12; break;
268 case CC_NA: n = 0x13; break;
269 case CC_A: n = 0x14; break;
270 case CC_S: n = 0x15; break;
271 case CC_C: n = 0x16; break;
272 case CC_O: n = 0x17; break;
273 default:
274 n = 0;
275 assert(!"invalid condition code");
276 break;
277 }
278 code[pos / 32] |= (n & mask) << (pos % 32);
279 }
280
281 void
282 CodeEmitterGK110::emitPredicate(const Instruction *i)
283 {
284 if (i->predSrc >= 0) {
285 srcId(i->src(i->predSrc), 18);
286 if (i->cc == CC_NOT_P)
287 code[0] |= 8 << 18; // negate
288 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
289 } else {
290 code[0] |= 7 << 18;
291 }
292 }
293
294 void
295 CodeEmitterGK110::setCAddress14(const ValueRef& src)
296 {
297 const Storage& res = src.get()->asSym()->reg;
298 const int32_t addr = res.data.offset / 4;
299
300 code[0] |= (addr & 0x01ff) << 23;
301 code[1] |= (addr & 0x3e00) >> 9;
302 code[1] |= res.fileIndex << 5;
303 }
304
305 void
306 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
307 {
308 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
309 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
310
311 if (i->sType == TYPE_F32) {
312 assert(!(u32 & 0x00000fff));
313 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
314 code[1] |= ((u32 & 0x7fe00000) >> 21);
315 code[1] |= ((u32 & 0x80000000) >> 4);
316 } else
317 if (i->sType == TYPE_F64) {
318 assert(!(u64 & 0x00000fffffffffffULL));
319 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
320 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
321 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
322 } else {
323 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
324 code[0] |= (u32 & 0x001ff) << 23;
325 code[1] |= (u32 & 0x7fe00) >> 9;
326 code[1] |= (u32 & 0x80000) << 8;
327 }
328 }
329
330 void
331 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
332 Modifier mod)
333 {
334 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
335
336 if (mod) {
337 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
338 mod.applyTo(imm);
339 u32 = imm.reg.data.u32;
340 }
341
342 code[0] |= u32 << 23;
343 code[1] |= u32 >> 9;
344 }
345
346 void
347 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
348 Modifier mod)
349 {
350 code[0] = ctg;
351 code[1] = opc << 20;
352
353 emitPredicate(i);
354
355 defId(i->def(0), 2);
356
357 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
358 switch (i->src(s).getFile()) {
359 case FILE_GPR:
360 srcId(i->src(s), s ? 42 : 10);
361 break;
362 case FILE_IMMEDIATE:
363 setImmediate32(i, s, mod);
364 break;
365 default:
366 break;
367 }
368 }
369 }
370
371
372 void
373 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
374 {
375 code[0] = ctg;
376 code[1] = opc << 20;
377
378 emitPredicate(i);
379
380 defId(i->def(0), 2);
381
382 switch (i->src(0).getFile()) {
383 case FILE_MEMORY_CONST:
384 code[1] |= 0x4 << 28;
385 setCAddress14(i->src(0));
386 break;
387 case FILE_GPR:
388 code[1] |= 0xc << 28;
389 srcId(i->src(0), 23);
390 break;
391 default:
392 assert(0);
393 break;
394 }
395 }
396
397 // 0x2 for GPR, c[] and 0x1 for short immediate
398 void
399 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
400 uint32_t opc1)
401 {
402 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
403
404 int s1 = 23;
405 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
406 s1 = 42;
407
408 if (imm) {
409 code[0] = 0x1;
410 code[1] = opc1 << 20;
411 } else {
412 code[0] = 0x2;
413 code[1] = (0xc << 28) | (opc2 << 20);
414 }
415
416 emitPredicate(i);
417
418 defId(i->def(0), 2);
419
420 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
421 switch (i->src(s).getFile()) {
422 case FILE_MEMORY_CONST:
423 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
424 setCAddress14(i->src(s));
425 break;
426 case FILE_IMMEDIATE:
427 setShortImmediate(i, s);
428 break;
429 case FILE_GPR:
430 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
431 break;
432 default:
433 // ignore here, can be predicate or flags, but must not be address
434 break;
435 }
436 }
437 // 0x0 = invalid
438 // 0xc = rrr
439 // 0x8 = rrc
440 // 0x4 = rcr
441 assert(imm || (code[1] & (0xc << 28)));
442 }
443
444 inline void
445 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
446 {
447 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
448 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
449 }
450
451 void
452 CodeEmitterGK110::emitNOP(const Instruction *i)
453 {
454 code[0] = 0x00003c02;
455 code[1] = 0x85800000;
456
457 if (i)
458 emitPredicate(i);
459 else
460 code[0] = 0x001c3c02;
461 }
462
463 void
464 CodeEmitterGK110::emitFMAD(const Instruction *i)
465 {
466 assert(!isLIMM(i->src(1), TYPE_F32));
467
468 emitForm_21(i, 0x0c0, 0x940);
469
470 NEG_(34, 2);
471 SAT_(35);
472 RND_(36, F);
473 FTZ_(38);
474 DNZ_(39);
475
476 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
477
478 if (code[0] & 0x1) {
479 if (neg1)
480 code[1] ^= 1 << 27;
481 } else
482 if (neg1) {
483 code[1] |= 1 << 19;
484 }
485 }
486
487 void
488 CodeEmitterGK110::emitDMAD(const Instruction *i)
489 {
490 assert(!i->saturate);
491 assert(!i->ftz);
492
493 emitForm_21(i, 0x1b8, 0xb38);
494
495 NEG_(34, 2);
496 RND_(36, F);
497
498 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
499
500 if (code[0] & 0x1) {
501 if (neg1)
502 code[1] ^= 1 << 27;
503 } else
504 if (neg1) {
505 code[1] |= 1 << 19;
506 }
507 }
508
509 void
510 CodeEmitterGK110::emitFMUL(const Instruction *i)
511 {
512 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
513
514 assert(i->postFactor >= -3 && i->postFactor <= 3);
515
516 if (isLIMM(i->src(1), TYPE_F32)) {
517 emitForm_L(i, 0x200, 0x2, Modifier(0));
518
519 FTZ_(38);
520 DNZ_(39);
521 SAT_(3a);
522 if (neg)
523 code[1] ^= 1 << 22;
524
525 assert(i->postFactor == 0);
526 } else {
527 emitForm_21(i, 0x234, 0xc34);
528 code[1] |= ((i->postFactor > 0) ?
529 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
530
531 RND_(2a, F);
532 FTZ_(2f);
533 DNZ_(30);
534 SAT_(35);
535
536 if (code[0] & 0x1) {
537 if (neg)
538 code[1] ^= 1 << 27;
539 } else
540 if (neg) {
541 code[1] |= 1 << 19;
542 }
543 }
544 }
545
546 void
547 CodeEmitterGK110::emitDMUL(const Instruction *i)
548 {
549 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
550
551 assert(!i->postFactor);
552 assert(!i->saturate);
553 assert(!i->ftz);
554 assert(!i->dnz);
555
556 emitForm_21(i, 0x240, 0xc40);
557
558 RND_(2a, F);
559
560 if (code[0] & 0x1) {
561 if (neg)
562 code[1] ^= 1 << 27;
563 } else
564 if (neg) {
565 code[1] |= 1 << 19;
566 }
567 }
568
569 void
570 CodeEmitterGK110::emitIMUL(const Instruction *i)
571 {
572 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
573 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
574
575 if (isLIMM(i->src(1), TYPE_S32)) {
576 emitForm_L(i, 0x280, 2, Modifier(0));
577
578 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
579
580 if (i->sType == TYPE_S32)
581 code[1] |= 3 << 25;
582 } else {
583 emitForm_21(i, 0x21c, 0xc1c);
584
585 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
586 code[1] |= 1 << 10;
587 if (i->sType == TYPE_S32)
588 code[1] |= 3 << 11;
589 }
590 }
591
592 void
593 CodeEmitterGK110::emitFADD(const Instruction *i)
594 {
595 if (isLIMM(i->src(1), TYPE_F32)) {
596 assert(i->rnd == ROUND_N);
597 assert(!i->saturate);
598
599 Modifier mod = i->src(1).mod ^
600 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
601
602 emitForm_L(i, 0x400, 0, mod);
603
604 FTZ_(3a);
605 NEG_(3b, 0);
606 ABS_(39, 0);
607 } else {
608 emitForm_21(i, 0x22c, 0xc2c);
609
610 FTZ_(2f);
611 RND_(2a, F);
612 ABS_(31, 0);
613 NEG_(33, 0);
614 SAT_(35);
615
616 if (code[0] & 0x1) {
617 modNegAbsF32_3b(i, 1);
618 if (i->op == OP_SUB) code[1] ^= 1 << 27;
619 } else {
620 ABS_(34, 1);
621 NEG_(30, 1);
622 if (i->op == OP_SUB) code[1] ^= 1 << 16;
623 }
624 }
625 }
626
627 void
628 CodeEmitterGK110::emitDADD(const Instruction *i)
629 {
630 assert(!i->saturate);
631 assert(!i->ftz);
632
633 emitForm_21(i, 0x238, 0xc38);
634 RND_(2a, F);
635 ABS_(31, 0);
636 NEG_(33, 0);
637 if (code[0] & 0x1) {
638 modNegAbsF32_3b(i, 1);
639 if (i->op == OP_SUB) code[1] ^= 1 << 27;
640 } else {
641 NEG_(30, 1);
642 ABS_(34, 1);
643 if (i->op == OP_SUB) code[1] ^= 1 << 16;
644 }
645 }
646
647 void
648 CodeEmitterGK110::emitUADD(const Instruction *i)
649 {
650 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
651
652 if (i->op == OP_SUB)
653 addOp ^= 1;
654
655 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
656
657 if (isLIMM(i->src(1), TYPE_S32)) {
658 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
659
660 if (addOp & 2)
661 code[1] |= 1 << 27;
662
663 assert(!i->defExists(1));
664 assert(i->flagsSrc < 0);
665
666 SAT_(39);
667 } else {
668 emitForm_21(i, 0x208, 0xc08);
669
670 assert(addOp != 3); // would be add-plus-one
671
672 code[1] |= addOp << 19;
673
674 if (i->defExists(1))
675 code[1] |= 1 << 18; // write carry
676 if (i->flagsSrc >= 0)
677 code[1] |= 1 << 14; // add carry
678
679 SAT_(35);
680 }
681 }
682
683 // TODO: shl-add
684 void
685 CodeEmitterGK110::emitIMAD(const Instruction *i)
686 {
687 uint8_t addOp =
688 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
689
690 emitForm_21(i, 0x100, 0xa00);
691
692 assert(addOp != 3);
693 code[1] |= addOp << 26;
694
695 if (i->sType == TYPE_S32)
696 code[1] |= (1 << 19) | (1 << 24);
697
698 if (code[0] & 0x1) {
699 assert(!i->subOp);
700 SAT_(39);
701 } else {
702 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
703 code[1] |= 1 << 25;
704 SAT_(35);
705 }
706 }
707
708 void
709 CodeEmitterGK110::emitISAD(const Instruction *i)
710 {
711 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
712
713 emitForm_21(i, 0x1f4, 0xb74);
714
715 if (i->dType == TYPE_S32)
716 code[1] |= 1 << 19;
717 }
718
719 void
720 CodeEmitterGK110::emitNOT(const Instruction *i)
721 {
722 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
723 code[1] = 0x22003800;
724
725 emitPredicate(i);
726
727 defId(i->def(0), 2);
728
729 switch (i->src(0).getFile()) {
730 case FILE_GPR:
731 code[1] |= 0xc << 28;
732 srcId(i->src(0), 23);
733 break;
734 case FILE_MEMORY_CONST:
735 code[1] |= 0x4 << 28;
736 setCAddress14(i->src(1));
737 break;
738 default:
739 assert(0);
740 break;
741 }
742 }
743
744 void
745 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
746 {
747 if (isLIMM(i->src(1), TYPE_S32)) {
748 emitForm_L(i, 0x200, 0, i->src(1).mod);
749 code[1] |= subOp << 24;
750 NOT_(3a, 0);
751 } else {
752 emitForm_21(i, 0x220, 0xc20);
753 code[1] |= subOp << 12;
754 NOT_(2a, 0);
755 NOT_(2b, 1);
756 }
757 }
758
759 void
760 CodeEmitterGK110::emitPOPC(const Instruction *i)
761 {
762 assert(!isLIMM(i->src(1), TYPE_S32, true));
763
764 emitForm_21(i, 0x204, 0xc04);
765
766 NOT_(2a, 0);
767 if (!(code[0] & 0x1))
768 NOT_(2b, 1);
769 }
770
771 void
772 CodeEmitterGK110::emitINSBF(const Instruction *i)
773 {
774 emitForm_21(i, 0x1f8, 0xb78);
775 }
776
777 void
778 CodeEmitterGK110::emitEXTBF(const Instruction *i)
779 {
780 emitForm_21(i, 0x600, 0xc00);
781
782 if (i->dType == TYPE_S32)
783 code[1] |= 0x80000;
784 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
785 code[1] |= 0x800;
786 }
787
788 void
789 CodeEmitterGK110::emitBFIND(const Instruction *i)
790 {
791 emitForm_C(i, 0x218, 0x2);
792
793 if (i->dType == TYPE_S32)
794 code[1] |= 0x80000;
795 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
796 code[1] |= 0x800;
797 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
798 code[1] |= 0x1000;
799 }
800
801 void
802 CodeEmitterGK110::emitShift(const Instruction *i)
803 {
804 if (i->op == OP_SHR) {
805 emitForm_21(i, 0x214, 0xc14);
806 if (isSignedType(i->dType))
807 code[1] |= 1 << 19;
808 } else {
809 emitForm_21(i, 0x224, 0xc24);
810 }
811
812 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
813 code[1] |= 1 << 10;
814 }
815
816 void
817 CodeEmitterGK110::emitPreOp(const Instruction *i)
818 {
819 emitForm_C(i, 0x248, 0x2);
820
821 if (i->op == OP_PREEX2)
822 code[1] |= 1 << 10;
823
824 NEG_(30, 0);
825 ABS_(34, 0);
826 }
827
828 void
829 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
830 {
831 code[0] = 0x00000002 | (subOp << 23);
832 code[1] = 0x84000000;
833
834 emitPredicate(i);
835
836 defId(i->def(0), 2);
837 srcId(i->src(0), 10);
838
839 NEG_(33, 0);
840 ABS_(31, 0);
841 SAT_(35);
842 }
843
844 void
845 CodeEmitterGK110::emitMINMAX(const Instruction *i)
846 {
847 uint32_t op2, op1;
848
849 switch (i->dType) {
850 case TYPE_U32:
851 case TYPE_S32:
852 op2 = 0x210;
853 op1 = 0xc10;
854 break;
855 case TYPE_F32:
856 op2 = 0x230;
857 op1 = 0xc30;
858 break;
859 case TYPE_F64:
860 op2 = 0x228;
861 op1 = 0xc28;
862 break;
863 default:
864 assert(0);
865 op2 = 0;
866 op1 = 0;
867 break;
868 }
869 emitForm_21(i, op2, op1);
870
871 if (i->dType == TYPE_S32)
872 code[1] |= 1 << 19;
873 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
874
875 FTZ_(2f);
876 ABS_(31, 0);
877 NEG_(33, 0);
878 if (code[0] & 0x1) {
879 modNegAbsF32_3b(i, 1);
880 } else {
881 ABS_(34, 1);
882 NEG_(30, 1);
883 }
884 }
885
886 void
887 CodeEmitterGK110::emitCVT(const Instruction *i)
888 {
889 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
890 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
891 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
892
893 bool sat = i->saturate;
894 bool abs = i->src(0).mod.abs();
895 bool neg = i->src(0).mod.neg();
896
897 RoundMode rnd = i->rnd;
898
899 switch (i->op) {
900 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
901 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
902 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
903 case OP_SAT: sat = true; break;
904 case OP_NEG: neg = !neg; break;
905 case OP_ABS: abs = true; neg = false; break;
906 default:
907 break;
908 }
909
910 DataType dType;
911
912 if (i->op == OP_NEG && i->dType == TYPE_U32)
913 dType = TYPE_S32;
914 else
915 dType = i->dType;
916
917
918 uint32_t op;
919
920 if (f2f) op = 0x254;
921 else if (f2i) op = 0x258;
922 else if (i2f) op = 0x25c;
923 else op = 0x260;
924
925 emitForm_C(i, op, 0x2);
926
927 FTZ_(2f);
928 if (neg) code[1] |= 1 << 16;
929 if (abs) code[1] |= 1 << 20;
930 if (sat) code[1] |= 1 << 21;
931
932 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
933
934 code[0] |= typeSizeofLog2(dType) << 10;
935 code[0] |= typeSizeofLog2(i->sType) << 12;
936 code[1] |= i->subOp << 12;
937
938 if (isSignedIntType(dType))
939 code[0] |= 0x4000;
940 if (isSignedIntType(i->sType))
941 code[0] |= 0x8000;
942 }
943
944 void
945 CodeEmitterGK110::emitSET(const CmpInstruction *i)
946 {
947 uint16_t op1, op2;
948
949 if (i->def(0).getFile() == FILE_PREDICATE) {
950 switch (i->sType) {
951 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
952 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
953 default:
954 op2 = 0x1b0;
955 op1 = 0xb30;
956 break;
957 }
958 emitForm_21(i, op2, op1);
959
960 NEG_(2e, 0);
961 ABS_(9, 0);
962 if (!(code[0] & 0x1)) {
963 NEG_(8, 1);
964 ABS_(2f, 1);
965 } else {
966 modNegAbsF32_3b(i, 1);
967 }
968 FTZ_(32);
969
970 // normal DST field is negated predicate result
971 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
972 if (i->defExists(1))
973 defId(i->def(1), 2);
974 else
975 code[0] |= 0x1c;
976 } else {
977 switch (i->sType) {
978 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
979 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
980 default:
981 op2 = 0x1a8;
982 op1 = 0xb28;
983 break;
984 }
985 emitForm_21(i, op2, op1);
986
987 NEG_(2e, 0);
988 ABS_(39, 0);
989 if (!(code[0] & 0x1)) {
990 NEG_(38, 1);
991 ABS_(2f, 1);
992 } else {
993 modNegAbsF32_3b(i, 1);
994 }
995 FTZ_(3a);
996
997 if (i->dType == TYPE_F32) {
998 if (isFloatType(i->sType))
999 code[1] |= 1 << 23;
1000 else
1001 code[1] |= 1 << 15;
1002 }
1003 }
1004 if (i->sType == TYPE_S32)
1005 code[1] |= 1 << 19;
1006
1007 if (i->op != OP_SET) {
1008 switch (i->op) {
1009 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1010 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1011 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1012 default:
1013 assert(0);
1014 break;
1015 }
1016 srcId(i->src(2), 0x2a);
1017 } else {
1018 code[1] |= 0x7 << 10;
1019 }
1020 emitCondCode(i->setCond,
1021 isFloatType(i->sType) ? 0x33 : 0x34,
1022 isFloatType(i->sType) ? 0xf : 0x7);
1023 }
1024
1025 void
1026 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1027 {
1028 CondCode cc = i->setCond;
1029 if (i->src(2).mod.neg())
1030 cc = reverseCondCode(cc);
1031
1032 if (i->dType == TYPE_F32) {
1033 emitForm_21(i, 0x1d0, 0xb50);
1034 FTZ_(32);
1035 emitCondCode(cc, 0x33, 0xf);
1036 } else {
1037 emitForm_21(i, 0x1a0, 0xb20);
1038 emitCondCode(cc, 0x34, 0x7);
1039 }
1040 }
1041
1042 void CodeEmitterGK110::emitSELP(const Instruction *i)
1043 {
1044 emitForm_21(i, 0x250, 0x050);
1045
1046 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
1047 code[1] |= 1 << 13;
1048 }
1049
1050 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1051 {
1052 code[0] = 0x0000003e | (i->subOp << 23);
1053 code[1] = 0x77000000;
1054
1055 emitPredicate(i);
1056 }
1057
1058 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1059 {
1060 code[0] = 0x00000002;
1061 code[1] = 0x76c00000;
1062
1063 code[1] |= i->tex.r << 9;
1064 // code[1] |= i->tex.s << (9 + 8);
1065
1066 if (i->tex.liveOnly)
1067 code[0] |= 0x80000000;
1068
1069 defId(i->def(0), 2);
1070 srcId(i->src(0), 10);
1071 }
1072
1073 static inline bool
1074 isNextIndependentTex(const TexInstruction *i)
1075 {
1076 if (!i->next || !isTextureOp(i->next->op))
1077 return false;
1078 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1079 return false;
1080 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1081 }
1082
1083 void
1084 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1085 {
1086 const bool ind = i->tex.rIndirectSrc >= 0;
1087
1088 if (ind) {
1089 code[0] = 0x00000002;
1090 switch (i->op) {
1091 case OP_TXD:
1092 code[1] = 0x7e000000;
1093 break;
1094 case OP_TXLQ:
1095 code[1] = 0x7e800000;
1096 break;
1097 case OP_TXF:
1098 code[1] = 0x78000000;
1099 break;
1100 case OP_TXG:
1101 code[1] = 0x7dc00000;
1102 break;
1103 default:
1104 code[1] = 0x7d800000;
1105 break;
1106 }
1107 } else {
1108 switch (i->op) {
1109 case OP_TXD:
1110 code[0] = 0x00000002;
1111 code[1] = 0x76000000;
1112 code[1] |= i->tex.r << 9;
1113 break;
1114 case OP_TXLQ:
1115 code[0] = 0x00000002;
1116 code[1] = 0x76800000;
1117 code[1] |= i->tex.r << 9;
1118 break;
1119 case OP_TXF:
1120 code[0] = 0x00000002;
1121 code[1] = 0x70000000;
1122 code[1] |= i->tex.r << 13;
1123 break;
1124 case OP_TXG:
1125 code[0] = 0x00000001;
1126 code[1] = 0x70000000;
1127 code[1] |= i->tex.r << 15;
1128 break;
1129 default:
1130 code[0] = 0x00000001;
1131 code[1] = 0x60000000;
1132 code[1] |= i->tex.r << 15;
1133 break;
1134 }
1135 }
1136
1137 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1138
1139 if (i->tex.liveOnly)
1140 code[0] |= 0x80000000;
1141
1142 switch (i->op) {
1143 case OP_TEX: break;
1144 case OP_TXB: code[1] |= 0x2000; break;
1145 case OP_TXL: code[1] |= 0x3000; break;
1146 case OP_TXF: break;
1147 case OP_TXG: break;
1148 case OP_TXD: break;
1149 case OP_TXLQ: break;
1150 default:
1151 assert(!"invalid texture op");
1152 break;
1153 }
1154
1155 if (i->op == OP_TXF) {
1156 if (!i->tex.levelZero)
1157 code[1] |= 0x1000;
1158 } else
1159 if (i->tex.levelZero) {
1160 code[1] |= 0x1000;
1161 }
1162
1163 if (i->op != OP_TXD && i->tex.derivAll)
1164 code[1] |= 0x200;
1165
1166 emitPredicate(i);
1167
1168 code[1] |= i->tex.mask << 2;
1169
1170 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1171
1172 defId(i->def(0), 2);
1173 srcId(i->src(0), 10);
1174 srcId(i, src1, 23);
1175
1176 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1177
1178 // texture target:
1179 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1180 if (i->tex.target.isArray())
1181 code[1] |= 0x40;
1182 if (i->tex.target.isShadow())
1183 code[1] |= 0x400;
1184 if (i->tex.target == TEX_TARGET_2D_MS ||
1185 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1186 code[1] |= 0x800;
1187
1188 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1189 // ?
1190 }
1191
1192 if (i->tex.useOffsets == 1) {
1193 switch (i->op) {
1194 case OP_TXF: code[1] |= 0x200; break;
1195 case OP_TXD: code[1] |= 0x00400000; break;
1196 default: code[1] |= 0x800; break;
1197 }
1198 }
1199 if (i->tex.useOffsets == 4)
1200 code[1] |= 0x1000;
1201 }
1202
1203 void
1204 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1205 {
1206 code[0] = 0x00000002;
1207 code[1] = 0x75400001;
1208
1209 switch (i->tex.query) {
1210 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1211 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1212 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1213 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1214 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1215 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1216 default:
1217 assert(!"invalid texture query");
1218 break;
1219 }
1220
1221 code[1] |= i->tex.mask << 2;
1222 code[1] |= i->tex.r << 9;
1223 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1224 code[1] |= 0x08000000;
1225
1226 defId(i->def(0), 2);
1227 srcId(i->src(0), 10);
1228
1229 emitPredicate(i);
1230 }
1231
1232 void
1233 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1234 {
1235 code[0] = 0x00000002 | ((qOp & 1) << 31);
1236 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1237
1238 defId(i->def(0), 2);
1239 srcId(i->src(0), 10);
1240 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1241
1242 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1243 code[1] |= 1 << 9; // dall
1244
1245 emitPredicate(i);
1246 }
1247
1248 void
1249 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1250 {
1251 emitForm_L(i, 0x7f4, 2, Modifier(0));
1252 code[1] |= i->subOp << 2;
1253 code[1] |= 0x00070000;
1254 }
1255
1256 void
1257 CodeEmitterGK110::emitBAR(const Instruction *i)
1258 {
1259 /* TODO */
1260 emitNOP(i);
1261 }
1262
1263 void
1264 CodeEmitterGK110::emitFlow(const Instruction *i)
1265 {
1266 const FlowInstruction *f = i->asFlow();
1267
1268 unsigned mask; // bit 0: predicate, bit 1: target
1269
1270 code[0] = 0x00000000;
1271
1272 switch (i->op) {
1273 case OP_BRA:
1274 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1275 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1276 code[0] |= 0x80;
1277 mask = 3;
1278 break;
1279 case OP_CALL:
1280 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1281 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1282 code[0] |= 0x80;
1283 mask = 2;
1284 break;
1285
1286 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1287 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1288 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1289 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1290 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1291
1292 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1293 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1294 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1295 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1296
1297 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1298 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1299 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1300 default:
1301 assert(!"invalid flow operation");
1302 return;
1303 }
1304
1305 if (mask & 1) {
1306 emitPredicate(i);
1307 if (i->flagsSrc < 0)
1308 code[0] |= 0x3c;
1309 }
1310
1311 if (!f)
1312 return;
1313
1314 if (f->allWarp)
1315 code[0] |= 1 << 9;
1316 if (f->limit)
1317 code[0] |= 1 << 8;
1318
1319 if (f->op == OP_CALL) {
1320 if (f->builtin) {
1321 assert(f->absolute);
1322 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1323 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1324 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1325 } else {
1326 assert(!f->absolute);
1327 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1328 code[0] |= (pcRel & 0x1ff) << 23;
1329 code[1] |= (pcRel >> 9) & 0x7fff;
1330 }
1331 } else
1332 if (mask & 2) {
1333 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1334 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1335 pcRel += 8;
1336 // currently we don't want absolute branches
1337 assert(!f->absolute);
1338 code[0] |= (pcRel & 0x1ff) << 23;
1339 code[1] |= (pcRel >> 9) & 0x7fff;
1340 }
1341 }
1342
1343 void
1344 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1345 {
1346 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1347
1348 code[0] = 0x00000002 | (offset << 23);
1349 code[1] = 0x7d000000 | (offset >> 9);
1350
1351 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1352 code[1] |= 0x8;
1353
1354 emitPredicate(i);
1355
1356 defId(i->def(0), 2);
1357 srcId(i->src(0).getIndirect(0), 10);
1358 }
1359
1360 void
1361 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1362 {
1363 uint32_t prim = i->src(0).get()->reg.data.u32;
1364
1365 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1366 code[1] = 0x7f800000;
1367
1368 emitPredicate(i);
1369
1370 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1371
1372 defId(i->def(0), 2);
1373 srcId(i, src1, 10);
1374 }
1375
1376 void
1377 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1378 {
1379 unsigned int size = typeSizeof(i->dType);
1380 uint32_t offset = i->src(0).get()->reg.data.offset;
1381
1382 code[0] = 0x00000002 | (offset << 23);
1383 code[1] = 0x7ec00000 | (offset >> 9);
1384 code[1] |= (size / 4 - 1) << 18;
1385
1386 if (i->perPatch)
1387 code[1] |= 0x4;
1388 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1389 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1390
1391 emitPredicate(i);
1392
1393 defId(i->def(0), 2);
1394 srcId(i->src(0).getIndirect(0), 10);
1395 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1396 }
1397
1398 void
1399 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1400 {
1401 unsigned int size = typeSizeof(i->dType);
1402 uint32_t offset = i->src(0).get()->reg.data.offset;
1403
1404 code[0] = 0x00000002 | (offset << 23);
1405 code[1] = 0x7f000000 | (offset >> 9);
1406 code[1] |= (size / 4 - 1) << 18;
1407
1408 if (i->perPatch)
1409 code[1] |= 0x4;
1410
1411 emitPredicate(i);
1412
1413 assert(i->src(1).getFile() == FILE_GPR);
1414
1415 srcId(i->src(0).getIndirect(0), 10);
1416 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1417 srcId(i->src(1), 2);
1418 }
1419
1420 void
1421 CodeEmitterGK110::emitOUT(const Instruction *i)
1422 {
1423 assert(i->src(0).getFile() == FILE_GPR);
1424
1425 emitForm_21(i, 0x1f0, 0xb70);
1426
1427 if (i->op == OP_EMIT)
1428 code[1] |= 1 << 10;
1429 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1430 code[1] |= 1 << 11;
1431 }
1432
1433 void
1434 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1435 {
1436 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1437 code[1] |= (i->ipa & 0xc) << (19 - 2);
1438 }
1439
1440 static void
1441 interpApply(const InterpEntry *entry, uint32_t *code,
1442 bool force_persample_interp, bool flatshade)
1443 {
1444 int ipa = entry->ipa;
1445 int reg = entry->reg;
1446 int loc = entry->loc;
1447
1448 if (flatshade &&
1449 (ipa & NV50_IR_INTERP_MODE_MASK) == NV50_IR_INTERP_SC) {
1450 ipa = NV50_IR_INTERP_FLAT;
1451 reg = 0xff;
1452 } else if (force_persample_interp &&
1453 (ipa & NV50_IR_INTERP_SAMPLE_MASK) == NV50_IR_INTERP_DEFAULT &&
1454 (ipa & NV50_IR_INTERP_MODE_MASK) != NV50_IR_INTERP_FLAT) {
1455 ipa |= NV50_IR_INTERP_CENTROID;
1456 }
1457 code[loc + 1] &= ~(0xf << 19);
1458 code[loc + 1] |= (ipa & 0x3) << 21;
1459 code[loc + 1] |= (ipa & 0xc) << (19 - 2);
1460 code[loc + 0] &= ~(0xff << 23);
1461 code[loc + 0] |= reg << 23;
1462 }
1463
1464 void
1465 CodeEmitterGK110::emitINTERP(const Instruction *i)
1466 {
1467 const uint32_t base = i->getSrc(0)->reg.data.offset;
1468
1469 code[0] = 0x00000002 | (base << 31);
1470 code[1] = 0x74800000 | (base >> 1);
1471
1472 if (i->saturate)
1473 code[1] |= 1 << 18;
1474
1475 if (i->op == OP_PINTERP) {
1476 srcId(i->src(1), 23);
1477 addInterp(i->ipa, SDATA(i->src(1)).id, interpApply);
1478 } else {
1479 code[0] |= 0xff << 23;
1480 addInterp(i->ipa, 0xff, interpApply);
1481 }
1482
1483 srcId(i->src(0).getIndirect(0), 10);
1484 emitInterpMode(i);
1485
1486 emitPredicate(i);
1487 defId(i->def(0), 2);
1488
1489 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1490 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1491 else
1492 code[1] |= 0xff << 10;
1493 }
1494
1495 void
1496 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1497 {
1498 uint8_t n;
1499
1500 switch (ty) {
1501 case TYPE_U8:
1502 n = 0;
1503 break;
1504 case TYPE_S8:
1505 n = 1;
1506 break;
1507 case TYPE_U16:
1508 n = 2;
1509 break;
1510 case TYPE_S16:
1511 n = 3;
1512 break;
1513 case TYPE_F32:
1514 case TYPE_U32:
1515 case TYPE_S32:
1516 n = 4;
1517 break;
1518 case TYPE_F64:
1519 case TYPE_U64:
1520 case TYPE_S64:
1521 n = 5;
1522 break;
1523 case TYPE_B128:
1524 n = 6;
1525 break;
1526 default:
1527 n = 0;
1528 assert(!"invalid ld/st type");
1529 break;
1530 }
1531 code[pos / 32] |= n << (pos % 32);
1532 }
1533
1534 void
1535 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1536 {
1537 uint8_t n;
1538
1539 switch (c) {
1540 case CACHE_CA:
1541 // case CACHE_WB:
1542 n = 0;
1543 break;
1544 case CACHE_CG:
1545 n = 1;
1546 break;
1547 case CACHE_CS:
1548 n = 2;
1549 break;
1550 case CACHE_CV:
1551 // case CACHE_WT:
1552 n = 3;
1553 break;
1554 default:
1555 n = 0;
1556 assert(!"invalid caching mode");
1557 break;
1558 }
1559 code[pos / 32] |= n << (pos % 32);
1560 }
1561
1562 void
1563 CodeEmitterGK110::emitSTORE(const Instruction *i)
1564 {
1565 int32_t offset = SDATA(i->src(0)).offset;
1566
1567 switch (i->src(0).getFile()) {
1568 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1569 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1570 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1571 default:
1572 assert(!"invalid memory file");
1573 break;
1574 }
1575
1576 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1577 offset &= 0xffffff;
1578
1579 if (code[0] & 0x2) {
1580 emitLoadStoreType(i->dType, 0x33);
1581 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1582 emitCachingMode(i->cache, 0x2f);
1583 } else {
1584 emitLoadStoreType(i->dType, 0x38);
1585 emitCachingMode(i->cache, 0x3b);
1586 }
1587 code[0] |= offset << 23;
1588 code[1] |= offset >> 9;
1589
1590 emitPredicate(i);
1591
1592 srcId(i->src(1), 2);
1593 srcId(i->src(0).getIndirect(0), 10);
1594 }
1595
1596 void
1597 CodeEmitterGK110::emitLOAD(const Instruction *i)
1598 {
1599 int32_t offset = SDATA(i->src(0)).offset;
1600
1601 switch (i->src(0).getFile()) {
1602 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1603 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1604 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1605 case FILE_MEMORY_CONST:
1606 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1607 emitMOV(i);
1608 return;
1609 }
1610 offset &= 0xffff;
1611 code[0] = 0x00000002;
1612 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1613 code[1] |= i->subOp << 15;
1614 break;
1615 default:
1616 assert(!"invalid memory file");
1617 break;
1618 }
1619
1620 if (code[0] & 0x2) {
1621 offset &= 0xffffff;
1622 emitLoadStoreType(i->dType, 0x33);
1623 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1624 emitCachingMode(i->cache, 0x2f);
1625 } else {
1626 emitLoadStoreType(i->dType, 0x38);
1627 emitCachingMode(i->cache, 0x3b);
1628 }
1629 code[0] |= offset << 23;
1630 code[1] |= offset >> 9;
1631
1632 emitPredicate(i);
1633
1634 defId(i->def(0), 2);
1635 srcId(i->src(0).getIndirect(0), 10);
1636 }
1637
1638 uint8_t
1639 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1640 {
1641 switch (SDATA(ref).sv.sv) {
1642 case SV_LANEID: return 0x00;
1643 case SV_PHYSID: return 0x03;
1644 case SV_VERTEX_COUNT: return 0x10;
1645 case SV_INVOCATION_ID: return 0x11;
1646 case SV_YDIR: return 0x12;
1647 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1648 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1649 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1650 case SV_GRIDID: return 0x2c;
1651 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1652 case SV_LBASE: return 0x34;
1653 case SV_SBASE: return 0x30;
1654 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1655 default:
1656 assert(!"no sreg for system value");
1657 return 0;
1658 }
1659 }
1660
1661 void
1662 CodeEmitterGK110::emitMOV(const Instruction *i)
1663 {
1664 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1665 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1666 code[1] = 0x86400000;
1667 emitPredicate(i);
1668 defId(i->def(0), 2);
1669 } else
1670 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1671 code[0] = 0x00000002 | (i->lanes << 14);
1672 code[1] = 0x74000000;
1673 emitPredicate(i);
1674 defId(i->def(0), 2);
1675 setImmediate32(i, 0, Modifier(0));
1676 } else
1677 if (i->src(0).getFile() == FILE_PREDICATE) {
1678 code[0] = 0x00000002;
1679 code[1] = 0x84401c07;
1680 emitPredicate(i);
1681 defId(i->def(0), 2);
1682 srcId(i->src(0), 14);
1683 } else {
1684 emitForm_C(i, 0x24c, 2);
1685 code[1] |= i->lanes << 10;
1686 }
1687 }
1688
1689 bool
1690 CodeEmitterGK110::emitInstruction(Instruction *insn)
1691 {
1692 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1693
1694 if (insn->encSize != 8) {
1695 ERROR("skipping unencodable instruction: ");
1696 insn->print();
1697 return false;
1698 } else
1699 if (codeSize + size > codeSizeLimit) {
1700 ERROR("code emitter output buffer too small\n");
1701 return false;
1702 }
1703
1704 if (writeIssueDelays) {
1705 int id = (codeSize & 0x3f) / 8 - 1;
1706 if (id < 0) {
1707 id += 1;
1708 code[0] = 0x00000000; // cf issue delay "instruction"
1709 code[1] = 0x08000000;
1710 code += 2;
1711 codeSize += 8;
1712 }
1713 uint32_t *data = code - (id * 2 + 2);
1714
1715 switch (id) {
1716 case 0: data[0] |= insn->sched << 2; break;
1717 case 1: data[0] |= insn->sched << 10; break;
1718 case 2: data[0] |= insn->sched << 18; break;
1719 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1720 case 4: data[1] |= insn->sched << 2; break;
1721 case 5: data[1] |= insn->sched << 10; break;
1722 case 6: data[1] |= insn->sched << 18; break;
1723 default:
1724 assert(0);
1725 break;
1726 }
1727 }
1728
1729 // assert that instructions with multiple defs don't corrupt registers
1730 for (int d = 0; insn->defExists(d); ++d)
1731 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1732
1733 switch (insn->op) {
1734 case OP_MOV:
1735 case OP_RDSV:
1736 emitMOV(insn);
1737 break;
1738 case OP_NOP:
1739 break;
1740 case OP_LOAD:
1741 emitLOAD(insn);
1742 break;
1743 case OP_STORE:
1744 emitSTORE(insn);
1745 break;
1746 case OP_LINTERP:
1747 case OP_PINTERP:
1748 emitINTERP(insn);
1749 break;
1750 case OP_VFETCH:
1751 emitVFETCH(insn);
1752 break;
1753 case OP_EXPORT:
1754 emitEXPORT(insn);
1755 break;
1756 case OP_AFETCH:
1757 emitAFETCH(insn);
1758 break;
1759 case OP_PFETCH:
1760 emitPFETCH(insn);
1761 break;
1762 case OP_EMIT:
1763 case OP_RESTART:
1764 emitOUT(insn);
1765 break;
1766 case OP_ADD:
1767 case OP_SUB:
1768 if (insn->dType == TYPE_F64)
1769 emitDADD(insn);
1770 else if (isFloatType(insn->dType))
1771 emitFADD(insn);
1772 else
1773 emitUADD(insn);
1774 break;
1775 case OP_MUL:
1776 if (insn->dType == TYPE_F64)
1777 emitDMUL(insn);
1778 else if (isFloatType(insn->dType))
1779 emitFMUL(insn);
1780 else
1781 emitIMUL(insn);
1782 break;
1783 case OP_MAD:
1784 case OP_FMA:
1785 if (insn->dType == TYPE_F64)
1786 emitDMAD(insn);
1787 else if (isFloatType(insn->dType))
1788 emitFMAD(insn);
1789 else
1790 emitIMAD(insn);
1791 break;
1792 case OP_SAD:
1793 emitISAD(insn);
1794 break;
1795 case OP_NOT:
1796 emitNOT(insn);
1797 break;
1798 case OP_AND:
1799 emitLogicOp(insn, 0);
1800 break;
1801 case OP_OR:
1802 emitLogicOp(insn, 1);
1803 break;
1804 case OP_XOR:
1805 emitLogicOp(insn, 2);
1806 break;
1807 case OP_SHL:
1808 case OP_SHR:
1809 emitShift(insn);
1810 break;
1811 case OP_SET:
1812 case OP_SET_AND:
1813 case OP_SET_OR:
1814 case OP_SET_XOR:
1815 emitSET(insn->asCmp());
1816 break;
1817 case OP_SELP:
1818 emitSELP(insn);
1819 break;
1820 case OP_SLCT:
1821 emitSLCT(insn->asCmp());
1822 break;
1823 case OP_MIN:
1824 case OP_MAX:
1825 emitMINMAX(insn);
1826 break;
1827 case OP_ABS:
1828 case OP_NEG:
1829 case OP_CEIL:
1830 case OP_FLOOR:
1831 case OP_TRUNC:
1832 case OP_CVT:
1833 case OP_SAT:
1834 emitCVT(insn);
1835 break;
1836 case OP_RSQ:
1837 emitSFnOp(insn, 5 + 2 * insn->subOp);
1838 break;
1839 case OP_RCP:
1840 emitSFnOp(insn, 4 + 2 * insn->subOp);
1841 break;
1842 case OP_LG2:
1843 emitSFnOp(insn, 3);
1844 break;
1845 case OP_EX2:
1846 emitSFnOp(insn, 2);
1847 break;
1848 case OP_SIN:
1849 emitSFnOp(insn, 1);
1850 break;
1851 case OP_COS:
1852 emitSFnOp(insn, 0);
1853 break;
1854 case OP_PRESIN:
1855 case OP_PREEX2:
1856 emitPreOp(insn);
1857 break;
1858 case OP_TEX:
1859 case OP_TXB:
1860 case OP_TXL:
1861 case OP_TXD:
1862 case OP_TXF:
1863 case OP_TXG:
1864 case OP_TXLQ:
1865 emitTEX(insn->asTex());
1866 break;
1867 case OP_TXQ:
1868 emitTXQ(insn->asTex());
1869 break;
1870 case OP_TEXBAR:
1871 emitTEXBAR(insn);
1872 break;
1873 case OP_PIXLD:
1874 emitPIXLD(insn);
1875 break;
1876 case OP_BRA:
1877 case OP_CALL:
1878 case OP_PRERET:
1879 case OP_RET:
1880 case OP_DISCARD:
1881 case OP_EXIT:
1882 case OP_PRECONT:
1883 case OP_CONT:
1884 case OP_PREBREAK:
1885 case OP_BREAK:
1886 case OP_JOINAT:
1887 case OP_BRKPT:
1888 case OP_QUADON:
1889 case OP_QUADPOP:
1890 emitFlow(insn);
1891 break;
1892 case OP_QUADOP:
1893 emitQUADOP(insn, insn->subOp, insn->lanes);
1894 break;
1895 case OP_DFDX:
1896 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1897 break;
1898 case OP_DFDY:
1899 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1900 break;
1901 case OP_POPCNT:
1902 emitPOPC(insn);
1903 break;
1904 case OP_INSBF:
1905 emitINSBF(insn);
1906 break;
1907 case OP_EXTBF:
1908 emitEXTBF(insn);
1909 break;
1910 case OP_BFIND:
1911 emitBFIND(insn);
1912 break;
1913 case OP_JOIN:
1914 emitNOP(insn);
1915 insn->join = 1;
1916 break;
1917 case OP_BAR:
1918 emitBAR(insn);
1919 break;
1920 case OP_PHI:
1921 case OP_UNION:
1922 case OP_CONSTRAINT:
1923 ERROR("operation should have been eliminated");
1924 return false;
1925 case OP_EXP:
1926 case OP_LOG:
1927 case OP_SQRT:
1928 case OP_POW:
1929 ERROR("operation should have been lowered\n");
1930 return false;
1931 default:
1932 ERROR("unknow op\n");
1933 return false;
1934 }
1935
1936 if (insn->join)
1937 code[0] |= 1 << 22;
1938
1939 code += 2;
1940 codeSize += 8;
1941 return true;
1942 }
1943
1944 uint32_t
1945 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1946 {
1947 // No more short instruction encodings.
1948 return 8;
1949 }
1950
1951 void
1952 CodeEmitterGK110::prepareEmission(Function *func)
1953 {
1954 const Target *targ = func->getProgram()->getTarget();
1955
1956 CodeEmitter::prepareEmission(func);
1957
1958 if (targ->hasSWSched)
1959 calculateSchedDataNVC0(targ, func);
1960 }
1961
1962 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1963 : CodeEmitter(target),
1964 targNVC0(target),
1965 writeIssueDelays(target->hasSWSched)
1966 {
1967 code = NULL;
1968 codeSize = codeSizeLimit = 0;
1969 relocInfo = NULL;
1970 }
1971
1972 CodeEmitter *
1973 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1974 {
1975 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1976 emit->setProgramType(type);
1977 return emit;
1978 }
1979
1980 } // namespace nv50_ir