f06056f8f17e707a1eb4483e5474f72d0c0a97c0
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitAFETCH(const Instruction *);
81 void emitPFETCH(const Instruction *);
82 void emitVFETCH(const Instruction *);
83 void emitEXPORT(const Instruction *);
84 void emitOUT(const Instruction *);
85
86 void emitUADD(const Instruction *);
87 void emitFADD(const Instruction *);
88 void emitDADD(const Instruction *);
89 void emitIMUL(const Instruction *);
90 void emitFMUL(const Instruction *);
91 void emitDMUL(const Instruction *);
92 void emitIMAD(const Instruction *);
93 void emitISAD(const Instruction *);
94 void emitFMAD(const Instruction *);
95 void emitDMAD(const Instruction *);
96
97 void emitNOT(const Instruction *);
98 void emitLogicOp(const Instruction *, uint8_t subOp);
99 void emitPOPC(const Instruction *);
100 void emitINSBF(const Instruction *);
101 void emitEXTBF(const Instruction *);
102 void emitBFIND(const Instruction *);
103 void emitShift(const Instruction *);
104
105 void emitSFnOp(const Instruction *, uint8_t subOp);
106
107 void emitCVT(const Instruction *);
108 void emitMINMAX(const Instruction *);
109 void emitPreOp(const Instruction *);
110
111 void emitSET(const CmpInstruction *);
112 void emitSLCT(const CmpInstruction *);
113 void emitSELP(const Instruction *);
114
115 void emitTEXBAR(const Instruction *);
116 void emitTEX(const TexInstruction *);
117 void emitTEXCSAA(const TexInstruction *);
118 void emitTXQ(const TexInstruction *);
119
120 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
121
122 void emitPIXLD(const Instruction *);
123
124 void emitBAR(const Instruction *);
125
126 void emitFlow(const Instruction *);
127
128 inline void defId(const ValueDef&, const int pos);
129 inline void srcId(const ValueRef&, const int pos);
130 inline void srcId(const ValueRef *, const int pos);
131 inline void srcId(const Instruction *, int s, const int pos);
132
133 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
134
135 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
136 };
137
138 #define GK110_GPR_ZERO 255
139
140 #define NEG_(b, s) \
141 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
142 #define ABS_(b, s) \
143 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
144
145 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
146 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
147
148 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
149 #define DNZ_(b) if (i->dnz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
150
151 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
152
153 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
154
155 #define SDATA(a) ((a).rep()->reg.data)
156 #define DDATA(a) ((a).rep()->reg.data)
157
158 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
159 {
160 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
164 {
165 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
169 {
170 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
171 code[pos / 32] |= r << (pos % 32);
172 }
173
174 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
175 {
176 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
177 }
178
179 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
180 {
181 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
182 }
183
184 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
185 {
186 const ImmediateValue *imm = ref.get()->asImm();
187
188 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
189 }
190
191 void
192 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
193 {
194 bool rint = false;
195 uint8_t n;
196
197 switch (rnd) {
198 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
199 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
200 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
201 default:
202 rint = rnd == ROUND_NI;
203 n = 0;
204 assert(rnd == ROUND_N || rnd == ROUND_NI);
205 break;
206 }
207 code[pos / 32] |= n << (pos % 32);
208 if (rint && rintPos >= 0)
209 code[rintPos / 32] |= 1 << (rintPos % 32);
210 }
211
212 void
213 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
214 {
215 uint8_t n;
216
217 switch (rnd) {
218 case ROUND_M: n = 1; break;
219 case ROUND_P: n = 2; break;
220 case ROUND_Z: n = 3; break;
221 default:
222 n = 0;
223 assert(rnd == ROUND_N);
224 break;
225 }
226 code[pos / 32] |= n << (pos % 32);
227 }
228
229 void
230 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
231 {
232 uint8_t n;
233
234 switch (rnd) {
235 case ROUND_MI: n = 1; break;
236 case ROUND_PI: n = 2; break;
237 case ROUND_ZI: n = 3; break;
238 default:
239 n = 0;
240 assert(rnd == ROUND_NI);
241 break;
242 }
243 code[pos / 32] |= n << (pos % 32);
244 }
245
246 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
247 {
248 uint8_t n;
249
250 switch (cc) {
251 case CC_FL: n = 0x00; break;
252 case CC_LT: n = 0x01; break;
253 case CC_EQ: n = 0x02; break;
254 case CC_LE: n = 0x03; break;
255 case CC_GT: n = 0x04; break;
256 case CC_NE: n = 0x05; break;
257 case CC_GE: n = 0x06; break;
258 case CC_LTU: n = 0x09; break;
259 case CC_EQU: n = 0x0a; break;
260 case CC_LEU: n = 0x0b; break;
261 case CC_GTU: n = 0x0c; break;
262 case CC_NEU: n = 0x0d; break;
263 case CC_GEU: n = 0x0e; break;
264 case CC_TR: n = 0x0f; break;
265 case CC_NO: n = 0x10; break;
266 case CC_NC: n = 0x11; break;
267 case CC_NS: n = 0x12; break;
268 case CC_NA: n = 0x13; break;
269 case CC_A: n = 0x14; break;
270 case CC_S: n = 0x15; break;
271 case CC_C: n = 0x16; break;
272 case CC_O: n = 0x17; break;
273 default:
274 n = 0;
275 assert(!"invalid condition code");
276 break;
277 }
278 code[pos / 32] |= (n & mask) << (pos % 32);
279 }
280
281 void
282 CodeEmitterGK110::emitPredicate(const Instruction *i)
283 {
284 if (i->predSrc >= 0) {
285 srcId(i->src(i->predSrc), 18);
286 if (i->cc == CC_NOT_P)
287 code[0] |= 8 << 18; // negate
288 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
289 } else {
290 code[0] |= 7 << 18;
291 }
292 }
293
294 void
295 CodeEmitterGK110::setCAddress14(const ValueRef& src)
296 {
297 const Storage& res = src.get()->asSym()->reg;
298 const int32_t addr = res.data.offset / 4;
299
300 code[0] |= (addr & 0x01ff) << 23;
301 code[1] |= (addr & 0x3e00) >> 9;
302 code[1] |= res.fileIndex << 5;
303 }
304
305 void
306 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
307 {
308 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
309 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
310
311 if (i->sType == TYPE_F32) {
312 assert(!(u32 & 0x00000fff));
313 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
314 code[1] |= ((u32 & 0x7fe00000) >> 21);
315 code[1] |= ((u32 & 0x80000000) >> 4);
316 } else
317 if (i->sType == TYPE_F64) {
318 assert(!(u64 & 0x00000fffffffffffULL));
319 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
320 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
321 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
322 } else {
323 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
324 code[0] |= (u32 & 0x001ff) << 23;
325 code[1] |= (u32 & 0x7fe00) >> 9;
326 code[1] |= (u32 & 0x80000) << 8;
327 }
328 }
329
330 void
331 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
332 Modifier mod)
333 {
334 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
335
336 if (mod) {
337 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
338 mod.applyTo(imm);
339 u32 = imm.reg.data.u32;
340 }
341
342 code[0] |= u32 << 23;
343 code[1] |= u32 >> 9;
344 }
345
346 void
347 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
348 Modifier mod)
349 {
350 code[0] = ctg;
351 code[1] = opc << 20;
352
353 emitPredicate(i);
354
355 defId(i->def(0), 2);
356
357 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
358 switch (i->src(s).getFile()) {
359 case FILE_GPR:
360 srcId(i->src(s), s ? 42 : 10);
361 break;
362 case FILE_IMMEDIATE:
363 setImmediate32(i, s, mod);
364 break;
365 default:
366 break;
367 }
368 }
369 }
370
371
372 void
373 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
374 {
375 code[0] = ctg;
376 code[1] = opc << 20;
377
378 emitPredicate(i);
379
380 defId(i->def(0), 2);
381
382 switch (i->src(0).getFile()) {
383 case FILE_MEMORY_CONST:
384 code[1] |= 0x4 << 28;
385 setCAddress14(i->src(0));
386 break;
387 case FILE_GPR:
388 code[1] |= 0xc << 28;
389 srcId(i->src(0), 23);
390 break;
391 default:
392 assert(0);
393 break;
394 }
395 }
396
397 // 0x2 for GPR, c[] and 0x1 for short immediate
398 void
399 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
400 uint32_t opc1)
401 {
402 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
403
404 int s1 = 23;
405 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
406 s1 = 42;
407
408 if (imm) {
409 code[0] = 0x1;
410 code[1] = opc1 << 20;
411 } else {
412 code[0] = 0x2;
413 code[1] = (0xc << 28) | (opc2 << 20);
414 }
415
416 emitPredicate(i);
417
418 defId(i->def(0), 2);
419
420 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
421 switch (i->src(s).getFile()) {
422 case FILE_MEMORY_CONST:
423 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
424 setCAddress14(i->src(s));
425 break;
426 case FILE_IMMEDIATE:
427 setShortImmediate(i, s);
428 break;
429 case FILE_GPR:
430 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
431 break;
432 default:
433 // ignore here, can be predicate or flags, but must not be address
434 break;
435 }
436 }
437 // 0x0 = invalid
438 // 0xc = rrr
439 // 0x8 = rrc
440 // 0x4 = rcr
441 assert(imm || (code[1] & (0xc << 28)));
442 }
443
444 inline void
445 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
446 {
447 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
448 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
449 }
450
451 void
452 CodeEmitterGK110::emitNOP(const Instruction *i)
453 {
454 code[0] = 0x00003c02;
455 code[1] = 0x85800000;
456
457 if (i)
458 emitPredicate(i);
459 else
460 code[0] = 0x001c3c02;
461 }
462
463 void
464 CodeEmitterGK110::emitFMAD(const Instruction *i)
465 {
466 assert(!isLIMM(i->src(1), TYPE_F32));
467
468 emitForm_21(i, 0x0c0, 0x940);
469
470 NEG_(34, 2);
471 SAT_(35);
472 RND_(36, F);
473 FTZ_(38);
474 DNZ_(39);
475
476 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
477
478 if (code[0] & 0x1) {
479 if (neg1)
480 code[1] ^= 1 << 27;
481 } else
482 if (neg1) {
483 code[1] |= 1 << 19;
484 }
485 }
486
487 void
488 CodeEmitterGK110::emitDMAD(const Instruction *i)
489 {
490 assert(!i->saturate);
491 assert(!i->ftz);
492
493 emitForm_21(i, 0x1b8, 0xb38);
494
495 NEG_(34, 2);
496 RND_(36, F);
497
498 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
499
500 if (code[0] & 0x1) {
501 if (neg1)
502 code[1] ^= 1 << 27;
503 } else
504 if (neg1) {
505 code[1] |= 1 << 19;
506 }
507 }
508
509 void
510 CodeEmitterGK110::emitFMUL(const Instruction *i)
511 {
512 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
513
514 assert(i->postFactor >= -3 && i->postFactor <= 3);
515
516 if (isLIMM(i->src(1), TYPE_F32)) {
517 emitForm_L(i, 0x200, 0x2, Modifier(0));
518
519 FTZ_(38);
520 DNZ_(39);
521 SAT_(3a);
522 if (neg)
523 code[1] ^= 1 << 22;
524
525 assert(i->postFactor == 0);
526 } else {
527 emitForm_21(i, 0x234, 0xc34);
528 code[1] |= ((i->postFactor > 0) ?
529 (7 - i->postFactor) : (0 - i->postFactor)) << 12;
530
531 RND_(2a, F);
532 FTZ_(2f);
533 DNZ_(30);
534 SAT_(35);
535
536 if (code[0] & 0x1) {
537 if (neg)
538 code[1] ^= 1 << 27;
539 } else
540 if (neg) {
541 code[1] |= 1 << 19;
542 }
543 }
544 }
545
546 void
547 CodeEmitterGK110::emitDMUL(const Instruction *i)
548 {
549 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
550
551 assert(!i->postFactor);
552 assert(!i->saturate);
553 assert(!i->ftz);
554 assert(!i->dnz);
555
556 emitForm_21(i, 0x240, 0xc40);
557
558 RND_(2a, F);
559
560 if (code[0] & 0x1) {
561 if (neg)
562 code[1] ^= 1 << 27;
563 } else
564 if (neg) {
565 code[1] |= 1 << 19;
566 }
567 }
568
569 void
570 CodeEmitterGK110::emitIMUL(const Instruction *i)
571 {
572 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
573 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
574
575 if (isLIMM(i->src(1), TYPE_S32)) {
576 emitForm_L(i, 0x280, 2, Modifier(0));
577
578 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
579
580 if (i->sType == TYPE_S32)
581 code[1] |= 3 << 25;
582 } else {
583 emitForm_21(i, 0x21c, 0xc1c);
584
585 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
586 code[1] |= 1 << 10;
587 if (i->sType == TYPE_S32)
588 code[1] |= 3 << 11;
589 }
590 }
591
592 void
593 CodeEmitterGK110::emitFADD(const Instruction *i)
594 {
595 if (isLIMM(i->src(1), TYPE_F32)) {
596 assert(i->rnd == ROUND_N);
597 assert(!i->saturate);
598
599 Modifier mod = i->src(1).mod ^
600 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
601
602 emitForm_L(i, 0x400, 0, mod);
603
604 FTZ_(3a);
605 NEG_(3b, 0);
606 ABS_(39, 0);
607 } else {
608 emitForm_21(i, 0x22c, 0xc2c);
609
610 FTZ_(2f);
611 RND_(2a, F);
612 ABS_(31, 0);
613 NEG_(33, 0);
614 SAT_(35);
615
616 if (code[0] & 0x1) {
617 modNegAbsF32_3b(i, 1);
618 if (i->op == OP_SUB) code[1] ^= 1 << 27;
619 } else {
620 ABS_(34, 1);
621 NEG_(30, 1);
622 if (i->op == OP_SUB) code[1] ^= 1 << 16;
623 }
624 }
625 }
626
627 void
628 CodeEmitterGK110::emitDADD(const Instruction *i)
629 {
630 assert(!i->saturate);
631 assert(!i->ftz);
632
633 emitForm_21(i, 0x238, 0xc38);
634 RND_(2a, F);
635 ABS_(31, 0);
636 NEG_(33, 0);
637 if (code[0] & 0x1) {
638 modNegAbsF32_3b(i, 1);
639 if (i->op == OP_SUB) code[1] ^= 1 << 27;
640 } else {
641 NEG_(30, 1);
642 ABS_(34, 1);
643 if (i->op == OP_SUB) code[1] ^= 1 << 16;
644 }
645 }
646
647 void
648 CodeEmitterGK110::emitUADD(const Instruction *i)
649 {
650 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
651
652 if (i->op == OP_SUB)
653 addOp ^= 1;
654
655 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
656
657 if (isLIMM(i->src(1), TYPE_S32)) {
658 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
659
660 if (addOp & 2)
661 code[1] |= 1 << 27;
662
663 assert(!i->defExists(1));
664 assert(i->flagsSrc < 0);
665
666 SAT_(39);
667 } else {
668 emitForm_21(i, 0x208, 0xc08);
669
670 assert(addOp != 3); // would be add-plus-one
671
672 code[1] |= addOp << 19;
673
674 if (i->defExists(1))
675 code[1] |= 1 << 18; // write carry
676 if (i->flagsSrc >= 0)
677 code[1] |= 1 << 14; // add carry
678
679 SAT_(35);
680 }
681 }
682
683 // TODO: shl-add
684 void
685 CodeEmitterGK110::emitIMAD(const Instruction *i)
686 {
687 uint8_t addOp =
688 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
689
690 emitForm_21(i, 0x100, 0xa00);
691
692 assert(addOp != 3);
693 code[1] |= addOp << 26;
694
695 if (i->sType == TYPE_S32)
696 code[1] |= (1 << 19) | (1 << 24);
697
698 if (code[0] & 0x1) {
699 assert(!i->subOp);
700 SAT_(39);
701 } else {
702 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
703 code[1] |= 1 << 25;
704 SAT_(35);
705 }
706 }
707
708 void
709 CodeEmitterGK110::emitISAD(const Instruction *i)
710 {
711 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
712
713 emitForm_21(i, 0x1f4, 0xb74);
714
715 if (i->dType == TYPE_S32)
716 code[1] |= 1 << 19;
717 }
718
719 void
720 CodeEmitterGK110::emitNOT(const Instruction *i)
721 {
722 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
723 code[1] = 0x22003800;
724
725 emitPredicate(i);
726
727 defId(i->def(0), 2);
728
729 switch (i->src(0).getFile()) {
730 case FILE_GPR:
731 code[1] |= 0xc << 28;
732 srcId(i->src(0), 23);
733 break;
734 case FILE_MEMORY_CONST:
735 code[1] |= 0x4 << 28;
736 setCAddress14(i->src(1));
737 break;
738 default:
739 assert(0);
740 break;
741 }
742 }
743
744 void
745 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
746 {
747 if (isLIMM(i->src(1), TYPE_S32)) {
748 emitForm_L(i, 0x200, 0, i->src(1).mod);
749 code[1] |= subOp << 24;
750 NOT_(3a, 0);
751 } else {
752 emitForm_21(i, 0x220, 0xc20);
753 code[1] |= subOp << 12;
754 NOT_(2a, 0);
755 NOT_(2b, 1);
756 }
757 }
758
759 void
760 CodeEmitterGK110::emitPOPC(const Instruction *i)
761 {
762 assert(!isLIMM(i->src(1), TYPE_S32, true));
763
764 emitForm_21(i, 0x204, 0xc04);
765
766 NOT_(2a, 0);
767 if (!(code[0] & 0x1))
768 NOT_(2b, 1);
769 }
770
771 void
772 CodeEmitterGK110::emitINSBF(const Instruction *i)
773 {
774 emitForm_21(i, 0x1f8, 0xb78);
775 }
776
777 void
778 CodeEmitterGK110::emitEXTBF(const Instruction *i)
779 {
780 emitForm_21(i, 0x600, 0xc00);
781
782 if (i->dType == TYPE_S32)
783 code[1] |= 0x80000;
784 if (i->subOp == NV50_IR_SUBOP_EXTBF_REV)
785 code[1] |= 0x800;
786 }
787
788 void
789 CodeEmitterGK110::emitBFIND(const Instruction *i)
790 {
791 emitForm_C(i, 0x218, 0x2);
792
793 if (i->dType == TYPE_S32)
794 code[1] |= 0x80000;
795 if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
796 code[1] |= 0x800;
797 if (i->subOp == NV50_IR_SUBOP_BFIND_SAMT)
798 code[1] |= 0x1000;
799 }
800
801 void
802 CodeEmitterGK110::emitShift(const Instruction *i)
803 {
804 if (i->op == OP_SHR) {
805 emitForm_21(i, 0x214, 0xc14);
806 if (isSignedType(i->dType))
807 code[1] |= 1 << 19;
808 } else {
809 emitForm_21(i, 0x224, 0xc24);
810 }
811
812 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
813 code[1] |= 1 << 10;
814 }
815
816 void
817 CodeEmitterGK110::emitPreOp(const Instruction *i)
818 {
819 emitForm_C(i, 0x248, 0x2);
820
821 if (i->op == OP_PREEX2)
822 code[1] |= 1 << 10;
823
824 NEG_(30, 0);
825 ABS_(34, 0);
826 }
827
828 void
829 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
830 {
831 code[0] = 0x00000002 | (subOp << 23);
832 code[1] = 0x84000000;
833
834 emitPredicate(i);
835
836 defId(i->def(0), 2);
837 srcId(i->src(0), 10);
838
839 NEG_(33, 0);
840 ABS_(31, 0);
841 SAT_(35);
842 }
843
844 void
845 CodeEmitterGK110::emitMINMAX(const Instruction *i)
846 {
847 uint32_t op2, op1;
848
849 switch (i->dType) {
850 case TYPE_U32:
851 case TYPE_S32:
852 op2 = 0x210;
853 op1 = 0xc10;
854 break;
855 case TYPE_F32:
856 op2 = 0x230;
857 op1 = 0xc30;
858 break;
859 case TYPE_F64:
860 op2 = 0x228;
861 op1 = 0xc28;
862 break;
863 default:
864 assert(0);
865 op2 = 0;
866 op1 = 0;
867 break;
868 }
869 emitForm_21(i, op2, op1);
870
871 if (i->dType == TYPE_S32)
872 code[1] |= 1 << 19;
873 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
874
875 FTZ_(2f);
876 ABS_(31, 0);
877 NEG_(33, 0);
878 if (code[0] & 0x1) {
879 modNegAbsF32_3b(i, 1);
880 } else {
881 ABS_(34, 1);
882 NEG_(30, 1);
883 }
884 }
885
886 void
887 CodeEmitterGK110::emitCVT(const Instruction *i)
888 {
889 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
890 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
891 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
892
893 bool sat = i->saturate;
894 bool abs = i->src(0).mod.abs();
895 bool neg = i->src(0).mod.neg();
896
897 RoundMode rnd = i->rnd;
898
899 switch (i->op) {
900 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
901 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
902 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
903 case OP_SAT: sat = true; break;
904 case OP_NEG: neg = !neg; break;
905 case OP_ABS: abs = true; neg = false; break;
906 default:
907 break;
908 }
909
910 DataType dType;
911
912 if (i->op == OP_NEG && i->dType == TYPE_U32)
913 dType = TYPE_S32;
914 else
915 dType = i->dType;
916
917
918 uint32_t op;
919
920 if (f2f) op = 0x254;
921 else if (f2i) op = 0x258;
922 else if (i2f) op = 0x25c;
923 else op = 0x260;
924
925 emitForm_C(i, op, 0x2);
926
927 FTZ_(2f);
928 if (neg) code[1] |= 1 << 16;
929 if (abs) code[1] |= 1 << 20;
930 if (sat) code[1] |= 1 << 21;
931
932 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
933
934 code[0] |= typeSizeofLog2(dType) << 10;
935 code[0] |= typeSizeofLog2(i->sType) << 12;
936
937 if (isSignedIntType(dType))
938 code[0] |= 0x4000;
939 if (isSignedIntType(i->sType))
940 code[0] |= 0x8000;
941 }
942
943 void
944 CodeEmitterGK110::emitSET(const CmpInstruction *i)
945 {
946 uint16_t op1, op2;
947
948 if (i->def(0).getFile() == FILE_PREDICATE) {
949 switch (i->sType) {
950 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
951 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
952 default:
953 op2 = 0x1b0;
954 op1 = 0xb30;
955 break;
956 }
957 emitForm_21(i, op2, op1);
958
959 NEG_(2e, 0);
960 ABS_(9, 0);
961 if (!(code[0] & 0x1)) {
962 NEG_(8, 1);
963 ABS_(2f, 1);
964 } else {
965 modNegAbsF32_3b(i, 1);
966 }
967 FTZ_(32);
968
969 // normal DST field is negated predicate result
970 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
971 if (i->defExists(1))
972 defId(i->def(1), 2);
973 else
974 code[0] |= 0x1c;
975 } else {
976 switch (i->sType) {
977 case TYPE_F32: op2 = 0x000; op1 = 0x800; break;
978 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
979 default:
980 op2 = 0x1a8;
981 op1 = 0xb28;
982 break;
983 }
984 emitForm_21(i, op2, op1);
985
986 NEG_(2e, 0);
987 ABS_(39, 0);
988 if (!(code[0] & 0x1)) {
989 NEG_(38, 1);
990 ABS_(2f, 1);
991 } else {
992 modNegAbsF32_3b(i, 1);
993 }
994 FTZ_(3a);
995
996 if (i->dType == TYPE_F32) {
997 if (isFloatType(i->sType))
998 code[1] |= 1 << 23;
999 else
1000 code[1] |= 1 << 15;
1001 }
1002 }
1003 if (i->sType == TYPE_S32)
1004 code[1] |= 1 << 19;
1005
1006 if (i->op != OP_SET) {
1007 switch (i->op) {
1008 case OP_SET_AND: code[1] |= 0x0 << 16; break;
1009 case OP_SET_OR: code[1] |= 0x1 << 16; break;
1010 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
1011 default:
1012 assert(0);
1013 break;
1014 }
1015 srcId(i->src(2), 0x2a);
1016 } else {
1017 code[1] |= 0x7 << 10;
1018 }
1019 emitCondCode(i->setCond,
1020 isFloatType(i->sType) ? 0x33 : 0x34,
1021 isFloatType(i->sType) ? 0xf : 0x7);
1022 }
1023
1024 void
1025 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
1026 {
1027 CondCode cc = i->setCond;
1028 if (i->src(2).mod.neg())
1029 cc = reverseCondCode(cc);
1030
1031 if (i->dType == TYPE_F32) {
1032 emitForm_21(i, 0x1d0, 0xb50);
1033 FTZ_(32);
1034 emitCondCode(cc, 0x33, 0xf);
1035 } else {
1036 emitForm_21(i, 0x1a0, 0xb20);
1037 emitCondCode(cc, 0x34, 0x7);
1038 }
1039 }
1040
1041 void CodeEmitterGK110::emitSELP(const Instruction *i)
1042 {
1043 emitForm_21(i, 0x250, 0x050);
1044
1045 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
1046 code[1] |= 1 << 13;
1047 }
1048
1049 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
1050 {
1051 code[0] = 0x0000003e | (i->subOp << 23);
1052 code[1] = 0x77000000;
1053
1054 emitPredicate(i);
1055 }
1056
1057 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
1058 {
1059 code[0] = 0x00000002;
1060 code[1] = 0x76c00000;
1061
1062 code[1] |= i->tex.r << 9;
1063 // code[1] |= i->tex.s << (9 + 8);
1064
1065 if (i->tex.liveOnly)
1066 code[0] |= 0x80000000;
1067
1068 defId(i->def(0), 2);
1069 srcId(i->src(0), 10);
1070 }
1071
1072 static inline bool
1073 isNextIndependentTex(const TexInstruction *i)
1074 {
1075 if (!i->next || !isTextureOp(i->next->op))
1076 return false;
1077 if (i->getDef(0)->interfers(i->next->getSrc(0)))
1078 return false;
1079 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
1080 }
1081
1082 void
1083 CodeEmitterGK110::emitTEX(const TexInstruction *i)
1084 {
1085 const bool ind = i->tex.rIndirectSrc >= 0;
1086
1087 if (ind) {
1088 code[0] = 0x00000002;
1089 switch (i->op) {
1090 case OP_TXD:
1091 code[1] = 0x7e000000;
1092 break;
1093 case OP_TXLQ:
1094 code[1] = 0x7e800000;
1095 break;
1096 case OP_TXF:
1097 code[1] = 0x78000000;
1098 break;
1099 case OP_TXG:
1100 code[1] = 0x7dc00000;
1101 break;
1102 default:
1103 code[1] = 0x7d800000;
1104 break;
1105 }
1106 } else {
1107 switch (i->op) {
1108 case OP_TXD:
1109 code[0] = 0x00000002;
1110 code[1] = 0x76000000;
1111 code[1] |= i->tex.r << 9;
1112 break;
1113 case OP_TXLQ:
1114 code[0] = 0x00000002;
1115 code[1] = 0x76800000;
1116 code[1] |= i->tex.r << 9;
1117 break;
1118 case OP_TXF:
1119 code[0] = 0x00000002;
1120 code[1] = 0x70000000;
1121 code[1] |= i->tex.r << 13;
1122 break;
1123 case OP_TXG:
1124 code[0] = 0x00000001;
1125 code[1] = 0x70000000;
1126 code[1] |= i->tex.r << 15;
1127 break;
1128 default:
1129 code[0] = 0x00000001;
1130 code[1] = 0x60000000;
1131 code[1] |= i->tex.r << 15;
1132 break;
1133 }
1134 }
1135
1136 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1137
1138 if (i->tex.liveOnly)
1139 code[0] |= 0x80000000;
1140
1141 switch (i->op) {
1142 case OP_TEX: break;
1143 case OP_TXB: code[1] |= 0x2000; break;
1144 case OP_TXL: code[1] |= 0x3000; break;
1145 case OP_TXF: break;
1146 case OP_TXG: break;
1147 case OP_TXD: break;
1148 case OP_TXLQ: break;
1149 default:
1150 assert(!"invalid texture op");
1151 break;
1152 }
1153
1154 if (i->op == OP_TXF) {
1155 if (!i->tex.levelZero)
1156 code[1] |= 0x1000;
1157 } else
1158 if (i->tex.levelZero) {
1159 code[1] |= 0x1000;
1160 }
1161
1162 if (i->op != OP_TXD && i->tex.derivAll)
1163 code[1] |= 0x200;
1164
1165 emitPredicate(i);
1166
1167 code[1] |= i->tex.mask << 2;
1168
1169 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1170
1171 defId(i->def(0), 2);
1172 srcId(i->src(0), 10);
1173 srcId(i, src1, 23);
1174
1175 if (i->op == OP_TXG) code[1] |= i->tex.gatherComp << 13;
1176
1177 // texture target:
1178 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1179 if (i->tex.target.isArray())
1180 code[1] |= 0x40;
1181 if (i->tex.target.isShadow())
1182 code[1] |= 0x400;
1183 if (i->tex.target == TEX_TARGET_2D_MS ||
1184 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1185 code[1] |= 0x800;
1186
1187 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1188 // ?
1189 }
1190
1191 if (i->tex.useOffsets == 1) {
1192 switch (i->op) {
1193 case OP_TXF: code[1] |= 0x200; break;
1194 case OP_TXD: code[1] |= 0x00400000; break;
1195 default: code[1] |= 0x800; break;
1196 }
1197 }
1198 if (i->tex.useOffsets == 4)
1199 code[1] |= 0x1000;
1200 }
1201
1202 void
1203 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1204 {
1205 code[0] = 0x00000002;
1206 code[1] = 0x75400001;
1207
1208 switch (i->tex.query) {
1209 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1210 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1211 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1212 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1213 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1214 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1215 default:
1216 assert(!"invalid texture query");
1217 break;
1218 }
1219
1220 code[1] |= i->tex.mask << 2;
1221 code[1] |= i->tex.r << 9;
1222 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1223 code[1] |= 0x08000000;
1224
1225 defId(i->def(0), 2);
1226 srcId(i->src(0), 10);
1227
1228 emitPredicate(i);
1229 }
1230
1231 void
1232 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1233 {
1234 code[0] = 0x00000002 | ((qOp & 1) << 31);
1235 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1236
1237 defId(i->def(0), 2);
1238 srcId(i->src(0), 10);
1239 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1240
1241 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1242 code[1] |= 1 << 9; // dall
1243
1244 emitPredicate(i);
1245 }
1246
1247 void
1248 CodeEmitterGK110::emitPIXLD(const Instruction *i)
1249 {
1250 emitForm_L(i, 0x7f4, 2, Modifier(0));
1251 code[1] |= i->subOp << 2;
1252 code[1] |= 0x00070000;
1253 }
1254
1255 void
1256 CodeEmitterGK110::emitBAR(const Instruction *i)
1257 {
1258 /* TODO */
1259 emitNOP(i);
1260 }
1261
1262 void
1263 CodeEmitterGK110::emitFlow(const Instruction *i)
1264 {
1265 const FlowInstruction *f = i->asFlow();
1266
1267 unsigned mask; // bit 0: predicate, bit 1: target
1268
1269 code[0] = 0x00000000;
1270
1271 switch (i->op) {
1272 case OP_BRA:
1273 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1274 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1275 code[0] |= 0x80;
1276 mask = 3;
1277 break;
1278 case OP_CALL:
1279 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1280 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1281 code[0] |= 0x80;
1282 mask = 2;
1283 break;
1284
1285 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1286 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1287 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1288 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1289 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1290
1291 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1292 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1293 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1294 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1295
1296 case OP_QUADON: code[1] = 0x1b800000; mask = 0; break;
1297 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1298 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1299 default:
1300 assert(!"invalid flow operation");
1301 return;
1302 }
1303
1304 if (mask & 1) {
1305 emitPredicate(i);
1306 if (i->flagsSrc < 0)
1307 code[0] |= 0x3c;
1308 }
1309
1310 if (!f)
1311 return;
1312
1313 if (f->allWarp)
1314 code[0] |= 1 << 9;
1315 if (f->limit)
1316 code[0] |= 1 << 8;
1317
1318 if (f->op == OP_CALL) {
1319 if (f->builtin) {
1320 assert(f->absolute);
1321 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1322 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1323 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1324 } else {
1325 assert(!f->absolute);
1326 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1327 code[0] |= (pcRel & 0x1ff) << 23;
1328 code[1] |= (pcRel >> 9) & 0x7fff;
1329 }
1330 } else
1331 if (mask & 2) {
1332 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1333 if (writeIssueDelays && !(f->target.bb->binPos & 0x3f))
1334 pcRel += 8;
1335 // currently we don't want absolute branches
1336 assert(!f->absolute);
1337 code[0] |= (pcRel & 0x1ff) << 23;
1338 code[1] |= (pcRel >> 9) & 0x7fff;
1339 }
1340 }
1341
1342 void
1343 CodeEmitterGK110::emitAFETCH(const Instruction *i)
1344 {
1345 uint32_t offset = i->src(0).get()->reg.data.offset & 0x7ff;
1346
1347 code[0] = 0x00000002 | (offset << 23);
1348 code[1] = 0x7d000000 | (offset >> 9);
1349
1350 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1351 code[1] |= 0x8;
1352
1353 emitPredicate(i);
1354
1355 defId(i->def(0), 2);
1356 srcId(i->src(0).getIndirect(0), 10);
1357 }
1358
1359 void
1360 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1361 {
1362 uint32_t prim = i->src(0).get()->reg.data.u32;
1363
1364 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1365 code[1] = 0x7f800000;
1366
1367 emitPredicate(i);
1368
1369 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1370
1371 defId(i->def(0), 2);
1372 srcId(i, src1, 10);
1373 }
1374
1375 void
1376 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1377 {
1378 unsigned int size = typeSizeof(i->dType);
1379 uint32_t offset = i->src(0).get()->reg.data.offset;
1380
1381 code[0] = 0x00000002 | (offset << 23);
1382 code[1] = 0x7ec00000 | (offset >> 9);
1383 code[1] |= (size / 4 - 1) << 18;
1384
1385 if (i->perPatch)
1386 code[1] |= 0x4;
1387 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1388 code[1] |= 0x8; // yes, TCPs can read from *outputs* of other threads
1389
1390 emitPredicate(i);
1391
1392 defId(i->def(0), 2);
1393 srcId(i->src(0).getIndirect(0), 10);
1394 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1395 }
1396
1397 void
1398 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1399 {
1400 unsigned int size = typeSizeof(i->dType);
1401 uint32_t offset = i->src(0).get()->reg.data.offset;
1402
1403 code[0] = 0x00000002 | (offset << 23);
1404 code[1] = 0x7f000000 | (offset >> 9);
1405 code[1] |= (size / 4 - 1) << 18;
1406
1407 if (i->perPatch)
1408 code[1] |= 0x4;
1409
1410 emitPredicate(i);
1411
1412 assert(i->src(1).getFile() == FILE_GPR);
1413
1414 srcId(i->src(0).getIndirect(0), 10);
1415 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1416 srcId(i->src(1), 2);
1417 }
1418
1419 void
1420 CodeEmitterGK110::emitOUT(const Instruction *i)
1421 {
1422 assert(i->src(0).getFile() == FILE_GPR);
1423
1424 emitForm_21(i, 0x1f0, 0xb70);
1425
1426 if (i->op == OP_EMIT)
1427 code[1] |= 1 << 10;
1428 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1429 code[1] |= 1 << 11;
1430 }
1431
1432 void
1433 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1434 {
1435 code[1] |= (i->ipa & 0x3) << 21; // TODO: INTERP_SAMPLEID
1436 code[1] |= (i->ipa & 0xc) << (19 - 2);
1437 }
1438
1439 void
1440 CodeEmitterGK110::emitINTERP(const Instruction *i)
1441 {
1442 const uint32_t base = i->getSrc(0)->reg.data.offset;
1443
1444 code[0] = 0x00000002 | (base << 31);
1445 code[1] = 0x74800000 | (base >> 1);
1446
1447 if (i->saturate)
1448 code[1] |= 1 << 18;
1449
1450 if (i->op == OP_PINTERP)
1451 srcId(i->src(1), 23);
1452 else
1453 code[0] |= 0xff << 23;
1454
1455 srcId(i->src(0).getIndirect(0), 10);
1456 emitInterpMode(i);
1457
1458 emitPredicate(i);
1459 defId(i->def(0), 2);
1460
1461 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1462 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1463 else
1464 code[1] |= 0xff << 10;
1465 }
1466
1467 void
1468 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1469 {
1470 uint8_t n;
1471
1472 switch (ty) {
1473 case TYPE_U8:
1474 n = 0;
1475 break;
1476 case TYPE_S8:
1477 n = 1;
1478 break;
1479 case TYPE_U16:
1480 n = 2;
1481 break;
1482 case TYPE_S16:
1483 n = 3;
1484 break;
1485 case TYPE_F32:
1486 case TYPE_U32:
1487 case TYPE_S32:
1488 n = 4;
1489 break;
1490 case TYPE_F64:
1491 case TYPE_U64:
1492 case TYPE_S64:
1493 n = 5;
1494 break;
1495 case TYPE_B128:
1496 n = 6;
1497 break;
1498 default:
1499 n = 0;
1500 assert(!"invalid ld/st type");
1501 break;
1502 }
1503 code[pos / 32] |= n << (pos % 32);
1504 }
1505
1506 void
1507 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1508 {
1509 uint8_t n;
1510
1511 switch (c) {
1512 case CACHE_CA:
1513 // case CACHE_WB:
1514 n = 0;
1515 break;
1516 case CACHE_CG:
1517 n = 1;
1518 break;
1519 case CACHE_CS:
1520 n = 2;
1521 break;
1522 case CACHE_CV:
1523 // case CACHE_WT:
1524 n = 3;
1525 break;
1526 default:
1527 n = 0;
1528 assert(!"invalid caching mode");
1529 break;
1530 }
1531 code[pos / 32] |= n << (pos % 32);
1532 }
1533
1534 void
1535 CodeEmitterGK110::emitSTORE(const Instruction *i)
1536 {
1537 int32_t offset = SDATA(i->src(0)).offset;
1538
1539 switch (i->src(0).getFile()) {
1540 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1541 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1542 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1543 default:
1544 assert(!"invalid memory file");
1545 break;
1546 }
1547
1548 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1549 offset &= 0xffffff;
1550
1551 if (code[0] & 0x2) {
1552 emitLoadStoreType(i->dType, 0x33);
1553 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1554 emitCachingMode(i->cache, 0x2f);
1555 } else {
1556 emitLoadStoreType(i->dType, 0x38);
1557 emitCachingMode(i->cache, 0x3b);
1558 }
1559 code[0] |= offset << 23;
1560 code[1] |= offset >> 9;
1561
1562 emitPredicate(i);
1563
1564 srcId(i->src(1), 2);
1565 srcId(i->src(0).getIndirect(0), 10);
1566 }
1567
1568 void
1569 CodeEmitterGK110::emitLOAD(const Instruction *i)
1570 {
1571 int32_t offset = SDATA(i->src(0)).offset;
1572
1573 switch (i->src(0).getFile()) {
1574 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1575 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1576 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1577 case FILE_MEMORY_CONST:
1578 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1579 emitMOV(i);
1580 return;
1581 }
1582 offset &= 0xffff;
1583 code[0] = 0x00000002;
1584 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1585 code[1] |= i->subOp << 15;
1586 break;
1587 default:
1588 assert(!"invalid memory file");
1589 break;
1590 }
1591
1592 if (code[0] & 0x2) {
1593 offset &= 0xffffff;
1594 emitLoadStoreType(i->dType, 0x33);
1595 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1596 emitCachingMode(i->cache, 0x2f);
1597 } else {
1598 emitLoadStoreType(i->dType, 0x38);
1599 emitCachingMode(i->cache, 0x3b);
1600 }
1601 code[0] |= offset << 23;
1602 code[1] |= offset >> 9;
1603
1604 emitPredicate(i);
1605
1606 defId(i->def(0), 2);
1607 srcId(i->src(0).getIndirect(0), 10);
1608 }
1609
1610 uint8_t
1611 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1612 {
1613 switch (SDATA(ref).sv.sv) {
1614 case SV_LANEID: return 0x00;
1615 case SV_PHYSID: return 0x03;
1616 case SV_VERTEX_COUNT: return 0x10;
1617 case SV_INVOCATION_ID: return 0x11;
1618 case SV_YDIR: return 0x12;
1619 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1620 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1621 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1622 case SV_GRIDID: return 0x2c;
1623 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1624 case SV_LBASE: return 0x34;
1625 case SV_SBASE: return 0x30;
1626 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1627 default:
1628 assert(!"no sreg for system value");
1629 return 0;
1630 }
1631 }
1632
1633 void
1634 CodeEmitterGK110::emitMOV(const Instruction *i)
1635 {
1636 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1637 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1638 code[1] = 0x86400000;
1639 emitPredicate(i);
1640 defId(i->def(0), 2);
1641 } else
1642 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1643 code[0] = 0x00000002 | (i->lanes << 14);
1644 code[1] = 0x74000000;
1645 emitPredicate(i);
1646 defId(i->def(0), 2);
1647 setImmediate32(i, 0, Modifier(0));
1648 } else
1649 if (i->src(0).getFile() == FILE_PREDICATE) {
1650 code[0] = 0x00000002;
1651 code[1] = 0x84401c07;
1652 emitPredicate(i);
1653 defId(i->def(0), 2);
1654 srcId(i->src(0), 14);
1655 } else {
1656 emitForm_C(i, 0x24c, 2);
1657 code[1] |= i->lanes << 10;
1658 }
1659 }
1660
1661 bool
1662 CodeEmitterGK110::emitInstruction(Instruction *insn)
1663 {
1664 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1665
1666 if (insn->encSize != 8) {
1667 ERROR("skipping unencodable instruction: ");
1668 insn->print();
1669 return false;
1670 } else
1671 if (codeSize + size > codeSizeLimit) {
1672 ERROR("code emitter output buffer too small\n");
1673 return false;
1674 }
1675
1676 if (writeIssueDelays) {
1677 int id = (codeSize & 0x3f) / 8 - 1;
1678 if (id < 0) {
1679 id += 1;
1680 code[0] = 0x00000000; // cf issue delay "instruction"
1681 code[1] = 0x08000000;
1682 code += 2;
1683 codeSize += 8;
1684 }
1685 uint32_t *data = code - (id * 2 + 2);
1686
1687 switch (id) {
1688 case 0: data[0] |= insn->sched << 2; break;
1689 case 1: data[0] |= insn->sched << 10; break;
1690 case 2: data[0] |= insn->sched << 18; break;
1691 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1692 case 4: data[1] |= insn->sched << 2; break;
1693 case 5: data[1] |= insn->sched << 10; break;
1694 case 6: data[1] |= insn->sched << 18; break;
1695 default:
1696 assert(0);
1697 break;
1698 }
1699 }
1700
1701 // assert that instructions with multiple defs don't corrupt registers
1702 for (int d = 0; insn->defExists(d); ++d)
1703 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1704
1705 switch (insn->op) {
1706 case OP_MOV:
1707 case OP_RDSV:
1708 emitMOV(insn);
1709 break;
1710 case OP_NOP:
1711 break;
1712 case OP_LOAD:
1713 emitLOAD(insn);
1714 break;
1715 case OP_STORE:
1716 emitSTORE(insn);
1717 break;
1718 case OP_LINTERP:
1719 case OP_PINTERP:
1720 emitINTERP(insn);
1721 break;
1722 case OP_VFETCH:
1723 emitVFETCH(insn);
1724 break;
1725 case OP_EXPORT:
1726 emitEXPORT(insn);
1727 break;
1728 case OP_AFETCH:
1729 emitAFETCH(insn);
1730 break;
1731 case OP_PFETCH:
1732 emitPFETCH(insn);
1733 break;
1734 case OP_EMIT:
1735 case OP_RESTART:
1736 emitOUT(insn);
1737 break;
1738 case OP_ADD:
1739 case OP_SUB:
1740 if (insn->dType == TYPE_F64)
1741 emitDADD(insn);
1742 else if (isFloatType(insn->dType))
1743 emitFADD(insn);
1744 else
1745 emitUADD(insn);
1746 break;
1747 case OP_MUL:
1748 if (insn->dType == TYPE_F64)
1749 emitDMUL(insn);
1750 else if (isFloatType(insn->dType))
1751 emitFMUL(insn);
1752 else
1753 emitIMUL(insn);
1754 break;
1755 case OP_MAD:
1756 case OP_FMA:
1757 if (insn->dType == TYPE_F64)
1758 emitDMAD(insn);
1759 else if (isFloatType(insn->dType))
1760 emitFMAD(insn);
1761 else
1762 emitIMAD(insn);
1763 break;
1764 case OP_SAD:
1765 emitISAD(insn);
1766 break;
1767 case OP_NOT:
1768 emitNOT(insn);
1769 break;
1770 case OP_AND:
1771 emitLogicOp(insn, 0);
1772 break;
1773 case OP_OR:
1774 emitLogicOp(insn, 1);
1775 break;
1776 case OP_XOR:
1777 emitLogicOp(insn, 2);
1778 break;
1779 case OP_SHL:
1780 case OP_SHR:
1781 emitShift(insn);
1782 break;
1783 case OP_SET:
1784 case OP_SET_AND:
1785 case OP_SET_OR:
1786 case OP_SET_XOR:
1787 emitSET(insn->asCmp());
1788 break;
1789 case OP_SELP:
1790 emitSELP(insn);
1791 break;
1792 case OP_SLCT:
1793 emitSLCT(insn->asCmp());
1794 break;
1795 case OP_MIN:
1796 case OP_MAX:
1797 emitMINMAX(insn);
1798 break;
1799 case OP_ABS:
1800 case OP_NEG:
1801 case OP_CEIL:
1802 case OP_FLOOR:
1803 case OP_TRUNC:
1804 case OP_CVT:
1805 case OP_SAT:
1806 emitCVT(insn);
1807 break;
1808 case OP_RSQ:
1809 emitSFnOp(insn, 5 + 2 * insn->subOp);
1810 break;
1811 case OP_RCP:
1812 emitSFnOp(insn, 4 + 2 * insn->subOp);
1813 break;
1814 case OP_LG2:
1815 emitSFnOp(insn, 3);
1816 break;
1817 case OP_EX2:
1818 emitSFnOp(insn, 2);
1819 break;
1820 case OP_SIN:
1821 emitSFnOp(insn, 1);
1822 break;
1823 case OP_COS:
1824 emitSFnOp(insn, 0);
1825 break;
1826 case OP_PRESIN:
1827 case OP_PREEX2:
1828 emitPreOp(insn);
1829 break;
1830 case OP_TEX:
1831 case OP_TXB:
1832 case OP_TXL:
1833 case OP_TXD:
1834 case OP_TXF:
1835 case OP_TXG:
1836 case OP_TXLQ:
1837 emitTEX(insn->asTex());
1838 break;
1839 case OP_TXQ:
1840 emitTXQ(insn->asTex());
1841 break;
1842 case OP_TEXBAR:
1843 emitTEXBAR(insn);
1844 break;
1845 case OP_PIXLD:
1846 emitPIXLD(insn);
1847 break;
1848 case OP_BRA:
1849 case OP_CALL:
1850 case OP_PRERET:
1851 case OP_RET:
1852 case OP_DISCARD:
1853 case OP_EXIT:
1854 case OP_PRECONT:
1855 case OP_CONT:
1856 case OP_PREBREAK:
1857 case OP_BREAK:
1858 case OP_JOINAT:
1859 case OP_BRKPT:
1860 case OP_QUADON:
1861 case OP_QUADPOP:
1862 emitFlow(insn);
1863 break;
1864 case OP_QUADOP:
1865 emitQUADOP(insn, insn->subOp, insn->lanes);
1866 break;
1867 case OP_DFDX:
1868 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1869 break;
1870 case OP_DFDY:
1871 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1872 break;
1873 case OP_POPCNT:
1874 emitPOPC(insn);
1875 break;
1876 case OP_INSBF:
1877 emitINSBF(insn);
1878 break;
1879 case OP_EXTBF:
1880 emitEXTBF(insn);
1881 break;
1882 case OP_BFIND:
1883 emitBFIND(insn);
1884 break;
1885 case OP_JOIN:
1886 emitNOP(insn);
1887 insn->join = 1;
1888 break;
1889 case OP_BAR:
1890 emitBAR(insn);
1891 break;
1892 case OP_PHI:
1893 case OP_UNION:
1894 case OP_CONSTRAINT:
1895 ERROR("operation should have been eliminated");
1896 return false;
1897 case OP_EXP:
1898 case OP_LOG:
1899 case OP_SQRT:
1900 case OP_POW:
1901 ERROR("operation should have been lowered\n");
1902 return false;
1903 default:
1904 ERROR("unknow op\n");
1905 return false;
1906 }
1907
1908 if (insn->join)
1909 code[0] |= 1 << 22;
1910
1911 code += 2;
1912 codeSize += 8;
1913 return true;
1914 }
1915
1916 uint32_t
1917 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1918 {
1919 // No more short instruction encodings.
1920 return 8;
1921 }
1922
1923 void
1924 CodeEmitterGK110::prepareEmission(Function *func)
1925 {
1926 const Target *targ = func->getProgram()->getTarget();
1927
1928 CodeEmitter::prepareEmission(func);
1929
1930 if (targ->hasSWSched)
1931 calculateSchedDataNVC0(targ, func);
1932 }
1933
1934 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1935 : CodeEmitter(target),
1936 targNVC0(target),
1937 writeIssueDelays(target->hasSWSched)
1938 {
1939 code = NULL;
1940 codeSize = codeSizeLimit = 0;
1941 relocInfo = NULL;
1942 }
1943
1944 CodeEmitter *
1945 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1946 {
1947 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1948 emit->setProgramType(type);
1949 return emit;
1950 }
1951
1952 } // namespace nv50_ir