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nouveau/codegen: set dType to S32 for OP_NEG U32
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitPFETCH(const Instruction *);
81 void emitVFETCH(const Instruction *);
82 void emitEXPORT(const Instruction *);
83 void emitOUT(const Instruction *);
84
85 void emitUADD(const Instruction *);
86 void emitFADD(const Instruction *);
87 void emitIMUL(const Instruction *);
88 void emitFMUL(const Instruction *);
89 void emitIMAD(const Instruction *);
90 void emitISAD(const Instruction *);
91 void emitFMAD(const Instruction *);
92
93 void emitNOT(const Instruction *);
94 void emitLogicOp(const Instruction *, uint8_t subOp);
95 void emitPOPC(const Instruction *);
96 void emitINSBF(const Instruction *);
97 void emitShift(const Instruction *);
98
99 void emitSFnOp(const Instruction *, uint8_t subOp);
100
101 void emitCVT(const Instruction *);
102 void emitMINMAX(const Instruction *);
103 void emitPreOp(const Instruction *);
104
105 void emitSET(const CmpInstruction *);
106 void emitSLCT(const CmpInstruction *);
107 void emitSELP(const Instruction *);
108
109 void emitTEXBAR(const Instruction *);
110 void emitTEX(const TexInstruction *);
111 void emitTEXCSAA(const TexInstruction *);
112 void emitTXQ(const TexInstruction *);
113
114 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
115
116 void emitFlow(const Instruction *);
117
118 inline void defId(const ValueDef&, const int pos);
119 inline void srcId(const ValueRef&, const int pos);
120 inline void srcId(const ValueRef *, const int pos);
121 inline void srcId(const Instruction *, int s, const int pos);
122
123 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
124
125 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
126 };
127
128 #define GK110_GPR_ZERO 255
129
130 #define NEG_(b, s) \
131 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
132 #define ABS_(b, s) \
133 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
134
135 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
136 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
137
138 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
139
140 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
141
142 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
143
144 #define SDATA(a) ((a).rep()->reg.data)
145 #define DDATA(a) ((a).rep()->reg.data)
146
147 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
148 {
149 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
150 }
151
152 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
153 {
154 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
155 }
156
157 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
158 {
159 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
160 code[pos / 32] |= r << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
164 {
165 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
169 {
170 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
171 }
172
173 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
174 {
175 const ImmediateValue *imm = ref.get()->asImm();
176
177 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
178 }
179
180 void
181 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
182 {
183 bool rint = false;
184 uint8_t n;
185
186 switch (rnd) {
187 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
188 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
189 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
190 default:
191 rint = rnd == ROUND_NI;
192 n = 0;
193 assert(rnd == ROUND_N || rnd == ROUND_NI);
194 break;
195 }
196 code[pos / 32] |= n << (pos % 32);
197 if (rint && rintPos >= 0)
198 code[rintPos / 32] |= 1 << (rintPos % 32);
199 }
200
201 void
202 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
203 {
204 uint8_t n;
205
206 switch (rnd) {
207 case ROUND_M: n = 1; break;
208 case ROUND_P: n = 2; break;
209 case ROUND_Z: n = 3; break;
210 default:
211 n = 0;
212 assert(rnd == ROUND_N);
213 break;
214 }
215 code[pos / 32] |= n << (pos % 32);
216 }
217
218 void
219 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
220 {
221 uint8_t n;
222
223 switch (rnd) {
224 case ROUND_MI: n = 1; break;
225 case ROUND_PI: n = 2; break;
226 case ROUND_ZI: n = 3; break;
227 default:
228 n = 0;
229 assert(rnd == ROUND_NI);
230 break;
231 }
232 code[pos / 32] |= n << (pos % 32);
233 }
234
235 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
236 {
237 uint8_t n;
238
239 switch (cc) {
240 case CC_FL: n = 0x00; break;
241 case CC_LT: n = 0x01; break;
242 case CC_EQ: n = 0x02; break;
243 case CC_LE: n = 0x03; break;
244 case CC_GT: n = 0x04; break;
245 case CC_NE: n = 0x05; break;
246 case CC_GE: n = 0x06; break;
247 case CC_LTU: n = 0x09; break;
248 case CC_EQU: n = 0x0a; break;
249 case CC_LEU: n = 0x0b; break;
250 case CC_GTU: n = 0x0c; break;
251 case CC_NEU: n = 0x0d; break;
252 case CC_GEU: n = 0x0e; break;
253 case CC_TR: n = 0x0f; break;
254 case CC_NO: n = 0x10; break;
255 case CC_NC: n = 0x11; break;
256 case CC_NS: n = 0x12; break;
257 case CC_NA: n = 0x13; break;
258 case CC_A: n = 0x14; break;
259 case CC_S: n = 0x15; break;
260 case CC_C: n = 0x16; break;
261 case CC_O: n = 0x17; break;
262 default:
263 n = 0;
264 assert(!"invalid condition code");
265 break;
266 }
267 code[pos / 32] |= (n & mask) << (pos % 32);
268 }
269
270 void
271 CodeEmitterGK110::emitPredicate(const Instruction *i)
272 {
273 if (i->predSrc >= 0) {
274 srcId(i->src(i->predSrc), 18);
275 if (i->cc == CC_NOT_P)
276 code[0] |= 8 << 18; // negate
277 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
278 } else {
279 code[0] |= 7 << 18;
280 }
281 }
282
283 void
284 CodeEmitterGK110::setCAddress14(const ValueRef& src)
285 {
286 const int32_t addr = src.get()->asSym()->reg.data.offset / 4;
287
288 code[0] |= (addr & 0x01ff) << 23;
289 code[1] |= (addr & 0x3e00) >> 9;
290 }
291
292 void
293 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
294 {
295 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
296 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
297
298 if (i->sType == TYPE_F32) {
299 assert(!(u32 & 0x00000fff));
300 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
301 code[1] |= ((u32 & 0x7fe00000) >> 21);
302 code[1] |= ((u32 & 0x80000000) >> 4);
303 } else
304 if (i->sType == TYPE_F64) {
305 assert(!(u64 & 0x00000fffffffffffULL));
306 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
307 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
308 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
309 } else {
310 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
311 code[0] |= (u32 & 0x001ff) << 23;
312 code[1] |= (u32 & 0x7fe00) >> 9;
313 code[1] |= (u32 & 0x80000) << 8;
314 }
315 }
316
317 void
318 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
319 Modifier mod)
320 {
321 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
322
323 if (mod) {
324 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
325 mod.applyTo(imm);
326 u32 = imm.reg.data.u32;
327 }
328
329 code[0] |= u32 << 23;
330 code[1] |= u32 >> 9;
331 }
332
333 void
334 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
335 Modifier mod)
336 {
337 code[0] = ctg;
338 code[1] = opc << 20;
339
340 emitPredicate(i);
341
342 defId(i->def(0), 2);
343
344 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
345 switch (i->src(s).getFile()) {
346 case FILE_GPR:
347 srcId(i->src(s), s ? 42 : 10);
348 break;
349 case FILE_IMMEDIATE:
350 setImmediate32(i, s, mod);
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358
359 void
360 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
361 {
362 code[0] = ctg;
363 code[1] = opc << 20;
364
365 emitPredicate(i);
366
367 defId(i->def(0), 2);
368
369 switch (i->src(0).getFile()) {
370 case FILE_MEMORY_CONST:
371 code[1] |= 0x4 << 28;
372 setCAddress14(i->src(0));
373 break;
374 case FILE_GPR:
375 code[1] |= 0xc << 28;
376 srcId(i->src(0), 23);
377 break;
378 default:
379 assert(0);
380 break;
381 }
382 }
383
384 // 0x2 for GPR, c[] and 0x1 for short immediate
385 void
386 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
387 uint32_t opc1)
388 {
389 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
390
391 int s1 = 23;
392 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
393 s1 = 42;
394
395 if (imm) {
396 code[0] = 0x1;
397 code[1] = opc1 << 20;
398 } else {
399 code[0] = 0x2;
400 code[1] = (0xc << 28) | (opc2 << 20);
401 }
402
403 emitPredicate(i);
404
405 defId(i->def(0), 2);
406
407 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
408 switch (i->src(s).getFile()) {
409 case FILE_MEMORY_CONST:
410 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
411 setCAddress14(i->src(s));
412 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
413 break;
414 case FILE_IMMEDIATE:
415 setShortImmediate(i, s);
416 break;
417 case FILE_GPR:
418 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
419 break;
420 default:
421 // ignore here, can be predicate or flags, but must not be address
422 break;
423 }
424 }
425 // 0x0 = invalid
426 // 0xc = rrr
427 // 0x8 = rrc
428 // 0x4 = rcr
429 assert(imm || (code[1] & (0xc << 28)));
430 }
431
432 inline void
433 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
434 {
435 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
436 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
437 }
438
439 void
440 CodeEmitterGK110::emitNOP(const Instruction *i)
441 {
442 code[0] = 0x00003c02;
443 code[1] = 0x85800000;
444
445 if (i)
446 emitPredicate(i);
447 else
448 code[0] = 0x001c3c02;
449 }
450
451 void
452 CodeEmitterGK110::emitFMAD(const Instruction *i)
453 {
454 assert(!isLIMM(i->src(1), TYPE_F32));
455
456 emitForm_21(i, 0x0c0, 0x940);
457
458 NEG_(34, 2);
459 SAT_(35);
460 RND_(36, F);
461 FTZ_(38);
462
463 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
464
465 if (code[0] & 0x1) {
466 if (neg1)
467 code[1] ^= 1 << 27;
468 } else
469 if (neg1) {
470 code[1] |= 1 << 19;
471 }
472 }
473
474 void
475 CodeEmitterGK110::emitFMUL(const Instruction *i)
476 {
477 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
478
479 assert(i->postFactor >= -3 && i->postFactor <= 3);
480
481 if (isLIMM(i->src(1), TYPE_F32)) {
482 emitForm_L(i, 0x200, 0x2, Modifier(0));
483
484 FTZ_(38);
485 SAT_(3a);
486 if (neg)
487 code[1] ^= 1 << 22;
488
489 assert(i->postFactor == 0);
490 } else {
491 emitForm_21(i, 0x234, 0xc34);
492
493 RND_(2a, F);
494 FTZ_(2f);
495 SAT_(35);
496
497 if (code[0] & 0x1) {
498 if (neg)
499 code[1] ^= 1 << 27;
500 } else
501 if (neg) {
502 code[1] |= 1 << 19;
503 }
504 }
505 }
506
507 void
508 CodeEmitterGK110::emitIMUL(const Instruction *i)
509 {
510 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
511 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
512
513 if (isLIMM(i->src(1), TYPE_S32)) {
514 emitForm_L(i, 0x280, 2, Modifier(0));
515
516 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
517
518 if (i->sType == TYPE_S32)
519 code[1] |= 3 << 25;
520 } else {
521 emitForm_21(i, 0x21c, 0xc1c);
522
523 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
524 code[1] |= 1 << 10;
525 if (i->sType == TYPE_S32)
526 code[1] |= 3 << 11;
527 }
528 }
529
530 void
531 CodeEmitterGK110::emitFADD(const Instruction *i)
532 {
533 if (isLIMM(i->src(1), TYPE_F32)) {
534 assert(i->rnd == ROUND_N);
535 assert(!i->saturate);
536
537 emitForm_L(i, 0x400, 0, i->src(1).mod);
538
539 FTZ_(3a);
540 NEG_(3b, 0);
541 ABS_(39, 0);
542 } else {
543 emitForm_21(i, 0x22c, 0xc2c);
544
545 FTZ_(2f);
546 RND_(2a, F);
547 ABS_(31, 0);
548 NEG_(33, 0);
549
550 if (code[0] & 0x1) {
551 modNegAbsF32_3b(i, 1);
552 } else {
553 ABS_(34, 1);
554 NEG_(30, 1);
555 }
556 }
557 }
558
559 void
560 CodeEmitterGK110::emitUADD(const Instruction *i)
561 {
562 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
563
564 if (i->op == OP_SUB)
565 addOp ^= 1;
566
567 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
568
569 if (isLIMM(i->src(1), TYPE_S32)) {
570 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
571
572 if (addOp & 2)
573 code[1] |= 1 << 27;
574
575 assert(!i->defExists(1));
576 assert(i->flagsSrc < 0);
577
578 SAT_(39);
579 } else {
580 emitForm_21(i, 0x208, 0xc08);
581
582 assert(addOp != 3); // would be add-plus-one
583
584 code[1] |= addOp << 19;
585
586 if (i->defExists(1))
587 code[1] |= 1 << 18; // write carry
588 if (i->flagsSrc >= 0)
589 code[1] |= 1 << 14; // add carry
590
591 SAT_(35);
592 }
593 }
594
595 // TODO: shl-add
596 void
597 CodeEmitterGK110::emitIMAD(const Instruction *i)
598 {
599 uint8_t addOp =
600 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
601
602 emitForm_21(i, 0x100, 0xa00);
603
604 assert(addOp != 3);
605 code[1] |= addOp << 26;
606
607 if (i->sType == TYPE_S32)
608 code[1] |= (1 << 19) | (1 << 24);
609
610 if (code[0] & 0x1) {
611 assert(!i->subOp);
612 SAT_(39);
613 } else {
614 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
615 code[1] |= 1 << 25;
616 SAT_(35);
617 }
618 }
619
620 void
621 CodeEmitterGK110::emitISAD(const Instruction *i)
622 {
623 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
624
625 emitForm_21(i, 0x1fc, 0xb74);
626
627 if (i->dType == TYPE_S32)
628 code[1] |= 1 << 19;
629 }
630
631 void
632 CodeEmitterGK110::emitNOT(const Instruction *i)
633 {
634 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
635 code[1] = 0x22003800;
636
637 emitPredicate(i);
638
639 defId(i->def(0), 2);
640
641 switch (i->src(0).getFile()) {
642 case FILE_GPR:
643 code[1] |= 0xc << 28;
644 srcId(i->src(0), 23);
645 break;
646 case FILE_MEMORY_CONST:
647 code[1] |= 0x4 << 28;
648 setCAddress14(i->src(1));
649 break;
650 default:
651 assert(0);
652 break;
653 }
654 }
655
656 void
657 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
658 {
659 assert(!(i->src(0).mod & Modifier(NV50_IR_MOD_NOT))); // XXX: find me
660
661 if (isLIMM(i->src(1), TYPE_S32)) {
662 emitForm_L(i, 0x200, 0, i->src(1).mod);
663 code[1] |= subOp << 24;
664 } else {
665 emitForm_21(i, 0x220, 0xc20);
666 code[1] |= subOp << 12;
667 NOT_(2b, 1);
668 }
669 assert(!(code[0] & 0x1) || !(i->src(1).mod & Modifier(NV50_IR_MOD_NOT)));
670 }
671
672 void
673 CodeEmitterGK110::emitPOPC(const Instruction *i)
674 {
675 assert(!isLIMM(i->src(1), TYPE_S32, true));
676
677 emitForm_21(i, 0x204, 0xc04);
678
679 NOT_(2a, 0);
680 if (!(code[0] & 0x1))
681 NOT_(2b, 1);
682 }
683
684 void
685 CodeEmitterGK110::emitINSBF(const Instruction *i)
686 {
687 emitForm_21(i, 0x1f8, 0xb78);
688 }
689
690 void
691 CodeEmitterGK110::emitShift(const Instruction *i)
692 {
693 const bool sar = i->op == OP_SHR && isSignedType(i->sType);
694
695 if (sar) {
696 emitForm_21(i, 0x214, 0x014);
697 code[1] |= 1 << 19;
698 } else
699 if (i->op == OP_SHR) {
700 // this is actually RSHF
701 emitForm_21(i, 0x27c, 0x87c);
702 code[1] |= GK110_GPR_ZERO << 10;
703 } else {
704 // this is actually LSHF
705 emitForm_21(i, 0x1fc, 0xb7c);
706 code[1] |= GK110_GPR_ZERO << 10;
707 }
708
709 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP) {
710 if (!sar)
711 code[1] |= 1 << 21;
712 // XXX: find wrap modifier for SHR S32
713 }
714 }
715
716 void
717 CodeEmitterGK110::emitPreOp(const Instruction *i)
718 {
719 emitForm_21(i, 0x248, -1);
720
721 if (i->op == OP_PREEX2)
722 code[1] |= 1 << 10;
723
724 NEG_(30, 0);
725 ABS_(34, 0);
726 }
727
728 void
729 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
730 {
731 code[0] = 0x00000002 | (subOp << 23);
732 code[1] = 0x84000000;
733
734 emitPredicate(i);
735
736 defId(i->def(0), 2);
737 srcId(i->src(0), 10);
738
739 NEG_(33, 0);
740 ABS_(31, 0);
741
742 // XXX: find saturate
743 }
744
745 void
746 CodeEmitterGK110::emitMINMAX(const Instruction *i)
747 {
748 uint32_t op2, op1;
749
750 switch (i->dType) {
751 case TYPE_U32:
752 case TYPE_S32:
753 op2 = 0x210;
754 op1 = 0xc10;
755 break;
756 case TYPE_F32:
757 op2 = 0x230;
758 op1 = 0xc30;
759 break;
760 case TYPE_F64:
761 op2 = 0x228;
762 op1 = 0xc28;
763 break;
764 default:
765 assert(0);
766 op2 = 0;
767 op1 = 0;
768 break;
769 }
770 emitForm_21(i, op2, op1);
771
772 if (i->dType == TYPE_S32)
773 code[1] |= 1 << 19;
774 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
775
776 FTZ_(2f);
777 ABS_(31, 0);
778 NEG_(33, 0);
779 if (code[0] & 0x1) {
780 modNegAbsF32_3b(i, 1);
781 } else {
782 ABS_(34, 1);
783 NEG_(30, 1);
784 }
785 }
786
787 void
788 CodeEmitterGK110::emitCVT(const Instruction *i)
789 {
790 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
791 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
792 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
793
794 bool sat = i->saturate;
795 bool abs = i->src(0).mod.abs();
796 bool neg = i->src(0).mod.neg();
797
798 RoundMode rnd = i->rnd;
799
800 switch (i->op) {
801 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
802 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
803 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
804 case OP_SAT: sat = true; break;
805 case OP_NEG: neg = !neg; break;
806 case OP_ABS: abs = true; neg = false; break;
807 default:
808 break;
809 }
810
811 DataType dType;
812
813 if (i->op == OP_NEG && i->dType == TYPE_U32)
814 dType = TYPE_S32;
815 else
816 dType = i->dType;
817
818
819 uint32_t op;
820
821 if (f2f) op = 0x254;
822 else if (f2i) op = 0x258;
823 else if (i2f) op = 0x25c;
824 else op = 0x260;
825
826 emitForm_C(i, op, 0x2);
827
828 FTZ_(2f);
829 if (neg) code[1] |= 1 << 16;
830 if (abs) code[1] |= 1 << 20;
831 if (sat) code[1] |= 1 << 21;
832
833 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
834
835 code[0] |= typeSizeofLog2(dType) << 10;
836 code[0] |= typeSizeofLog2(i->sType) << 12;
837
838 if (isSignedIntType(dType))
839 code[0] |= 0x4000;
840 if (isSignedIntType(i->sType))
841 code[0] |= 0x8000;
842 }
843
844 void
845 CodeEmitterGK110::emitSET(const CmpInstruction *i)
846 {
847 uint16_t op1, op2;
848
849 if (i->def(0).getFile() == FILE_PREDICATE) {
850 switch (i->sType) {
851 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
852 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
853 default:
854 op2 = 0x1b0;
855 op1 = 0xb30;
856 break;
857 }
858 emitForm_21(i, op2, op1);
859
860 NEG_(2e, 0);
861 ABS_(9, 0);
862 if (!(code[0] & 0x1)) {
863 NEG_(8, 1);
864 ABS_(2f, 1);
865 } else {
866 modNegAbsF32_3b(i, 1);
867 }
868 FTZ_(32);
869
870 // normal DST field is negated predicate result
871 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
872 if (i->defExists(1))
873 defId(i->def(1), 2);
874 else
875 code[0] |= 0x1c;
876 } else {
877 switch (i->sType) {
878 case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
879 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
880 default:
881 op2 = 0x1a8;
882 op1 = 0xb28;
883 break;
884 }
885 emitForm_21(i, op2, op1);
886
887 NEG_(2e, 0);
888 ABS_(39, 0);
889 if (!(code[0] & 0x1)) {
890 NEG_(38, 1);
891 ABS_(2f, 1);
892 } else {
893 modNegAbsF32_3b(i, 1);
894 }
895 FTZ_(3a);
896 }
897 if (i->sType == TYPE_S32)
898 code[1] |= 1 << 19;
899
900 if (i->op != OP_SET) {
901 switch (i->op) {
902 case OP_SET_AND: code[1] |= 0x0 << 16; break;
903 case OP_SET_OR: code[1] |= 0x1 << 16; break;
904 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
905 default:
906 assert(0);
907 break;
908 }
909 srcId(i->src(2), 0x2a);
910 } else {
911 code[1] |= 0x7 << 10;
912 }
913 emitCondCode(i->setCond,
914 isFloatType(i->sType) ? 0x33 : 0x34,
915 isFloatType(i->sType) ? 0xf : 0x7);
916 }
917
918 void
919 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
920 {
921 CondCode cc = i->setCond;
922 if (i->src(2).mod.neg())
923 cc = reverseCondCode(cc);
924
925 if (i->dType == TYPE_F32) {
926 emitForm_21(i, 0x1d0, 0xb50);
927 FTZ_(32);
928 emitCondCode(cc, 0x33, 0xf);
929 } else {
930 emitForm_21(i, 0x1a4, 0xb20);
931 emitCondCode(cc, 0x34, 0x7);
932 }
933 }
934
935 void CodeEmitterGK110::emitSELP(const Instruction *i)
936 {
937 emitForm_21(i, 0x250, 0x050);
938
939 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
940 code[1] |= 1 << 13;
941 }
942
943 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
944 {
945 code[0] = 0x00000002 | (i->subOp << 23);
946 code[1] = 0x77000000;
947
948 emitPredicate(i);
949 }
950
951 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
952 {
953 emitNOP(i); // TODO
954 }
955
956 static inline bool
957 isNextIndependentTex(const TexInstruction *i)
958 {
959 if (!i->next || !isTextureOp(i->next->op))
960 return false;
961 if (i->getDef(0)->interfers(i->next->getSrc(0)))
962 return false;
963 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
964 }
965
966 void
967 CodeEmitterGK110::emitTEX(const TexInstruction *i)
968 {
969 const bool ind = i->tex.rIndirectSrc >= 0;
970
971 if (ind) {
972 code[0] = 0x00000002;
973 switch (i->op) {
974 case OP_TXD:
975 code[1] = 0x7e000000;
976 break;
977 default:
978 code[1] = 0x7d800000;
979 break;
980 }
981 } else {
982 switch (i->op) {
983 case OP_TXD:
984 code[0] = 0x00000002;
985 code[1] = 0x76000000;
986 break;
987 default:
988 code[0] = 0x00000001;
989 code[1] = 0x60000000;
990 break;
991 }
992 code[1] |= i->tex.r << 15;
993 }
994
995 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
996
997 // if (i->tex.liveOnly)
998 // ?
999
1000 switch (i->op) {
1001 case OP_TEX: break;
1002 case OP_TXB: code[1] |= 0x2000; break;
1003 case OP_TXL: code[1] |= 0x3000; break;
1004 case OP_TXF: break; // XXX
1005 case OP_TXG: break; // XXX
1006 case OP_TXD: break;
1007 default:
1008 assert(!"invalid texture op");
1009 break;
1010 }
1011 /*
1012 if (i->op == OP_TXF) {
1013 if (!i->tex.levelZero)
1014 code[1] |= 0x02000000;
1015 } else */
1016 if (i->tex.levelZero) {
1017 code[1] |= 0x1000;
1018 }
1019
1020 // if (i->op != OP_TXD && i->tex.derivAll)
1021 // code[1] |= 1 << 13;
1022
1023 emitPredicate(i);
1024
1025 code[1] |= i->tex.mask << 2;
1026
1027 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1028
1029 defId(i->def(0), 2);
1030 srcId(i->src(0), 10);
1031 srcId(i, src1, 23);
1032
1033 // if (i->op == OP_TXG) code[0] |= i->tex.gatherComp << 5;
1034
1035 // texture target:
1036 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1037 if (i->tex.target.isArray())
1038 code[1] |= 0x40;
1039 // if (i->tex.target.isShadow())
1040 // ?
1041 // if (i->tex.target == TEX_TARGET_2D_MS ||
1042 // i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1043 // ?
1044
1045 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1046 // ?
1047 }
1048
1049 // if (i->tex.useOffsets)
1050 // ?
1051 }
1052
1053 void
1054 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1055 {
1056 emitNOP(i); // TODO
1057 }
1058
1059 void
1060 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1061 {
1062 emitNOP(i); // TODO
1063 }
1064
1065 void
1066 CodeEmitterGK110::emitFlow(const Instruction *i)
1067 {
1068 const FlowInstruction *f = i->asFlow();
1069
1070 unsigned mask; // bit 0: predicate, bit 1: target
1071
1072 code[0] = 0x00000000;
1073
1074 switch (i->op) {
1075 case OP_BRA:
1076 code[1] = f->absolute ? 0x00000 : 0x12000000; // XXX
1077 // if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1078 // code[0] |= 0x4000;
1079 mask = 3;
1080 break;
1081 case OP_CALL:
1082 code[1] = f->absolute ? 0x00000 : 0x13000000; // XXX
1083 // if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1084 // code[0] |= 0x4000;
1085 mask = 2;
1086 break;
1087
1088 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1089 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1090 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break; // XXX: guess
1091 case OP_BREAK: code[1] = 0x1a800000; mask = 1; break; // XXX: guess
1092 case OP_CONT: code[1] = 0x1b000000; mask = 1; break; // XXX: guess
1093
1094 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1095 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break; // XXX: guess
1096 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break; // XXX: guess
1097 case OP_PRERET: code[1] = 0x16000000; mask = 2; break; // XXX: guess
1098
1099 case OP_QUADON: code[1] = 0x1c000000; mask = 0; break; // XXX: guess
1100 case OP_QUADPOP: code[1] = 0x1c800000; mask = 0; break; // XXX: guess
1101 case OP_BRKPT: code[1] = 0x1d000000; mask = 0; break; // XXX: guess
1102 default:
1103 assert(!"invalid flow operation");
1104 return;
1105 }
1106
1107 if (mask & 1) {
1108 emitPredicate(i);
1109 if (i->flagsSrc < 0)
1110 code[0] |= 0x3c;
1111 }
1112
1113 if (!f)
1114 return;
1115
1116 // TODO
1117 /*
1118 if (f->allWarp)
1119 code[0] |= 1 << 15;
1120 if (f->limit)
1121 code[0] |= 1 << 16;
1122 */
1123
1124 if (f->op == OP_CALL) {
1125 if (f->builtin) {
1126 assert(f->absolute);
1127 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1128 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1129 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1130 } else {
1131 assert(!f->absolute);
1132 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1133 code[0] |= (pcRel & 0x1ff) << 23;
1134 code[1] |= (pcRel >> 9) & 0x7fff;
1135 }
1136 } else
1137 if (mask & 2) {
1138 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1139 // currently we don't want absolute branches
1140 assert(!f->absolute);
1141 code[0] |= (pcRel & 0x1ff) << 23;
1142 code[1] |= (pcRel >> 9) & 0x7fff;
1143 }
1144 }
1145
1146 void
1147 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1148 {
1149 emitNOP(i); // TODO
1150 }
1151
1152 void
1153 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1154 {
1155 uint32_t offset = i->src(0).get()->reg.data.offset;
1156
1157 code[0] = 0x00000002 | (offset << 23);
1158 code[1] = 0x7ec00000 | (offset >> 9);
1159
1160 #if 0
1161 if (i->perPatch)
1162 code[0] |= 0x100;
1163 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1164 code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
1165 #endif
1166
1167 emitPredicate(i);
1168
1169 defId(i->def(0), 2);
1170 srcId(i->src(0).getIndirect(0), 10);
1171 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1172 }
1173
1174 void
1175 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1176 {
1177 uint32_t offset = i->src(0).get()->reg.data.offset;
1178
1179 code[0] = 0x00000002 | (offset << 23);
1180 code[1] = 0x7f000000 | (offset >> 9);
1181
1182 #if 0
1183 if (i->perPatch)
1184 code[0] |= 0x100;
1185 #endif
1186
1187 emitPredicate(i);
1188
1189 assert(i->src(1).getFile() == FILE_GPR);
1190
1191 srcId(i->src(0).getIndirect(0), 10);
1192 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1193 srcId(i->src(1), 2);
1194 }
1195
1196 void
1197 CodeEmitterGK110::emitOUT(const Instruction *i)
1198 {
1199 emitNOP(i); // TODO
1200 }
1201
1202 void
1203 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1204 {
1205 code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
1206 }
1207
1208 void
1209 CodeEmitterGK110::emitINTERP(const Instruction *i)
1210 {
1211 const uint32_t base = i->getSrc(0)->reg.data.offset;
1212
1213 code[0] = 0x00000002 | (base << 31);
1214 code[1] = 0x74800000 | (base >> 1);
1215
1216 if (i->saturate)
1217 code[1] |= 1 << 18;
1218
1219 if (i->op == OP_PINTERP)
1220 srcId(i->src(1), 23);
1221 else
1222 code[0] |= 0xff << 23;
1223
1224 srcId(i->src(0).getIndirect(0), 10);
1225 emitInterpMode(i);
1226
1227 emitPredicate(i);
1228 defId(i->def(0), 2);
1229
1230 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1231 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1232 else
1233 code[1] |= 0xff << 10;
1234 }
1235
1236 void
1237 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1238 {
1239 uint8_t n;
1240
1241 switch (ty) {
1242 case TYPE_U8:
1243 n = 0;
1244 break;
1245 case TYPE_S8:
1246 n = 1;
1247 break;
1248 case TYPE_U16:
1249 n = 2;
1250 break;
1251 case TYPE_S16:
1252 n = 3;
1253 break;
1254 case TYPE_F32:
1255 case TYPE_U32:
1256 case TYPE_S32:
1257 n = 4;
1258 break;
1259 case TYPE_F64:
1260 case TYPE_U64:
1261 case TYPE_S64:
1262 n = 5;
1263 break;
1264 case TYPE_B128:
1265 n = 6;
1266 break;
1267 default:
1268 n = 0;
1269 assert(!"invalid ld/st type");
1270 break;
1271 }
1272 code[pos / 32] |= n << (pos % 32);
1273 }
1274
1275 void
1276 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1277 {
1278 uint8_t n;
1279
1280 switch (c) {
1281 case CACHE_CA:
1282 // case CACHE_WB:
1283 n = 0;
1284 break;
1285 case CACHE_CG:
1286 n = 1;
1287 break;
1288 case CACHE_CS:
1289 n = 2;
1290 break;
1291 case CACHE_CV:
1292 // case CACHE_WT:
1293 n = 3;
1294 break;
1295 default:
1296 n = 0;
1297 assert(!"invalid caching mode");
1298 break;
1299 }
1300 code[pos / 32] |= n << (pos % 32);
1301 }
1302
1303 void
1304 CodeEmitterGK110::emitSTORE(const Instruction *i)
1305 {
1306 int32_t offset = SDATA(i->src(0)).offset;
1307
1308 switch (i->src(0).getFile()) {
1309 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1310 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1311 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1312 default:
1313 assert(!"invalid memory file");
1314 break;
1315 }
1316
1317 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1318 offset &= 0xffffff;
1319
1320 if (code[0] & 0x2) {
1321 emitLoadStoreType(i->dType, 0x33);
1322 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1323 emitCachingMode(i->cache, 0x2f);
1324 } else {
1325 emitLoadStoreType(i->dType, 0x38);
1326 emitCachingMode(i->cache, 0x3b);
1327 }
1328 code[0] |= offset << 23;
1329 code[1] |= offset >> 9;
1330
1331 emitPredicate(i);
1332
1333 srcId(i->src(1), 2);
1334 srcId(i->src(0).getIndirect(0), 10);
1335 }
1336
1337 void
1338 CodeEmitterGK110::emitLOAD(const Instruction *i)
1339 {
1340 int32_t offset = SDATA(i->src(0)).offset;
1341
1342 switch (i->src(0).getFile()) {
1343 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1344 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1345 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1346 case FILE_MEMORY_CONST:
1347 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1348 emitMOV(i);
1349 return;
1350 }
1351 offset &= 0xffff;
1352 code[0] = 0x00000002;
1353 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1354 break;
1355 default:
1356 assert(!"invalid memory file");
1357 break;
1358 }
1359
1360 if (code[0] & 0x2) {
1361 offset &= 0xffffff;
1362 emitLoadStoreType(i->dType, 0x33);
1363 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1364 emitCachingMode(i->cache, 0x2f);
1365 } else {
1366 emitLoadStoreType(i->dType, 0x38);
1367 emitCachingMode(i->cache, 0x3b);
1368 }
1369 code[0] |= offset << 23;
1370 code[1] |= offset >> 9;
1371
1372 emitPredicate(i);
1373
1374 defId(i->def(0), 2);
1375 srcId(i->src(0).getIndirect(0), 10);
1376 }
1377
1378 uint8_t
1379 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1380 {
1381 switch (SDATA(ref).sv.sv) {
1382 case SV_LANEID: return 0x00;
1383 case SV_PHYSID: return 0x03;
1384 case SV_VERTEX_COUNT: return 0x10;
1385 case SV_INVOCATION_ID: return 0x11;
1386 case SV_YDIR: return 0x12;
1387 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1388 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1389 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1390 case SV_GRIDID: return 0x2c;
1391 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1392 case SV_LBASE: return 0x34;
1393 case SV_SBASE: return 0x30;
1394 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1395 default:
1396 assert(!"no sreg for system value");
1397 return 0;
1398 }
1399 }
1400
1401 void
1402 CodeEmitterGK110::emitMOV(const Instruction *i)
1403 {
1404 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1405 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1406 code[1] = 0x86400000;
1407 emitPredicate(i);
1408 defId(i->def(0), 2);
1409 } else
1410 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1411 code[0] = 0x00000002 | (i->lanes << 14);
1412 code[1] = 0x74000000;
1413 emitPredicate(i);
1414 defId(i->def(0), 2);
1415 setImmediate32(i, 0, Modifier(0));
1416 } else
1417 if (i->src(0).getFile() == FILE_PREDICATE) {
1418 // TODO
1419 } else {
1420 emitForm_C(i, 0x24c, 2);
1421 code[1] |= i->lanes << 10;
1422 }
1423 }
1424
1425 bool
1426 CodeEmitterGK110::emitInstruction(Instruction *insn)
1427 {
1428 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1429
1430 if (insn->encSize != 8) {
1431 ERROR("skipping unencodable instruction: ");
1432 insn->print();
1433 return false;
1434 } else
1435 if (codeSize + size > codeSizeLimit) {
1436 ERROR("code emitter output buffer too small\n");
1437 return false;
1438 }
1439
1440 if (writeIssueDelays) {
1441 int id = (codeSize & 0x3f) / 8 - 1;
1442 if (id < 0) {
1443 id += 1;
1444 code[0] = 0x00000000; // cf issue delay "instruction"
1445 code[1] = 0x08000000;
1446 code += 2;
1447 codeSize += 8;
1448 }
1449 uint32_t *data = code - (id * 2 + 2);
1450
1451 switch (id) {
1452 case 0: data[0] |= insn->sched << 2; break;
1453 case 1: data[0] |= insn->sched << 10; break;
1454 case 2: data[0] |= insn->sched << 18; break;
1455 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1456 case 4: data[1] |= insn->sched << 2;
1457 case 5: data[1] |= insn->sched << 10; break;
1458 case 6: data[1] |= insn->sched << 18; break;
1459 default:
1460 assert(0);
1461 break;
1462 }
1463 }
1464
1465 // assert that instructions with multiple defs don't corrupt registers
1466 for (int d = 0; insn->defExists(d); ++d)
1467 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1468
1469 switch (insn->op) {
1470 case OP_MOV:
1471 case OP_RDSV:
1472 emitMOV(insn);
1473 break;
1474 case OP_NOP:
1475 break;
1476 case OP_LOAD:
1477 emitLOAD(insn);
1478 break;
1479 case OP_STORE:
1480 emitSTORE(insn);
1481 break;
1482 case OP_LINTERP:
1483 case OP_PINTERP:
1484 emitINTERP(insn);
1485 break;
1486 case OP_VFETCH:
1487 emitVFETCH(insn);
1488 break;
1489 case OP_EXPORT:
1490 emitEXPORT(insn);
1491 break;
1492 case OP_PFETCH:
1493 emitPFETCH(insn);
1494 break;
1495 case OP_EMIT:
1496 case OP_RESTART:
1497 emitOUT(insn);
1498 break;
1499 case OP_ADD:
1500 case OP_SUB:
1501 if (isFloatType(insn->dType))
1502 emitFADD(insn);
1503 else
1504 emitUADD(insn);
1505 break;
1506 case OP_MUL:
1507 if (isFloatType(insn->dType))
1508 emitFMUL(insn);
1509 else
1510 emitIMUL(insn);
1511 break;
1512 case OP_MAD:
1513 case OP_FMA:
1514 if (isFloatType(insn->dType))
1515 emitFMAD(insn);
1516 else
1517 emitIMAD(insn);
1518 break;
1519 case OP_SAD:
1520 emitISAD(insn);
1521 break;
1522 case OP_NOT:
1523 emitNOT(insn);
1524 break;
1525 case OP_AND:
1526 emitLogicOp(insn, 0);
1527 break;
1528 case OP_OR:
1529 emitLogicOp(insn, 1);
1530 break;
1531 case OP_XOR:
1532 emitLogicOp(insn, 2);
1533 break;
1534 case OP_SHL:
1535 case OP_SHR:
1536 emitShift(insn);
1537 break;
1538 case OP_SET:
1539 case OP_SET_AND:
1540 case OP_SET_OR:
1541 case OP_SET_XOR:
1542 emitSET(insn->asCmp());
1543 break;
1544 case OP_SELP:
1545 emitSELP(insn);
1546 break;
1547 case OP_SLCT:
1548 emitSLCT(insn->asCmp());
1549 break;
1550 case OP_MIN:
1551 case OP_MAX:
1552 emitMINMAX(insn);
1553 break;
1554 case OP_ABS:
1555 case OP_NEG:
1556 case OP_CEIL:
1557 case OP_FLOOR:
1558 case OP_TRUNC:
1559 case OP_CVT:
1560 case OP_SAT:
1561 emitCVT(insn);
1562 break;
1563 case OP_RSQ:
1564 emitSFnOp(insn, 5);
1565 break;
1566 case OP_RCP:
1567 emitSFnOp(insn, 4);
1568 break;
1569 case OP_LG2:
1570 emitSFnOp(insn, 3);
1571 break;
1572 case OP_EX2:
1573 emitSFnOp(insn, 2);
1574 break;
1575 case OP_SIN:
1576 emitSFnOp(insn, 1);
1577 break;
1578 case OP_COS:
1579 emitSFnOp(insn, 0);
1580 break;
1581 case OP_PRESIN:
1582 case OP_PREEX2:
1583 emitPreOp(insn);
1584 break;
1585 case OP_TEX:
1586 case OP_TXB:
1587 case OP_TXL:
1588 case OP_TXD:
1589 case OP_TXF:
1590 emitTEX(insn->asTex());
1591 break;
1592 case OP_TXQ:
1593 emitTXQ(insn->asTex());
1594 break;
1595 case OP_TEXBAR:
1596 emitTEXBAR(insn);
1597 break;
1598 case OP_BRA:
1599 case OP_CALL:
1600 case OP_PRERET:
1601 case OP_RET:
1602 case OP_DISCARD:
1603 case OP_EXIT:
1604 case OP_PRECONT:
1605 case OP_CONT:
1606 case OP_PREBREAK:
1607 case OP_BREAK:
1608 case OP_JOINAT:
1609 case OP_BRKPT:
1610 case OP_QUADON:
1611 case OP_QUADPOP:
1612 emitFlow(insn);
1613 break;
1614 case OP_QUADOP:
1615 emitQUADOP(insn, insn->subOp, insn->lanes);
1616 break;
1617 case OP_DFDX:
1618 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1619 break;
1620 case OP_DFDY:
1621 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1622 break;
1623 case OP_POPCNT:
1624 emitPOPC(insn);
1625 break;
1626 case OP_JOIN:
1627 emitNOP(insn);
1628 insn->join = 1;
1629 break;
1630 case OP_PHI:
1631 case OP_UNION:
1632 case OP_CONSTRAINT:
1633 ERROR("operation should have been eliminated");
1634 return false;
1635 case OP_EXP:
1636 case OP_LOG:
1637 case OP_SQRT:
1638 case OP_POW:
1639 ERROR("operation should have been lowered\n");
1640 return false;
1641 default:
1642 ERROR("unknow op\n");
1643 return false;
1644 }
1645
1646 if (insn->join)
1647 code[0] |= 1 << 22;
1648
1649 code += 2;
1650 codeSize += 8;
1651 return true;
1652 }
1653
1654 uint32_t
1655 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1656 {
1657 // No more short instruction encodings.
1658 return 8;
1659 }
1660
1661 void
1662 CodeEmitterGK110::prepareEmission(Function *func)
1663 {
1664 const Target *targ = func->getProgram()->getTarget();
1665
1666 CodeEmitter::prepareEmission(func);
1667
1668 if (targ->hasSWSched)
1669 calculateSchedDataNVC0(targ, func);
1670 }
1671
1672 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1673 : CodeEmitter(target),
1674 targNVC0(target),
1675 writeIssueDelays(target->hasSWSched)
1676 {
1677 code = NULL;
1678 codeSize = codeSizeLimit = 0;
1679 relocInfo = NULL;
1680 }
1681
1682 CodeEmitter *
1683 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1684 {
1685 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1686 emit->setProgramType(type);
1687 return emit;
1688 }
1689
1690 } // namespace nv50_ir