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nv50/ir/gk110: use shl/shr instead of lshf/rshf so that c[] is supported
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_emit_gk110.cpp
1 /*
2 * Copyright 2012 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir_target_nvc0.h"
24
25 // CodeEmitter for GK110 encoding of the Fermi/Kepler ISA.
26
27 namespace nv50_ir {
28
29 class CodeEmitterGK110 : public CodeEmitter
30 {
31 public:
32 CodeEmitterGK110(const TargetNVC0 *);
33
34 virtual bool emitInstruction(Instruction *);
35 virtual uint32_t getMinEncodingSize(const Instruction *) const;
36 virtual void prepareEmission(Function *);
37
38 inline void setProgramType(Program::Type pType) { progType = pType; }
39
40 private:
41 const TargetNVC0 *targNVC0;
42
43 Program::Type progType;
44
45 const bool writeIssueDelays;
46
47 private:
48 void emitForm_21(const Instruction *, uint32_t opc2, uint32_t opc1);
49 void emitForm_C(const Instruction *, uint32_t opc, uint8_t ctg);
50 void emitForm_L(const Instruction *, uint32_t opc, uint8_t ctg, Modifier);
51
52 void emitPredicate(const Instruction *);
53
54 void setCAddress14(const ValueRef&);
55 void setShortImmediate(const Instruction *, const int s);
56 void setImmediate32(const Instruction *, const int s, Modifier);
57
58 void modNegAbsF32_3b(const Instruction *, const int s);
59
60 void emitCondCode(CondCode cc, int pos, uint8_t mask);
61 void emitInterpMode(const Instruction *);
62 void emitLoadStoreType(DataType ty, const int pos);
63 void emitCachingMode(CacheMode c, const int pos);
64
65 inline uint8_t getSRegEncoding(const ValueRef&);
66
67 void emitRoundMode(RoundMode, const int pos, const int rintPos);
68 void emitRoundModeF(RoundMode, const int pos);
69 void emitRoundModeI(RoundMode, const int pos);
70
71 void emitNegAbs12(const Instruction *);
72
73 void emitNOP(const Instruction *);
74
75 void emitLOAD(const Instruction *);
76 void emitSTORE(const Instruction *);
77 void emitMOV(const Instruction *);
78
79 void emitINTERP(const Instruction *);
80 void emitPFETCH(const Instruction *);
81 void emitVFETCH(const Instruction *);
82 void emitEXPORT(const Instruction *);
83 void emitOUT(const Instruction *);
84
85 void emitUADD(const Instruction *);
86 void emitFADD(const Instruction *);
87 void emitIMUL(const Instruction *);
88 void emitFMUL(const Instruction *);
89 void emitIMAD(const Instruction *);
90 void emitISAD(const Instruction *);
91 void emitFMAD(const Instruction *);
92
93 void emitNOT(const Instruction *);
94 void emitLogicOp(const Instruction *, uint8_t subOp);
95 void emitPOPC(const Instruction *);
96 void emitINSBF(const Instruction *);
97 void emitShift(const Instruction *);
98
99 void emitSFnOp(const Instruction *, uint8_t subOp);
100
101 void emitCVT(const Instruction *);
102 void emitMINMAX(const Instruction *);
103 void emitPreOp(const Instruction *);
104
105 void emitSET(const CmpInstruction *);
106 void emitSLCT(const CmpInstruction *);
107 void emitSELP(const Instruction *);
108
109 void emitTEXBAR(const Instruction *);
110 void emitTEX(const TexInstruction *);
111 void emitTEXCSAA(const TexInstruction *);
112 void emitTXQ(const TexInstruction *);
113
114 void emitQUADOP(const Instruction *, uint8_t qOp, uint8_t laneMask);
115
116 void emitFlow(const Instruction *);
117
118 inline void defId(const ValueDef&, const int pos);
119 inline void srcId(const ValueRef&, const int pos);
120 inline void srcId(const ValueRef *, const int pos);
121 inline void srcId(const Instruction *, int s, const int pos);
122
123 inline void srcAddr32(const ValueRef&, const int pos); // address / 4
124
125 inline bool isLIMM(const ValueRef&, DataType ty, bool mod = false);
126 };
127
128 #define GK110_GPR_ZERO 255
129
130 #define NEG_(b, s) \
131 if (i->src(s).mod.neg()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
132 #define ABS_(b, s) \
133 if (i->src(s).mod.abs()) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
134
135 #define NOT_(b, s) if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT)) \
136 code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
137
138 #define FTZ_(b) if (i->ftz) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
139
140 #define SAT_(b) if (i->saturate) code[(0x##b) / 32] |= 1 << ((0x##b) % 32)
141
142 #define RND_(b, t) emitRoundMode##t(i->rnd, 0x##b)
143
144 #define SDATA(a) ((a).rep()->reg.data)
145 #define DDATA(a) ((a).rep()->reg.data)
146
147 void CodeEmitterGK110::srcId(const ValueRef& src, const int pos)
148 {
149 code[pos / 32] |= (src.get() ? SDATA(src).id : GK110_GPR_ZERO) << (pos % 32);
150 }
151
152 void CodeEmitterGK110::srcId(const ValueRef *src, const int pos)
153 {
154 code[pos / 32] |= (src ? SDATA(*src).id : GK110_GPR_ZERO) << (pos % 32);
155 }
156
157 void CodeEmitterGK110::srcId(const Instruction *insn, int s, int pos)
158 {
159 int r = insn->srcExists(s) ? SDATA(insn->src(s)).id : GK110_GPR_ZERO;
160 code[pos / 32] |= r << (pos % 32);
161 }
162
163 void CodeEmitterGK110::srcAddr32(const ValueRef& src, const int pos)
164 {
165 code[pos / 32] |= (SDATA(src).offset >> 2) << (pos % 32);
166 }
167
168 void CodeEmitterGK110::defId(const ValueDef& def, const int pos)
169 {
170 code[pos / 32] |= (def.get() ? DDATA(def).id : GK110_GPR_ZERO) << (pos % 32);
171 }
172
173 bool CodeEmitterGK110::isLIMM(const ValueRef& ref, DataType ty, bool mod)
174 {
175 const ImmediateValue *imm = ref.get()->asImm();
176
177 return imm && (imm->reg.data.u32 & ((ty == TYPE_F32) ? 0xfff : 0xfff00000));
178 }
179
180 void
181 CodeEmitterGK110::emitRoundMode(RoundMode rnd, const int pos, const int rintPos)
182 {
183 bool rint = false;
184 uint8_t n;
185
186 switch (rnd) {
187 case ROUND_MI: rint = true; /* fall through */ case ROUND_M: n = 1; break;
188 case ROUND_PI: rint = true; /* fall through */ case ROUND_P: n = 2; break;
189 case ROUND_ZI: rint = true; /* fall through */ case ROUND_Z: n = 3; break;
190 default:
191 rint = rnd == ROUND_NI;
192 n = 0;
193 assert(rnd == ROUND_N || rnd == ROUND_NI);
194 break;
195 }
196 code[pos / 32] |= n << (pos % 32);
197 if (rint && rintPos >= 0)
198 code[rintPos / 32] |= 1 << (rintPos % 32);
199 }
200
201 void
202 CodeEmitterGK110::emitRoundModeF(RoundMode rnd, const int pos)
203 {
204 uint8_t n;
205
206 switch (rnd) {
207 case ROUND_M: n = 1; break;
208 case ROUND_P: n = 2; break;
209 case ROUND_Z: n = 3; break;
210 default:
211 n = 0;
212 assert(rnd == ROUND_N);
213 break;
214 }
215 code[pos / 32] |= n << (pos % 32);
216 }
217
218 void
219 CodeEmitterGK110::emitRoundModeI(RoundMode rnd, const int pos)
220 {
221 uint8_t n;
222
223 switch (rnd) {
224 case ROUND_MI: n = 1; break;
225 case ROUND_PI: n = 2; break;
226 case ROUND_ZI: n = 3; break;
227 default:
228 n = 0;
229 assert(rnd == ROUND_NI);
230 break;
231 }
232 code[pos / 32] |= n << (pos % 32);
233 }
234
235 void CodeEmitterGK110::emitCondCode(CondCode cc, int pos, uint8_t mask)
236 {
237 uint8_t n;
238
239 switch (cc) {
240 case CC_FL: n = 0x00; break;
241 case CC_LT: n = 0x01; break;
242 case CC_EQ: n = 0x02; break;
243 case CC_LE: n = 0x03; break;
244 case CC_GT: n = 0x04; break;
245 case CC_NE: n = 0x05; break;
246 case CC_GE: n = 0x06; break;
247 case CC_LTU: n = 0x09; break;
248 case CC_EQU: n = 0x0a; break;
249 case CC_LEU: n = 0x0b; break;
250 case CC_GTU: n = 0x0c; break;
251 case CC_NEU: n = 0x0d; break;
252 case CC_GEU: n = 0x0e; break;
253 case CC_TR: n = 0x0f; break;
254 case CC_NO: n = 0x10; break;
255 case CC_NC: n = 0x11; break;
256 case CC_NS: n = 0x12; break;
257 case CC_NA: n = 0x13; break;
258 case CC_A: n = 0x14; break;
259 case CC_S: n = 0x15; break;
260 case CC_C: n = 0x16; break;
261 case CC_O: n = 0x17; break;
262 default:
263 n = 0;
264 assert(!"invalid condition code");
265 break;
266 }
267 code[pos / 32] |= (n & mask) << (pos % 32);
268 }
269
270 void
271 CodeEmitterGK110::emitPredicate(const Instruction *i)
272 {
273 if (i->predSrc >= 0) {
274 srcId(i->src(i->predSrc), 18);
275 if (i->cc == CC_NOT_P)
276 code[0] |= 8 << 18; // negate
277 assert(i->getPredicate()->reg.file == FILE_PREDICATE);
278 } else {
279 code[0] |= 7 << 18;
280 }
281 }
282
283 void
284 CodeEmitterGK110::setCAddress14(const ValueRef& src)
285 {
286 const int32_t addr = src.get()->asSym()->reg.data.offset / 4;
287
288 code[0] |= (addr & 0x01ff) << 23;
289 code[1] |= (addr & 0x3e00) >> 9;
290 }
291
292 void
293 CodeEmitterGK110::setShortImmediate(const Instruction *i, const int s)
294 {
295 const uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
296 const uint64_t u64 = i->getSrc(s)->asImm()->reg.data.u64;
297
298 if (i->sType == TYPE_F32) {
299 assert(!(u32 & 0x00000fff));
300 code[0] |= ((u32 & 0x001ff000) >> 12) << 23;
301 code[1] |= ((u32 & 0x7fe00000) >> 21);
302 code[1] |= ((u32 & 0x80000000) >> 4);
303 } else
304 if (i->sType == TYPE_F64) {
305 assert(!(u64 & 0x00000fffffffffffULL));
306 code[0] |= ((u64 & 0x001ff00000000000ULL) >> 44) << 23;
307 code[1] |= ((u64 & 0x7fe0000000000000ULL) >> 53);
308 code[1] |= ((u64 & 0x8000000000000000ULL) >> 36);
309 } else {
310 assert((u32 & 0xfff00000) == 0 || (u32 & 0xfff00000) == 0xfff00000);
311 code[0] |= (u32 & 0x001ff) << 23;
312 code[1] |= (u32 & 0x7fe00) >> 9;
313 code[1] |= (u32 & 0x80000) << 8;
314 }
315 }
316
317 void
318 CodeEmitterGK110::setImmediate32(const Instruction *i, const int s,
319 Modifier mod)
320 {
321 uint32_t u32 = i->getSrc(s)->asImm()->reg.data.u32;
322
323 if (mod) {
324 ImmediateValue imm(i->getSrc(s)->asImm(), i->sType);
325 mod.applyTo(imm);
326 u32 = imm.reg.data.u32;
327 }
328
329 code[0] |= u32 << 23;
330 code[1] |= u32 >> 9;
331 }
332
333 void
334 CodeEmitterGK110::emitForm_L(const Instruction *i, uint32_t opc, uint8_t ctg,
335 Modifier mod)
336 {
337 code[0] = ctg;
338 code[1] = opc << 20;
339
340 emitPredicate(i);
341
342 defId(i->def(0), 2);
343
344 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
345 switch (i->src(s).getFile()) {
346 case FILE_GPR:
347 srcId(i->src(s), s ? 42 : 10);
348 break;
349 case FILE_IMMEDIATE:
350 setImmediate32(i, s, mod);
351 break;
352 default:
353 break;
354 }
355 }
356 }
357
358
359 void
360 CodeEmitterGK110::emitForm_C(const Instruction *i, uint32_t opc, uint8_t ctg)
361 {
362 code[0] = ctg;
363 code[1] = opc << 20;
364
365 emitPredicate(i);
366
367 defId(i->def(0), 2);
368
369 switch (i->src(0).getFile()) {
370 case FILE_MEMORY_CONST:
371 code[1] |= 0x4 << 28;
372 setCAddress14(i->src(0));
373 break;
374 case FILE_GPR:
375 code[1] |= 0xc << 28;
376 srcId(i->src(0), 23);
377 break;
378 default:
379 assert(0);
380 break;
381 }
382 }
383
384 // 0x2 for GPR, c[] and 0x1 for short immediate
385 void
386 CodeEmitterGK110::emitForm_21(const Instruction *i, uint32_t opc2,
387 uint32_t opc1)
388 {
389 const bool imm = i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE;
390
391 int s1 = 23;
392 if (i->srcExists(2) && i->src(2).getFile() == FILE_MEMORY_CONST)
393 s1 = 42;
394
395 if (imm) {
396 code[0] = 0x1;
397 code[1] = opc1 << 20;
398 } else {
399 code[0] = 0x2;
400 code[1] = (0xc << 28) | (opc2 << 20);
401 }
402
403 emitPredicate(i);
404
405 defId(i->def(0), 2);
406
407 for (int s = 0; s < 3 && i->srcExists(s); ++s) {
408 switch (i->src(s).getFile()) {
409 case FILE_MEMORY_CONST:
410 code[1] &= (s == 2) ? ~(0x4 << 28) : ~(0x8 << 28);
411 setCAddress14(i->src(s));
412 code[1] |= i->getSrc(s)->reg.fileIndex << 5;
413 break;
414 case FILE_IMMEDIATE:
415 setShortImmediate(i, s);
416 break;
417 case FILE_GPR:
418 srcId(i->src(s), s ? ((s == 2) ? 42 : s1) : 10);
419 break;
420 default:
421 // ignore here, can be predicate or flags, but must not be address
422 break;
423 }
424 }
425 // 0x0 = invalid
426 // 0xc = rrr
427 // 0x8 = rrc
428 // 0x4 = rcr
429 assert(imm || (code[1] & (0xc << 28)));
430 }
431
432 inline void
433 CodeEmitterGK110::modNegAbsF32_3b(const Instruction *i, const int s)
434 {
435 if (i->src(s).mod.abs()) code[1] &= ~(1 << 27);
436 if (i->src(s).mod.neg()) code[1] ^= (1 << 27);
437 }
438
439 void
440 CodeEmitterGK110::emitNOP(const Instruction *i)
441 {
442 code[0] = 0x00003c02;
443 code[1] = 0x85800000;
444
445 if (i)
446 emitPredicate(i);
447 else
448 code[0] = 0x001c3c02;
449 }
450
451 void
452 CodeEmitterGK110::emitFMAD(const Instruction *i)
453 {
454 assert(!isLIMM(i->src(1), TYPE_F32));
455
456 emitForm_21(i, 0x0c0, 0x940);
457
458 NEG_(34, 2);
459 SAT_(35);
460 RND_(36, F);
461 FTZ_(38);
462
463 bool neg1 = (i->src(0).mod ^ i->src(1).mod).neg();
464
465 if (code[0] & 0x1) {
466 if (neg1)
467 code[1] ^= 1 << 27;
468 } else
469 if (neg1) {
470 code[1] |= 1 << 19;
471 }
472 }
473
474 void
475 CodeEmitterGK110::emitFMUL(const Instruction *i)
476 {
477 bool neg = (i->src(0).mod ^ i->src(1).mod).neg();
478
479 assert(i->postFactor >= -3 && i->postFactor <= 3);
480
481 if (isLIMM(i->src(1), TYPE_F32)) {
482 emitForm_L(i, 0x200, 0x2, Modifier(0));
483
484 FTZ_(38);
485 SAT_(3a);
486 if (neg)
487 code[1] ^= 1 << 22;
488
489 assert(i->postFactor == 0);
490 } else {
491 emitForm_21(i, 0x234, 0xc34);
492
493 RND_(2a, F);
494 FTZ_(2f);
495 SAT_(35);
496
497 if (code[0] & 0x1) {
498 if (neg)
499 code[1] ^= 1 << 27;
500 } else
501 if (neg) {
502 code[1] |= 1 << 19;
503 }
504 }
505 }
506
507 void
508 CodeEmitterGK110::emitIMUL(const Instruction *i)
509 {
510 assert(!i->src(0).mod.neg() && !i->src(1).mod.neg());
511 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
512
513 if (isLIMM(i->src(1), TYPE_S32)) {
514 emitForm_L(i, 0x280, 2, Modifier(0));
515
516 assert(i->subOp != NV50_IR_SUBOP_MUL_HIGH);
517
518 if (i->sType == TYPE_S32)
519 code[1] |= 3 << 25;
520 } else {
521 emitForm_21(i, 0x21c, 0xc1c);
522
523 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
524 code[1] |= 1 << 10;
525 if (i->sType == TYPE_S32)
526 code[1] |= 3 << 11;
527 }
528 }
529
530 void
531 CodeEmitterGK110::emitFADD(const Instruction *i)
532 {
533 if (isLIMM(i->src(1), TYPE_F32)) {
534 assert(i->rnd == ROUND_N);
535 assert(!i->saturate);
536
537 Modifier mod = i->src(1).mod ^
538 Modifier(i->op == OP_SUB ? NV50_IR_MOD_NEG : 0);
539
540 emitForm_L(i, 0x400, 0, mod);
541
542 FTZ_(3a);
543 NEG_(3b, 0);
544 ABS_(39, 0);
545 } else {
546 emitForm_21(i, 0x22c, 0xc2c);
547
548 FTZ_(2f);
549 RND_(2a, F);
550 ABS_(31, 0);
551 NEG_(33, 0);
552
553 if (code[0] & 0x1) {
554 modNegAbsF32_3b(i, 1);
555 if (i->op == OP_SUB) code[1] ^= 1 << 27;
556 } else {
557 ABS_(34, 1);
558 NEG_(30, 1);
559 if (i->op == OP_SUB) code[1] ^= 1 << 16;
560 }
561 }
562 }
563
564 void
565 CodeEmitterGK110::emitUADD(const Instruction *i)
566 {
567 uint8_t addOp = (i->src(0).mod.neg() << 1) | i->src(1).mod.neg();
568
569 if (i->op == OP_SUB)
570 addOp ^= 1;
571
572 assert(!i->src(0).mod.abs() && !i->src(1).mod.abs());
573
574 if (isLIMM(i->src(1), TYPE_S32)) {
575 emitForm_L(i, 0x400, 1, Modifier((addOp & 1) ? NV50_IR_MOD_NEG : 0));
576
577 if (addOp & 2)
578 code[1] |= 1 << 27;
579
580 assert(!i->defExists(1));
581 assert(i->flagsSrc < 0);
582
583 SAT_(39);
584 } else {
585 emitForm_21(i, 0x208, 0xc08);
586
587 assert(addOp != 3); // would be add-plus-one
588
589 code[1] |= addOp << 19;
590
591 if (i->defExists(1))
592 code[1] |= 1 << 18; // write carry
593 if (i->flagsSrc >= 0)
594 code[1] |= 1 << 14; // add carry
595
596 SAT_(35);
597 }
598 }
599
600 // TODO: shl-add
601 void
602 CodeEmitterGK110::emitIMAD(const Instruction *i)
603 {
604 uint8_t addOp =
605 (i->src(2).mod.neg() << 1) | (i->src(0).mod.neg() ^ i->src(1).mod.neg());
606
607 emitForm_21(i, 0x100, 0xa00);
608
609 assert(addOp != 3);
610 code[1] |= addOp << 26;
611
612 if (i->sType == TYPE_S32)
613 code[1] |= (1 << 19) | (1 << 24);
614
615 if (code[0] & 0x1) {
616 assert(!i->subOp);
617 SAT_(39);
618 } else {
619 if (i->subOp == NV50_IR_SUBOP_MUL_HIGH)
620 code[1] |= 1 << 25;
621 SAT_(35);
622 }
623 }
624
625 void
626 CodeEmitterGK110::emitISAD(const Instruction *i)
627 {
628 assert(i->dType == TYPE_S32 || i->dType == TYPE_U32);
629
630 emitForm_21(i, 0x1fc, 0xb74);
631
632 if (i->dType == TYPE_S32)
633 code[1] |= 1 << 19;
634 }
635
636 void
637 CodeEmitterGK110::emitNOT(const Instruction *i)
638 {
639 code[0] = 0x0003fc02; // logop(mov2) dst, 0, not src
640 code[1] = 0x22003800;
641
642 emitPredicate(i);
643
644 defId(i->def(0), 2);
645
646 switch (i->src(0).getFile()) {
647 case FILE_GPR:
648 code[1] |= 0xc << 28;
649 srcId(i->src(0), 23);
650 break;
651 case FILE_MEMORY_CONST:
652 code[1] |= 0x4 << 28;
653 setCAddress14(i->src(1));
654 break;
655 default:
656 assert(0);
657 break;
658 }
659 }
660
661 void
662 CodeEmitterGK110::emitLogicOp(const Instruction *i, uint8_t subOp)
663 {
664 assert(!(i->src(0).mod & Modifier(NV50_IR_MOD_NOT))); // XXX: find me
665
666 if (isLIMM(i->src(1), TYPE_S32)) {
667 emitForm_L(i, 0x200, 0, i->src(1).mod);
668 code[1] |= subOp << 24;
669 } else {
670 emitForm_21(i, 0x220, 0xc20);
671 code[1] |= subOp << 12;
672 NOT_(2b, 1);
673 }
674 assert(!(code[0] & 0x1) || !(i->src(1).mod & Modifier(NV50_IR_MOD_NOT)));
675 }
676
677 void
678 CodeEmitterGK110::emitPOPC(const Instruction *i)
679 {
680 assert(!isLIMM(i->src(1), TYPE_S32, true));
681
682 emitForm_21(i, 0x204, 0xc04);
683
684 NOT_(2a, 0);
685 if (!(code[0] & 0x1))
686 NOT_(2b, 1);
687 }
688
689 void
690 CodeEmitterGK110::emitINSBF(const Instruction *i)
691 {
692 emitForm_21(i, 0x1f8, 0xb78);
693 }
694
695 void
696 CodeEmitterGK110::emitShift(const Instruction *i)
697 {
698 if (i->op == OP_SHR) {
699 emitForm_21(i, 0x214, 0xc14);
700 if (isSignedType(i->dType))
701 code[1] |= 1 << 19;
702 } else {
703 emitForm_21(i, 0x224, 0xc24);
704 }
705
706 if (i->subOp == NV50_IR_SUBOP_SHIFT_WRAP)
707 code[1] |= 1 << 10;
708 }
709
710 void
711 CodeEmitterGK110::emitPreOp(const Instruction *i)
712 {
713 emitForm_C(i, 0x248, 0x2);
714
715 if (i->op == OP_PREEX2)
716 code[1] |= 1 << 10;
717
718 NEG_(30, 0);
719 ABS_(34, 0);
720 }
721
722 void
723 CodeEmitterGK110::emitSFnOp(const Instruction *i, uint8_t subOp)
724 {
725 code[0] = 0x00000002 | (subOp << 23);
726 code[1] = 0x84000000;
727
728 emitPredicate(i);
729
730 defId(i->def(0), 2);
731 srcId(i->src(0), 10);
732
733 NEG_(33, 0);
734 ABS_(31, 0);
735 SAT_(35);
736 }
737
738 void
739 CodeEmitterGK110::emitMINMAX(const Instruction *i)
740 {
741 uint32_t op2, op1;
742
743 switch (i->dType) {
744 case TYPE_U32:
745 case TYPE_S32:
746 op2 = 0x210;
747 op1 = 0xc10;
748 break;
749 case TYPE_F32:
750 op2 = 0x230;
751 op1 = 0xc30;
752 break;
753 case TYPE_F64:
754 op2 = 0x228;
755 op1 = 0xc28;
756 break;
757 default:
758 assert(0);
759 op2 = 0;
760 op1 = 0;
761 break;
762 }
763 emitForm_21(i, op2, op1);
764
765 if (i->dType == TYPE_S32)
766 code[1] |= 1 << 19;
767 code[1] |= (i->op == OP_MIN) ? 0x1c00 : 0x3c00; // [!]pt
768
769 FTZ_(2f);
770 ABS_(31, 0);
771 NEG_(33, 0);
772 if (code[0] & 0x1) {
773 modNegAbsF32_3b(i, 1);
774 } else {
775 ABS_(34, 1);
776 NEG_(30, 1);
777 }
778 }
779
780 void
781 CodeEmitterGK110::emitCVT(const Instruction *i)
782 {
783 const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
784 const bool f2i = !isFloatType(i->dType) && isFloatType(i->sType);
785 const bool i2f = isFloatType(i->dType) && !isFloatType(i->sType);
786
787 bool sat = i->saturate;
788 bool abs = i->src(0).mod.abs();
789 bool neg = i->src(0).mod.neg();
790
791 RoundMode rnd = i->rnd;
792
793 switch (i->op) {
794 case OP_CEIL: rnd = f2f ? ROUND_PI : ROUND_P; break;
795 case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
796 case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
797 case OP_SAT: sat = true; break;
798 case OP_NEG: neg = !neg; break;
799 case OP_ABS: abs = true; neg = false; break;
800 default:
801 break;
802 }
803
804 DataType dType;
805
806 if (i->op == OP_NEG && i->dType == TYPE_U32)
807 dType = TYPE_S32;
808 else
809 dType = i->dType;
810
811
812 uint32_t op;
813
814 if (f2f) op = 0x254;
815 else if (f2i) op = 0x258;
816 else if (i2f) op = 0x25c;
817 else op = 0x260;
818
819 emitForm_C(i, op, 0x2);
820
821 FTZ_(2f);
822 if (neg) code[1] |= 1 << 16;
823 if (abs) code[1] |= 1 << 20;
824 if (sat) code[1] |= 1 << 21;
825
826 emitRoundMode(rnd, 32 + 10, f2f ? (32 + 13) : -1);
827
828 code[0] |= typeSizeofLog2(dType) << 10;
829 code[0] |= typeSizeofLog2(i->sType) << 12;
830
831 if (isSignedIntType(dType))
832 code[0] |= 0x4000;
833 if (isSignedIntType(i->sType))
834 code[0] |= 0x8000;
835 }
836
837 void
838 CodeEmitterGK110::emitSET(const CmpInstruction *i)
839 {
840 uint16_t op1, op2;
841
842 if (i->def(0).getFile() == FILE_PREDICATE) {
843 switch (i->sType) {
844 case TYPE_F32: op2 = 0x1d8; op1 = 0xb58; break;
845 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
846 default:
847 op2 = 0x1b0;
848 op1 = 0xb30;
849 break;
850 }
851 emitForm_21(i, op2, op1);
852
853 NEG_(2e, 0);
854 ABS_(9, 0);
855 if (!(code[0] & 0x1)) {
856 NEG_(8, 1);
857 ABS_(2f, 1);
858 } else {
859 modNegAbsF32_3b(i, 1);
860 }
861 FTZ_(32);
862
863 // normal DST field is negated predicate result
864 code[0] = (code[0] & ~0xfc) | ((code[0] << 3) & 0xe0);
865 if (i->defExists(1))
866 defId(i->def(1), 2);
867 else
868 code[0] |= 0x1c;
869 } else {
870 switch (i->sType) {
871 case TYPE_F32: op2 = 0x000; op1 = 0x820; break;
872 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
873 default:
874 op2 = 0x1a8;
875 op1 = 0xb28;
876 break;
877 }
878 emitForm_21(i, op2, op1);
879
880 NEG_(2e, 0);
881 ABS_(39, 0);
882 if (!(code[0] & 0x1)) {
883 NEG_(38, 1);
884 ABS_(2f, 1);
885 } else {
886 modNegAbsF32_3b(i, 1);
887 }
888 FTZ_(3a);
889 }
890 if (i->sType == TYPE_S32)
891 code[1] |= 1 << 19;
892
893 if (i->op != OP_SET) {
894 switch (i->op) {
895 case OP_SET_AND: code[1] |= 0x0 << 16; break;
896 case OP_SET_OR: code[1] |= 0x1 << 16; break;
897 case OP_SET_XOR: code[1] |= 0x2 << 16; break;
898 default:
899 assert(0);
900 break;
901 }
902 srcId(i->src(2), 0x2a);
903 } else {
904 code[1] |= 0x7 << 10;
905 }
906 emitCondCode(i->setCond,
907 isFloatType(i->sType) ? 0x33 : 0x34,
908 isFloatType(i->sType) ? 0xf : 0x7);
909 }
910
911 void
912 CodeEmitterGK110::emitSLCT(const CmpInstruction *i)
913 {
914 CondCode cc = i->setCond;
915 if (i->src(2).mod.neg())
916 cc = reverseCondCode(cc);
917
918 if (i->dType == TYPE_F32) {
919 emitForm_21(i, 0x1d0, 0xb50);
920 FTZ_(32);
921 emitCondCode(cc, 0x33, 0xf);
922 } else {
923 emitForm_21(i, 0x1a4, 0xb20);
924 emitCondCode(cc, 0x34, 0x7);
925 }
926 }
927
928 void CodeEmitterGK110::emitSELP(const Instruction *i)
929 {
930 emitForm_21(i, 0x250, 0x050);
931
932 if ((i->cc == CC_NOT_P) ^ (bool)(i->src(2).mod & Modifier(NV50_IR_MOD_NOT)))
933 code[1] |= 1 << 13;
934 }
935
936 void CodeEmitterGK110::emitTEXBAR(const Instruction *i)
937 {
938 code[0] = 0x00000002 | (i->subOp << 23);
939 code[1] = 0x77000000;
940
941 emitPredicate(i);
942 }
943
944 void CodeEmitterGK110::emitTEXCSAA(const TexInstruction *i)
945 {
946 code[0] = 0x00000002;
947 code[1] = 0x76c00000;
948
949 code[1] |= i->tex.r << 9;
950 // code[1] |= i->tex.s << (9 + 8);
951
952 if (i->tex.liveOnly)
953 code[0] |= 0x80000000;
954
955 defId(i->def(0), 2);
956 srcId(i->src(0), 10);
957 }
958
959 static inline bool
960 isNextIndependentTex(const TexInstruction *i)
961 {
962 if (!i->next || !isTextureOp(i->next->op))
963 return false;
964 if (i->getDef(0)->interfers(i->next->getSrc(0)))
965 return false;
966 return !i->next->srcExists(1) || !i->getDef(0)->interfers(i->next->getSrc(1));
967 }
968
969 void
970 CodeEmitterGK110::emitTEX(const TexInstruction *i)
971 {
972 const bool ind = i->tex.rIndirectSrc >= 0;
973
974 if (ind) {
975 code[0] = 0x00000002;
976 switch (i->op) {
977 case OP_TXD:
978 code[1] = 0x7e000000;
979 break;
980 case OP_TXF:
981 code[1] = 0x78000000;
982 break;
983 default:
984 code[1] = 0x7d800000;
985 break;
986 }
987 } else {
988 switch (i->op) {
989 case OP_TXD:
990 code[0] = 0x00000002;
991 code[1] = 0x76000000;
992 code[1] |= i->tex.r << 9;
993 break;
994 case OP_TXF:
995 code[0] = 0x00000002;
996 code[1] = 0x70000000;
997 code[1] |= i->tex.r << 13;
998 break;
999 default:
1000 code[0] = 0x00000001;
1001 code[1] = 0x60000000;
1002 code[1] |= i->tex.r << 15;
1003 break;
1004 }
1005 }
1006
1007 code[1] |= isNextIndependentTex(i) ? 0x1 : 0x2; // t : p mode
1008
1009 if (i->tex.liveOnly)
1010 code[0] |= 0x80000000;
1011
1012 switch (i->op) {
1013 case OP_TEX: break;
1014 case OP_TXB: code[1] |= 0x2000; break;
1015 case OP_TXL: code[1] |= 0x3000; break;
1016 case OP_TXF: break;
1017 case OP_TXG: break; // XXX
1018 case OP_TXD: break;
1019 default:
1020 assert(!"invalid texture op");
1021 break;
1022 }
1023
1024 if (i->op == OP_TXF) {
1025 if (!i->tex.levelZero)
1026 code[1] |= 0x1000;
1027 } else
1028 if (i->tex.levelZero) {
1029 code[1] |= 0x1000;
1030 }
1031
1032 if (i->op != OP_TXD && i->tex.derivAll)
1033 code[1] |= 0x200;
1034
1035 emitPredicate(i);
1036
1037 code[1] |= i->tex.mask << 2;
1038
1039 const int src1 = (i->predSrc == 1) ? 2 : 1; // if predSrc == 1, !srcExists(2)
1040
1041 defId(i->def(0), 2);
1042 srcId(i->src(0), 10);
1043 srcId(i, src1, 23);
1044
1045 // if (i->op == OP_TXG) code[0] |= i->tex.gatherComp << 5;
1046
1047 // texture target:
1048 code[1] |= (i->tex.target.isCube() ? 3 : (i->tex.target.getDim() - 1)) << 7;
1049 if (i->tex.target.isArray())
1050 code[1] |= 0x40;
1051 if (i->tex.target.isShadow())
1052 code[1] |= 0x400;
1053 if (i->tex.target == TEX_TARGET_2D_MS ||
1054 i->tex.target == TEX_TARGET_2D_MS_ARRAY)
1055 code[1] |= 0x800;
1056
1057 if (i->srcExists(src1) && i->src(src1).getFile() == FILE_IMMEDIATE) {
1058 // ?
1059 }
1060
1061 if (i->tex.useOffsets) {
1062 switch (i->op) {
1063 case OP_TXF: code[1] |= 0x200; break;
1064 default: code[1] |= 0x800; break;
1065 }
1066 }
1067 }
1068
1069 void
1070 CodeEmitterGK110::emitTXQ(const TexInstruction *i)
1071 {
1072 code[0] = 0x00000002;
1073 code[1] = 0x75400001;
1074
1075 switch (i->tex.query) {
1076 case TXQ_DIMS: code[0] |= 0x01 << 25; break;
1077 case TXQ_TYPE: code[0] |= 0x02 << 25; break;
1078 case TXQ_SAMPLE_POSITION: code[0] |= 0x05 << 25; break;
1079 case TXQ_FILTER: code[0] |= 0x10 << 25; break;
1080 case TXQ_LOD: code[0] |= 0x12 << 25; break;
1081 case TXQ_BORDER_COLOUR: code[0] |= 0x16 << 25; break;
1082 default:
1083 assert(!"invalid texture query");
1084 break;
1085 }
1086
1087 code[1] |= i->tex.mask << 2;
1088 code[1] |= i->tex.r << 9;
1089 if (/*i->tex.sIndirectSrc >= 0 || */i->tex.rIndirectSrc >= 0)
1090 code[1] |= 0x08000000;
1091
1092 defId(i->def(0), 2);
1093 srcId(i->src(0), 10);
1094
1095 emitPredicate(i);
1096 }
1097
1098 void
1099 CodeEmitterGK110::emitQUADOP(const Instruction *i, uint8_t qOp, uint8_t laneMask)
1100 {
1101 code[0] = 0x00000002 | ((qOp & 1) << 31);
1102 code[1] = 0x7fc00000 | (qOp >> 1) | (laneMask << 12);
1103
1104 defId(i->def(0), 2);
1105 srcId(i->src(0), 10);
1106 srcId(i->srcExists(1) ? i->src(1) : i->src(0), 23);
1107
1108 if (i->op == OP_QUADOP && progType != Program::TYPE_FRAGMENT)
1109 code[1] |= 1 << 9; // dall
1110
1111 emitPredicate(i);
1112 }
1113
1114 void
1115 CodeEmitterGK110::emitFlow(const Instruction *i)
1116 {
1117 const FlowInstruction *f = i->asFlow();
1118
1119 unsigned mask; // bit 0: predicate, bit 1: target
1120
1121 code[0] = 0x00000000;
1122
1123 switch (i->op) {
1124 case OP_BRA:
1125 code[1] = f->absolute ? 0x10800000 : 0x12000000;
1126 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1127 code[0] |= 0x80;
1128 mask = 3;
1129 break;
1130 case OP_CALL:
1131 code[1] = f->absolute ? 0x11000000 : 0x13000000;
1132 if (i->srcExists(0) && i->src(0).getFile() == FILE_MEMORY_CONST)
1133 code[0] |= 0x80;
1134 mask = 2;
1135 break;
1136
1137 case OP_EXIT: code[1] = 0x18000000; mask = 1; break;
1138 case OP_RET: code[1] = 0x19000000; mask = 1; break;
1139 case OP_DISCARD: code[1] = 0x19800000; mask = 1; break;
1140 case OP_BREAK: code[1] = 0x1a000000; mask = 1; break;
1141 case OP_CONT: code[1] = 0x1a800000; mask = 1; break;
1142
1143 case OP_JOINAT: code[1] = 0x14800000; mask = 2; break;
1144 case OP_PREBREAK: code[1] = 0x15000000; mask = 2; break;
1145 case OP_PRECONT: code[1] = 0x15800000; mask = 2; break;
1146 case OP_PRERET: code[1] = 0x13800000; mask = 2; break;
1147
1148 case OP_QUADON: code[1] = 0x1b000000; mask = 0; break;
1149 case OP_QUADPOP: code[1] = 0x1c000000; mask = 0; break;
1150 case OP_BRKPT: code[1] = 0x00000000; mask = 0; break;
1151 default:
1152 assert(!"invalid flow operation");
1153 return;
1154 }
1155
1156 if (mask & 1) {
1157 emitPredicate(i);
1158 if (i->flagsSrc < 0)
1159 code[0] |= 0x3c;
1160 }
1161
1162 if (!f)
1163 return;
1164
1165 if (f->allWarp)
1166 code[0] |= 1 << 9;
1167 if (f->limit)
1168 code[0] |= 1 << 8;
1169
1170 if (f->op == OP_CALL) {
1171 if (f->builtin) {
1172 assert(f->absolute);
1173 uint32_t pcAbs = targNVC0->getBuiltinOffset(f->target.builtin);
1174 addReloc(RelocEntry::TYPE_BUILTIN, 0, pcAbs, 0xff800000, 23);
1175 addReloc(RelocEntry::TYPE_BUILTIN, 1, pcAbs, 0x007fffff, -9);
1176 } else {
1177 assert(!f->absolute);
1178 int32_t pcRel = f->target.fn->binPos - (codeSize + 8);
1179 code[0] |= (pcRel & 0x1ff) << 23;
1180 code[1] |= (pcRel >> 9) & 0x7fff;
1181 }
1182 } else
1183 if (mask & 2) {
1184 int32_t pcRel = f->target.bb->binPos - (codeSize + 8);
1185 // currently we don't want absolute branches
1186 assert(!f->absolute);
1187 code[0] |= (pcRel & 0x1ff) << 23;
1188 code[1] |= (pcRel >> 9) & 0x7fff;
1189 }
1190 }
1191
1192 void
1193 CodeEmitterGK110::emitPFETCH(const Instruction *i)
1194 {
1195 uint32_t prim = i->src(0).get()->reg.data.u32;
1196
1197 code[0] = 0x00000002 | ((prim & 0xff) << 23);
1198 code[1] = 0x7f800000;
1199
1200 emitPredicate(i);
1201
1202 defId(i->def(0), 2);
1203 srcId(i->src(1), 10);
1204 }
1205
1206 void
1207 CodeEmitterGK110::emitVFETCH(const Instruction *i)
1208 {
1209 unsigned int size = typeSizeof(i->dType);
1210 uint32_t offset = i->src(0).get()->reg.data.offset;
1211
1212 code[0] = 0x00000002 | (offset << 23);
1213 code[1] = 0x7ec00000 | (offset >> 9);
1214 code[1] |= (size / 4 - 1) << 18;
1215
1216 #if 0
1217 if (i->perPatch)
1218 code[0] |= 0x100;
1219 if (i->getSrc(0)->reg.file == FILE_SHADER_OUTPUT)
1220 code[0] |= 0x200; // yes, TCPs can read from *outputs* of other threads
1221 #endif
1222
1223 emitPredicate(i);
1224
1225 defId(i->def(0), 2);
1226 srcId(i->src(0).getIndirect(0), 10);
1227 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex address
1228 }
1229
1230 void
1231 CodeEmitterGK110::emitEXPORT(const Instruction *i)
1232 {
1233 unsigned int size = typeSizeof(i->dType);
1234 uint32_t offset = i->src(0).get()->reg.data.offset;
1235
1236 code[0] = 0x00000002 | (offset << 23);
1237 code[1] = 0x7f000000 | (offset >> 9);
1238 code[1] |= (size / 4 - 1) << 18;
1239
1240 #if 0
1241 if (i->perPatch)
1242 code[0] |= 0x100;
1243 #endif
1244
1245 emitPredicate(i);
1246
1247 assert(i->src(1).getFile() == FILE_GPR);
1248
1249 srcId(i->src(0).getIndirect(0), 10);
1250 srcId(i->src(0).getIndirect(1), 32 + 10); // vertex base address
1251 srcId(i->src(1), 2);
1252 }
1253
1254 void
1255 CodeEmitterGK110::emitOUT(const Instruction *i)
1256 {
1257 assert(i->src(0).getFile() == FILE_GPR);
1258
1259 emitForm_21(i, 0x1f0, 0xb70);
1260
1261 if (i->op == OP_EMIT)
1262 code[1] |= 1 << 10;
1263 if (i->op == OP_RESTART || i->subOp == NV50_IR_SUBOP_EMIT_RESTART)
1264 code[1] |= 1 << 11;
1265 }
1266
1267 void
1268 CodeEmitterGK110::emitInterpMode(const Instruction *i)
1269 {
1270 code[1] |= i->ipa << 21; // TODO: INTERP_SAMPLEID
1271 }
1272
1273 void
1274 CodeEmitterGK110::emitINTERP(const Instruction *i)
1275 {
1276 const uint32_t base = i->getSrc(0)->reg.data.offset;
1277
1278 code[0] = 0x00000002 | (base << 31);
1279 code[1] = 0x74800000 | (base >> 1);
1280
1281 if (i->saturate)
1282 code[1] |= 1 << 18;
1283
1284 if (i->op == OP_PINTERP)
1285 srcId(i->src(1), 23);
1286 else
1287 code[0] |= 0xff << 23;
1288
1289 srcId(i->src(0).getIndirect(0), 10);
1290 emitInterpMode(i);
1291
1292 emitPredicate(i);
1293 defId(i->def(0), 2);
1294
1295 if (i->getSampleMode() == NV50_IR_INTERP_OFFSET)
1296 srcId(i->src(i->op == OP_PINTERP ? 2 : 1), 32 + 10);
1297 else
1298 code[1] |= 0xff << 10;
1299 }
1300
1301 void
1302 CodeEmitterGK110::emitLoadStoreType(DataType ty, const int pos)
1303 {
1304 uint8_t n;
1305
1306 switch (ty) {
1307 case TYPE_U8:
1308 n = 0;
1309 break;
1310 case TYPE_S8:
1311 n = 1;
1312 break;
1313 case TYPE_U16:
1314 n = 2;
1315 break;
1316 case TYPE_S16:
1317 n = 3;
1318 break;
1319 case TYPE_F32:
1320 case TYPE_U32:
1321 case TYPE_S32:
1322 n = 4;
1323 break;
1324 case TYPE_F64:
1325 case TYPE_U64:
1326 case TYPE_S64:
1327 n = 5;
1328 break;
1329 case TYPE_B128:
1330 n = 6;
1331 break;
1332 default:
1333 n = 0;
1334 assert(!"invalid ld/st type");
1335 break;
1336 }
1337 code[pos / 32] |= n << (pos % 32);
1338 }
1339
1340 void
1341 CodeEmitterGK110::emitCachingMode(CacheMode c, const int pos)
1342 {
1343 uint8_t n;
1344
1345 switch (c) {
1346 case CACHE_CA:
1347 // case CACHE_WB:
1348 n = 0;
1349 break;
1350 case CACHE_CG:
1351 n = 1;
1352 break;
1353 case CACHE_CS:
1354 n = 2;
1355 break;
1356 case CACHE_CV:
1357 // case CACHE_WT:
1358 n = 3;
1359 break;
1360 default:
1361 n = 0;
1362 assert(!"invalid caching mode");
1363 break;
1364 }
1365 code[pos / 32] |= n << (pos % 32);
1366 }
1367
1368 void
1369 CodeEmitterGK110::emitSTORE(const Instruction *i)
1370 {
1371 int32_t offset = SDATA(i->src(0)).offset;
1372
1373 switch (i->src(0).getFile()) {
1374 case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
1375 case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
1376 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1377 default:
1378 assert(!"invalid memory file");
1379 break;
1380 }
1381
1382 if (i->src(0).getFile() != FILE_MEMORY_GLOBAL)
1383 offset &= 0xffffff;
1384
1385 if (code[0] & 0x2) {
1386 emitLoadStoreType(i->dType, 0x33);
1387 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1388 emitCachingMode(i->cache, 0x2f);
1389 } else {
1390 emitLoadStoreType(i->dType, 0x38);
1391 emitCachingMode(i->cache, 0x3b);
1392 }
1393 code[0] |= offset << 23;
1394 code[1] |= offset >> 9;
1395
1396 emitPredicate(i);
1397
1398 srcId(i->src(1), 2);
1399 srcId(i->src(0).getIndirect(0), 10);
1400 }
1401
1402 void
1403 CodeEmitterGK110::emitLOAD(const Instruction *i)
1404 {
1405 int32_t offset = SDATA(i->src(0)).offset;
1406
1407 switch (i->src(0).getFile()) {
1408 case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
1409 case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
1410 case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
1411 case FILE_MEMORY_CONST:
1412 if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
1413 emitMOV(i);
1414 return;
1415 }
1416 offset &= 0xffff;
1417 code[0] = 0x00000002;
1418 code[1] = 0x7c800000 | (i->src(0).get()->reg.fileIndex << 7);
1419 break;
1420 default:
1421 assert(!"invalid memory file");
1422 break;
1423 }
1424
1425 if (code[0] & 0x2) {
1426 offset &= 0xffffff;
1427 emitLoadStoreType(i->dType, 0x33);
1428 if (i->src(0).getFile() == FILE_MEMORY_LOCAL)
1429 emitCachingMode(i->cache, 0x2f);
1430 } else {
1431 emitLoadStoreType(i->dType, 0x38);
1432 emitCachingMode(i->cache, 0x3b);
1433 }
1434 code[0] |= offset << 23;
1435 code[1] |= offset >> 9;
1436
1437 emitPredicate(i);
1438
1439 defId(i->def(0), 2);
1440 srcId(i->src(0).getIndirect(0), 10);
1441 }
1442
1443 uint8_t
1444 CodeEmitterGK110::getSRegEncoding(const ValueRef& ref)
1445 {
1446 switch (SDATA(ref).sv.sv) {
1447 case SV_LANEID: return 0x00;
1448 case SV_PHYSID: return 0x03;
1449 case SV_VERTEX_COUNT: return 0x10;
1450 case SV_INVOCATION_ID: return 0x11;
1451 case SV_YDIR: return 0x12;
1452 case SV_TID: return 0x21 + SDATA(ref).sv.index;
1453 case SV_CTAID: return 0x25 + SDATA(ref).sv.index;
1454 case SV_NTID: return 0x29 + SDATA(ref).sv.index;
1455 case SV_GRIDID: return 0x2c;
1456 case SV_NCTAID: return 0x2d + SDATA(ref).sv.index;
1457 case SV_LBASE: return 0x34;
1458 case SV_SBASE: return 0x30;
1459 case SV_CLOCK: return 0x50 + SDATA(ref).sv.index;
1460 default:
1461 assert(!"no sreg for system value");
1462 return 0;
1463 }
1464 }
1465
1466 void
1467 CodeEmitterGK110::emitMOV(const Instruction *i)
1468 {
1469 if (i->src(0).getFile() == FILE_SYSTEM_VALUE) {
1470 code[0] = 0x00000002 | (getSRegEncoding(i->src(0)) << 23);
1471 code[1] = 0x86400000;
1472 emitPredicate(i);
1473 defId(i->def(0), 2);
1474 } else
1475 if (i->src(0).getFile() == FILE_IMMEDIATE) {
1476 code[0] = 0x00000002 | (i->lanes << 14);
1477 code[1] = 0x74000000;
1478 emitPredicate(i);
1479 defId(i->def(0), 2);
1480 setImmediate32(i, 0, Modifier(0));
1481 } else
1482 if (i->src(0).getFile() == FILE_PREDICATE) {
1483 code[0] = 0x00000002;
1484 code[1] = 0x84401c07;
1485 emitPredicate(i);
1486 defId(i->def(0), 2);
1487 srcId(i->src(0), 14);
1488 } else {
1489 emitForm_C(i, 0x24c, 2);
1490 code[1] |= i->lanes << 10;
1491 }
1492 }
1493
1494 bool
1495 CodeEmitterGK110::emitInstruction(Instruction *insn)
1496 {
1497 const unsigned int size = (writeIssueDelays && !(codeSize & 0x3f)) ? 16 : 8;
1498
1499 if (insn->encSize != 8) {
1500 ERROR("skipping unencodable instruction: ");
1501 insn->print();
1502 return false;
1503 } else
1504 if (codeSize + size > codeSizeLimit) {
1505 ERROR("code emitter output buffer too small\n");
1506 return false;
1507 }
1508
1509 if (writeIssueDelays) {
1510 int id = (codeSize & 0x3f) / 8 - 1;
1511 if (id < 0) {
1512 id += 1;
1513 code[0] = 0x00000000; // cf issue delay "instruction"
1514 code[1] = 0x08000000;
1515 code += 2;
1516 codeSize += 8;
1517 }
1518 uint32_t *data = code - (id * 2 + 2);
1519
1520 switch (id) {
1521 case 0: data[0] |= insn->sched << 2; break;
1522 case 1: data[0] |= insn->sched << 10; break;
1523 case 2: data[0] |= insn->sched << 18; break;
1524 case 3: data[0] |= insn->sched << 26; data[1] |= insn->sched >> 6; break;
1525 case 4: data[1] |= insn->sched << 2; break;
1526 case 5: data[1] |= insn->sched << 10; break;
1527 case 6: data[1] |= insn->sched << 18; break;
1528 default:
1529 assert(0);
1530 break;
1531 }
1532 }
1533
1534 // assert that instructions with multiple defs don't corrupt registers
1535 for (int d = 0; insn->defExists(d); ++d)
1536 assert(insn->asTex() || insn->def(d).rep()->reg.data.id >= 0);
1537
1538 switch (insn->op) {
1539 case OP_MOV:
1540 case OP_RDSV:
1541 emitMOV(insn);
1542 break;
1543 case OP_NOP:
1544 break;
1545 case OP_LOAD:
1546 emitLOAD(insn);
1547 break;
1548 case OP_STORE:
1549 emitSTORE(insn);
1550 break;
1551 case OP_LINTERP:
1552 case OP_PINTERP:
1553 emitINTERP(insn);
1554 break;
1555 case OP_VFETCH:
1556 emitVFETCH(insn);
1557 break;
1558 case OP_EXPORT:
1559 emitEXPORT(insn);
1560 break;
1561 case OP_PFETCH:
1562 emitPFETCH(insn);
1563 break;
1564 case OP_EMIT:
1565 case OP_RESTART:
1566 emitOUT(insn);
1567 break;
1568 case OP_ADD:
1569 case OP_SUB:
1570 if (isFloatType(insn->dType))
1571 emitFADD(insn);
1572 else
1573 emitUADD(insn);
1574 break;
1575 case OP_MUL:
1576 if (isFloatType(insn->dType))
1577 emitFMUL(insn);
1578 else
1579 emitIMUL(insn);
1580 break;
1581 case OP_MAD:
1582 case OP_FMA:
1583 if (isFloatType(insn->dType))
1584 emitFMAD(insn);
1585 else
1586 emitIMAD(insn);
1587 break;
1588 case OP_SAD:
1589 emitISAD(insn);
1590 break;
1591 case OP_NOT:
1592 emitNOT(insn);
1593 break;
1594 case OP_AND:
1595 emitLogicOp(insn, 0);
1596 break;
1597 case OP_OR:
1598 emitLogicOp(insn, 1);
1599 break;
1600 case OP_XOR:
1601 emitLogicOp(insn, 2);
1602 break;
1603 case OP_SHL:
1604 case OP_SHR:
1605 emitShift(insn);
1606 break;
1607 case OP_SET:
1608 case OP_SET_AND:
1609 case OP_SET_OR:
1610 case OP_SET_XOR:
1611 emitSET(insn->asCmp());
1612 break;
1613 case OP_SELP:
1614 emitSELP(insn);
1615 break;
1616 case OP_SLCT:
1617 emitSLCT(insn->asCmp());
1618 break;
1619 case OP_MIN:
1620 case OP_MAX:
1621 emitMINMAX(insn);
1622 break;
1623 case OP_ABS:
1624 case OP_NEG:
1625 case OP_CEIL:
1626 case OP_FLOOR:
1627 case OP_TRUNC:
1628 case OP_CVT:
1629 case OP_SAT:
1630 emitCVT(insn);
1631 break;
1632 case OP_RSQ:
1633 emitSFnOp(insn, 5);
1634 break;
1635 case OP_RCP:
1636 emitSFnOp(insn, 4);
1637 break;
1638 case OP_LG2:
1639 emitSFnOp(insn, 3);
1640 break;
1641 case OP_EX2:
1642 emitSFnOp(insn, 2);
1643 break;
1644 case OP_SIN:
1645 emitSFnOp(insn, 1);
1646 break;
1647 case OP_COS:
1648 emitSFnOp(insn, 0);
1649 break;
1650 case OP_PRESIN:
1651 case OP_PREEX2:
1652 emitPreOp(insn);
1653 break;
1654 case OP_TEX:
1655 case OP_TXB:
1656 case OP_TXL:
1657 case OP_TXD:
1658 case OP_TXF:
1659 emitTEX(insn->asTex());
1660 break;
1661 case OP_TXQ:
1662 emitTXQ(insn->asTex());
1663 break;
1664 case OP_TEXBAR:
1665 emitTEXBAR(insn);
1666 break;
1667 case OP_BRA:
1668 case OP_CALL:
1669 case OP_PRERET:
1670 case OP_RET:
1671 case OP_DISCARD:
1672 case OP_EXIT:
1673 case OP_PRECONT:
1674 case OP_CONT:
1675 case OP_PREBREAK:
1676 case OP_BREAK:
1677 case OP_JOINAT:
1678 case OP_BRKPT:
1679 case OP_QUADON:
1680 case OP_QUADPOP:
1681 emitFlow(insn);
1682 break;
1683 case OP_QUADOP:
1684 emitQUADOP(insn, insn->subOp, insn->lanes);
1685 break;
1686 case OP_DFDX:
1687 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x66 : 0x99, 0x4);
1688 break;
1689 case OP_DFDY:
1690 emitQUADOP(insn, insn->src(0).mod.neg() ? 0x5a : 0xa5, 0x5);
1691 break;
1692 case OP_POPCNT:
1693 emitPOPC(insn);
1694 break;
1695 case OP_JOIN:
1696 emitNOP(insn);
1697 insn->join = 1;
1698 break;
1699 case OP_PHI:
1700 case OP_UNION:
1701 case OP_CONSTRAINT:
1702 ERROR("operation should have been eliminated");
1703 return false;
1704 case OP_EXP:
1705 case OP_LOG:
1706 case OP_SQRT:
1707 case OP_POW:
1708 ERROR("operation should have been lowered\n");
1709 return false;
1710 default:
1711 ERROR("unknow op\n");
1712 return false;
1713 }
1714
1715 if (insn->join)
1716 code[0] |= 1 << 22;
1717
1718 code += 2;
1719 codeSize += 8;
1720 return true;
1721 }
1722
1723 uint32_t
1724 CodeEmitterGK110::getMinEncodingSize(const Instruction *i) const
1725 {
1726 // No more short instruction encodings.
1727 return 8;
1728 }
1729
1730 void
1731 CodeEmitterGK110::prepareEmission(Function *func)
1732 {
1733 const Target *targ = func->getProgram()->getTarget();
1734
1735 CodeEmitter::prepareEmission(func);
1736
1737 if (targ->hasSWSched)
1738 calculateSchedDataNVC0(targ, func);
1739 }
1740
1741 CodeEmitterGK110::CodeEmitterGK110(const TargetNVC0 *target)
1742 : CodeEmitter(target),
1743 targNVC0(target),
1744 writeIssueDelays(target->hasSWSched)
1745 {
1746 code = NULL;
1747 codeSize = codeSizeLimit = 0;
1748 relocInfo = NULL;
1749 }
1750
1751 CodeEmitter *
1752 TargetNVC0::createCodeEmitterGK110(Program::Type type)
1753 {
1754 CodeEmitterGK110 *emit = new CodeEmitterGK110(this);
1755 emit->setProgramType(type);
1756 return emit;
1757 }
1758
1759 } // namespace nv50_ir