src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #include "codegen/nv50_ir.h"
  24 #include "codegen/nv50_ir_target_nv50.h"
  25
  26 namespace nv50_ir {
  27
  28 #define NV50_OP_ENC_LONG     0
  29 #define NV50_OP_ENC_SHORT    1
  30 #define NV50_OP_ENC_IMM      2
  31 #define NV50_OP_ENC_LONG_ALT 3
  32
  33 class CodeEmitterNV50 : public CodeEmitter
  34 {
  35 public:
  36    CodeEmitterNV50(const TargetNV50 *);
  37
  38    virtual bool emitInstruction(Instruction *);
  39
  40    virtual uint32_t getMinEncodingSize(const Instruction *) const;
  41
  42    inline void setProgramType(Program::Type pType) { progType = pType; }
  43
  44    virtual void prepareEmission(Function *);
  45
  46 private:
  47    Program::Type progType;
  48
  49    const TargetNV50 *targNV50;
  50
  51 private:
  52    inline void defId(const ValueDef&, const int pos);
  53    inline void srcId(const ValueRef&, const int pos);
  54    inline void srcId(const ValueRef *, const int pos);
  55
  56    inline void srcAddr16(const ValueRef&, bool adj, const int pos);
  57    inline void srcAddr8(const ValueRef&, const int pos);
  58
  59    void emitFlagsRd(const Instruction *);
  60    void emitFlagsWr(const Instruction *);
  61
  62    void emitCondCode(CondCode cc, DataType ty, int pos);
  63
  64    inline void setARegBits(unsigned int);
  65
  66    void setAReg16(const Instruction *, int s);
  67    void setImmediate(const Instruction *, int s);
  68
  69    void setDst(const Value *);
  70    void setDst(const Instruction *, int d);
  71    void setSrcFileBits(const Instruction *, int enc);
  72    void setSrc(const Instruction *, unsigned int s, int slot);
  73
  74    void emitForm_MAD(const Instruction *);
  75    void emitForm_ADD(const Instruction *);
  76    void emitForm_MUL(const Instruction *);
  77    void emitForm_IMM(const Instruction *);
  78
  79    void emitLoadStoreSizeLG(DataType ty, int pos);
  80    void emitLoadStoreSizeCS(DataType ty);
  81
  82    void roundMode_MAD(const Instruction *);
  83    void roundMode_CVT(RoundMode);
  84
  85    void emitMNeg12(const Instruction *);
  86
  87    void emitLOAD(const Instruction *);
  88    void emitSTORE(const Instruction *);
  89    void emitMOV(const Instruction *);
  90    void emitRDSV(const Instruction *);
  91    void emitNOP();
  92    void emitINTERP(const Instruction *);
  93    void emitPFETCH(const Instruction *);
  94    void emitOUT(const Instruction *);
  95
  96    void emitUADD(const Instruction *);
  97    void emitAADD(const Instruction *);
  98    void emitFADD(const Instruction *);
  99    void emitIMUL(const Instruction *);
 100    void emitFMUL(const Instruction *);
 101    void emitFMAD(const Instruction *);
 102    void emitIMAD(const Instruction *);
 103    void emitISAD(const Instruction *);
 104
 105    void emitMINMAX(const Instruction *);
 106
 107    void emitPreOp(const Instruction *);
 108    void emitSFnOp(const Instruction *, uint8_t subOp);
 109
 110    void emitShift(const Instruction *);
 111    void emitARL(const Instruction *, unsigned int shl);
 112    void emitLogicOp(const Instruction *);
 113    void emitNOT(const Instruction *);
 114
 115    void emitCVT(const Instruction *);
 116    void emitSET(const Instruction *);
 117
 118    void emitTEX(const TexInstruction *);
 119    void emitTXQ(const TexInstruction *);
 120    void emitTEXPREP(const TexInstruction *);
 121
 122    void emitQUADOP(const Instruction *, uint8_t lane, uint8_t quOp);
 123
 124    void emitFlow(const Instruction *, uint8_t flowOp);
 125    void emitPRERETEmu(const FlowInstruction *);
 126    void emitBAR(const Instruction *);
 127
 128    void emitATOM(const Instruction *);
 129 };
 130
 131 #define SDATA(a) ((a).rep()->reg.data)
 132 #define DDATA(a) ((a).rep()->reg.data)
 133
 134 void CodeEmitterNV50::srcId(const ValueRef& src, const int pos)
 135 {
 136    assert(src.get());
 137    code[pos / 32] |= SDATA(src).id << (pos % 32);
 138 }
 139
 140 void CodeEmitterNV50::srcId(const ValueRef *src, const int pos)
 141 {
 142    assert(src->get());
 143    code[pos / 32] |= SDATA(*src).id << (pos % 32);
 144 }
 145
 146 void CodeEmitterNV50::srcAddr16(const ValueRef& src, bool adj, const int pos)
 147 {
 148    assert(src.get());
 149
 150    int32_t offset = SDATA(src).offset;
 151
 152    assert(!adj || src.get()->reg.size <= 4);
 153    if (adj)
 154       offset /= src.get()->reg.size;
 155
 156    assert(offset <= 0x7fff && offset >= (int32_t)-0x8000 && (pos % 32) <= 16);
 157
 158    if (offset < 0)
 159       offset &= adj ? (0xffff >> (src.get()->reg.size >> 1)) : 0xffff;
 160
 161    code[pos / 32] |= offset << (pos % 32);
 162 }
 163
 164 void CodeEmitterNV50::srcAddr8(const ValueRef& src, const int pos)
 165 {
 166    assert(src.get());
 167
 168    uint32_t offset = SDATA(src).offset;
 169
 170    assert((offset <= 0x1fc || offset == 0x3fc) && !(offset & 0x3));
 171
 172    code[pos / 32] |= (offset >> 2) << (pos % 32);
 173 }
 174
 175 void CodeEmitterNV50::defId(const ValueDef& def, const int pos)
 176 {
 177    assert(def.get() && def.getFile() != FILE_SHADER_OUTPUT);
 178
 179    code[pos / 32] |= DDATA(def).id << (pos % 32);
 180 }
 181
 182 void
 183 CodeEmitterNV50::roundMode_MAD(const Instruction *insn)
 184 {
 185    switch (insn->rnd) {
 186    case ROUND_M: code[1] |= 1 << 22; break;
 187    case ROUND_P: code[1] |= 2 << 22; break;
 188    case ROUND_Z: code[1] |= 3 << 22; break;
 189    default:
 190       assert(insn->rnd == ROUND_N);
 191       break;
 192    }
 193 }
 194
 195 void
 196 CodeEmitterNV50::emitMNeg12(const Instruction *i)
 197 {
 198    code[1] |= i->src(0).mod.neg() << 26;
 199    code[1] |= i->src(1).mod.neg() << 27;
 200 }
 201
 202 void CodeEmitterNV50::emitCondCode(CondCode cc, DataType ty, int pos)
 203 {
 204    uint8_t enc;
 205
 206    assert(pos >= 32 || pos <= 27);
 207
 208    switch (cc) {
 209    case CC_LT:  enc = 0x1; break;
 210    case CC_LTU: enc = 0x9; break;
 211    case CC_EQ:  enc = 0x2; break;
 212    case CC_EQU: enc = 0xa; break;
 213    case CC_LE:  enc = 0x3; break;
 214    case CC_LEU: enc = 0xb; break;
 215    case CC_GT:  enc = 0x4; break;
 216    case CC_GTU: enc = 0xc; break;
 217    case CC_NE:  enc = 0x5; break;
 218    case CC_NEU: enc = 0xd; break;
 219    case CC_GE:  enc = 0x6; break;
 220    case CC_GEU: enc = 0xe; break;
 221    case CC_TR:  enc = 0xf; break;
 222    case CC_FL:  enc = 0x0; break;
 223
 224    case CC_O:  enc = 0x10; break;
 225    case CC_C:  enc = 0x11; break;
 226    case CC_A:  enc = 0x12; break;
 227    case CC_S:  enc = 0x13; break;
 228    case CC_NS: enc = 0x1c; break;
 229    case CC_NA: enc = 0x1d; break;
 230    case CC_NC: enc = 0x1e; break;
 231    case CC_NO: enc = 0x1f; break;
 232
 233    default:
 234       enc = 0;
 235       assert(!"invalid condition code");
 236       break;
 237    }
 238    if (ty != TYPE_NONE && !isFloatType(ty))
 239       enc &= ~0x8; // unordered only exists for float types
 240
 241    code[pos / 32] |= enc << (pos % 32);
 242 }
 243
 244 void
 245 CodeEmitterNV50::emitFlagsRd(const Instruction *i)
 246 {
 247    int s = (i->flagsSrc >= 0) ? i->flagsSrc : i->predSrc;
 248
 249    assert(!(code[1] & 0x00003f80));
 250
 251    if (s >= 0) {
 252       assert(i->getSrc(s)->reg.file == FILE_FLAGS);
 253       emitCondCode(i->cc, TYPE_NONE, 32 + 7);
 254       srcId(i->src(s), 32 + 12);
 255    } else {
 256       code[1] |= 0x0780;
 257    }
 258 }
 259
 260 void
 261 CodeEmitterNV50::emitFlagsWr(const Instruction *i)
 262 {
 263    assert(!(code[1] & 0x70));
 264
 265    int flagsDef = i->flagsDef;
 266
 267    // find flags definition and check that it is the last def
 268    if (flagsDef < 0) {
 269       for (int d = 0; i->defExists(d); ++d)
 270          if (i->def(d).getFile() == FILE_FLAGS)
 271             flagsDef = d;
 272       if (flagsDef >= 0 && 0) // TODO: enforce use of flagsDef at some point
 273          WARN("Instruction::flagsDef was not set properly\n");
 274    }
 275    if (flagsDef == 0 && i->defExists(1))
 276       WARN("flags def should not be the primary definition\n");
 277
 278    if (flagsDef >= 0)
 279       code[1] |= (DDATA(i->def(flagsDef)).id << 4) | 0x40;
 280
 281 }
 282
 283 void
 284 CodeEmitterNV50::setARegBits(unsigned int u)
 285 {
 286    code[0] |= (u & 3) << 26;
 287    code[1] |= (u & 4);
 288 }
 289
 290 void
 291 CodeEmitterNV50::setAReg16(const Instruction *i, int s)
 292 {
 293    if (i->srcExists(s)) {
 294       s = i->src(s).indirect[0];
 295       if (s >= 0)
 296          setARegBits(SDATA(i->src(s)).id + 1);
 297    }
 298 }
 299
 300 void
 301 CodeEmitterNV50::setImmediate(const Instruction *i, int s)
 302 {
 303    const ImmediateValue *imm = i->src(s).get()->asImm();
 304    assert(imm);
 305
 306    uint32_t u = imm->reg.data.u32;
 307
 308    if (i->src(s).mod & Modifier(NV50_IR_MOD_NOT))
 309       u = ~u;
 310
 311    code[1] |= 3;
 312    code[0] |= (u & 0x3f) << 16;
 313    code[1] |= (u >> 6) << 2;
 314 }
 315
 316 void
 317 CodeEmitterNV50::setDst(const Value *dst)
 318 {
 319    const Storage *reg = &dst->join->reg;
 320
 321    assert(reg->file != FILE_ADDRESS);
 322
 323    if (reg->data.id < 0 || reg->file == FILE_FLAGS) {
 324       code[0] |= (127 << 2) | 1;
 325       code[1] |= 8;
 326    } else {
 327       int id;
 328       if (reg->file == FILE_SHADER_OUTPUT) {
 329          code[1] |= 8;
 330          id = reg->data.offset / 4;
 331       } else {
 332          id = reg->data.id;
 333       }
 334       code[0] |= id << 2;
 335    }
 336 }
 337
 338 void
 339 CodeEmitterNV50::setDst(const Instruction *i, int d)
 340 {
 341    if (i->defExists(d)) {
 342       setDst(i->getDef(d));
 343    } else
 344    if (!d) {
 345       code[0] |= 0x01fc; // bit bucket
 346       code[1] |= 0x0008;
 347    }
 348 }
 349
 350 // 3 * 2 bits:
 351 // 0: r
 352 // 1: a/s
 353 // 2: c
 354 // 3: i
 355 void
 356 CodeEmitterNV50::setSrcFileBits(const Instruction *i, int enc)
 357 {
 358    uint8_t mode = 0;
 359
 360    for (unsigned int s = 0; s < Target::operationSrcNr[i->op]; ++s) {
 361       switch (i->src(s).getFile()) {
 362       case FILE_GPR:
 363          break;
 364       case FILE_MEMORY_SHARED:
 365       case FILE_SHADER_INPUT:
 366          mode |= 1 << (s * 2);
 367          break;
 368       case FILE_MEMORY_CONST:
 369          mode |= 2 << (s * 2);
 370          break;
 371       case FILE_IMMEDIATE:
 372          mode |= 3 << (s * 2);
 373          break;
 374       default:
 375               ERROR("invalid file on source %i: %u\n", s, i->src(s).getFile());
 376          assert(0);
 377          break;
 378       }
 379    }
 380    switch (mode) {
 381    case 0x00: // rrr
 382       break;
 383    case 0x01: // arr/grr
 384       if (progType == Program::TYPE_GEOMETRY && i->src(0).isIndirect(0)) {
 385          code[0] |= 0x01800000;
 386          if (enc == NV50_OP_ENC_LONG || enc == NV50_OP_ENC_LONG_ALT)
 387             code[1] |= 0x00200000;
 388       } else {
 389          if (enc == NV50_OP_ENC_SHORT)
 390             code[0] |= 0x01000000;
 391          else
 392             code[1] |= 0x00200000;
 393       }
 394       break;
 395    case 0x03: // irr
 396       assert(i->op == OP_MOV);
 397       return;
 398    case 0x0c: // rir
 399       break;
 400    case 0x0d: // gir
 401       assert(progType == Program::TYPE_GEOMETRY ||
 402              progType == Program::TYPE_COMPUTE);
 403       code[0] |= 0x01000000;
 404       if (progType == Program::TYPE_GEOMETRY && i->src(0).isIndirect(0)) {
 405          int reg = i->src(0).getIndirect(0)->rep()->reg.data.id;
 406          assert(reg < 3);
 407          code[0] |= (reg + 1) << 26;
 408       }
 409       break;
 410    case 0x08: // rcr
 411       code[0] |= (enc == NV50_OP_ENC_LONG_ALT) ? 0x01000000 : 0x00800000;
 412       code[1] |= (i->getSrc(1)->reg.fileIndex << 22);
 413       break;
 414    case 0x09: // acr/gcr
 415       if (progType == Program::TYPE_GEOMETRY && i->src(0).isIndirect(0)) {
 416          code[0] |= 0x01800000;
 417       } else {
 418          code[0] |= (enc == NV50_OP_ENC_LONG_ALT) ? 0x01000000 : 0x00800000;
 419          code[1] |= 0x00200000;
 420       }
 421       code[1] |= (i->getSrc(1)->reg.fileIndex << 22);
 422       break;
 423    case 0x20: // rrc
 424       code[0] |= 0x01000000;
 425       code[1] |= (i->getSrc(2)->reg.fileIndex << 22);
 426       break;
 427    case 0x21: // arc
 428       code[0] |= 0x01000000;
 429       code[1] |= 0x00200000 | (i->getSrc(2)->reg.fileIndex << 22);
 430       assert(progType != Program::TYPE_GEOMETRY);
 431       break;
 432    default:
 433       ERROR("not encodable: %x\n", mode);
 434       assert(0);
 435       break;
 436    }
 437    if (progType != Program::TYPE_COMPUTE)
 438       return;
 439
 440    if ((mode & 3) == 1) {
 441       const int pos = i->src(1).getFile() == FILE_IMMEDIATE ? 13 : 14;
 442
 443       switch (i->getSrc(0)->reg.type) {
 444       case TYPE_U8:
 445          break;
 446       case TYPE_U16:
 447          code[0] |= 1 << pos;
 448          break;
 449       case TYPE_S16:
 450          code[0] |= 2 << pos;
 451          break;
 452       default:
 453          code[0] |= 3 << pos;
 454          assert(i->getSrc(0)->reg.size == 4);
 455          break;
 456       }
 457    }
 458 }
 459
 460 void
 461 CodeEmitterNV50::setSrc(const Instruction *i, unsigned int s, int slot)
 462 {
 463    if (Target::operationSrcNr[i->op] <= s)
 464       return;
 465    const Storage *reg = &i->src(s).rep()->reg;
 466
 467    unsigned int id = (reg->file == FILE_GPR) ?
 468       reg->data.id :
 469       reg->data.offset >> (reg->size >> 1); // no > 4 byte sources here
 470
 471    switch (slot) {
 472    case 0: code[0] |= id << 9; break;
 473    case 1: code[0] |= id << 16; break;
 474    case 2: code[1] |= id << 14; break;
 475    default:
 476       assert(0);
 477       break;
 478    }
 479 }
 480
 481 // the default form:
 482 //  - long instruction
 483 //  - 1 to 3 sources in slots 0, 1, 2 (rrr, arr, rcr, acr, rrc, arc, gcr, grr)
 484 //  - address & flags
 485 void
 486 CodeEmitterNV50::emitForm_MAD(const Instruction *i)
 487 {
 488    assert(i->encSize == 8);
 489    code[0] |= 1;
 490
 491    emitFlagsRd(i);
 492    emitFlagsWr(i);
 493
 494    setDst(i, 0);
 495
 496    setSrcFileBits(i, NV50_OP_ENC_LONG);
 497    setSrc(i, 0, 0);
 498    setSrc(i, 1, 1);
 499    setSrc(i, 2, 2);
 500
 501    if (i->getIndirect(0, 0)) {
 502       assert(!i->getIndirect(1, 0));
 503       setAReg16(i, 0);
 504    } else {
 505       setAReg16(i, 1);
 506    }
 507 }
 508
 509 // like default form, but 2nd source in slot 2, and no 3rd source
 510 void
 511 CodeEmitterNV50::emitForm_ADD(const Instruction *i)
 512 {
 513    assert(i->encSize == 8);
 514    code[0] |= 1;
 515
 516    emitFlagsRd(i);
 517    emitFlagsWr(i);
 518
 519    setDst(i, 0);
 520
 521    setSrcFileBits(i, NV50_OP_ENC_LONG_ALT);
 522    setSrc(i, 0, 0);
 523    setSrc(i, 1, 2);
 524
 525    if (i->getIndirect(0, 0)) {
 526       assert(!i->getIndirect(1, 0));
 527       setAReg16(i, 0);
 528    } else {
 529       setAReg16(i, 1);
 530    }
 531 }
 532
 533 // default short form (rr, ar, rc, gr)
 534 void
 535 CodeEmitterNV50::emitForm_MUL(const Instruction *i)
 536 {
 537    assert(i->encSize == 4 && !(code[0] & 1));
 538    assert(i->defExists(0));
 539    assert(!i->getPredicate());
 540
 541    setDst(i, 0);
 542
 543    setSrcFileBits(i, NV50_OP_ENC_SHORT);
 544    setSrc(i, 0, 0);
 545    setSrc(i, 1, 1);
 546 }
 547
 548 // usual immediate form
 549 // - 1 to 3 sources where last is immediate (rir, gir)
 550 // - no address or predicate possible
 551 void
 552 CodeEmitterNV50::emitForm_IMM(const Instruction *i)
 553 {
 554    assert(i->encSize == 8);
 555    code[0] |= 1;
 556
 557    assert(i->defExists(0) && i->srcExists(0));
 558
 559    setDst(i, 0);
 560
 561    setSrcFileBits(i, NV50_OP_ENC_IMM);
 562    if (Target::operationSrcNr[i->op] > 1) {
 563       setSrc(i, 0, 0);
 564       setImmediate(i, 1);
 565       setSrc(i, 2, 1);
 566    } else {
 567       setImmediate(i, 0);
 568    }
 569 }
 570
 571 void
 572 CodeEmitterNV50::emitLoadStoreSizeLG(DataType ty, int pos)
 573 {
 574    uint8_t enc;
 575
 576    switch (ty) {
 577    case TYPE_F32: // fall through
 578    case TYPE_S32: // fall through
 579    case TYPE_U32:  enc = 0x6; break;
 580    case TYPE_B128: enc = 0x5; break;
 581    case TYPE_F64: // fall through
 582    case TYPE_S64: // fall through
 583    case TYPE_U64:  enc = 0x4; break;
 584    case TYPE_S16:  enc = 0x3; break;
 585    case TYPE_U16:  enc = 0x2; break;
 586    case TYPE_S8:   enc = 0x1; break;
 587    case TYPE_U8:   enc = 0x0; break;
 588    default:
 589       enc = 0;
 590       assert(!"invalid load/store type");
 591       break;
 592    }
 593    code[pos / 32] |= enc << (pos % 32);
 594 }
 595
 596 void
 597 CodeEmitterNV50::emitLoadStoreSizeCS(DataType ty)
 598 {
 599    switch (ty) {
 600    case TYPE_U8: break;
 601    case TYPE_U16: code[1] |= 0x4000; break;
 602    case TYPE_S16: code[1] |= 0x8000; break;
 603    case TYPE_F32:
 604    case TYPE_S32:
 605    case TYPE_U32: code[1] |= 0xc000; break;
 606    default:
 607       assert(0);
 608       break;
 609    }
 610 }
 611
 612 void
 613 CodeEmitterNV50::emitLOAD(const Instruction *i)
 614 {
 615    DataFile sf = i->src(0).getFile();
 616    int32_t offset = i->getSrc(0)->reg.data.offset;
 617
 618    switch (sf) {
 619    case FILE_SHADER_INPUT:
 620       if (progType == Program::TYPE_GEOMETRY && i->src(0).isIndirect(0))
 621          code[0] = 0x11800001;
 622       else
 623          // use 'mov' where we can
 624          code[0] = i->src(0).isIndirect(0) ? 0x00000001 : 0x10000001;
 625       code[1] = 0x00200000 | (i->lanes << 14);
 626       if (typeSizeof(i->dType) == 4)
 627          code[1] |= 0x04000000;
 628       break;
 629    case FILE_MEMORY_SHARED:
 630       if (targ->getChipset() >= 0x84) {
 631          assert(offset <= (int32_t)(0x3fff * typeSizeof(i->sType)));
 632          code[0] = 0x10000001;
 633          code[1] = 0x40000000;
 634
 635          if (typeSizeof(i->dType) == 4)
 636             code[1] |= 0x04000000;
 637
 638          emitLoadStoreSizeCS(i->sType);
 639       } else {
 640          assert(offset <= (int32_t)(0x1f * typeSizeof(i->sType)));
 641          code[0] = 0x10000001;
 642          code[1] = 0x00200000 | (i->lanes << 14);
 643          emitLoadStoreSizeCS(i->sType);
 644       }
 645       break;
 646    case FILE_MEMORY_CONST:
 647       code[0] = 0x10000001;
 648       code[1] = 0x20000000 | (i->getSrc(0)->reg.fileIndex << 22);
 649       if (typeSizeof(i->dType) == 4)
 650          code[1] |= 0x04000000;
 651       emitLoadStoreSizeCS(i->sType);
 652       break;
 653    case FILE_MEMORY_LOCAL:
 654       code[0] = 0xd0000001;
 655       code[1] = 0x40000000;
 656       break;
 657    case FILE_MEMORY_GLOBAL:
 658       code[0] = 0xd0000001 | (i->getSrc(0)->reg.fileIndex << 16);
 659       code[1] = 0x80000000;
 660       break;
 661    default:
 662       assert(!"invalid load source file");
 663       break;
 664    }
 665    if (sf == FILE_MEMORY_LOCAL ||
 666        sf == FILE_MEMORY_GLOBAL)
 667       emitLoadStoreSizeLG(i->sType, 21 + 32);
 668
 669    setDst(i, 0);
 670
 671    emitFlagsRd(i);
 672    emitFlagsWr(i);
 673
 674    if (i->src(0).getFile() == FILE_MEMORY_GLOBAL) {
 675       srcId(*i->src(0).getIndirect(0), 9);
 676    } else {
 677       setAReg16(i, 0);
 678       srcAddr16(i->src(0), i->src(0).getFile() != FILE_MEMORY_LOCAL, 9);
 679    }
 680 }
 681
 682 void
 683 CodeEmitterNV50::emitSTORE(const Instruction *i)
 684 {
 685    DataFile f = i->getSrc(0)->reg.file;
 686    int32_t offset = i->getSrc(0)->reg.data.offset;
 687
 688    switch (f) {
 689    case FILE_SHADER_OUTPUT:
 690       code[0] = 0x00000001 | ((offset >> 2) << 9);
 691       code[1] = 0x80c00000;
 692       srcId(i->src(1), 32 + 14);
 693       break;
 694    case FILE_MEMORY_GLOBAL:
 695       code[0] = 0xd0000001 | (i->getSrc(0)->reg.fileIndex << 16);
 696       code[1] = 0xa0000000;
 697       emitLoadStoreSizeLG(i->dType, 21 + 32);
 698       srcId(i->src(1), 2);
 699       break;
 700    case FILE_MEMORY_LOCAL:
 701       code[0] = 0xd0000001;
 702       code[1] = 0x60000000;
 703       emitLoadStoreSizeLG(i->dType, 21 + 32);
 704       srcId(i->src(1), 2);
 705       break;
 706    case FILE_MEMORY_SHARED:
 707       code[0] = 0x00000001;
 708       code[1] = 0xe0000000;
 709       switch (typeSizeof(i->dType)) {
 710       case 1:
 711          code[0] |= offset << 9;
 712          code[1] |= 0x00400000;
 713          break;
 714       case 2:
 715          code[0] |= (offset >> 1) << 9;
 716          break;
 717       case 4:
 718          code[0] |= (offset >> 2) << 9;
 719          code[1] |= 0x04200000;
 720          break;
 721       default:
 722          assert(0);
 723          break;
 724       }
 725       srcId(i->src(1), 32 + 14);
 726       break;
 727    default:
 728       assert(!"invalid store destination file");
 729       break;
 730    }
 731
 732    if (f == FILE_MEMORY_GLOBAL)
 733       srcId(*i->src(0).getIndirect(0), 9);
 734    else
 735       setAReg16(i, 0);
 736
 737    if (f == FILE_MEMORY_LOCAL)
 738       srcAddr16(i->src(0), false, 9);
 739
 740    emitFlagsRd(i);
 741 }
 742
 743 void
 744 CodeEmitterNV50::emitMOV(const Instruction *i)
 745 {
 746    DataFile sf = i->getSrc(0)->reg.file;
 747    DataFile df = i->getDef(0)->reg.file;
 748
 749    assert(sf == FILE_GPR || df == FILE_GPR);
 750
 751    if (sf == FILE_FLAGS) {
 752       code[0] = 0x00000001;
 753       code[1] = 0x20000000;
 754       defId(i->def(0), 2);
 755       srcId(i->src(0), 12);
 756       emitFlagsRd(i);
 757    } else
 758    if (sf == FILE_ADDRESS) {
 759       code[0] = 0x00000001;
 760       code[1] = 0x40000000;
 761       defId(i->def(0), 2);
 762       setARegBits(SDATA(i->src(0)).id + 1);
 763       emitFlagsRd(i);
 764    } else
 765    if (df == FILE_FLAGS) {
 766       code[0] = 0x00000001;
 767       code[1] = 0xa0000000;
 768       defId(i->def(0), 4);
 769       srcId(i->src(0), 9);
 770       emitFlagsRd(i);
 771    } else
 772    if (sf == FILE_IMMEDIATE) {
 773       code[0] = 0x10008001;
 774       code[1] = 0x00000003;
 775       emitForm_IMM(i);
 776    } else {
 777       if (i->encSize == 4) {
 778          code[0] = 0x10008000;
 779       } else {
 780          code[0] = 0x10000001;
 781          code[1] = (typeSizeof(i->dType) == 2) ? 0 : 0x04000000;
 782          code[1] |= (i->lanes << 14);
 783          emitFlagsRd(i);
 784       }
 785       defId(i->def(0), 2);
 786       srcId(i->src(0), 9);
 787    }
 788    if (df == FILE_SHADER_OUTPUT) {
 789       assert(i->encSize == 8);
 790       code[1] |= 0x8;
 791    }
 792 }
 793
 794 static inline uint8_t getSRegEncoding(const ValueRef &ref)
 795 {
 796    switch (SDATA(ref).sv.sv) {
 797    case SV_PHYSID:        return 0;
 798    case SV_CLOCK:         return 1;
 799    case SV_VERTEX_STRIDE: return 3;
 800 // case SV_PM_COUNTER:    return 4 + SDATA(ref).sv.index;
 801    case SV_SAMPLE_INDEX:  return 8;
 802    default:
 803       assert(!"no sreg for system value");
 804       return 0;
 805    }
 806 }
 807
 808 void
 809 CodeEmitterNV50::emitRDSV(const Instruction *i)
 810 {
 811    code[0] = 0x00000001;
 812    code[1] = 0x60000000 | (getSRegEncoding(i->src(0)) << 14);
 813    defId(i->def(0), 2);
 814    emitFlagsRd(i);
 815 }
 816
 817 void
 818 CodeEmitterNV50::emitNOP()
 819 {
 820    code[0] = 0xf0000001;
 821    code[1] = 0xe0000000;
 822 }
 823
 824 void
 825 CodeEmitterNV50::emitQUADOP(const Instruction *i, uint8_t lane, uint8_t quOp)
 826 {
 827    code[0] = 0xc0000000 | (lane << 16);
 828    code[1] = 0x80000000;
 829
 830    code[0] |= (quOp & 0x03) << 20;
 831    code[1] |= (quOp & 0xfc) << 20;
 832
 833    emitForm_ADD(i);
 834
 835    if (!i->srcExists(1))
 836       srcId(i->src(0), 32 + 14);
 837 }
 838
 839 /* NOTE: This returns the base address of a vertex inside the primitive.
 840  * src0 is an immediate, the index (not offset) of the vertex
 841  * inside the primitive. XXX: signed or unsigned ?
 842  * src1 (may be NULL) should use whatever units the hardware requires
 843  * (on nv50 this is bytes, so, relative index * 4; signed 16 bit value).
 844  */
 845 void
 846 CodeEmitterNV50::emitPFETCH(const Instruction *i)
 847 {
 848    const uint32_t prim = i->src(0).get()->reg.data.u32;
 849    assert(prim <= 127);
 850
 851    if (i->def(0).getFile() == FILE_ADDRESS) {
 852       // shl $aX a[] 0
 853       code[0] = 0x00000001 | ((DDATA(i->def(0)).id + 1) << 2);
 854       code[1] = 0xc0200000;
 855       code[0] |= prim << 9;
 856       assert(!i->srcExists(1));
 857    } else
 858    if (i->srcExists(1)) {
 859       // ld b32 $rX a[$aX+base]
 860       code[0] = 0x00000001;
 861       code[1] = 0x04200000 | (0xf << 14);
 862       defId(i->def(0), 2);
 863       code[0] |= prim << 9;
 864       setARegBits(SDATA(i->src(1)).id + 1);
 865    } else {
 866       // mov b32 $rX a[]
 867       code[0] = 0x10000001;
 868       code[1] = 0x04200000 | (0xf << 14);
 869       defId(i->def(0), 2);
 870       code[0] |= prim << 9;
 871    }
 872    emitFlagsRd(i);
 873 }
 874
 875 void
 876 CodeEmitterNV50::emitINTERP(const Instruction *i)
 877 {
 878    code[0] = 0x80000000;
 879
 880    defId(i->def(0), 2);
 881    srcAddr8(i->src(0), 16);
 882
 883    if (i->getInterpMode() == NV50_IR_INTERP_FLAT) {
 884       code[0] |= 1 << 8;
 885    } else {
 886       if (i->op == OP_PINTERP) {
 887          code[0] |= 1 << 25;
 888          srcId(i->src(1), 9);
 889       }
 890       if (i->getSampleMode() == NV50_IR_INTERP_CENTROID)
 891          code[0] |= 1 << 24;
 892    }
 893
 894    if (i->encSize == 8) {
 895       code[1] =
 896          (code[0] & (3 << 24)) >> (24 - 16) |
 897          (code[0] & (1 <<  8)) << (18 -  8);
 898       code[0] &= ~0x03000100;
 899       code[0] |= 1;
 900       emitFlagsRd(i);
 901    }
 902 }
 903
 904 void
 905 CodeEmitterNV50::emitMINMAX(const Instruction *i)
 906 {
 907    if (i->dType == TYPE_F64) {
 908       code[0] = 0xe0000000;
 909       code[1] = (i->op == OP_MIN) ? 0xa0000000 : 0xc0000000;
 910    } else {
 911       code[0] = 0x30000000;
 912       code[1] = 0x80000000;
 913       if (i->op == OP_MIN)
 914          code[1] |= 0x20000000;
 915
 916       switch (i->dType) {
 917       case TYPE_F32: code[0] |= 0x80000000; break;
 918       case TYPE_S32: code[1] |= 0x8c000000; break;
 919       case TYPE_U32: code[1] |= 0x84000000; break;
 920       case TYPE_S16: code[1] |= 0x80000000; break;
 921       case TYPE_U16: break;
 922       default:
 923          assert(0);
 924          break;
 925       }
 926       code[1] |= i->src(0).mod.abs() << 20;
 927       code[1] |= i->src(1).mod.abs() << 19;
 928    }
 929    emitForm_MAD(i);
 930 }
 931
 932 void
 933 CodeEmitterNV50::emitFMAD(const Instruction *i)
 934 {
 935    const int neg_mul = i->src(0).mod.neg() ^ i->src(1).mod.neg();
 936    const int neg_add = i->src(2).mod.neg();
 937
 938    code[0] = 0xe0000000;
 939
 940    if (i->encSize == 4) {
 941       emitForm_MUL(i);
 942       assert(!neg_mul && !neg_add);
 943    } else {
 944       code[1]  = neg_mul << 26;
 945       code[1] |= neg_add << 27;
 946       if (i->saturate)
 947          code[1] |= 1 << 29;
 948       emitForm_MAD(i);
 949    }
 950 }
 951
 952 void
 953 CodeEmitterNV50::emitFADD(const Instruction *i)
 954 {
 955    const int neg0 = i->src(0).mod.neg();
 956    const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
 957
 958    code[0] = 0xb0000000;
 959
 960    assert(!(i->src(0).mod | i->src(1).mod).abs());
 961
 962    if (i->src(1).getFile() == FILE_IMMEDIATE) {
 963       code[1] = 0;
 964       emitForm_IMM(i);
 965       code[0] |= neg0 << 15;
 966       code[0] |= neg1 << 22;
 967       if (i->saturate)
 968          code[0] |= 1 << 8;
 969    } else
 970    if (i->encSize == 8) {
 971       code[1] = 0;
 972       emitForm_ADD(i);
 973       code[1] |= neg0 << 26;
 974       code[1] |= neg1 << 27;
 975       if (i->saturate)
 976          code[1] |= 1 << 29;
 977    } else {
 978       emitForm_MUL(i);
 979       code[0] |= neg0 << 15;
 980       code[0] |= neg1 << 22;
 981       if (i->saturate)
 982          code[0] |= 1 << 8;
 983    }
 984 }
 985
 986 void
 987 CodeEmitterNV50::emitUADD(const Instruction *i)
 988 {
 989    const int neg0 = i->src(0).mod.neg();
 990    const int neg1 = i->src(1).mod.neg() ^ ((i->op == OP_SUB) ? 1 : 0);
 991
 992    code[0] = 0x20008000;
 993
 994    if (i->src(1).getFile() == FILE_IMMEDIATE) {
 995       code[1] = 0;
 996       emitForm_IMM(i);
 997    } else
 998    if (i->encSize == 8) {
 999       code[0] = 0x20000000;
1000       code[1] = (typeSizeof(i->dType) == 2) ? 0 : 0x04000000;
1001       emitForm_ADD(i);
1002    } else {
1003       emitForm_MUL(i);
1004    }
1005    assert(!(neg0 && neg1));
1006    code[0] |= neg0 << 28;
1007    code[0] |= neg1 << 22;
1008
1009    if (i->flagsSrc >= 0) {
1010       // addc == sub | subr
1011       assert(!(code[0] & 0x10400000) && !i->getPredicate());
1012       code[0] |= 0x10400000;
1013       srcId(i->src(i->flagsSrc), 32 + 12);
1014    }
1015 }
1016
1017 void
1018 CodeEmitterNV50::emitAADD(const Instruction *i)
1019 {
1020    const int s = (i->op == OP_MOV) ? 0 : 1;
1021
1022    code[0] = 0xd0000001 | (i->getSrc(s)->reg.data.u16 << 9);
1023    code[1] = 0x20000000;
1024
1025    code[0] |= (DDATA(i->def(0)).id + 1) << 2;
1026
1027    emitFlagsRd(i);
1028
1029    if (s && i->srcExists(0))
1030       setARegBits(SDATA(i->src(0)).id + 1);
1031 }
1032
1033 void
1034 CodeEmitterNV50::emitIMUL(const Instruction *i)
1035 {
1036    code[0] = 0x40000000;
1037
1038    if (i->encSize == 8) {
1039       code[1] = (i->sType == TYPE_S16) ? (0x8000 | 0x4000) : 0x0000;
1040       emitForm_MAD(i);
1041    } else {
1042       if (i->sType == TYPE_S16)
1043          code[0] |= 0x8100;
1044       emitForm_MUL(i);
1045    }
1046 }
1047
1048 void
1049 CodeEmitterNV50::emitFMUL(const Instruction *i)
1050 {
1051    const int neg = (i->src(0).mod ^ i->src(1).mod).neg();
1052
1053    code[0] = 0xc0000000;
1054
1055    if (i->src(1).getFile() == FILE_IMMEDIATE) {
1056       code[1] = 0;
1057       emitForm_IMM(i);
1058       if (neg)
1059          code[0] |= 0x8000;
1060    } else
1061    if (i->encSize == 8) {
1062       code[1] = i->rnd == ROUND_Z ? 0x0000c000 : 0;
1063       if (neg)
1064          code[1] |= 0x08000000;
1065       emitForm_MAD(i);
1066    } else {
1067       emitForm_MUL(i);
1068       if (neg)
1069          code[0] |= 0x8000;
1070    }
1071 }
1072
1073 void
1074 CodeEmitterNV50::emitIMAD(const Instruction *i)
1075 {
1076    code[0] = 0x60000000;
1077    if (isSignedType(i->sType))
1078       code[1] = i->saturate ? 0x40000000 : 0x20000000;
1079    else
1080       code[1] = 0x00000000;
1081
1082    int neg1 = i->src(0).mod.neg() ^ i->src(1).mod.neg();
1083    int neg2 = i->src(2).mod.neg();
1084
1085    assert(!(neg1 & neg2));
1086    code[1] |= neg1 << 27;
1087    code[1] |= neg2 << 26;
1088
1089    emitForm_MAD(i);
1090
1091    if (i->flagsSrc >= 0) {
1092       // add with carry from $cX
1093       assert(!(code[1] & 0x0c000000) && !i->getPredicate());
1094       code[1] |= 0xc << 24;
1095       srcId(i->src(i->flagsSrc), 32 + 12);
1096    }
1097 }
1098
1099 void
1100 CodeEmitterNV50::emitISAD(const Instruction *i)
1101 {
1102    if (i->encSize == 8) {
1103       code[0] = 0x50000000;
1104       switch (i->sType) {
1105       case TYPE_U32: code[1] = 0x04000000; break;
1106       case TYPE_S32: code[1] = 0x0c000000; break;
1107       case TYPE_U16: code[1] = 0x00000000; break;
1108       case TYPE_S16: code[1] = 0x08000000; break;
1109       default:
1110          assert(0);
1111          break;
1112       }
1113       emitForm_MAD(i);
1114    } else {
1115       switch (i->sType) {
1116       case TYPE_U32: code[0] = 0x50008000; break;
1117       case TYPE_S32: code[0] = 0x50008100; break;
1118       case TYPE_U16: code[0] = 0x50000000; break;
1119       case TYPE_S16: code[0] = 0x50000100; break;
1120       default:
1121          assert(0);
1122          break;
1123       }
1124       emitForm_MUL(i);
1125    }
1126 }
1127
1128 void
1129 CodeEmitterNV50::emitSET(const Instruction *i)
1130 {
1131    code[0] = 0x30000000;
1132    code[1] = 0x60000000;
1133
1134    emitCondCode(i->asCmp()->setCond, i->sType, 32 + 14);
1135
1136    switch (i->sType) {
1137    case TYPE_F32: code[0] |= 0x80000000; break;
1138    case TYPE_S32: code[1] |= 0x0c000000; break;
1139    case TYPE_U32: code[1] |= 0x04000000; break;
1140    case TYPE_S16: code[1] |= 0x08000000; break;
1141    case TYPE_U16: break;
1142    default:
1143       assert(0);
1144       break;
1145    }
1146    if (i->src(0).mod.neg()) code[1] |= 0x04000000;
1147    if (i->src(1).mod.neg()) code[1] |= 0x08000000;
1148    if (i->src(0).mod.abs()) code[1] |= 0x00100000;
1149    if (i->src(1).mod.abs()) code[1] |= 0x00080000;
1150
1151    emitForm_MAD(i);
1152 }
1153
1154 void
1155 CodeEmitterNV50::roundMode_CVT(RoundMode rnd)
1156 {
1157    switch (rnd) {
1158    case ROUND_NI: code[1] |= 0x08000000; break;
1159    case ROUND_M:  code[1] |= 0x00020000; break;
1160    case ROUND_MI: code[1] |= 0x08020000; break;
1161    case ROUND_P:  code[1] |= 0x00040000; break;
1162    case ROUND_PI: code[1] |= 0x08040000; break;
1163    case ROUND_Z:  code[1] |= 0x00060000; break;
1164    case ROUND_ZI: code[1] |= 0x08060000; break;
1165    default:
1166       assert(rnd == ROUND_N);
1167       break;
1168    }
1169 }
1170
1171 void
1172 CodeEmitterNV50::emitCVT(const Instruction *i)
1173 {
1174    const bool f2f = isFloatType(i->dType) && isFloatType(i->sType);
1175    RoundMode rnd;
1176    DataType dType;
1177
1178    switch (i->op) {
1179    case OP_CEIL:  rnd = f2f ? ROUND_PI : ROUND_P; break;
1180    case OP_FLOOR: rnd = f2f ? ROUND_MI : ROUND_M; break;
1181    case OP_TRUNC: rnd = f2f ? ROUND_ZI : ROUND_Z; break;
1182    default:
1183       rnd = i->rnd;
1184       break;
1185    }
1186
1187    if (i->op == OP_NEG && i->dType == TYPE_U32)
1188       dType = TYPE_S32;
1189    else
1190       dType = i->dType;
1191
1192    code[0] = 0xa0000000;
1193
1194    switch (dType) {
1195    case TYPE_F64:
1196       switch (i->sType) {
1197       case TYPE_F64: code[1] = 0xc4404000; break;
1198       case TYPE_S64: code[1] = 0x44414000; break;
1199       case TYPE_U64: code[1] = 0x44404000; break;
1200       case TYPE_F32: code[1] = 0xc4400000; break;
1201       case TYPE_S32: code[1] = 0x44410000; break;
1202       case TYPE_U32: code[1] = 0x44400000; break;
1203       default:
1204          assert(0);
1205          break;
1206       }
1207       break;
1208    case TYPE_S64:
1209       switch (i->sType) {
1210       case TYPE_F64: code[1] = 0x8c404000; break;
1211       case TYPE_F32: code[1] = 0x8c400000; break;
1212       default:
1213          assert(0);
1214          break;
1215       }
1216       break;
1217    case TYPE_U64:
1218       switch (i->sType) {
1219       case TYPE_F64: code[1] = 0x84404000; break;
1220       case TYPE_F32: code[1] = 0x84400000; break;
1221       default:
1222          assert(0);
1223          break;
1224       }
1225       break;
1226    case TYPE_F32:
1227       switch (i->sType) {
1228       case TYPE_F64: code[1] = 0xc0404000; break;
1229       case TYPE_S64: code[1] = 0x40414000; break;
1230       case TYPE_U64: code[1] = 0x40404000; break;
1231       case TYPE_F32: code[1] = 0xc4004000; break;
1232       case TYPE_S32: code[1] = 0x44014000; break;
1233       case TYPE_U32: code[1] = 0x44004000; break;
1234       case TYPE_F16: code[1] = 0xc4000000; break;
1235       default:
1236          assert(0);
1237          break;
1238       }
1239       break;
1240    case TYPE_S32:
1241       switch (i->sType) {
1242       case TYPE_F64: code[1] = 0x88404000; break;
1243       case TYPE_F32: code[1] = 0x8c004000; break;
1244       case TYPE_S32: code[1] = 0x0c014000; break;
1245       case TYPE_U32: code[1] = 0x0c004000; break;
1246       case TYPE_F16: code[1] = 0x8c000000; break;
1247       case TYPE_S16: code[1] = 0x0c010000; break;
1248       case TYPE_U16: code[1] = 0x0c000000; break;
1249       case TYPE_S8:  code[1] = 0x0c018000; break;
1250       case TYPE_U8:  code[1] = 0x0c008000; break;
1251       default:
1252          assert(0);
1253          break;
1254       }
1255       break;
1256    case TYPE_U32:
1257       switch (i->sType) {
1258       case TYPE_F64: code[1] = 0x80404000; break;
1259       case TYPE_F32: code[1] = 0x84004000; break;
1260       case TYPE_S32: code[1] = 0x04014000; break;
1261       case TYPE_U32: code[1] = 0x04004000; break;
1262       case TYPE_F16: code[1] = 0x84000000; break;
1263       case TYPE_S16: code[1] = 0x04010000; break;
1264       case TYPE_U16: code[1] = 0x04000000; break;
1265       case TYPE_S8:  code[1] = 0x04018000; break;
1266       case TYPE_U8:  code[1] = 0x04008000; break;
1267       default:
1268          assert(0);
1269          break;
1270       }
1271       break;
1272    case TYPE_S16:
1273    case TYPE_U16:
1274    case TYPE_S8:
1275    case TYPE_U8:
1276    default:
1277       assert(0);
1278       break;
1279    }
1280    if (typeSizeof(i->sType) == 1 && i->getSrc(0)->reg.size == 4)
1281       code[1] |= 0x00004000;
1282
1283    roundMode_CVT(rnd);
1284
1285    switch (i->op) {
1286    case OP_ABS: code[1] |= 1 << 20; break;
1287    case OP_SAT: code[1] |= 1 << 19; break;
1288    case OP_NEG: code[1] |= 1 << 29; break;
1289    default:
1290       break;
1291    }
1292    code[1] ^= i->src(0).mod.neg() << 29;
1293    code[1] |= i->src(0).mod.abs() << 20;
1294    if (i->saturate)
1295       code[1] |= 1 << 19;
1296
1297    assert(i->op != OP_ABS || !i->src(0).mod.neg());
1298
1299    emitForm_MAD(i);
1300 }
1301
1302 void
1303 CodeEmitterNV50::emitPreOp(const Instruction *i)
1304 {
1305    code[0] = 0xb0000000;
1306    code[1] = (i->op == OP_PREEX2) ? 0xc0004000 : 0xc0000000;
1307
1308    code[1] |= i->src(0).mod.abs() << 20;
1309    code[1] |= i->src(0).mod.neg() << 26;
1310
1311    emitForm_MAD(i);
1312 }
1313
1314 void
1315 CodeEmitterNV50::emitSFnOp(const Instruction *i, uint8_t subOp)
1316 {
1317    code[0] = 0x90000000;
1318
1319    if (i->encSize == 4) {
1320       assert(i->op == OP_RCP);
1321       code[0] |= i->src(0).mod.abs() << 15;
1322       code[0] |= i->src(0).mod.neg() << 22;
1323       emitForm_MUL(i);
1324    } else {
1325       code[1] = subOp << 29;
1326       code[1] |= i->src(0).mod.abs() << 20;
1327       code[1] |= i->src(0).mod.neg() << 26;
1328       emitForm_MAD(i);
1329    }
1330 }
1331
1332 void
1333 CodeEmitterNV50::emitNOT(const Instruction *i)
1334 {
1335    code[0] = 0xd0000000;
1336    code[1] = 0x0002c000;
1337
1338    switch (i->sType) {
1339    case TYPE_U32:
1340    case TYPE_S32:
1341       code[1] |= 0x04000000;
1342       break;
1343    default:
1344       break;
1345    }
1346    emitForm_MAD(i);
1347    setSrc(i, 0, 1);
1348 }
1349
1350 void
1351 CodeEmitterNV50::emitLogicOp(const Instruction *i)
1352 {
1353    code[0] = 0xd0000000;
1354    code[1] = 0;
1355
1356    if (i->src(1).getFile() == FILE_IMMEDIATE) {
1357       switch (i->op) {
1358       case OP_OR:  code[0] |= 0x0100; break;
1359       case OP_XOR: code[0] |= 0x8000; break;
1360       default:
1361          assert(i->op == OP_AND);
1362          break;
1363       }
1364       if (i->src(0).mod & Modifier(NV50_IR_MOD_NOT))
1365          code[0] |= 1 << 22;
1366
1367       emitForm_IMM(i);
1368    } else {
1369       switch (i->op) {
1370       case OP_AND: code[1] = 0x04000000; break;
1371       case OP_OR:  code[1] = 0x04004000; break;
1372       case OP_XOR: code[1] = 0x04008000; break;
1373       default:
1374          assert(0);
1375          break;
1376       }
1377       if (i->src(0).mod & Modifier(NV50_IR_MOD_NOT))
1378          code[1] |= 1 << 16;
1379       if (i->src(1).mod & Modifier(NV50_IR_MOD_NOT))
1380          code[1] |= 1 << 17;
1381
1382       emitForm_MAD(i);
1383    }
1384 }
1385
1386 void
1387 CodeEmitterNV50::emitARL(const Instruction *i, unsigned int shl)
1388 {
1389    code[0] = 0x00000001 | (shl << 16);
1390    code[1] = 0xc0000000;
1391
1392    code[0] |= (DDATA(i->def(0)).id + 1) << 2;
1393
1394    setSrcFileBits(i, NV50_OP_ENC_IMM);
1395    setSrc(i, 0, 0);
1396    emitFlagsRd(i);
1397 }
1398
1399 void
1400 CodeEmitterNV50::emitShift(const Instruction *i)
1401 {
1402    if (i->def(0).getFile() == FILE_ADDRESS) {
1403       assert(i->srcExists(1) && i->src(1).getFile() == FILE_IMMEDIATE);
1404       emitARL(i, i->getSrc(1)->reg.data.u32 & 0x3f);
1405    } else {
1406       code[0] = 0x30000001;
1407       code[1] = (i->op == OP_SHR) ? 0xe4000000 : 0xc4000000;
1408       if (i->op == OP_SHR && isSignedType(i->sType))
1409           code[1] |= 1 << 27;
1410
1411       if (i->src(1).getFile() == FILE_IMMEDIATE) {
1412          code[1] |= 1 << 20;
1413          code[0] |= (i->getSrc(1)->reg.data.u32 & 0x7f) << 16;
1414          defId(i->def(0), 2);
1415          srcId(i->src(0), 9);
1416          emitFlagsRd(i);
1417       } else {
1418          emitForm_MAD(i);
1419       }
1420    }
1421 }
1422
1423 void
1424 CodeEmitterNV50::emitOUT(const Instruction *i)
1425 {
1426    code[0] = (i->op == OP_EMIT) ? 0xf0000201 : 0xf0000401;
1427    code[1] = 0xc0000000;
1428
1429    emitFlagsRd(i);
1430 }
1431
1432 void
1433 CodeEmitterNV50::emitTEX(const TexInstruction *i)
1434 {
1435    code[0] = 0xf0000001;
1436    code[1] = 0x00000000;
1437
1438    switch (i->op) {
1439    case OP_TXB:
1440       code[1] = 0x20000000;
1441       break;
1442    case OP_TXL:
1443       code[1] = 0x40000000;
1444       break;
1445    case OP_TXF:
1446       code[0] |= 0x01000000;
1447       break;
1448    case OP_TXG:
1449       code[0] = 0x01000000;
1450       code[1] = 0x80000000;
1451       break;
1452    default:
1453       assert(i->op == OP_TEX);
1454       break;
1455    }
1456
1457    code[0] |= i->tex.r << 9;
1458    code[0] |= i->tex.s << 17;
1459
1460    int argc = i->tex.target.getArgCount();
1461
1462    if (i->op == OP_TXB || i->op == OP_TXL || i->op == OP_TXF)
1463       argc += 1;
1464    if (i->tex.target.isShadow())
1465       argc += 1;
1466    assert(argc <= 4);
1467
1468    code[0] |= (argc - 1) << 22;
1469
1470    if (i->tex.target.isCube()) {
1471       code[0] |= 0x08000000;
1472    } else
1473    if (i->tex.useOffsets) {
1474       code[1] |= (i->tex.offset[0][0] & 0xf) << 24;
1475       code[1] |= (i->tex.offset[0][1] & 0xf) << 20;
1476       code[1] |= (i->tex.offset[0][2] & 0xf) << 16;
1477    }
1478
1479    code[0] |= (i->tex.mask & 0x3) << 25;
1480    code[1] |= (i->tex.mask & 0xc) << 12;
1481
1482    if (i->tex.liveOnly)
1483       code[1] |= 4;
1484
1485    defId(i->def(0), 2);
1486
1487    emitFlagsRd(i);
1488 }
1489
1490 void
1491 CodeEmitterNV50::emitTXQ(const TexInstruction *i)
1492 {
1493    assert(i->tex.query == TXQ_DIMS);
1494
1495    code[0] = 0xf0000001;
1496    code[1] = 0x60000000;
1497
1498    code[0] |= i->tex.r << 9;
1499    code[0] |= i->tex.s << 17;
1500
1501    code[0] |= (i->tex.mask & 0x3) << 25;
1502    code[1] |= (i->tex.mask & 0xc) << 12;
1503
1504    defId(i->def(0), 2);
1505
1506    emitFlagsRd(i);
1507 }
1508
1509 void
1510 CodeEmitterNV50::emitTEXPREP(const TexInstruction *i)
1511 {
1512    code[0] = 0xf8000001 | (3 << 22) | (i->tex.s << 17) | (i->tex.r << 9);
1513    code[1] = 0x60010000;
1514
1515    code[0] |= (i->tex.mask & 0x3) << 25;
1516    code[1] |= (i->tex.mask & 0xc) << 12;
1517    defId(i->def(0), 2);
1518
1519    emitFlagsRd(i);
1520 }
1521
1522 void
1523 CodeEmitterNV50::emitPRERETEmu(const FlowInstruction *i)
1524 {
1525    uint32_t pos = i->target.bb->binPos + 8; // +8 to skip an op */
1526
1527    code[0] = 0x10000003; // bra
1528    code[1] = 0x00000780; // always
1529
1530    switch (i->subOp) {
1531    case NV50_IR_SUBOP_EMU_PRERET + 0: // bra to the call
1532       break;
1533    case NV50_IR_SUBOP_EMU_PRERET + 1: // bra to skip the call
1534       pos += 8;
1535       break;
1536    default:
1537       assert(i->subOp == (NV50_IR_SUBOP_EMU_PRERET + 2));
1538       code[0] = 0x20000003; // call
1539       code[1] = 0x00000000; // no predicate
1540       break;
1541    }
1542    addReloc(RelocEntry::TYPE_CODE, 0, pos, 0x07fff800, 9);
1543    addReloc(RelocEntry::TYPE_CODE, 1, pos, 0x000fc000, -4);
1544 }
1545
1546 void
1547 CodeEmitterNV50::emitFlow(const Instruction *i, uint8_t flowOp)
1548 {
1549    const FlowInstruction *f = i->asFlow();
1550    bool hasPred = false;
1551    bool hasTarg = false;
1552
1553    code[0] = 0x00000003 | (flowOp << 28);
1554    code[1] = 0x00000000;
1555
1556    switch (i->op) {
1557    case OP_BRA:
1558       hasPred = true;
1559       hasTarg = true;
1560       break;
1561    case OP_BREAK:
1562    case OP_BRKPT:
1563    case OP_DISCARD:
1564    case OP_RET:
1565       hasPred = true;
1566       break;
1567    case OP_CALL:
1568    case OP_PREBREAK:
1569    case OP_JOINAT:
1570       hasTarg = true;
1571       break;
1572    case OP_PRERET:
1573       hasTarg = true;
1574       if (i->subOp >= NV50_IR_SUBOP_EMU_PRERET) {
1575          emitPRERETEmu(f);
1576          return;
1577       }
1578       break;
1579    default:
1580       break;
1581    }
1582
1583    if (hasPred)
1584       emitFlagsRd(i);
1585
1586    if (hasTarg && f) {
1587       uint32_t pos;
1588
1589       if (f->op == OP_CALL) {
1590          if (f->builtin) {
1591             pos = targNV50->getBuiltinOffset(f->target.builtin);
1592          } else {
1593             pos = f->target.fn->binPos;
1594          }
1595       } else {
1596          pos = f->target.bb->binPos;
1597       }
1598
1599       code[0] |= ((pos >>  2) & 0xffff) << 11;
1600       code[1] |= ((pos >> 18) & 0x003f) << 14;
1601
1602       RelocEntry::Type relocTy;
1603
1604       relocTy = f->builtin ? RelocEntry::TYPE_BUILTIN : RelocEntry::TYPE_CODE;
1605
1606       addReloc(relocTy, 0, pos, 0x07fff800, 9);
1607       addReloc(relocTy, 1, pos, 0x000fc000, -4);
1608    }
1609 }
1610
1611 void
1612 CodeEmitterNV50::emitBAR(const Instruction *i)
1613 {
1614    ImmediateValue *barId = i->getSrc(0)->asImm();
1615    assert(barId);
1616
1617    code[0] = 0x82000003 | (barId->reg.data.u32 << 21);
1618    code[1] = 0x00004000;
1619
1620    if (i->subOp == NV50_IR_SUBOP_BAR_SYNC)
1621       code[0] |= 1 << 26;
1622 }
1623
1624 void
1625 CodeEmitterNV50::emitATOM(const Instruction *i)
1626 {
1627    uint8_t subOp;
1628    switch (i->subOp) {
1629    case NV50_IR_SUBOP_ATOM_ADD:  subOp = 0x0; break;
1630    case NV50_IR_SUBOP_ATOM_MIN:  subOp = 0x7; break;
1631    case NV50_IR_SUBOP_ATOM_MAX:  subOp = 0x6; break;
1632    case NV50_IR_SUBOP_ATOM_INC:  subOp = 0x4; break;
1633    case NV50_IR_SUBOP_ATOM_DEC:  subOp = 0x5; break;
1634    case NV50_IR_SUBOP_ATOM_AND:  subOp = 0xa; break;
1635    case NV50_IR_SUBOP_ATOM_OR:   subOp = 0xb; break;
1636    case NV50_IR_SUBOP_ATOM_XOR:  subOp = 0xc; break;
1637    case NV50_IR_SUBOP_ATOM_CAS:  subOp = 0x2; break;
1638    case NV50_IR_SUBOP_ATOM_EXCH: subOp = 0x1; break;
1639    default:
1640       assert(!"invalid subop");
1641       return;
1642    }
1643    code[0] = 0xd0000001;
1644    code[1] = 0xe0c00000 | (subOp << 2);
1645    if (isSignedType(i->dType))
1646       code[1] |= 1 << 21;
1647
1648    // args
1649    emitFlagsRd(i);
1650    setDst(i, 0);
1651    setSrc(i, 1, 1);
1652    if (i->subOp == NV50_IR_SUBOP_ATOM_CAS)
1653       setSrc(i, 2, 2);
1654
1655    // g[] pointer
1656    code[0] |= i->getSrc(0)->reg.fileIndex << 23;
1657    srcId(i->getIndirect(0, 0), 9);
1658 }
1659
1660 bool
1661 CodeEmitterNV50::emitInstruction(Instruction *insn)
1662 {
1663    if (!insn->encSize) {
1664       ERROR("skipping unencodable instruction: "); insn->print();
1665       return false;
1666    } else
1667    if (codeSize + insn->encSize > codeSizeLimit) {
1668       ERROR("code emitter output buffer too small\n");
1669       return false;
1670    }
1671
1672    if (insn->bb->getProgram()->dbgFlags & NV50_IR_DEBUG_BASIC) {
1673       INFO("EMIT: "); insn->print();
1674    }
1675
1676    switch (insn->op) {
1677    case OP_MOV:
1678       emitMOV(insn);
1679       break;
1680    case OP_EXIT:
1681    case OP_NOP:
1682    case OP_JOIN:
1683       emitNOP();
1684       break;
1685    case OP_VFETCH:
1686    case OP_LOAD:
1687       emitLOAD(insn);
1688       break;
1689    case OP_EXPORT:
1690    case OP_STORE:
1691       emitSTORE(insn);
1692       break;
1693    case OP_PFETCH:
1694       emitPFETCH(insn);
1695       break;
1696    case OP_RDSV:
1697       emitRDSV(insn);
1698       break;
1699    case OP_LINTERP:
1700    case OP_PINTERP:
1701       emitINTERP(insn);
1702       break;
1703    case OP_ADD:
1704    case OP_SUB:
1705       if (isFloatType(insn->dType))
1706          emitFADD(insn);
1707       else if (insn->getDef(0)->reg.file == FILE_ADDRESS)
1708          emitAADD(insn);
1709       else
1710          emitUADD(insn);
1711       break;
1712    case OP_MUL:
1713       if (isFloatType(insn->dType))
1714          emitFMUL(insn);
1715       else
1716          emitIMUL(insn);
1717       break;
1718    case OP_MAD:
1719    case OP_FMA:
1720       if (isFloatType(insn->dType))
1721          emitFMAD(insn);
1722       else
1723          emitIMAD(insn);
1724       break;
1725    case OP_SAD:
1726       emitISAD(insn);
1727       break;
1728    case OP_NOT:
1729       emitNOT(insn);
1730       break;
1731    case OP_AND:
1732    case OP_OR:
1733    case OP_XOR:
1734       emitLogicOp(insn);
1735       break;
1736    case OP_SHL:
1737    case OP_SHR:
1738       emitShift(insn);
1739       break;
1740    case OP_SET:
1741       emitSET(insn);
1742       break;
1743    case OP_MIN:
1744    case OP_MAX:
1745       emitMINMAX(insn);
1746       break;
1747    case OP_CEIL:
1748    case OP_FLOOR:
1749    case OP_TRUNC:
1750    case OP_ABS:
1751    case OP_NEG:
1752    case OP_SAT:
1753       emitCVT(insn);
1754       break;
1755    case OP_CVT:
1756       if (insn->def(0).getFile() == FILE_ADDRESS)
1757          emitARL(insn, 0);
1758       else
1759       if (insn->def(0).getFile() == FILE_FLAGS ||
1760           insn->src(0).getFile() == FILE_FLAGS ||
1761           insn->src(0).getFile() == FILE_ADDRESS)
1762          emitMOV(insn);
1763       else
1764          emitCVT(insn);
1765       break;
1766    case OP_RCP:
1767       emitSFnOp(insn, 0);
1768       break;
1769    case OP_RSQ:
1770       emitSFnOp(insn, 2);
1771       break;
1772    case OP_LG2:
1773       emitSFnOp(insn, 3);
1774       break;
1775    case OP_SIN:
1776       emitSFnOp(insn, 4);
1777       break;
1778    case OP_COS:
1779       emitSFnOp(insn, 5);
1780       break;
1781    case OP_EX2:
1782       emitSFnOp(insn, 6);
1783       break;
1784    case OP_PRESIN:
1785    case OP_PREEX2:
1786       emitPreOp(insn);
1787       break;
1788    case OP_TEX:
1789    case OP_TXB:
1790    case OP_TXL:
1791    case OP_TXF:
1792       emitTEX(insn->asTex());
1793       break;
1794    case OP_TXQ:
1795       emitTXQ(insn->asTex());
1796       break;
1797    case OP_TEXPREP:
1798       emitTEXPREP(insn->asTex());
1799       break;
1800    case OP_EMIT:
1801    case OP_RESTART:
1802       emitOUT(insn);
1803       break;
1804    case OP_DISCARD:
1805       emitFlow(insn, 0x0);
1806       break;
1807    case OP_BRA:
1808       emitFlow(insn, 0x1);
1809       break;
1810    case OP_CALL:
1811       emitFlow(insn, 0x2);
1812       break;
1813    case OP_RET:
1814       emitFlow(insn, 0x3);
1815       break;
1816    case OP_PREBREAK:
1817       emitFlow(insn, 0x4);
1818       break;
1819    case OP_BREAK:
1820       emitFlow(insn, 0x5);
1821       break;
1822    case OP_QUADON:
1823       emitFlow(insn, 0x6);
1824       break;
1825    case OP_QUADPOP:
1826       emitFlow(insn, 0x7);
1827       break;
1828    case OP_JOINAT:
1829       emitFlow(insn, 0xa);
1830       break;
1831    case OP_PRERET:
1832       emitFlow(insn, 0xd);
1833       break;
1834    case OP_QUADOP:
1835       emitQUADOP(insn, insn->lanes, insn->subOp);
1836       break;
1837    case OP_DFDX:
1838       emitQUADOP(insn, 4, insn->src(0).mod.neg() ? 0x66 : 0x99);
1839       break;
1840    case OP_DFDY:
1841       emitQUADOP(insn, 5, insn->src(0).mod.neg() ? 0x5a : 0xa5);
1842       break;
1843    case OP_ATOM:
1844       emitATOM(insn);
1845       break;
1846    case OP_BAR:
1847       emitBAR(insn);
1848       break;
1849    case OP_PHI:
1850    case OP_UNION:
1851    case OP_CONSTRAINT:
1852       ERROR("operation should have been eliminated\n");
1853       return false;
1854    case OP_EXP:
1855    case OP_LOG:
1856    case OP_SQRT:
1857    case OP_POW:
1858    case OP_SELP:
1859    case OP_SLCT:
1860    case OP_TXD:
1861    case OP_PRECONT:
1862    case OP_CONT:
1863    case OP_POPCNT:
1864    case OP_INSBF:
1865    case OP_EXTBF:
1866       ERROR("operation should have been lowered\n");
1867       return false;
1868    default:
1869       ERROR("unknown op: %u\n", insn->op);
1870       return false;
1871    }
1872    if (insn->join || insn->op == OP_JOIN)
1873       code[1] |= 0x2;
1874    else
1875    if (insn->exit || insn->op == OP_EXIT)
1876       code[1] |= 0x1;
1877
1878    assert((insn->encSize == 8) == (code[0] & 1));
1879
1880    code += insn->encSize / 4;
1881    codeSize += insn->encSize;
1882    return true;
1883 }
1884
1885 uint32_t
1886 CodeEmitterNV50::getMinEncodingSize(const Instruction *i) const
1887 {
1888    const Target::OpInfo &info = targ->getOpInfo(i);
1889
1890    if (info.minEncSize > 4)
1891       return 8;
1892
1893    // check constraints on dst and src operands
1894    for (int d = 0; i->defExists(d); ++d) {
1895       if (i->def(d).rep()->reg.data.id > 63 ||
1896           i->def(d).rep()->reg.file != FILE_GPR)
1897          return 8;
1898    }
1899
1900    for (int s = 0; i->srcExists(s); ++s) {
1901       DataFile sf = i->src(s).getFile();
1902       if (sf != FILE_GPR)
1903          if (sf != FILE_SHADER_INPUT || progType != Program::TYPE_FRAGMENT)
1904             return 8;
1905       if (i->src(s).rep()->reg.data.id > 63)
1906          return 8;
1907    }
1908
1909    // check modifiers & rounding
1910    if (i->join || i->lanes != 0xf || i->exit)
1911       return 8;
1912    if (i->op == OP_MUL && i->rnd != ROUND_N)
1913       return 8;
1914
1915    if (i->asTex())
1916       return 8; // TODO: short tex encoding
1917
1918    // check constraints on short MAD
1919    if (info.srcNr >= 2 && i->srcExists(2)) {
1920       if (i->saturate || i->src(2).mod)
1921          return 8;
1922       if ((i->src(0).mod ^ i->src(1).mod) ||
1923           (i->src(0).mod | i->src(1).mod).abs())
1924          return 8;
1925       if (!i->defExists(0) ||
1926           i->def(0).rep()->reg.data.id != i->src(2).rep()->reg.data.id)
1927          return 8;
1928    }
1929
1930    return info.minEncSize;
1931 }
1932
1933 // Change the encoding size of an instruction after BBs have been scheduled.
1934 static void
1935 makeInstructionLong(Instruction *insn)
1936 {
1937    if (insn->encSize == 8)
1938       return;
1939    Function *fn = insn->bb->getFunction();
1940    int n = 0;
1941    int adj = 4;
1942
1943    for (Instruction *i = insn->next; i && i->encSize == 4; ++n, i = i->next);
1944
1945    if (n & 1) {
1946       adj = 8;
1947       insn->next->encSize = 8;
1948    } else
1949    if (insn->prev && insn->prev->encSize == 4) {
1950       adj = 8;
1951       insn->prev->encSize = 8;
1952    }
1953    insn->encSize = 8;
1954
1955    for (int i = fn->bbCount - 1; i >= 0 && fn->bbArray[i] != insn->bb; --i) {
1956       fn->bbArray[i]->binPos += 4;
1957    }
1958    fn->binSize += adj;
1959    insn->bb->binSize += adj;
1960 }
1961
1962 static bool
1963 trySetExitModifier(Instruction *insn)
1964 {
1965    if (insn->op == OP_DISCARD ||
1966        insn->op == OP_QUADON ||
1967        insn->op == OP_QUADPOP)
1968       return false;
1969    for (int s = 0; insn->srcExists(s); ++s)
1970       if (insn->src(s).getFile() == FILE_IMMEDIATE)
1971          return false;
1972    if (insn->asFlow()) {
1973       if (insn->op == OP_CALL) // side effects !
1974          return false;
1975       if (insn->getPredicate()) // cannot do conditional exit (or can we ?)
1976          return false;
1977       insn->op = OP_EXIT;
1978    }
1979    insn->exit = 1;
1980    makeInstructionLong(insn);
1981    return true;
1982 }
1983
1984 static void
1985 replaceExitWithModifier(Function *func)
1986 {
1987    BasicBlock *epilogue = BasicBlock::get(func->cfgExit);
1988
1989    if (!epilogue->getExit() ||
1990        epilogue->getExit()->op != OP_EXIT) // only main will use OP_EXIT
1991       return;
1992
1993    if (epilogue->getEntry()->op != OP_EXIT) {
1994       Instruction *insn = epilogue->getExit()->prev;
1995       if (!insn || !trySetExitModifier(insn))
1996          return;
1997       insn->exit = 1;
1998    } else {
1999       for (Graph::EdgeIterator ei = func->cfgExit->incident();
2000            !ei.end(); ei.next()) {
2001          BasicBlock *bb = BasicBlock::get(ei.getNode());
2002          Instruction *i = bb->getExit();
2003
2004          if (!i || !trySetExitModifier(i))
2005             return;
2006       }
2007    }
2008    epilogue->binSize -= 8;
2009    func->binSize -= 8;
2010    delete_Instruction(func->getProgram(), epilogue->getExit());
2011 }
2012
2013 void
2014 CodeEmitterNV50::prepareEmission(Function *func)
2015 {
2016    CodeEmitter::prepareEmission(func);
2017
2018    replaceExitWithModifier(func);
2019 }
2020
2021 CodeEmitterNV50::CodeEmitterNV50(const TargetNV50 *target) :
2022    CodeEmitter(target), targNV50(target)
2023 {
2024    targ = target; // specialized
2025    code = NULL;
2026    codeSize = codeSizeLimit = 0;
2027    relocInfo = NULL;
2028 }
2029
2030 CodeEmitter *
2031 TargetNV50::getCodeEmitter(Program::Type type)
2032 {
2033    CodeEmitterNV50 *emit = new CodeEmitterNV50(this);
2034    emit->setProgramType(type);
2035    return emit;
2036 }
2037
2038 } // namespace nv50_ir