src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 extern "C" {
  24 #include "tgsi/tgsi_dump.h"
  25 #include "tgsi/tgsi_scan.h"
  26 #include "tgsi/tgsi_util.h"
  27 }
  28
  29 #include <set>
  30
  31 #include "codegen/nv50_ir.h"
  32 #include "codegen/nv50_ir_util.h"
  33 #include "codegen/nv50_ir_build_util.h"
  34
  35 namespace tgsi {
  36
  37 class Source;
  38
  39 static nv50_ir::operation translateOpcode(uint opcode);
  40 static nv50_ir::DataFile translateFile(uint file);
  41 static nv50_ir::TexTarget translateTexture(uint texTarg);
  42 static nv50_ir::SVSemantic translateSysVal(uint sysval);
  43
  44 class Instruction
  45 {
  46 public:
  47    Instruction(const struct tgsi_full_instruction *inst) : insn(inst) { }
  48
  49    class SrcRegister
  50    {
  51    public:
  52       SrcRegister(const struct tgsi_full_src_register *src)
  53          : reg(src->Register),
  54            fsr(src)
  55       { }
  56
  57       SrcRegister(const struct tgsi_src_register& src) : reg(src), fsr(NULL) { }
  58
  59       SrcRegister(const struct tgsi_ind_register& ind)
  60          : reg(tgsi_util_get_src_from_ind(&ind)),
  61            fsr(NULL)
  62       { }
  63
  64       struct tgsi_src_register offsetToSrc(struct tgsi_texture_offset off)
  65       {
  66          struct tgsi_src_register reg;
  67          memset(&reg, 0, sizeof(reg));
  68          reg.Index = off.Index;
  69          reg.File = off.File;
  70          reg.SwizzleX = off.SwizzleX;
  71          reg.SwizzleY = off.SwizzleY;
  72          reg.SwizzleZ = off.SwizzleZ;
  73          return reg;
  74       }
  75
  76       SrcRegister(const struct tgsi_texture_offset& off) :
  77          reg(offsetToSrc(off)),
  78          fsr(NULL)
  79       { }
  80
  81       uint getFile() const { return reg.File; }
  82
  83       bool is2D() const { return reg.Dimension; }
  84
  85       bool isIndirect(int dim) const
  86       {
  87          return (dim && fsr) ? fsr->Dimension.Indirect : reg.Indirect;
  88       }
  89
  90       int getIndex(int dim) const
  91       {
  92          return (dim && fsr) ? fsr->Dimension.Index : reg.Index;
  93       }
  94
  95       int getSwizzle(int chan) const
  96       {
  97          return tgsi_util_get_src_register_swizzle(&reg, chan);
  98       }
  99
 100       nv50_ir::Modifier getMod(int chan) const;
 101
 102       SrcRegister getIndirect(int dim) const
 103       {
 104          assert(fsr && isIndirect(dim));
 105          if (dim)
 106             return SrcRegister(fsr->DimIndirect);
 107          return SrcRegister(fsr->Indirect);
 108       }
 109
 110       uint32_t getValueU32(int c, const struct nv50_ir_prog_info *info) const
 111       {
 112          assert(reg.File == TGSI_FILE_IMMEDIATE);
 113          assert(!reg.Absolute);
 114          assert(!reg.Negate);
 115          return info->immd.data[reg.Index * 4 + getSwizzle(c)];
 116       }
 117
 118    private:
 119       const struct tgsi_src_register reg;
 120       const struct tgsi_full_src_register *fsr;
 121    };
 122
 123    class DstRegister
 124    {
 125    public:
 126       DstRegister(const struct tgsi_full_dst_register *dst)
 127          : reg(dst->Register),
 128            fdr(dst)
 129       { }
 130
 131       DstRegister(const struct tgsi_dst_register& dst) : reg(dst), fdr(NULL) { }
 132
 133       uint getFile() const { return reg.File; }
 134
 135       bool is2D() const { return reg.Dimension; }
 136
 137       bool isIndirect(int dim) const
 138       {
 139          return (dim && fdr) ? fdr->Dimension.Indirect : reg.Indirect;
 140       }
 141
 142       int getIndex(int dim) const
 143       {
 144          return (dim && fdr) ? fdr->Dimension.Dimension : reg.Index;
 145       }
 146
 147       unsigned int getMask() const { return reg.WriteMask; }
 148
 149       bool isMasked(int chan) const { return !(getMask() & (1 << chan)); }
 150
 151       SrcRegister getIndirect(int dim) const
 152       {
 153          assert(fdr && isIndirect(dim));
 154          if (dim)
 155             return SrcRegister(fdr->DimIndirect);
 156          return SrcRegister(fdr->Indirect);
 157       }
 158
 159    private:
 160       const struct tgsi_dst_register reg;
 161       const struct tgsi_full_dst_register *fdr;
 162    };
 163
 164    inline uint getOpcode() const { return insn->Instruction.Opcode; }
 165
 166    unsigned int srcCount() const { return insn->Instruction.NumSrcRegs; }
 167    unsigned int dstCount() const { return insn->Instruction.NumDstRegs; }
 168
 169    // mask of used components of source s
 170    unsigned int srcMask(unsigned int s) const;
 171
 172    SrcRegister getSrc(unsigned int s) const
 173    {
 174       assert(s < srcCount());
 175       return SrcRegister(&insn->Src[s]);
 176    }
 177
 178    DstRegister getDst(unsigned int d) const
 179    {
 180       assert(d < dstCount());
 181       return DstRegister(&insn->Dst[d]);
 182    }
 183
 184    SrcRegister getTexOffset(unsigned int i) const
 185    {
 186       assert(i < TGSI_FULL_MAX_TEX_OFFSETS);
 187       return SrcRegister(insn->TexOffsets[i]);
 188    }
 189
 190    unsigned int getNumTexOffsets() const { return insn->Texture.NumOffsets; }
 191
 192    bool checkDstSrcAliasing() const;
 193
 194    inline nv50_ir::operation getOP() const {
 195       return translateOpcode(getOpcode()); }
 196
 197    nv50_ir::DataType inferSrcType() const;
 198    nv50_ir::DataType inferDstType() const;
 199
 200    nv50_ir::CondCode getSetCond() const;
 201
 202    nv50_ir::TexInstruction::Target getTexture(const Source *, int s) const;
 203
 204    inline uint getLabel() { return insn->Label.Label; }
 205
 206    unsigned getSaturate() const { return insn->Instruction.Saturate; }
 207
 208    void print() const
 209    {
 210       tgsi_dump_instruction(insn, 1);
 211    }
 212
 213 private:
 214    const struct tgsi_full_instruction *insn;
 215 };
 216
 217 unsigned int Instruction::srcMask(unsigned int s) const
 218 {
 219    unsigned int mask = insn->Dst[0].Register.WriteMask;
 220
 221    switch (insn->Instruction.Opcode) {
 222    case TGSI_OPCODE_COS:
 223    case TGSI_OPCODE_SIN:
 224       return (mask & 0x8) | ((mask & 0x7) ? 0x1 : 0x0);
 225    case TGSI_OPCODE_DP2:
 226       return 0x3;
 227    case TGSI_OPCODE_DP3:
 228       return 0x7;
 229    case TGSI_OPCODE_DP4:
 230    case TGSI_OPCODE_DPH:
 231    case TGSI_OPCODE_KILL_IF: /* WriteMask ignored */
 232       return 0xf;
 233    case TGSI_OPCODE_DST:
 234       return mask & (s ? 0xa : 0x6);
 235    case TGSI_OPCODE_EX2:
 236    case TGSI_OPCODE_EXP:
 237    case TGSI_OPCODE_LG2:
 238    case TGSI_OPCODE_LOG:
 239    case TGSI_OPCODE_POW:
 240    case TGSI_OPCODE_RCP:
 241    case TGSI_OPCODE_RSQ:
 242    case TGSI_OPCODE_SCS:
 243       return 0x1;
 244    case TGSI_OPCODE_IF:
 245    case TGSI_OPCODE_UIF:
 246       return 0x1;
 247    case TGSI_OPCODE_LIT:
 248       return 0xb;
 249    case TGSI_OPCODE_TEX2:
 250    case TGSI_OPCODE_TXB2:
 251    case TGSI_OPCODE_TXL2:
 252       return (s == 0) ? 0xf : 0x3;
 253    case TGSI_OPCODE_TEX:
 254    case TGSI_OPCODE_TXB:
 255    case TGSI_OPCODE_TXD:
 256    case TGSI_OPCODE_TXL:
 257    case TGSI_OPCODE_TXP:
 258    {
 259       const struct tgsi_instruction_texture *tex = &insn->Texture;
 260
 261       assert(insn->Instruction.Texture);
 262
 263       mask = 0x7;
 264       if (insn->Instruction.Opcode != TGSI_OPCODE_TEX &&
 265           insn->Instruction.Opcode != TGSI_OPCODE_TXD)
 266          mask |= 0x8; /* bias, lod or proj */
 267
 268       switch (tex->Texture) {
 269       case TGSI_TEXTURE_1D:
 270          mask &= 0x9;
 271          break;
 272       case TGSI_TEXTURE_SHADOW1D:
 273          mask &= 0xd;
 274          break;
 275       case TGSI_TEXTURE_1D_ARRAY:
 276       case TGSI_TEXTURE_2D:
 277       case TGSI_TEXTURE_RECT:
 278          mask &= 0xb;
 279          break;
 280       case TGSI_TEXTURE_CUBE_ARRAY:
 281       case TGSI_TEXTURE_SHADOW2D_ARRAY:
 282       case TGSI_TEXTURE_SHADOWCUBE:
 283       case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
 284          mask |= 0x8;
 285          break;
 286       default:
 287          break;
 288       }
 289    }
 290       return mask;
 291    case TGSI_OPCODE_XPD:
 292    {
 293       unsigned int x = 0;
 294       if (mask & 1) x |= 0x6;
 295       if (mask & 2) x |= 0x5;
 296       if (mask & 4) x |= 0x3;
 297       return x;
 298    }
 299    default:
 300       break;
 301    }
 302
 303    return mask;
 304 }
 305
 306 nv50_ir::Modifier Instruction::SrcRegister::getMod(int chan) const
 307 {
 308    nv50_ir::Modifier m(0);
 309
 310    if (reg.Absolute)
 311       m = m | nv50_ir::Modifier(NV50_IR_MOD_ABS);
 312    if (reg.Negate)
 313       m = m | nv50_ir::Modifier(NV50_IR_MOD_NEG);
 314    return m;
 315 }
 316
 317 static nv50_ir::DataFile translateFile(uint file)
 318 {
 319    switch (file) {
 320    case TGSI_FILE_CONSTANT:        return nv50_ir::FILE_MEMORY_CONST;
 321    case TGSI_FILE_INPUT:           return nv50_ir::FILE_SHADER_INPUT;
 322    case TGSI_FILE_OUTPUT:          return nv50_ir::FILE_SHADER_OUTPUT;
 323    case TGSI_FILE_TEMPORARY:       return nv50_ir::FILE_GPR;
 324    case TGSI_FILE_ADDRESS:         return nv50_ir::FILE_ADDRESS;
 325    case TGSI_FILE_PREDICATE:       return nv50_ir::FILE_PREDICATE;
 326    case TGSI_FILE_IMMEDIATE:       return nv50_ir::FILE_IMMEDIATE;
 327    case TGSI_FILE_SYSTEM_VALUE:    return nv50_ir::FILE_SYSTEM_VALUE;
 328    case TGSI_FILE_RESOURCE:        return nv50_ir::FILE_MEMORY_GLOBAL;
 329    case TGSI_FILE_SAMPLER:
 330    case TGSI_FILE_NULL:
 331    default:
 332       return nv50_ir::FILE_NULL;
 333    }
 334 }
 335
 336 static nv50_ir::SVSemantic translateSysVal(uint sysval)
 337 {
 338    switch (sysval) {
 339    case TGSI_SEMANTIC_FACE:       return nv50_ir::SV_FACE;
 340    case TGSI_SEMANTIC_PSIZE:      return nv50_ir::SV_POINT_SIZE;
 341    case TGSI_SEMANTIC_PRIMID:     return nv50_ir::SV_PRIMITIVE_ID;
 342    case TGSI_SEMANTIC_INSTANCEID: return nv50_ir::SV_INSTANCE_ID;
 343    case TGSI_SEMANTIC_VERTEXID:   return nv50_ir::SV_VERTEX_ID;
 344    case TGSI_SEMANTIC_GRID_SIZE:  return nv50_ir::SV_NCTAID;
 345    case TGSI_SEMANTIC_BLOCK_ID:   return nv50_ir::SV_CTAID;
 346    case TGSI_SEMANTIC_BLOCK_SIZE: return nv50_ir::SV_NTID;
 347    case TGSI_SEMANTIC_THREAD_ID:  return nv50_ir::SV_TID;
 348    default:
 349       assert(0);
 350       return nv50_ir::SV_CLOCK;
 351    }
 352 }
 353
 354 #define NV50_IR_TEX_TARG_CASE(a, b) \
 355    case TGSI_TEXTURE_##a: return nv50_ir::TEX_TARGET_##b;
 356
 357 static nv50_ir::TexTarget translateTexture(uint tex)
 358 {
 359    switch (tex) {
 360    NV50_IR_TEX_TARG_CASE(1D, 1D);
 361    NV50_IR_TEX_TARG_CASE(2D, 2D);
 362    NV50_IR_TEX_TARG_CASE(2D_MSAA, 2D_MS);
 363    NV50_IR_TEX_TARG_CASE(3D, 3D);
 364    NV50_IR_TEX_TARG_CASE(CUBE, CUBE);
 365    NV50_IR_TEX_TARG_CASE(RECT, RECT);
 366    NV50_IR_TEX_TARG_CASE(1D_ARRAY, 1D_ARRAY);
 367    NV50_IR_TEX_TARG_CASE(2D_ARRAY, 2D_ARRAY);
 368    NV50_IR_TEX_TARG_CASE(2D_ARRAY_MSAA, 2D_MS_ARRAY);
 369    NV50_IR_TEX_TARG_CASE(CUBE_ARRAY, CUBE_ARRAY);
 370    NV50_IR_TEX_TARG_CASE(SHADOW1D, 1D_SHADOW);
 371    NV50_IR_TEX_TARG_CASE(SHADOW2D, 2D_SHADOW);
 372    NV50_IR_TEX_TARG_CASE(SHADOWCUBE, CUBE_SHADOW);
 373    NV50_IR_TEX_TARG_CASE(SHADOWRECT, RECT_SHADOW);
 374    NV50_IR_TEX_TARG_CASE(SHADOW1D_ARRAY, 1D_ARRAY_SHADOW);
 375    NV50_IR_TEX_TARG_CASE(SHADOW2D_ARRAY, 2D_ARRAY_SHADOW);
 376    NV50_IR_TEX_TARG_CASE(SHADOWCUBE_ARRAY, CUBE_ARRAY_SHADOW);
 377    NV50_IR_TEX_TARG_CASE(BUFFER, BUFFER);
 378
 379    case TGSI_TEXTURE_UNKNOWN:
 380    default:
 381       assert(!"invalid texture target");
 382       return nv50_ir::TEX_TARGET_2D;
 383    }
 384 }
 385
 386 nv50_ir::DataType Instruction::inferSrcType() const
 387 {
 388    switch (getOpcode()) {
 389    case TGSI_OPCODE_UIF:
 390    case TGSI_OPCODE_AND:
 391    case TGSI_OPCODE_OR:
 392    case TGSI_OPCODE_XOR:
 393    case TGSI_OPCODE_NOT:
 394    case TGSI_OPCODE_U2F:
 395    case TGSI_OPCODE_UADD:
 396    case TGSI_OPCODE_UDIV:
 397    case TGSI_OPCODE_UMOD:
 398    case TGSI_OPCODE_UMAD:
 399    case TGSI_OPCODE_UMUL:
 400    case TGSI_OPCODE_UMAX:
 401    case TGSI_OPCODE_UMIN:
 402    case TGSI_OPCODE_USEQ:
 403    case TGSI_OPCODE_USGE:
 404    case TGSI_OPCODE_USLT:
 405    case TGSI_OPCODE_USNE:
 406    case TGSI_OPCODE_USHR:
 407    case TGSI_OPCODE_UCMP:
 408    case TGSI_OPCODE_ATOMUADD:
 409    case TGSI_OPCODE_ATOMXCHG:
 410    case TGSI_OPCODE_ATOMCAS:
 411    case TGSI_OPCODE_ATOMAND:
 412    case TGSI_OPCODE_ATOMOR:
 413    case TGSI_OPCODE_ATOMXOR:
 414    case TGSI_OPCODE_ATOMUMIN:
 415    case TGSI_OPCODE_ATOMUMAX:
 416       return nv50_ir::TYPE_U32;
 417    case TGSI_OPCODE_I2F:
 418    case TGSI_OPCODE_IDIV:
 419    case TGSI_OPCODE_IMAX:
 420    case TGSI_OPCODE_IMIN:
 421    case TGSI_OPCODE_IABS:
 422    case TGSI_OPCODE_INEG:
 423    case TGSI_OPCODE_ISGE:
 424    case TGSI_OPCODE_ISHR:
 425    case TGSI_OPCODE_ISLT:
 426    case TGSI_OPCODE_ISSG:
 427    case TGSI_OPCODE_SAD: // not sure about SAD, but no one has a float version
 428    case TGSI_OPCODE_MOD:
 429    case TGSI_OPCODE_UARL:
 430    case TGSI_OPCODE_ATOMIMIN:
 431    case TGSI_OPCODE_ATOMIMAX:
 432       return nv50_ir::TYPE_S32;
 433    default:
 434       return nv50_ir::TYPE_F32;
 435    }
 436 }
 437
 438 nv50_ir::DataType Instruction::inferDstType() const
 439 {
 440    switch (getOpcode()) {
 441    case TGSI_OPCODE_F2U: return nv50_ir::TYPE_U32;
 442    case TGSI_OPCODE_F2I: return nv50_ir::TYPE_S32;
 443    case TGSI_OPCODE_FSEQ:
 444    case TGSI_OPCODE_FSGE:
 445    case TGSI_OPCODE_FSLT:
 446    case TGSI_OPCODE_FSNE:
 447       return nv50_ir::TYPE_U32;
 448    case TGSI_OPCODE_I2F:
 449    case TGSI_OPCODE_U2F:
 450       return nv50_ir::TYPE_F32;
 451    default:
 452       return inferSrcType();
 453    }
 454 }
 455
 456 nv50_ir::CondCode Instruction::getSetCond() const
 457 {
 458    using namespace nv50_ir;
 459
 460    switch (getOpcode()) {
 461    case TGSI_OPCODE_SLT:
 462    case TGSI_OPCODE_ISLT:
 463    case TGSI_OPCODE_USLT:
 464    case TGSI_OPCODE_FSLT:
 465       return CC_LT;
 466    case TGSI_OPCODE_SLE:
 467       return CC_LE;
 468    case TGSI_OPCODE_SGE:
 469    case TGSI_OPCODE_ISGE:
 470    case TGSI_OPCODE_USGE:
 471    case TGSI_OPCODE_FSGE:
 472       return CC_GE;
 473    case TGSI_OPCODE_SGT:
 474       return CC_GT;
 475    case TGSI_OPCODE_SEQ:
 476    case TGSI_OPCODE_USEQ:
 477    case TGSI_OPCODE_FSEQ:
 478       return CC_EQ;
 479    case TGSI_OPCODE_SNE:
 480    case TGSI_OPCODE_FSNE:
 481       return CC_NEU;
 482    case TGSI_OPCODE_USNE:
 483       return CC_NE;
 484    case TGSI_OPCODE_SFL:
 485       return CC_NEVER;
 486    case TGSI_OPCODE_STR:
 487    default:
 488       return CC_ALWAYS;
 489    }
 490 }
 491
 492 #define NV50_IR_OPCODE_CASE(a, b) case TGSI_OPCODE_##a: return nv50_ir::OP_##b
 493
 494 static nv50_ir::operation translateOpcode(uint opcode)
 495 {
 496    switch (opcode) {
 497    NV50_IR_OPCODE_CASE(ARL, SHL);
 498    NV50_IR_OPCODE_CASE(MOV, MOV);
 499
 500    NV50_IR_OPCODE_CASE(RCP, RCP);
 501    NV50_IR_OPCODE_CASE(RSQ, RSQ);
 502
 503    NV50_IR_OPCODE_CASE(MUL, MUL);
 504    NV50_IR_OPCODE_CASE(ADD, ADD);
 505
 506    NV50_IR_OPCODE_CASE(MIN, MIN);
 507    NV50_IR_OPCODE_CASE(MAX, MAX);
 508    NV50_IR_OPCODE_CASE(SLT, SET);
 509    NV50_IR_OPCODE_CASE(SGE, SET);
 510    NV50_IR_OPCODE_CASE(MAD, MAD);
 511    NV50_IR_OPCODE_CASE(SUB, SUB);
 512
 513    NV50_IR_OPCODE_CASE(FLR, FLOOR);
 514    NV50_IR_OPCODE_CASE(ROUND, CVT);
 515    NV50_IR_OPCODE_CASE(EX2, EX2);
 516    NV50_IR_OPCODE_CASE(LG2, LG2);
 517    NV50_IR_OPCODE_CASE(POW, POW);
 518
 519    NV50_IR_OPCODE_CASE(ABS, ABS);
 520
 521    NV50_IR_OPCODE_CASE(COS, COS);
 522    NV50_IR_OPCODE_CASE(DDX, DFDX);
 523    NV50_IR_OPCODE_CASE(DDY, DFDY);
 524    NV50_IR_OPCODE_CASE(KILL, DISCARD);
 525
 526    NV50_IR_OPCODE_CASE(SEQ, SET);
 527    NV50_IR_OPCODE_CASE(SFL, SET);
 528    NV50_IR_OPCODE_CASE(SGT, SET);
 529    NV50_IR_OPCODE_CASE(SIN, SIN);
 530    NV50_IR_OPCODE_CASE(SLE, SET);
 531    NV50_IR_OPCODE_CASE(SNE, SET);
 532    NV50_IR_OPCODE_CASE(STR, SET);
 533    NV50_IR_OPCODE_CASE(TEX, TEX);
 534    NV50_IR_OPCODE_CASE(TXD, TXD);
 535    NV50_IR_OPCODE_CASE(TXP, TEX);
 536
 537    NV50_IR_OPCODE_CASE(BRA, BRA);
 538    NV50_IR_OPCODE_CASE(CAL, CALL);
 539    NV50_IR_OPCODE_CASE(RET, RET);
 540    NV50_IR_OPCODE_CASE(CMP, SLCT);
 541
 542    NV50_IR_OPCODE_CASE(TXB, TXB);
 543
 544    NV50_IR_OPCODE_CASE(DIV, DIV);
 545
 546    NV50_IR_OPCODE_CASE(TXL, TXL);
 547
 548    NV50_IR_OPCODE_CASE(CEIL, CEIL);
 549    NV50_IR_OPCODE_CASE(I2F, CVT);
 550    NV50_IR_OPCODE_CASE(NOT, NOT);
 551    NV50_IR_OPCODE_CASE(TRUNC, TRUNC);
 552    NV50_IR_OPCODE_CASE(SHL, SHL);
 553
 554    NV50_IR_OPCODE_CASE(AND, AND);
 555    NV50_IR_OPCODE_CASE(OR, OR);
 556    NV50_IR_OPCODE_CASE(MOD, MOD);
 557    NV50_IR_OPCODE_CASE(XOR, XOR);
 558    NV50_IR_OPCODE_CASE(SAD, SAD);
 559    NV50_IR_OPCODE_CASE(TXF, TXF);
 560    NV50_IR_OPCODE_CASE(TXQ, TXQ);
 561
 562    NV50_IR_OPCODE_CASE(EMIT, EMIT);
 563    NV50_IR_OPCODE_CASE(ENDPRIM, RESTART);
 564
 565    NV50_IR_OPCODE_CASE(KILL_IF, DISCARD);
 566
 567    NV50_IR_OPCODE_CASE(F2I, CVT);
 568    NV50_IR_OPCODE_CASE(FSEQ, SET);
 569    NV50_IR_OPCODE_CASE(FSGE, SET);
 570    NV50_IR_OPCODE_CASE(FSLT, SET);
 571    NV50_IR_OPCODE_CASE(FSNE, SET);
 572    NV50_IR_OPCODE_CASE(IDIV, DIV);
 573    NV50_IR_OPCODE_CASE(IMAX, MAX);
 574    NV50_IR_OPCODE_CASE(IMIN, MIN);
 575    NV50_IR_OPCODE_CASE(IABS, ABS);
 576    NV50_IR_OPCODE_CASE(INEG, NEG);
 577    NV50_IR_OPCODE_CASE(ISGE, SET);
 578    NV50_IR_OPCODE_CASE(ISHR, SHR);
 579    NV50_IR_OPCODE_CASE(ISLT, SET);
 580    NV50_IR_OPCODE_CASE(F2U, CVT);
 581    NV50_IR_OPCODE_CASE(U2F, CVT);
 582    NV50_IR_OPCODE_CASE(UADD, ADD);
 583    NV50_IR_OPCODE_CASE(UDIV, DIV);
 584    NV50_IR_OPCODE_CASE(UMAD, MAD);
 585    NV50_IR_OPCODE_CASE(UMAX, MAX);
 586    NV50_IR_OPCODE_CASE(UMIN, MIN);
 587    NV50_IR_OPCODE_CASE(UMOD, MOD);
 588    NV50_IR_OPCODE_CASE(UMUL, MUL);
 589    NV50_IR_OPCODE_CASE(USEQ, SET);
 590    NV50_IR_OPCODE_CASE(USGE, SET);
 591    NV50_IR_OPCODE_CASE(USHR, SHR);
 592    NV50_IR_OPCODE_CASE(USLT, SET);
 593    NV50_IR_OPCODE_CASE(USNE, SET);
 594
 595    NV50_IR_OPCODE_CASE(SAMPLE, TEX);
 596    NV50_IR_OPCODE_CASE(SAMPLE_B, TXB);
 597    NV50_IR_OPCODE_CASE(SAMPLE_C, TEX);
 598    NV50_IR_OPCODE_CASE(SAMPLE_C_LZ, TEX);
 599    NV50_IR_OPCODE_CASE(SAMPLE_D, TXD);
 600    NV50_IR_OPCODE_CASE(SAMPLE_L, TXL);
 601    NV50_IR_OPCODE_CASE(SAMPLE_I, TXF);
 602    NV50_IR_OPCODE_CASE(SAMPLE_I_MS, TXF);
 603    NV50_IR_OPCODE_CASE(GATHER4, TXG);
 604    NV50_IR_OPCODE_CASE(SVIEWINFO, TXQ);
 605
 606    NV50_IR_OPCODE_CASE(ATOMUADD, ATOM);
 607    NV50_IR_OPCODE_CASE(ATOMXCHG, ATOM);
 608    NV50_IR_OPCODE_CASE(ATOMCAS, ATOM);
 609    NV50_IR_OPCODE_CASE(ATOMAND, ATOM);
 610    NV50_IR_OPCODE_CASE(ATOMOR, ATOM);
 611    NV50_IR_OPCODE_CASE(ATOMXOR, ATOM);
 612    NV50_IR_OPCODE_CASE(ATOMUMIN, ATOM);
 613    NV50_IR_OPCODE_CASE(ATOMUMAX, ATOM);
 614    NV50_IR_OPCODE_CASE(ATOMIMIN, ATOM);
 615    NV50_IR_OPCODE_CASE(ATOMIMAX, ATOM);
 616
 617    NV50_IR_OPCODE_CASE(TEX2, TEX);
 618    NV50_IR_OPCODE_CASE(TXB2, TXB);
 619    NV50_IR_OPCODE_CASE(TXL2, TXL);
 620
 621    NV50_IR_OPCODE_CASE(END, EXIT);
 622
 623    default:
 624       return nv50_ir::OP_NOP;
 625    }
 626 }
 627
 628 static uint16_t opcodeToSubOp(uint opcode)
 629 {
 630    switch (opcode) {
 631    case TGSI_OPCODE_LFENCE:   return NV50_IR_SUBOP_MEMBAR(L, GL);
 632    case TGSI_OPCODE_SFENCE:   return NV50_IR_SUBOP_MEMBAR(S, GL);
 633    case TGSI_OPCODE_MFENCE:   return NV50_IR_SUBOP_MEMBAR(M, GL);
 634    case TGSI_OPCODE_ATOMUADD: return NV50_IR_SUBOP_ATOM_ADD;
 635    case TGSI_OPCODE_ATOMXCHG: return NV50_IR_SUBOP_ATOM_EXCH;
 636    case TGSI_OPCODE_ATOMCAS:  return NV50_IR_SUBOP_ATOM_CAS;
 637    case TGSI_OPCODE_ATOMAND:  return NV50_IR_SUBOP_ATOM_AND;
 638    case TGSI_OPCODE_ATOMOR:   return NV50_IR_SUBOP_ATOM_OR;
 639    case TGSI_OPCODE_ATOMXOR:  return NV50_IR_SUBOP_ATOM_XOR;
 640    case TGSI_OPCODE_ATOMUMIN: return NV50_IR_SUBOP_ATOM_MIN;
 641    case TGSI_OPCODE_ATOMIMIN: return NV50_IR_SUBOP_ATOM_MIN;
 642    case TGSI_OPCODE_ATOMUMAX: return NV50_IR_SUBOP_ATOM_MAX;
 643    case TGSI_OPCODE_ATOMIMAX: return NV50_IR_SUBOP_ATOM_MAX;
 644    default:
 645       return 0;
 646    }
 647 }
 648
 649 bool Instruction::checkDstSrcAliasing() const
 650 {
 651    if (insn->Dst[0].Register.Indirect) // no danger if indirect, using memory
 652       return false;
 653
 654    for (int s = 0; s < TGSI_FULL_MAX_SRC_REGISTERS; ++s) {
 655       if (insn->Src[s].Register.File == TGSI_FILE_NULL)
 656          break;
 657       if (insn->Src[s].Register.File == insn->Dst[0].Register.File &&
 658           insn->Src[s].Register.Index == insn->Dst[0].Register.Index)
 659          return true;
 660    }
 661    return false;
 662 }
 663
 664 class Source
 665 {
 666 public:
 667    Source(struct nv50_ir_prog_info *);
 668    ~Source();
 669
 670 public:
 671    bool scanSource();
 672    unsigned fileSize(unsigned file) const { return scan.file_max[file] + 1; }
 673
 674 public:
 675    struct tgsi_shader_info scan;
 676    struct tgsi_full_instruction *insns;
 677    const struct tgsi_token *tokens;
 678    struct nv50_ir_prog_info *info;
 679
 680    nv50_ir::DynArray tempArrays;
 681    nv50_ir::DynArray immdArrays;
 682
 683    typedef nv50_ir::BuildUtil::Location Location;
 684    // these registers are per-subroutine, cannot be used for parameter passing
 685    std::set<Location> locals;
 686
 687    bool mainTempsInLMem;
 688
 689    int clipVertexOutput;
 690
 691    struct TextureView {
 692       uint8_t target; // TGSI_TEXTURE_*
 693    };
 694    std::vector<TextureView> textureViews;
 695
 696    struct Resource {
 697       uint8_t target; // TGSI_TEXTURE_*
 698       bool raw;
 699       uint8_t slot; // $surface index
 700    };
 701    std::vector<Resource> resources;
 702
 703 private:
 704    int inferSysValDirection(unsigned sn) const;
 705    bool scanDeclaration(const struct tgsi_full_declaration *);
 706    bool scanInstruction(const struct tgsi_full_instruction *);
 707    void scanProperty(const struct tgsi_full_property *);
 708    void scanImmediate(const struct tgsi_full_immediate *);
 709
 710    inline bool isEdgeFlagPassthrough(const Instruction&) const;
 711 };
 712
 713 Source::Source(struct nv50_ir_prog_info *prog) : info(prog)
 714 {
 715    tokens = (const struct tgsi_token *)info->bin.source;
 716
 717    if (prog->dbgFlags & NV50_IR_DEBUG_BASIC)
 718       tgsi_dump(tokens, 0);
 719
 720    mainTempsInLMem = FALSE;
 721 }
 722
 723 Source::~Source()
 724 {
 725    if (insns)
 726       FREE(insns);
 727
 728    if (info->immd.data)
 729       FREE(info->immd.data);
 730    if (info->immd.type)
 731       FREE(info->immd.type);
 732 }
 733
 734 bool Source::scanSource()
 735 {
 736    unsigned insnCount = 0;
 737    struct tgsi_parse_context parse;
 738
 739    tgsi_scan_shader(tokens, &scan);
 740
 741    insns = (struct tgsi_full_instruction *)MALLOC(scan.num_instructions *
 742                                                   sizeof(insns[0]));
 743    if (!insns)
 744       return false;
 745
 746    clipVertexOutput = -1;
 747
 748    textureViews.resize(scan.file_max[TGSI_FILE_SAMPLER_VIEW] + 1);
 749    resources.resize(scan.file_max[TGSI_FILE_RESOURCE] + 1);
 750
 751    info->immd.bufSize = 0;
 752
 753    info->numInputs = scan.file_max[TGSI_FILE_INPUT] + 1;
 754    info->numOutputs = scan.file_max[TGSI_FILE_OUTPUT] + 1;
 755    info->numSysVals = scan.file_max[TGSI_FILE_SYSTEM_VALUE] + 1;
 756
 757    if (info->type == PIPE_SHADER_FRAGMENT) {
 758       info->prop.fp.writesDepth = scan.writes_z;
 759       info->prop.fp.usesDiscard = scan.uses_kill;
 760    } else
 761    if (info->type == PIPE_SHADER_GEOMETRY) {
 762       info->prop.gp.instanceCount = 1; // default value
 763    }
 764
 765    info->immd.data = (uint32_t *)MALLOC(scan.immediate_count * 16);
 766    info->immd.type = (ubyte *)MALLOC(scan.immediate_count * sizeof(ubyte));
 767
 768    tgsi_parse_init(&parse, tokens);
 769    while (!tgsi_parse_end_of_tokens(&parse)) {
 770       tgsi_parse_token(&parse);
 771
 772       switch (parse.FullToken.Token.Type) {
 773       case TGSI_TOKEN_TYPE_IMMEDIATE:
 774          scanImmediate(&parse.FullToken.FullImmediate);
 775          break;
 776       case TGSI_TOKEN_TYPE_DECLARATION:
 777          scanDeclaration(&parse.FullToken.FullDeclaration);
 778          break;
 779       case TGSI_TOKEN_TYPE_INSTRUCTION:
 780          insns[insnCount++] = parse.FullToken.FullInstruction;
 781          scanInstruction(&parse.FullToken.FullInstruction);
 782          break;
 783       case TGSI_TOKEN_TYPE_PROPERTY:
 784          scanProperty(&parse.FullToken.FullProperty);
 785          break;
 786       default:
 787          INFO("unknown TGSI token type: %d\n", parse.FullToken.Token.Type);
 788          break;
 789       }
 790    }
 791    tgsi_parse_free(&parse);
 792
 793    if (mainTempsInLMem)
 794       info->bin.tlsSpace += (scan.file_max[TGSI_FILE_TEMPORARY] + 1) * 16;
 795
 796    if (info->io.genUserClip > 0) {
 797       info->io.clipDistanceMask = (1 << info->io.genUserClip) - 1;
 798
 799       const unsigned int nOut = (info->io.genUserClip + 3) / 4;
 800
 801       for (unsigned int n = 0; n < nOut; ++n) {
 802          unsigned int i = info->numOutputs++;
 803          info->out[i].id = i;
 804          info->out[i].sn = TGSI_SEMANTIC_CLIPDIST;
 805          info->out[i].si = n;
 806          info->out[i].mask = info->io.clipDistanceMask >> (n * 4);
 807       }
 808    }
 809
 810    return info->assignSlots(info) == 0;
 811 }
 812
 813 void Source::scanProperty(const struct tgsi_full_property *prop)
 814 {
 815    switch (prop->Property.PropertyName) {
 816    case TGSI_PROPERTY_GS_OUTPUT_PRIM:
 817       info->prop.gp.outputPrim = prop->u[0].Data;
 818       break;
 819    case TGSI_PROPERTY_GS_INPUT_PRIM:
 820       info->prop.gp.inputPrim = prop->u[0].Data;
 821       break;
 822    case TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES:
 823       info->prop.gp.maxVertices = prop->u[0].Data;
 824       break;
 825 #if 0
 826    case TGSI_PROPERTY_GS_INSTANCE_COUNT:
 827       info->prop.gp.instanceCount = prop->u[0].Data;
 828       break;
 829 #endif
 830    case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
 831       info->prop.fp.separateFragData = TRUE;
 832       break;
 833    case TGSI_PROPERTY_FS_COORD_ORIGIN:
 834    case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
 835       // we don't care
 836       break;
 837    case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
 838       info->io.genUserClip = -1;
 839       break;
 840    default:
 841       INFO("unhandled TGSI property %d\n", prop->Property.PropertyName);
 842       break;
 843    }
 844 }
 845
 846 void Source::scanImmediate(const struct tgsi_full_immediate *imm)
 847 {
 848    const unsigned n = info->immd.count++;
 849
 850    assert(n < scan.immediate_count);
 851
 852    for (int c = 0; c < 4; ++c)
 853       info->immd.data[n * 4 + c] = imm->u[c].Uint;
 854
 855    info->immd.type[n] = imm->Immediate.DataType;
 856 }
 857
 858 int Source::inferSysValDirection(unsigned sn) const
 859 {
 860    switch (sn) {
 861    case TGSI_SEMANTIC_INSTANCEID:
 862    case TGSI_SEMANTIC_VERTEXID:
 863       return 1;
 864    case TGSI_SEMANTIC_LAYER:
 865 #if 0
 866    case TGSI_SEMANTIC_VIEWPORTINDEX:
 867       return 0;
 868 #endif
 869    case TGSI_SEMANTIC_PRIMID:
 870       return (info->type == PIPE_SHADER_FRAGMENT) ? 1 : 0;
 871    default:
 872       return 0;
 873    }
 874 }
 875
 876 bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
 877 {
 878    unsigned i, c;
 879    unsigned sn = TGSI_SEMANTIC_GENERIC;
 880    unsigned si = 0;
 881    const unsigned first = decl->Range.First, last = decl->Range.Last;
 882
 883    if (decl->Declaration.Semantic) {
 884       sn = decl->Semantic.Name;
 885       si = decl->Semantic.Index;
 886    }
 887
 888    if (decl->Declaration.Local) {
 889       for (i = first; i <= last; ++i) {
 890          for (c = 0; c < 4; ++c) {
 891             locals.insert(
 892                Location(decl->Declaration.File, decl->Dim.Index2D, i, c));
 893          }
 894       }
 895    }
 896
 897    switch (decl->Declaration.File) {
 898    case TGSI_FILE_INPUT:
 899       if (info->type == PIPE_SHADER_VERTEX) {
 900          // all vertex attributes are equal
 901          for (i = first; i <= last; ++i) {
 902             info->in[i].sn = TGSI_SEMANTIC_GENERIC;
 903             info->in[i].si = i;
 904          }
 905       } else {
 906          for (i = first; i <= last; ++i, ++si) {
 907             info->in[i].id = i;
 908             info->in[i].sn = sn;
 909             info->in[i].si = si;
 910             if (info->type == PIPE_SHADER_FRAGMENT) {
 911                // translate interpolation mode
 912                switch (decl->Interp.Interpolate) {
 913                case TGSI_INTERPOLATE_CONSTANT:
 914                   info->in[i].flat = 1;
 915                   break;
 916                case TGSI_INTERPOLATE_COLOR:
 917                   info->in[i].sc = 1;
 918                   break;
 919                case TGSI_INTERPOLATE_LINEAR:
 920                   info->in[i].linear = 1;
 921                   break;
 922                default:
 923                   break;
 924                }
 925                if (decl->Interp.Centroid)
 926                   info->in[i].centroid = 1;
 927             }
 928          }
 929       }
 930       break;
 931    case TGSI_FILE_OUTPUT:
 932       for (i = first; i <= last; ++i, ++si) {
 933          switch (sn) {
 934          case TGSI_SEMANTIC_POSITION:
 935             if (info->type == PIPE_SHADER_FRAGMENT)
 936                info->io.fragDepth = i;
 937             else
 938             if (clipVertexOutput < 0)
 939                clipVertexOutput = i;
 940             break;
 941          case TGSI_SEMANTIC_COLOR:
 942             if (info->type == PIPE_SHADER_FRAGMENT)
 943                info->prop.fp.numColourResults++;
 944             break;
 945          case TGSI_SEMANTIC_EDGEFLAG:
 946             info->io.edgeFlagOut = i;
 947             break;
 948          case TGSI_SEMANTIC_CLIPVERTEX:
 949             clipVertexOutput = i;
 950             break;
 951          case TGSI_SEMANTIC_CLIPDIST:
 952             info->io.clipDistanceMask |=
 953                decl->Declaration.UsageMask << (si * 4);
 954             info->io.genUserClip = -1;
 955             break;
 956          default:
 957             break;
 958          }
 959          info->out[i].id = i;
 960          info->out[i].sn = sn;
 961          info->out[i].si = si;
 962       }
 963       break;
 964    case TGSI_FILE_SYSTEM_VALUE:
 965       switch (sn) {
 966       case TGSI_SEMANTIC_INSTANCEID:
 967          info->io.instanceId = first;
 968          break;
 969       case TGSI_SEMANTIC_VERTEXID:
 970          info->io.vertexId = first;
 971          break;
 972       default:
 973          break;
 974       }
 975       for (i = first; i <= last; ++i, ++si) {
 976          info->sv[i].sn = sn;
 977          info->sv[i].si = si;
 978          info->sv[i].input = inferSysValDirection(sn);
 979       }
 980       break;
 981    case TGSI_FILE_RESOURCE:
 982       for (i = first; i <= last; ++i) {
 983          resources[i].target = decl->Resource.Resource;
 984          resources[i].raw = decl->Resource.Raw;
 985          resources[i].slot = i;
 986       }
 987       break;
 988    case TGSI_FILE_SAMPLER_VIEW:
 989       for (i = first; i <= last; ++i)
 990          textureViews[i].target = decl->SamplerView.Resource;
 991       break;
 992    case TGSI_FILE_NULL:
 993    case TGSI_FILE_TEMPORARY:
 994    case TGSI_FILE_ADDRESS:
 995    case TGSI_FILE_CONSTANT:
 996    case TGSI_FILE_IMMEDIATE:
 997    case TGSI_FILE_PREDICATE:
 998    case TGSI_FILE_SAMPLER:
 999       break;
1000    default:
1001       ERROR("unhandled TGSI_FILE %d\n", decl->Declaration.File);
1002       return false;
1003    }
1004    return true;
1005 }
1006
1007 inline bool Source::isEdgeFlagPassthrough(const Instruction& insn) const
1008 {
1009    return insn.getOpcode() == TGSI_OPCODE_MOV &&
1010       insn.getDst(0).getIndex(0) == info->io.edgeFlagOut &&
1011       insn.getSrc(0).getFile() == TGSI_FILE_INPUT;
1012 }
1013
1014 bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
1015 {
1016    Instruction insn(inst);
1017
1018    if (insn.getOpcode() == TGSI_OPCODE_BARRIER)
1019       info->numBarriers = 1;
1020
1021    if (insn.dstCount()) {
1022       if (insn.getDst(0).getFile() == TGSI_FILE_OUTPUT) {
1023          Instruction::DstRegister dst = insn.getDst(0);
1024
1025          if (dst.isIndirect(0))
1026             for (unsigned i = 0; i < info->numOutputs; ++i)
1027                info->out[i].mask = 0xf;
1028          else
1029             info->out[dst.getIndex(0)].mask |= dst.getMask();
1030
1031          if (info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_PSIZE ||
1032              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_PRIMID ||
1033              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_LAYER ||
1034              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_FOG)
1035             info->out[dst.getIndex(0)].mask &= 1;
1036
1037          if (isEdgeFlagPassthrough(insn))
1038             info->io.edgeFlagIn = insn.getSrc(0).getIndex(0);
1039       } else
1040       if (insn.getDst(0).getFile() == TGSI_FILE_TEMPORARY) {
1041          if (insn.getDst(0).isIndirect(0))
1042             mainTempsInLMem = TRUE;
1043       }
1044    }
1045
1046    for (unsigned s = 0; s < insn.srcCount(); ++s) {
1047       Instruction::SrcRegister src = insn.getSrc(s);
1048       if (src.getFile() == TGSI_FILE_TEMPORARY) {
1049          if (src.isIndirect(0))
1050             mainTempsInLMem = TRUE;
1051       } else
1052       if (src.getFile() == TGSI_FILE_RESOURCE) {
1053          if (src.getIndex(0) == TGSI_RESOURCE_GLOBAL)
1054             info->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ?
1055                0x1 : 0x2;
1056       }
1057       if (src.getFile() != TGSI_FILE_INPUT)
1058          continue;
1059       unsigned mask = insn.srcMask(s);
1060
1061       if (src.isIndirect(0)) {
1062          for (unsigned i = 0; i < info->numInputs; ++i)
1063             info->in[i].mask = 0xf;
1064       } else {
1065          const int i = src.getIndex(0);
1066          for (unsigned c = 0; c < 4; ++c) {
1067             if (!(mask & (1 << c)))
1068                continue;
1069             int k = src.getSwizzle(c);
1070             if (k <= TGSI_SWIZZLE_W)
1071                info->in[i].mask |= 1 << k;
1072          }
1073          switch (info->in[i].sn) {
1074          case TGSI_SEMANTIC_PSIZE:
1075          case TGSI_SEMANTIC_PRIMID:
1076          case TGSI_SEMANTIC_FOG:
1077             info->in[i].mask &= 0x1;
1078             break;
1079          case TGSI_SEMANTIC_PCOORD:
1080             info->in[i].mask &= 0x3;
1081             break;
1082          default:
1083             break;
1084          }
1085       }
1086    }
1087    return true;
1088 }
1089
1090 nv50_ir::TexInstruction::Target
1091 Instruction::getTexture(const tgsi::Source *code, int s) const
1092 {
1093    // XXX: indirect access
1094    unsigned int r;
1095
1096    switch (getSrc(s).getFile()) {
1097    case TGSI_FILE_RESOURCE:
1098       r = getSrc(s).getIndex(0);
1099       return translateTexture(code->resources.at(r).target);
1100    case TGSI_FILE_SAMPLER_VIEW:
1101       r = getSrc(s).getIndex(0);
1102       return translateTexture(code->textureViews.at(r).target);
1103    default:
1104       return translateTexture(insn->Texture.Texture);
1105    }
1106 }
1107
1108 } // namespace tgsi
1109
1110 namespace {
1111
1112 using namespace nv50_ir;
1113
1114 class Converter : public BuildUtil
1115 {
1116 public:
1117    Converter(Program *, const tgsi::Source *);
1118    ~Converter();
1119
1120    bool run();
1121
1122 private:
1123    struct Subroutine
1124    {
1125       Subroutine(Function *f) : f(f) { }
1126       Function *f;
1127       ValueMap values;
1128    };
1129
1130    Value *shiftAddress(Value *);
1131    Value *getVertexBase(int s);
1132    DataArray *getArrayForFile(unsigned file, int idx);
1133    Value *fetchSrc(int s, int c);
1134    Value *acquireDst(int d, int c);
1135    void storeDst(int d, int c, Value *);
1136
1137    Value *fetchSrc(const tgsi::Instruction::SrcRegister src, int c, Value *ptr);
1138    void storeDst(const tgsi::Instruction::DstRegister dst, int c,
1139                  Value *val, Value *ptr);
1140
1141    Value *applySrcMod(Value *, int s, int c);
1142
1143    Symbol *makeSym(uint file, int fileIndex, int idx, int c, uint32_t addr);
1144    Symbol *srcToSym(tgsi::Instruction::SrcRegister, int c);
1145    Symbol *dstToSym(tgsi::Instruction::DstRegister, int c);
1146
1147    bool handleInstruction(const struct tgsi_full_instruction *);
1148    void exportOutputs();
1149    inline Subroutine *getSubroutine(unsigned ip);
1150    inline Subroutine *getSubroutine(Function *);
1151    inline bool isEndOfSubroutine(uint ip);
1152
1153    void loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask);
1154
1155    // R,S,L,C,Dx,Dy encode TGSI sources for respective values (0xSf for auto)
1156    void setTexRS(TexInstruction *, unsigned int& s, int R, int S);
1157    void handleTEX(Value *dst0[4], int R, int S, int L, int C, int Dx, int Dy);
1158    void handleTXF(Value *dst0[4], int R, int L_M);
1159    void handleTXQ(Value *dst0[4], enum TexQuery);
1160    void handleLIT(Value *dst0[4]);
1161    void handleUserClipPlanes();
1162
1163    Symbol *getResourceBase(int r);
1164    void getResourceCoords(std::vector<Value *>&, int r, int s);
1165
1166    void handleLOAD(Value *dst0[4]);
1167    void handleSTORE();
1168    void handleATOM(Value *dst0[4], DataType, uint16_t subOp);
1169
1170    Value *interpolate(tgsi::Instruction::SrcRegister, int c, Value *ptr);
1171
1172    void insertConvergenceOps(BasicBlock *conv, BasicBlock *fork);
1173
1174    Value *buildDot(int dim);
1175
1176    class BindArgumentsPass : public Pass {
1177    public:
1178       BindArgumentsPass(Converter &conv) : conv(conv) { }
1179
1180    private:
1181       Converter &conv;
1182       Subroutine *sub;
1183
1184       inline const Location *getValueLocation(Subroutine *, Value *);
1185
1186       template<typename T> inline void
1187       updateCallArgs(Instruction *i, void (Instruction::*setArg)(int, Value *),
1188                      T (Function::*proto));
1189
1190       template<typename T> inline void
1191       updatePrototype(BitSet *set, void (Function::*updateSet)(),
1192                       T (Function::*proto));
1193
1194    protected:
1195       bool visit(Function *);
1196       bool visit(BasicBlock *bb) { return false; }
1197    };
1198
1199 private:
1200    const struct tgsi::Source *code;
1201    const struct nv50_ir_prog_info *info;
1202
1203    struct {
1204       std::map<unsigned, Subroutine> map;
1205       Subroutine *cur;
1206    } sub;
1207
1208    uint ip; // instruction pointer
1209
1210    tgsi::Instruction tgsi;
1211
1212    DataType dstTy;
1213    DataType srcTy;
1214
1215    DataArray tData; // TGSI_FILE_TEMPORARY
1216    DataArray aData; // TGSI_FILE_ADDRESS
1217    DataArray pData; // TGSI_FILE_PREDICATE
1218    DataArray oData; // TGSI_FILE_OUTPUT (if outputs in registers)
1219
1220    Value *zero;
1221    Value *fragCoord[4];
1222    Value *clipVtx[4];
1223
1224    Value *vtxBase[5]; // base address of vertex in primitive (for TP/GP)
1225    uint8_t vtxBaseValid;
1226
1227    Stack condBBs;  // fork BB, then else clause BB
1228    Stack joinBBs;  // fork BB, for inserting join ops on ENDIF
1229    Stack loopBBs;  // loop headers
1230    Stack breakBBs; // end of / after loop
1231 };
1232
1233 Symbol *
1234 Converter::srcToSym(tgsi::Instruction::SrcRegister src, int c)
1235 {
1236    const int swz = src.getSwizzle(c);
1237
1238    return makeSym(src.getFile(),
1239                   src.is2D() ? src.getIndex(1) : 0,
1240                   src.isIndirect(0) ? -1 : src.getIndex(0), swz,
1241                   src.getIndex(0) * 16 + swz * 4);
1242 }
1243
1244 Symbol *
1245 Converter::dstToSym(tgsi::Instruction::DstRegister dst, int c)
1246 {
1247    return makeSym(dst.getFile(),
1248                   dst.is2D() ? dst.getIndex(1) : 0,
1249                   dst.isIndirect(0) ? -1 : dst.getIndex(0), c,
1250                   dst.getIndex(0) * 16 + c * 4);
1251 }
1252
1253 Symbol *
1254 Converter::makeSym(uint tgsiFile, int fileIdx, int idx, int c, uint32_t address)
1255 {
1256    Symbol *sym = new_Symbol(prog, tgsi::translateFile(tgsiFile));
1257
1258    sym->reg.fileIndex = fileIdx;
1259
1260    if (idx >= 0) {
1261       if (sym->reg.file == FILE_SHADER_INPUT)
1262          sym->setOffset(info->in[idx].slot[c] * 4);
1263       else
1264       if (sym->reg.file == FILE_SHADER_OUTPUT)
1265          sym->setOffset(info->out[idx].slot[c] * 4);
1266       else
1267       if (sym->reg.file == FILE_SYSTEM_VALUE)
1268          sym->setSV(tgsi::translateSysVal(info->sv[idx].sn), c);
1269       else
1270          sym->setOffset(address);
1271    } else {
1272       sym->setOffset(address);
1273    }
1274    return sym;
1275 }
1276
1277 static inline uint8_t
1278 translateInterpMode(const struct nv50_ir_varying *var, operation& op)
1279 {
1280    uint8_t mode = NV50_IR_INTERP_PERSPECTIVE;
1281
1282    if (var->flat)
1283       mode = NV50_IR_INTERP_FLAT;
1284    else
1285    if (var->linear)
1286       mode = NV50_IR_INTERP_LINEAR;
1287    else
1288    if (var->sc)
1289       mode = NV50_IR_INTERP_SC;
1290
1291    op = (mode == NV50_IR_INTERP_PERSPECTIVE || mode == NV50_IR_INTERP_SC)
1292       ? OP_PINTERP : OP_LINTERP;
1293
1294    if (var->centroid)
1295       mode |= NV50_IR_INTERP_CENTROID;
1296
1297    return mode;
1298 }
1299
1300 Value *
1301 Converter::interpolate(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1302 {
1303    operation op;
1304
1305    // XXX: no way to know interpolation mode if we don't know what's accessed
1306    const uint8_t mode = translateInterpMode(&info->in[ptr ? 0 :
1307                                                       src.getIndex(0)], op);
1308
1309    Instruction *insn = new_Instruction(func, op, TYPE_F32);
1310
1311    insn->setDef(0, getScratch());
1312    insn->setSrc(0, srcToSym(src, c));
1313    if (op == OP_PINTERP)
1314       insn->setSrc(1, fragCoord[3]);
1315    if (ptr)
1316       insn->setIndirect(0, 0, ptr);
1317
1318    insn->setInterpolate(mode);
1319
1320    bb->insertTail(insn);
1321    return insn->getDef(0);
1322 }
1323
1324 Value *
1325 Converter::applySrcMod(Value *val, int s, int c)
1326 {
1327    Modifier m = tgsi.getSrc(s).getMod(c);
1328    DataType ty = tgsi.inferSrcType();
1329
1330    if (m & Modifier(NV50_IR_MOD_ABS))
1331       val = mkOp1v(OP_ABS, ty, getScratch(), val);
1332
1333    if (m & Modifier(NV50_IR_MOD_NEG))
1334       val = mkOp1v(OP_NEG, ty, getScratch(), val);
1335
1336    return val;
1337 }
1338
1339 Value *
1340 Converter::getVertexBase(int s)
1341 {
1342    assert(s < 5);
1343    if (!(vtxBaseValid & (1 << s))) {
1344       const int index = tgsi.getSrc(s).getIndex(1);
1345       Value *rel = NULL;
1346       if (tgsi.getSrc(s).isIndirect(1))
1347          rel = fetchSrc(tgsi.getSrc(s).getIndirect(1), 0, NULL);
1348       vtxBaseValid |= 1 << s;
1349       vtxBase[s] = mkOp2v(OP_PFETCH, TYPE_U32, getSSA(4, FILE_ADDRESS),
1350                           mkImm(index), rel);
1351    }
1352    return vtxBase[s];
1353 }
1354
1355 Value *
1356 Converter::fetchSrc(int s, int c)
1357 {
1358    Value *res;
1359    Value *ptr = NULL, *dimRel = NULL;
1360
1361    tgsi::Instruction::SrcRegister src = tgsi.getSrc(s);
1362
1363    if (src.isIndirect(0))
1364       ptr = fetchSrc(src.getIndirect(0), 0, NULL);
1365
1366    if (src.is2D()) {
1367       switch (src.getFile()) {
1368       case TGSI_FILE_INPUT:
1369          dimRel = getVertexBase(s);
1370          break;
1371       case TGSI_FILE_CONSTANT:
1372          // on NVC0, this is valid and c{I+J}[k] == cI[(J << 16) + k]
1373          if (src.isIndirect(1))
1374             dimRel = fetchSrc(src.getIndirect(1), 0, 0);
1375          break;
1376       default:
1377          break;
1378       }
1379    }
1380
1381    res = fetchSrc(src, c, ptr);
1382
1383    if (dimRel)
1384       res->getInsn()->setIndirect(0, 1, dimRel);
1385
1386    return applySrcMod(res, s, c);
1387 }
1388
1389 Converter::DataArray *
1390 Converter::getArrayForFile(unsigned file, int idx)
1391 {
1392    switch (file) {
1393    case TGSI_FILE_TEMPORARY:
1394       return &tData;
1395    case TGSI_FILE_PREDICATE:
1396       return &pData;
1397    case TGSI_FILE_ADDRESS:
1398       return &aData;
1399    case TGSI_FILE_OUTPUT:
1400       assert(prog->getType() == Program::TYPE_FRAGMENT);
1401       return &oData;
1402    default:
1403       assert(!"invalid/unhandled TGSI source file");
1404       return NULL;
1405    }
1406 }
1407
1408 Value *
1409 Converter::shiftAddress(Value *index)
1410 {
1411    if (!index)
1412       return NULL;
1413    return mkOp2v(OP_SHL, TYPE_U32, getSSA(4, FILE_ADDRESS), index, mkImm(4));
1414 }
1415
1416 Value *
1417 Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1418 {
1419    const int idx2d = src.is2D() ? src.getIndex(1) : 0;
1420    const int idx = src.getIndex(0);
1421    const int swz = src.getSwizzle(c);
1422
1423    switch (src.getFile()) {
1424    case TGSI_FILE_IMMEDIATE:
1425       assert(!ptr);
1426       return loadImm(NULL, info->immd.data[idx * 4 + swz]);
1427    case TGSI_FILE_CONSTANT:
1428       return mkLoadv(TYPE_U32, srcToSym(src, c), shiftAddress(ptr));
1429    case TGSI_FILE_INPUT:
1430       if (prog->getType() == Program::TYPE_FRAGMENT) {
1431          // don't load masked inputs, won't be assigned a slot
1432          if (!ptr && !(info->in[idx].mask & (1 << swz)))
1433             return loadImm(NULL, swz == TGSI_SWIZZLE_W ? 1.0f : 0.0f);
1434          if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_FACE)
1435             return mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_FACE, 0));
1436          return interpolate(src, c, shiftAddress(ptr));
1437       } else
1438       if (prog->getType() == Program::TYPE_GEOMETRY) {
1439          if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_PRIMID)
1440             return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_PRIMITIVE_ID, 0));
1441          // XXX: This is going to be a problem with scalar arrays, i.e. when
1442          // we cannot assume that the address is given in units of vec4.
1443          //
1444          // nv50 and nvc0 need different things here, so let the lowering
1445          // passes decide what to do with the address
1446          if (ptr)
1447             return mkLoadv(TYPE_U32, srcToSym(src, c), ptr);
1448       }
1449       return mkLoadv(TYPE_U32, srcToSym(src, c), shiftAddress(ptr));
1450    case TGSI_FILE_OUTPUT:
1451       assert(!"load from output file");
1452       return NULL;
1453    case TGSI_FILE_SYSTEM_VALUE:
1454       assert(!ptr);
1455       return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
1456    default:
1457       return getArrayForFile(src.getFile(), idx2d)->load(
1458          sub.cur->values, idx, swz, shiftAddress(ptr));
1459    }
1460 }
1461
1462 Value *
1463 Converter::acquireDst(int d, int c)
1464 {
1465    const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1466    const unsigned f = dst.getFile();
1467    const int idx = dst.getIndex(0);
1468    const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1469
1470    if (dst.isMasked(c) || f == TGSI_FILE_RESOURCE)
1471       return NULL;
1472
1473    if (dst.isIndirect(0) ||
1474        f == TGSI_FILE_SYSTEM_VALUE ||
1475        (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT))
1476       return getScratch();
1477
1478    return getArrayForFile(f, idx2d)-> acquire(sub.cur->values, idx, c);
1479 }
1480
1481 void
1482 Converter::storeDst(int d, int c, Value *val)
1483 {
1484    const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1485
1486    switch (tgsi.getSaturate()) {
1487    case TGSI_SAT_NONE:
1488       break;
1489    case TGSI_SAT_ZERO_ONE:
1490       mkOp1(OP_SAT, dstTy, val, val);
1491       break;
1492    case TGSI_SAT_MINUS_PLUS_ONE:
1493       mkOp2(OP_MAX, dstTy, val, val, mkImm(-1.0f));
1494       mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1495       break;
1496    default:
1497       assert(!"invalid saturation mode");
1498       break;
1499    }
1500
1501    Value *ptr = NULL;
1502    if (dst.isIndirect(0))
1503       ptr = shiftAddress(fetchSrc(dst.getIndirect(0), 0, NULL));
1504
1505    if (info->io.genUserClip > 0 &&
1506        dst.getFile() == TGSI_FILE_OUTPUT &&
1507        !dst.isIndirect(0) && dst.getIndex(0) == code->clipVertexOutput) {
1508       mkMov(clipVtx[c], val);
1509       val = clipVtx[c];
1510    }
1511
1512    storeDst(dst, c, val, ptr);
1513 }
1514
1515 void
1516 Converter::storeDst(const tgsi::Instruction::DstRegister dst, int c,
1517                     Value *val, Value *ptr)
1518 {
1519    const unsigned f = dst.getFile();
1520    const int idx = dst.getIndex(0);
1521    const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1522
1523    if (f == TGSI_FILE_SYSTEM_VALUE) {
1524       assert(!ptr);
1525       mkOp2(OP_WRSV, TYPE_U32, NULL, dstToSym(dst, c), val);
1526    } else
1527    if (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT) {
1528       if (ptr || (info->out[idx].mask & (1 << c)))
1529          mkStore(OP_EXPORT, TYPE_U32, dstToSym(dst, c), ptr, val);
1530    } else
1531    if (f == TGSI_FILE_TEMPORARY ||
1532        f == TGSI_FILE_PREDICATE ||
1533        f == TGSI_FILE_ADDRESS ||
1534        f == TGSI_FILE_OUTPUT) {
1535       getArrayForFile(f, idx2d)->store(sub.cur->values, idx, c, ptr, val);
1536    } else {
1537       assert(!"invalid dst file");
1538    }
1539 }
1540
1541 #define FOR_EACH_DST_ENABLED_CHANNEL(d, chan, inst) \
1542    for (chan = 0; chan < 4; ++chan)                 \
1543       if (!inst.getDst(d).isMasked(chan))
1544
1545 Value *
1546 Converter::buildDot(int dim)
1547 {
1548    assert(dim > 0);
1549
1550    Value *src0 = fetchSrc(0, 0), *src1 = fetchSrc(1, 0);
1551    Value *dotp = getScratch();
1552
1553    mkOp2(OP_MUL, TYPE_F32, dotp, src0, src1);
1554
1555    for (int c = 1; c < dim; ++c) {
1556       src0 = fetchSrc(0, c);
1557       src1 = fetchSrc(1, c);
1558       mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp);
1559    }
1560    return dotp;
1561 }
1562
1563 void
1564 Converter::insertConvergenceOps(BasicBlock *conv, BasicBlock *fork)
1565 {
1566    FlowInstruction *join = new_FlowInstruction(func, OP_JOIN, NULL);
1567    join->fixed = 1;
1568    conv->insertHead(join);
1569
1570    fork->joinAt = new_FlowInstruction(func, OP_JOINAT, conv);
1571    fork->insertBefore(fork->getExit(), fork->joinAt);
1572 }
1573
1574 void
1575 Converter::setTexRS(TexInstruction *tex, unsigned int& s, int R, int S)
1576 {
1577    unsigned rIdx = 0, sIdx = 0;
1578
1579    if (R >= 0)
1580       rIdx = tgsi.getSrc(R).getIndex(0);
1581    if (S >= 0)
1582       sIdx = tgsi.getSrc(S).getIndex(0);
1583
1584    tex->setTexture(tgsi.getTexture(code, R), rIdx, sIdx);
1585
1586    if (tgsi.getSrc(R).isIndirect(0)) {
1587       tex->tex.rIndirectSrc = s;
1588       tex->setSrc(s++, fetchSrc(tgsi.getSrc(R).getIndirect(0), 0, NULL));
1589    }
1590    if (S >= 0 && tgsi.getSrc(S).isIndirect(0)) {
1591       tex->tex.sIndirectSrc = s;
1592       tex->setSrc(s++, fetchSrc(tgsi.getSrc(S).getIndirect(0), 0, NULL));
1593    }
1594 }
1595
1596 void
1597 Converter::handleTXQ(Value *dst0[4], enum TexQuery query)
1598 {
1599    TexInstruction *tex = new_TexInstruction(func, OP_TXQ);
1600    tex->tex.query = query;
1601    unsigned int c, d;
1602
1603    for (d = 0, c = 0; c < 4; ++c) {
1604       if (!dst0[c])
1605          continue;
1606       tex->tex.mask |= 1 << c;
1607       tex->setDef(d++, dst0[c]);
1608    }
1609    tex->setSrc((c = 0), fetchSrc(0, 0)); // mip level
1610
1611    setTexRS(tex, c, 1, -1);
1612
1613    bb->insertTail(tex);
1614 }
1615
1616 void
1617 Converter::loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask)
1618 {
1619    Value *proj = fetchSrc(0, 3);
1620    Instruction *insn = proj->getUniqueInsn();
1621    int c;
1622
1623    if (insn->op == OP_PINTERP) {
1624       bb->insertTail(insn = cloneForward(func, insn));
1625       insn->op = OP_LINTERP;
1626       insn->setInterpolate(NV50_IR_INTERP_LINEAR | insn->getSampleMode());
1627       insn->setSrc(1, NULL);
1628       proj = insn->getDef(0);
1629    }
1630    proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), proj);
1631
1632    for (c = 0; c < 4; ++c) {
1633       if (!(mask & (1 << c)))
1634          continue;
1635       if ((insn = src[c]->getUniqueInsn())->op != OP_PINTERP)
1636          continue;
1637       mask &= ~(1 << c);
1638
1639       bb->insertTail(insn = cloneForward(func, insn));
1640       insn->setInterpolate(NV50_IR_INTERP_PERSPECTIVE | insn->getSampleMode());
1641       insn->setSrc(1, proj);
1642       dst[c] = insn->getDef(0);
1643    }
1644    if (!mask)
1645       return;
1646
1647    proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), fetchSrc(0, 3));
1648
1649    for (c = 0; c < 4; ++c)
1650       if (mask & (1 << c))
1651          dst[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), src[c], proj);
1652 }
1653
1654 // order of nv50 ir sources: x y z layer lod/bias shadow
1655 // order of TGSI TEX sources: x y z layer shadow lod/bias
1656 //  lowering will finally set the hw specific order (like array first on nvc0)
1657 void
1658 Converter::handleTEX(Value *dst[4], int R, int S, int L, int C, int Dx, int Dy)
1659 {
1660    Value *val;
1661    Value *arg[4], *src[8];
1662    Value *lod = NULL, *shd = NULL;
1663    unsigned int s, c, d;
1664    TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1665
1666    TexInstruction::Target tgt = tgsi.getTexture(code, R);
1667
1668    for (s = 0; s < tgt.getArgCount(); ++s)
1669       arg[s] = src[s] = fetchSrc(0, s);
1670
1671    if (texi->op == OP_TXL || texi->op == OP_TXB)
1672       lod = fetchSrc(L >> 4, L & 3);
1673
1674    if (C == 0x0f)
1675       C = 0x00 | MAX2(tgt.getArgCount(), 2); // guess DC src
1676
1677    if (tgt.isShadow())
1678       shd = fetchSrc(C >> 4, C & 3);
1679
1680    if (texi->op == OP_TXD) {
1681       for (c = 0; c < tgt.getDim(); ++c) {
1682          texi->dPdx[c].set(fetchSrc(Dx >> 4, (Dx & 3) + c));
1683          texi->dPdy[c].set(fetchSrc(Dy >> 4, (Dy & 3) + c));
1684       }
1685    }
1686
1687    // cube textures don't care about projection value, it's divided out
1688    if (tgsi.getOpcode() == TGSI_OPCODE_TXP && !tgt.isCube() && !tgt.isArray()) {
1689       unsigned int n = tgt.getDim();
1690       if (shd) {
1691          arg[n] = shd;
1692          ++n;
1693          assert(tgt.getDim() == tgt.getArgCount());
1694       }
1695       loadProjTexCoords(src, arg, (1 << n) - 1);
1696       if (shd)
1697          shd = src[n - 1];
1698    }
1699
1700    if (tgt.isCube()) {
1701       for (c = 0; c < 3; ++c)
1702          src[c] = mkOp1v(OP_ABS, TYPE_F32, getSSA(), arg[c]);
1703       val = getScratch();
1704       mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
1705       mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
1706       mkOp1(OP_RCP, TYPE_F32, val, val);
1707       for (c = 0; c < 3; ++c)
1708          src[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), arg[c], val);
1709    }
1710
1711    for (c = 0, d = 0; c < 4; ++c) {
1712       if (dst[c]) {
1713          texi->setDef(d++, dst[c]);
1714          texi->tex.mask |= 1 << c;
1715       } else {
1716          // NOTE: maybe hook up def too, for CSE
1717       }
1718    }
1719    for (s = 0; s < tgt.getArgCount(); ++s)
1720       texi->setSrc(s, src[s]);
1721    if (lod)
1722       texi->setSrc(s++, lod);
1723    if (shd)
1724       texi->setSrc(s++, shd);
1725
1726    setTexRS(texi, s, R, S);
1727
1728    if (tgsi.getOpcode() == TGSI_OPCODE_SAMPLE_C_LZ)
1729       texi->tex.levelZero = true;
1730
1731    for (s = 0; s < tgsi.getNumTexOffsets(); ++s) {
1732       for (c = 0; c < 3; ++c) {
1733          texi->tex.offset[s][c] = tgsi.getTexOffset(s).getValueU32(c, info);
1734          if (texi->tex.offset[s][c])
1735             texi->tex.useOffsets = s + 1;
1736       }
1737    }
1738
1739    bb->insertTail(texi);
1740 }
1741
1742 // 1st source: xyz = coordinates, w = lod/sample
1743 // 2nd source: offset
1744 void
1745 Converter::handleTXF(Value *dst[4], int R, int L_M)
1746 {
1747    TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1748    int ms;
1749    unsigned int c, d, s;
1750
1751    texi->tex.target = tgsi.getTexture(code, R);
1752
1753    ms = texi->tex.target.isMS() ? 1 : 0;
1754    texi->tex.levelZero = ms; /* MS textures don't have mip-maps */
1755
1756    for (c = 0, d = 0; c < 4; ++c) {
1757       if (dst[c]) {
1758          texi->setDef(d++, dst[c]);
1759          texi->tex.mask |= 1 << c;
1760       }
1761    }
1762    for (c = 0; c < (texi->tex.target.getArgCount() - ms); ++c)
1763       texi->setSrc(c, fetchSrc(0, c));
1764    texi->setSrc(c++, fetchSrc(L_M >> 4, L_M & 3)); // lod or ms
1765
1766    setTexRS(texi, c, R, -1);
1767
1768    for (s = 0; s < tgsi.getNumTexOffsets(); ++s) {
1769       for (c = 0; c < 3; ++c) {
1770          texi->tex.offset[s][c] = tgsi.getTexOffset(s).getValueU32(c, info);
1771          if (texi->tex.offset[s][c])
1772             texi->tex.useOffsets = s + 1;
1773       }
1774    }
1775
1776    bb->insertTail(texi);
1777 }
1778
1779 void
1780 Converter::handleLIT(Value *dst0[4])
1781 {
1782    Value *val0 = NULL;
1783    unsigned int mask = tgsi.getDst(0).getMask();
1784
1785    if (mask & (1 << 0))
1786       loadImm(dst0[0], 1.0f);
1787
1788    if (mask & (1 << 3))
1789       loadImm(dst0[3], 1.0f);
1790
1791    if (mask & (3 << 1)) {
1792       val0 = getScratch();
1793       mkOp2(OP_MAX, TYPE_F32, val0, fetchSrc(0, 0), zero);
1794       if (mask & (1 << 1))
1795          mkMov(dst0[1], val0);
1796    }
1797
1798    if (mask & (1 << 2)) {
1799       Value *src1 = fetchSrc(0, 1), *src3 = fetchSrc(0, 3);
1800       Value *val1 = getScratch(), *val3 = getScratch();
1801
1802       Value *pos128 = loadImm(NULL, +127.999999f);
1803       Value *neg128 = loadImm(NULL, -127.999999f);
1804
1805       mkOp2(OP_MAX, TYPE_F32, val1, src1, zero);
1806       mkOp2(OP_MAX, TYPE_F32, val3, src3, neg128);
1807       mkOp2(OP_MIN, TYPE_F32, val3, val3, pos128);
1808       mkOp2(OP_POW, TYPE_F32, val3, val1, val3);
1809
1810       mkCmp(OP_SLCT, CC_GT, TYPE_F32, dst0[2], TYPE_F32, val3, zero, val0);
1811    }
1812 }
1813
1814 static inline bool
1815 isResourceSpecial(const int r)
1816 {
1817    return (r == TGSI_RESOURCE_GLOBAL ||
1818            r == TGSI_RESOURCE_LOCAL ||
1819            r == TGSI_RESOURCE_PRIVATE ||
1820            r == TGSI_RESOURCE_INPUT);
1821 }
1822
1823 static inline bool
1824 isResourceRaw(const struct tgsi::Source *code, const int r)
1825 {
1826    return isResourceSpecial(r) || code->resources[r].raw;
1827 }
1828
1829 static inline nv50_ir::TexTarget
1830 getResourceTarget(const struct tgsi::Source *code, int r)
1831 {
1832    if (isResourceSpecial(r))
1833       return nv50_ir::TEX_TARGET_BUFFER;
1834    return tgsi::translateTexture(code->resources.at(r).target);
1835 }
1836
1837 Symbol *
1838 Converter::getResourceBase(const int r)
1839 {
1840    Symbol *sym = NULL;
1841
1842    switch (r) {
1843    case TGSI_RESOURCE_GLOBAL:
1844       sym = new_Symbol(prog, nv50_ir::FILE_MEMORY_GLOBAL, 15);
1845       break;
1846    case TGSI_RESOURCE_LOCAL:
1847       assert(prog->getType() == Program::TYPE_COMPUTE);
1848       sym = mkSymbol(nv50_ir::FILE_MEMORY_SHARED, 0, TYPE_U32,
1849                      info->prop.cp.sharedOffset);
1850       break;
1851    case TGSI_RESOURCE_PRIVATE:
1852       sym = mkSymbol(nv50_ir::FILE_MEMORY_LOCAL, 0, TYPE_U32,
1853                      info->bin.tlsSpace);
1854       break;
1855    case TGSI_RESOURCE_INPUT:
1856       assert(prog->getType() == Program::TYPE_COMPUTE);
1857       sym = mkSymbol(nv50_ir::FILE_SHADER_INPUT, 0, TYPE_U32,
1858                      info->prop.cp.inputOffset);
1859       break;
1860    default:
1861       sym = new_Symbol(prog,
1862                        nv50_ir::FILE_MEMORY_GLOBAL, code->resources.at(r).slot);
1863       break;
1864    }
1865    return sym;
1866 }
1867
1868 void
1869 Converter::getResourceCoords(std::vector<Value *> &coords, int r, int s)
1870 {
1871    const int arg =
1872       TexInstruction::Target(getResourceTarget(code, r)).getArgCount();
1873
1874    for (int c = 0; c < arg; ++c)
1875       coords.push_back(fetchSrc(s, c));
1876
1877    // NOTE: TGSI_RESOURCE_GLOBAL needs FILE_GPR; this is an nv50 quirk
1878    if (r == TGSI_RESOURCE_LOCAL ||
1879        r == TGSI_RESOURCE_PRIVATE ||
1880        r == TGSI_RESOURCE_INPUT)
1881       coords[0] = mkOp1v(OP_MOV, TYPE_U32, getScratch(4, FILE_ADDRESS),
1882                          coords[0]);
1883 }
1884
1885 static inline int
1886 partitionLoadStore(uint8_t comp[2], uint8_t size[2], uint8_t mask)
1887 {
1888    int n = 0;
1889
1890    while (mask) {
1891       if (mask & 1) {
1892          size[n]++;
1893       } else {
1894          if (size[n])
1895             comp[n = 1] = size[0] + 1;
1896          else
1897             comp[n]++;
1898       }
1899       mask >>= 1;
1900    }
1901    if (size[0] == 3) {
1902       n = 1;
1903       size[0] = (comp[0] == 1) ? 1 : 2;
1904       size[1] = 3 - size[0];
1905       comp[1] = comp[0] + size[0];
1906    }
1907    return n + 1;
1908 }
1909
1910 // For raw loads, granularity is 4 byte.
1911 // Usage of the texture read mask on OP_SULDP is not allowed.
1912 void
1913 Converter::handleLOAD(Value *dst0[4])
1914 {
1915    const int r = tgsi.getSrc(0).getIndex(0);
1916    int c;
1917    std::vector<Value *> off, src, ldv, def;
1918
1919    getResourceCoords(off, r, 1);
1920
1921    if (isResourceRaw(code, r)) {
1922       uint8_t mask = 0;
1923       uint8_t comp[2] = { 0, 0 };
1924       uint8_t size[2] = { 0, 0 };
1925
1926       Symbol *base = getResourceBase(r);
1927
1928       // determine the base and size of the at most 2 load ops
1929       for (c = 0; c < 4; ++c)
1930          if (!tgsi.getDst(0).isMasked(c))
1931             mask |= 1 << (tgsi.getSrc(0).getSwizzle(c) - TGSI_SWIZZLE_X);
1932
1933       int n = partitionLoadStore(comp, size, mask);
1934
1935       src = off;
1936
1937       def.resize(4); // index by component, the ones we need will be non-NULL
1938       for (c = 0; c < 4; ++c) {
1939          if (dst0[c] && tgsi.getSrc(0).getSwizzle(c) == (TGSI_SWIZZLE_X + c))
1940             def[c] = dst0[c];
1941          else
1942          if (mask & (1 << c))
1943             def[c] = getScratch();
1944       }
1945
1946       const bool useLd = isResourceSpecial(r) ||
1947          (info->io.nv50styleSurfaces &&
1948           code->resources[r].target == TGSI_TEXTURE_BUFFER);
1949
1950       for (int i = 0; i < n; ++i) {
1951          ldv.assign(def.begin() + comp[i], def.begin() + comp[i] + size[i]);
1952
1953          if (comp[i]) // adjust x component of source address if necessary
1954             src[0] = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, off[0]->reg.file),
1955                             off[0], mkImm(comp[i] * 4));
1956          else
1957             src[0] = off[0];
1958
1959          if (useLd) {
1960             Instruction *ld =
1961                mkLoad(typeOfSize(size[i] * 4), ldv[0], base, src[0]);
1962             for (size_t c = 1; c < ldv.size(); ++c)
1963                ld->setDef(c, ldv[c]);
1964          } else {
1965             mkTex(OP_SULDB, getResourceTarget(code, r), code->resources[r].slot,
1966                   0, ldv, src)->dType = typeOfSize(size[i] * 4);
1967          }
1968       }
1969    } else {
1970       def.resize(4);
1971       for (c = 0; c < 4; ++c) {
1972          if (!dst0[c] || tgsi.getSrc(0).getSwizzle(c) != (TGSI_SWIZZLE_X + c))
1973             def[c] = getScratch();
1974          else
1975             def[c] = dst0[c];
1976       }
1977
1978       mkTex(OP_SULDP, getResourceTarget(code, r), code->resources[r].slot, 0,
1979             def, off);
1980    }
1981    FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1982       if (dst0[c] != def[c])
1983          mkMov(dst0[c], def[tgsi.getSrc(0).getSwizzle(c)]);
1984 }
1985
1986 // For formatted stores, the write mask on OP_SUSTP can be used.
1987 // Raw stores have to be split.
1988 void
1989 Converter::handleSTORE()
1990 {
1991    const int r = tgsi.getDst(0).getIndex(0);
1992    int c;
1993    std::vector<Value *> off, src, dummy;
1994
1995    getResourceCoords(off, r, 0);
1996    src = off;
1997    const int s = src.size();
1998
1999    if (isResourceRaw(code, r)) {
2000       uint8_t comp[2] = { 0, 0 };
2001       uint8_t size[2] = { 0, 0 };
2002
2003       int n = partitionLoadStore(comp, size, tgsi.getDst(0).getMask());
2004
2005       Symbol *base = getResourceBase(r);
2006
2007       const bool useSt = isResourceSpecial(r) ||
2008          (info->io.nv50styleSurfaces &&
2009           code->resources[r].target == TGSI_TEXTURE_BUFFER);
2010
2011       for (int i = 0; i < n; ++i) {
2012          if (comp[i]) // adjust x component of source address if necessary
2013             src[0] = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, off[0]->reg.file),
2014                             off[0], mkImm(comp[i] * 4));
2015          else
2016             src[0] = off[0];
2017
2018          const DataType stTy = typeOfSize(size[i] * 4);
2019
2020          if (useSt) {
2021             Instruction *st =
2022                mkStore(OP_STORE, stTy, base, NULL, fetchSrc(1, comp[i]));
2023             for (c = 1; c < size[i]; ++c)
2024                st->setSrc(1 + c, fetchSrc(1, comp[i] + c));
2025             st->setIndirect(0, 0, src[0]);
2026          } else {
2027             // attach values to be stored
2028             src.resize(s + size[i]);
2029             for (c = 0; c < size[i]; ++c)
2030                src[s + c] = fetchSrc(1, comp[i] + c);
2031             mkTex(OP_SUSTB, getResourceTarget(code, r), code->resources[r].slot,
2032                   0, dummy, src)->setType(stTy);
2033          }
2034       }
2035    } else {
2036       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2037          src.push_back(fetchSrc(1, c));
2038
2039       mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0,
2040             dummy, src)->tex.mask = tgsi.getDst(0).getMask();
2041    }
2042 }
2043
2044 // XXX: These only work on resources with the single-component u32/s32 formats.
2045 // Therefore the result is replicated. This might not be intended by TGSI, but
2046 // operating on more than 1 component would produce undefined results because
2047 // they do not exist.
2048 void
2049 Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp)
2050 {
2051    const int r = tgsi.getSrc(0).getIndex(0);
2052    std::vector<Value *> srcv;
2053    std::vector<Value *> defv;
2054    LValue *dst = getScratch();
2055
2056    getResourceCoords(srcv, r, 1);
2057
2058    if (isResourceSpecial(r)) {
2059       assert(r != TGSI_RESOURCE_INPUT);
2060       Instruction *insn;
2061       insn = mkOp2(OP_ATOM, ty, dst, getResourceBase(r), fetchSrc(2, 0));
2062       insn->subOp = subOp;
2063       if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2064          insn->setSrc(2, fetchSrc(3, 0));
2065       insn->setIndirect(0, 0, srcv.at(0));
2066    } else {
2067       operation op = isResourceRaw(code, r) ? OP_SUREDB : OP_SUREDP;
2068       TexTarget targ = getResourceTarget(code, r);
2069       int idx = code->resources[r].slot;
2070       defv.push_back(dst);
2071       srcv.push_back(fetchSrc(2, 0));
2072       if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2073          srcv.push_back(fetchSrc(3, 0));
2074       TexInstruction *tex = mkTex(op, targ, idx, 0, defv, srcv);
2075       tex->subOp = subOp;
2076       tex->tex.mask = 1;
2077       tex->setType(ty);
2078    }
2079
2080    for (int c = 0; c < 4; ++c)
2081       if (dst0[c])
2082          dst0[c] = dst; // not equal to rDst so handleInstruction will do mkMov
2083 }
2084
2085 Converter::Subroutine *
2086 Converter::getSubroutine(unsigned ip)
2087 {
2088    std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
2089
2090    if (it == sub.map.end())
2091       it = sub.map.insert(std::make_pair(
2092               ip, Subroutine(new Function(prog, "SUB", ip)))).first;
2093
2094    return &it->second;
2095 }
2096
2097 Converter::Subroutine *
2098 Converter::getSubroutine(Function *f)
2099 {
2100    unsigned ip = f->getLabel();
2101    std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
2102
2103    if (it == sub.map.end())
2104       it = sub.map.insert(std::make_pair(ip, Subroutine(f))).first;
2105
2106    return &it->second;
2107 }
2108
2109 bool
2110 Converter::isEndOfSubroutine(uint ip)
2111 {
2112    assert(ip < code->scan.num_instructions);
2113    tgsi::Instruction insn(&code->insns[ip]);
2114    return (insn.getOpcode() == TGSI_OPCODE_END ||
2115            insn.getOpcode() == TGSI_OPCODE_ENDSUB ||
2116            // does END occur at end of main or the very end ?
2117            insn.getOpcode() == TGSI_OPCODE_BGNSUB);
2118 }
2119
2120 bool
2121 Converter::handleInstruction(const struct tgsi_full_instruction *insn)
2122 {
2123    Instruction *geni;
2124
2125    Value *dst0[4], *rDst0[4];
2126    Value *src0, *src1, *src2;
2127    Value *val0, *val1;
2128    int c;
2129
2130    tgsi = tgsi::Instruction(insn);
2131
2132    bool useScratchDst = tgsi.checkDstSrcAliasing();
2133
2134    operation op = tgsi.getOP();
2135    dstTy = tgsi.inferDstType();
2136    srcTy = tgsi.inferSrcType();
2137
2138    unsigned int mask = tgsi.dstCount() ? tgsi.getDst(0).getMask() : 0;
2139
2140    if (tgsi.dstCount()) {
2141       for (c = 0; c < 4; ++c) {
2142          rDst0[c] = acquireDst(0, c);
2143          dst0[c] = (useScratchDst && rDst0[c]) ? getScratch() : rDst0[c];
2144       }
2145    }
2146
2147    switch (tgsi.getOpcode()) {
2148    case TGSI_OPCODE_ADD:
2149    case TGSI_OPCODE_UADD:
2150    case TGSI_OPCODE_AND:
2151    case TGSI_OPCODE_DIV:
2152    case TGSI_OPCODE_IDIV:
2153    case TGSI_OPCODE_UDIV:
2154    case TGSI_OPCODE_MAX:
2155    case TGSI_OPCODE_MIN:
2156    case TGSI_OPCODE_IMAX:
2157    case TGSI_OPCODE_IMIN:
2158    case TGSI_OPCODE_UMAX:
2159    case TGSI_OPCODE_UMIN:
2160    case TGSI_OPCODE_MOD:
2161    case TGSI_OPCODE_UMOD:
2162    case TGSI_OPCODE_MUL:
2163    case TGSI_OPCODE_UMUL:
2164    case TGSI_OPCODE_OR:
2165    case TGSI_OPCODE_POW:
2166    case TGSI_OPCODE_SHL:
2167    case TGSI_OPCODE_ISHR:
2168    case TGSI_OPCODE_USHR:
2169    case TGSI_OPCODE_SUB:
2170    case TGSI_OPCODE_XOR:
2171       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2172          src0 = fetchSrc(0, c);
2173          src1 = fetchSrc(1, c);
2174          mkOp2(op, dstTy, dst0[c], src0, src1);
2175       }
2176       break;
2177    case TGSI_OPCODE_MAD:
2178    case TGSI_OPCODE_UMAD:
2179    case TGSI_OPCODE_SAD:
2180       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2181          src0 = fetchSrc(0, c);
2182          src1 = fetchSrc(1, c);
2183          src2 = fetchSrc(2, c);
2184          mkOp3(op, dstTy, dst0[c], src0, src1, src2);
2185       }
2186       break;
2187    case TGSI_OPCODE_MOV:
2188    case TGSI_OPCODE_ABS:
2189    case TGSI_OPCODE_CEIL:
2190    case TGSI_OPCODE_FLR:
2191    case TGSI_OPCODE_TRUNC:
2192    case TGSI_OPCODE_RCP:
2193    case TGSI_OPCODE_IABS:
2194    case TGSI_OPCODE_INEG:
2195    case TGSI_OPCODE_NOT:
2196    case TGSI_OPCODE_DDX:
2197    case TGSI_OPCODE_DDY:
2198       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2199          mkOp1(op, dstTy, dst0[c], fetchSrc(0, c));
2200       break;
2201    case TGSI_OPCODE_RSQ:
2202       src0 = fetchSrc(0, 0);
2203       val0 = getScratch();
2204       mkOp1(OP_ABS, TYPE_F32, val0, src0);
2205       mkOp1(OP_RSQ, TYPE_F32, val0, val0);
2206       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2207          mkMov(dst0[c], val0);
2208       break;
2209    case TGSI_OPCODE_ARL:
2210       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2211          src0 = fetchSrc(0, c);
2212          mkCvt(OP_CVT, TYPE_S32, dst0[c], TYPE_F32, src0)->rnd = ROUND_M;
2213       }
2214       break;
2215    case TGSI_OPCODE_UARL:
2216       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2217          mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
2218       break;
2219    case TGSI_OPCODE_EX2:
2220    case TGSI_OPCODE_LG2:
2221       val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0);
2222       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2223          mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
2224       break;
2225    case TGSI_OPCODE_COS:
2226    case TGSI_OPCODE_SIN:
2227       val0 = getScratch();
2228       if (mask & 7) {
2229          mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 0));
2230          mkOp1(op, TYPE_F32, val0, val0);
2231          for (c = 0; c < 3; ++c)
2232             if (dst0[c])
2233                mkMov(dst0[c], val0);
2234       }
2235       if (dst0[3]) {
2236          mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 3));
2237          mkOp1(op, TYPE_F32, dst0[3], val0);
2238       }
2239       break;
2240    case TGSI_OPCODE_SCS:
2241       if (mask & 3) {
2242          val0 = mkOp1v(OP_PRESIN, TYPE_F32, getSSA(), fetchSrc(0, 0));
2243          if (dst0[0])
2244             mkOp1(OP_COS, TYPE_F32, dst0[0], val0);
2245          if (dst0[1])
2246             mkOp1(OP_SIN, TYPE_F32, dst0[1], val0);
2247       }
2248       if (dst0[2])
2249          loadImm(dst0[2], 0.0f);
2250       if (dst0[3])
2251          loadImm(dst0[3], 1.0f);
2252       break;
2253    case TGSI_OPCODE_EXP:
2254       src0 = fetchSrc(0, 0);
2255       val0 = mkOp1v(OP_FLOOR, TYPE_F32, getSSA(), src0);
2256       if (dst0[1])
2257          mkOp2(OP_SUB, TYPE_F32, dst0[1], src0, val0);
2258       if (dst0[0])
2259          mkOp1(OP_EX2, TYPE_F32, dst0[0], val0);
2260       if (dst0[2])
2261          mkOp1(OP_EX2, TYPE_F32, dst0[2], src0);
2262       if (dst0[3])
2263          loadImm(dst0[3], 1.0f);
2264       break;
2265    case TGSI_OPCODE_LOG:
2266       src0 = mkOp1v(OP_ABS, TYPE_F32, getSSA(), fetchSrc(0, 0));
2267       val0 = mkOp1v(OP_LG2, TYPE_F32, dst0[2] ? dst0[2] : getSSA(), src0);
2268       if (dst0[0] || dst0[1])
2269          val1 = mkOp1v(OP_FLOOR, TYPE_F32, dst0[0] ? dst0[0] : getSSA(), val0);
2270       if (dst0[1]) {
2271          mkOp1(OP_EX2, TYPE_F32, dst0[1], val1);
2272          mkOp1(OP_RCP, TYPE_F32, dst0[1], dst0[1]);
2273          mkOp2(OP_MUL, TYPE_F32, dst0[1], dst0[1], src0);
2274       }
2275       if (dst0[3])
2276          loadImm(dst0[3], 1.0f);
2277       break;
2278    case TGSI_OPCODE_DP2:
2279       val0 = buildDot(2);
2280       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2281          mkMov(dst0[c], val0);
2282       break;
2283    case TGSI_OPCODE_DP3:
2284       val0 = buildDot(3);
2285       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2286          mkMov(dst0[c], val0);
2287       break;
2288    case TGSI_OPCODE_DP4:
2289       val0 = buildDot(4);
2290       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2291          mkMov(dst0[c], val0);
2292       break;
2293    case TGSI_OPCODE_DPH:
2294       val0 = buildDot(3);
2295       src1 = fetchSrc(1, 3);
2296       mkOp2(OP_ADD, TYPE_F32, val0, val0, src1);
2297       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2298          mkMov(dst0[c], val0);
2299       break;
2300    case TGSI_OPCODE_DST:
2301       if (dst0[0])
2302          loadImm(dst0[0], 1.0f);
2303       if (dst0[1]) {
2304          src0 = fetchSrc(0, 1);
2305          src1 = fetchSrc(1, 1);
2306          mkOp2(OP_MUL, TYPE_F32, dst0[1], src0, src1);
2307       }
2308       if (dst0[2])
2309          mkMov(dst0[2], fetchSrc(0, 2));
2310       if (dst0[3])
2311          mkMov(dst0[3], fetchSrc(1, 3));
2312       break;
2313    case TGSI_OPCODE_LRP:
2314       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2315          src0 = fetchSrc(0, c);
2316          src1 = fetchSrc(1, c);
2317          src2 = fetchSrc(2, c);
2318          mkOp3(OP_MAD, TYPE_F32, dst0[c],
2319                mkOp2v(OP_SUB, TYPE_F32, getSSA(), src1, src2), src0, src2);
2320       }
2321       break;
2322    case TGSI_OPCODE_LIT:
2323       handleLIT(dst0);
2324       break;
2325    case TGSI_OPCODE_XPD:
2326       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2327          if (c < 3) {
2328             val0 = getSSA();
2329             src0 = fetchSrc(1, (c + 1) % 3);
2330             src1 = fetchSrc(0, (c + 2) % 3);
2331             mkOp2(OP_MUL, TYPE_F32, val0, src0, src1);
2332             mkOp1(OP_NEG, TYPE_F32, val0, val0);
2333
2334             src0 = fetchSrc(0, (c + 1) % 3);
2335             src1 = fetchSrc(1, (c + 2) % 3);
2336             mkOp3(OP_MAD, TYPE_F32, dst0[c], src0, src1, val0);
2337          } else {
2338             loadImm(dst0[c], 1.0f);
2339          }
2340       }
2341       break;
2342    case TGSI_OPCODE_ISSG:
2343    case TGSI_OPCODE_SSG:
2344       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2345          src0 = fetchSrc(0, c);
2346          val0 = getScratch();
2347          val1 = getScratch();
2348          mkCmp(OP_SET, CC_GT, srcTy, val0, srcTy, src0, zero);
2349          mkCmp(OP_SET, CC_LT, srcTy, val1, srcTy, src0, zero);
2350          if (srcTy == TYPE_F32)
2351             mkOp2(OP_SUB, TYPE_F32, dst0[c], val0, val1);
2352          else
2353             mkOp2(OP_SUB, TYPE_S32, dst0[c], val1, val0);
2354       }
2355       break;
2356    case TGSI_OPCODE_UCMP:
2357    case TGSI_OPCODE_CMP:
2358       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2359          src0 = fetchSrc(0, c);
2360          src1 = fetchSrc(1, c);
2361          src2 = fetchSrc(2, c);
2362          if (src1 == src2)
2363             mkMov(dst0[c], src1);
2364          else
2365             mkCmp(OP_SLCT, (srcTy == TYPE_F32) ? CC_LT : CC_NE,
2366                   srcTy, dst0[c], srcTy, src1, src2, src0);
2367       }
2368       break;
2369    case TGSI_OPCODE_FRC:
2370       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2371          src0 = fetchSrc(0, c);
2372          val0 = getScratch();
2373          mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
2374          mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
2375       }
2376       break;
2377    case TGSI_OPCODE_ROUND:
2378       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2379          mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c))
2380          ->rnd = ROUND_NI;
2381       break;
2382    case TGSI_OPCODE_CLAMP:
2383       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2384          src0 = fetchSrc(0, c);
2385          src1 = fetchSrc(1, c);
2386          src2 = fetchSrc(2, c);
2387          val0 = getScratch();
2388          mkOp2(OP_MIN, TYPE_F32, val0, src0, src1);
2389          mkOp2(OP_MAX, TYPE_F32, dst0[c], val0, src2);
2390       }
2391       break;
2392    case TGSI_OPCODE_SLT:
2393    case TGSI_OPCODE_SGE:
2394    case TGSI_OPCODE_SEQ:
2395    case TGSI_OPCODE_SFL:
2396    case TGSI_OPCODE_SGT:
2397    case TGSI_OPCODE_SLE:
2398    case TGSI_OPCODE_SNE:
2399    case TGSI_OPCODE_STR:
2400    case TGSI_OPCODE_FSEQ:
2401    case TGSI_OPCODE_FSGE:
2402    case TGSI_OPCODE_FSLT:
2403    case TGSI_OPCODE_FSNE:
2404    case TGSI_OPCODE_ISGE:
2405    case TGSI_OPCODE_ISLT:
2406    case TGSI_OPCODE_USEQ:
2407    case TGSI_OPCODE_USGE:
2408    case TGSI_OPCODE_USLT:
2409    case TGSI_OPCODE_USNE:
2410       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2411          src0 = fetchSrc(0, c);
2412          src1 = fetchSrc(1, c);
2413          mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], srcTy, src0, src1);
2414       }
2415       break;
2416    case TGSI_OPCODE_KILL_IF:
2417       val0 = new_LValue(func, FILE_PREDICATE);
2418       for (c = 0; c < 4; ++c) {
2419          mkCmp(OP_SET, CC_LT, TYPE_F32, val0, TYPE_F32, fetchSrc(0, c), zero);
2420          mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0);
2421       }
2422       break;
2423    case TGSI_OPCODE_KILL:
2424       mkOp(OP_DISCARD, TYPE_NONE, NULL);
2425       break;
2426    case TGSI_OPCODE_TEX:
2427    case TGSI_OPCODE_TXB:
2428    case TGSI_OPCODE_TXL:
2429    case TGSI_OPCODE_TXP:
2430       //              R  S     L     C    Dx    Dy
2431       handleTEX(dst0, 1, 1, 0x03, 0x0f, 0x00, 0x00);
2432       break;
2433    case TGSI_OPCODE_TXD:
2434       handleTEX(dst0, 3, 3, 0x03, 0x0f, 0x10, 0x20);
2435       break;
2436    case TGSI_OPCODE_TEX2:
2437       handleTEX(dst0, 2, 2, 0x03, 0x10, 0x00, 0x00);
2438       break;
2439    case TGSI_OPCODE_TXB2:
2440    case TGSI_OPCODE_TXL2:
2441       handleTEX(dst0, 2, 2, 0x10, 0x11, 0x00, 0x00);
2442       break;
2443    case TGSI_OPCODE_SAMPLE:
2444    case TGSI_OPCODE_SAMPLE_B:
2445    case TGSI_OPCODE_SAMPLE_D:
2446    case TGSI_OPCODE_SAMPLE_L:
2447    case TGSI_OPCODE_SAMPLE_C:
2448    case TGSI_OPCODE_SAMPLE_C_LZ:
2449       handleTEX(dst0, 1, 2, 0x30, 0x30, 0x30, 0x40);
2450       break;
2451    case TGSI_OPCODE_TXF:
2452       handleTXF(dst0, 1, 0x03);
2453       break;
2454    case TGSI_OPCODE_SAMPLE_I:
2455       handleTXF(dst0, 1, 0x03);
2456       break;
2457    case TGSI_OPCODE_SAMPLE_I_MS:
2458       handleTXF(dst0, 1, 0x20);
2459       break;
2460    case TGSI_OPCODE_TXQ:
2461    case TGSI_OPCODE_SVIEWINFO:
2462       handleTXQ(dst0, TXQ_DIMS);
2463       break;
2464    case TGSI_OPCODE_F2I:
2465    case TGSI_OPCODE_F2U:
2466       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2467          mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c))->rnd = ROUND_Z;
2468       break;
2469    case TGSI_OPCODE_I2F:
2470    case TGSI_OPCODE_U2F:
2471       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2472          mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
2473       break;
2474    case TGSI_OPCODE_EMIT:
2475    case TGSI_OPCODE_ENDPRIM:
2476       // get vertex stream if specified (must be immediate)
2477       src0 = tgsi.srcCount() ?
2478          mkImm(tgsi.getSrc(0).getValueU32(0, info)) : zero;
2479       mkOp1(op, TYPE_U32, NULL, src0)->fixed = 1;
2480       break;
2481    case TGSI_OPCODE_IF:
2482    case TGSI_OPCODE_UIF:
2483    {
2484       BasicBlock *ifBB = new BasicBlock(func);
2485
2486       bb->cfg.attach(&ifBB->cfg, Graph::Edge::TREE);
2487       condBBs.push(bb);
2488       joinBBs.push(bb);
2489
2490       mkFlow(OP_BRA, NULL, CC_NOT_P, fetchSrc(0, 0))->setType(srcTy);
2491
2492       setPosition(ifBB, true);
2493    }
2494       break;
2495    case TGSI_OPCODE_ELSE:
2496    {
2497       BasicBlock *elseBB = new BasicBlock(func);
2498       BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2499
2500       forkBB->cfg.attach(&elseBB->cfg, Graph::Edge::TREE);
2501       condBBs.push(bb);
2502
2503       forkBB->getExit()->asFlow()->target.bb = elseBB;
2504       if (!bb->isTerminated())
2505          mkFlow(OP_BRA, NULL, CC_ALWAYS, NULL);
2506
2507       setPosition(elseBB, true);
2508    }
2509       break;
2510    case TGSI_OPCODE_ENDIF:
2511    {
2512       BasicBlock *convBB = new BasicBlock(func);
2513       BasicBlock *prevBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2514       BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(joinBBs.pop().u.p);
2515
2516       if (!bb->isTerminated()) {
2517          // we only want join if none of the clauses ended with CONT/BREAK/RET
2518          if (prevBB->getExit()->op == OP_BRA && joinBBs.getSize() < 6)
2519             insertConvergenceOps(convBB, forkBB);
2520          mkFlow(OP_BRA, convBB, CC_ALWAYS, NULL);
2521          bb->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2522       }
2523
2524       if (prevBB->getExit()->op == OP_BRA) {
2525          prevBB->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2526          prevBB->getExit()->asFlow()->target.bb = convBB;
2527       }
2528       setPosition(convBB, true);
2529    }
2530       break;
2531    case TGSI_OPCODE_BGNLOOP:
2532    {
2533       BasicBlock *lbgnBB = new BasicBlock(func);
2534       BasicBlock *lbrkBB = new BasicBlock(func);
2535
2536       loopBBs.push(lbgnBB);
2537       breakBBs.push(lbrkBB);
2538       if (loopBBs.getSize() > func->loopNestingBound)
2539          func->loopNestingBound++;
2540
2541       mkFlow(OP_PREBREAK, lbrkBB, CC_ALWAYS, NULL);
2542
2543       bb->cfg.attach(&lbgnBB->cfg, Graph::Edge::TREE);
2544       setPosition(lbgnBB, true);
2545       mkFlow(OP_PRECONT, lbgnBB, CC_ALWAYS, NULL);
2546    }
2547       break;
2548    case TGSI_OPCODE_ENDLOOP:
2549    {
2550       BasicBlock *loopBB = reinterpret_cast<BasicBlock *>(loopBBs.pop().u.p);
2551
2552       if (!bb->isTerminated()) {
2553          mkFlow(OP_CONT, loopBB, CC_ALWAYS, NULL);
2554          bb->cfg.attach(&loopBB->cfg, Graph::Edge::BACK);
2555       }
2556       setPosition(reinterpret_cast<BasicBlock *>(breakBBs.pop().u.p), true);
2557    }
2558       break;
2559    case TGSI_OPCODE_BRK:
2560    {
2561       if (bb->isTerminated())
2562          break;
2563       BasicBlock *brkBB = reinterpret_cast<BasicBlock *>(breakBBs.peek().u.p);
2564       mkFlow(OP_BREAK, brkBB, CC_ALWAYS, NULL);
2565       bb->cfg.attach(&brkBB->cfg, Graph::Edge::CROSS);
2566    }
2567       break;
2568    case TGSI_OPCODE_CONT:
2569    {
2570       if (bb->isTerminated())
2571          break;
2572       BasicBlock *contBB = reinterpret_cast<BasicBlock *>(loopBBs.peek().u.p);
2573       mkFlow(OP_CONT, contBB, CC_ALWAYS, NULL);
2574       contBB->explicitCont = true;
2575       bb->cfg.attach(&contBB->cfg, Graph::Edge::BACK);
2576    }
2577       break;
2578    case TGSI_OPCODE_BGNSUB:
2579    {
2580       Subroutine *s = getSubroutine(ip);
2581       BasicBlock *entry = new BasicBlock(s->f);
2582       BasicBlock *leave = new BasicBlock(s->f);
2583
2584       // multiple entrypoints possible, keep the graph connected
2585       if (prog->getType() == Program::TYPE_COMPUTE)
2586          prog->main->call.attach(&s->f->call, Graph::Edge::TREE);
2587
2588       sub.cur = s;
2589       s->f->setEntry(entry);
2590       s->f->setExit(leave);
2591       setPosition(entry, true);
2592       return true;
2593    }
2594    case TGSI_OPCODE_ENDSUB:
2595    {
2596       sub.cur = getSubroutine(prog->main);
2597       setPosition(BasicBlock::get(sub.cur->f->cfg.getRoot()), true);
2598       return true;
2599    }
2600    case TGSI_OPCODE_CAL:
2601    {
2602       Subroutine *s = getSubroutine(tgsi.getLabel());
2603       mkFlow(OP_CALL, s->f, CC_ALWAYS, NULL);
2604       func->call.attach(&s->f->call, Graph::Edge::TREE);
2605       return true;
2606    }
2607    case TGSI_OPCODE_RET:
2608    {
2609       if (bb->isTerminated())
2610          return true;
2611       BasicBlock *leave = BasicBlock::get(func->cfgExit);
2612
2613       if (!isEndOfSubroutine(ip + 1)) {
2614          // insert a PRERET at the entry if this is an early return
2615          // (only needed for sharing code in the epilogue)
2616          BasicBlock *pos = getBB();
2617          setPosition(BasicBlock::get(func->cfg.getRoot()), false);
2618          mkFlow(OP_PRERET, leave, CC_ALWAYS, NULL)->fixed = 1;
2619          setPosition(pos, true);
2620       }
2621       mkFlow(OP_RET, NULL, CC_ALWAYS, NULL)->fixed = 1;
2622       bb->cfg.attach(&leave->cfg, Graph::Edge::CROSS);
2623    }
2624       break;
2625    case TGSI_OPCODE_END:
2626    {
2627       // attach and generate epilogue code
2628       BasicBlock *epilogue = BasicBlock::get(func->cfgExit);
2629       bb->cfg.attach(&epilogue->cfg, Graph::Edge::TREE);
2630       setPosition(epilogue, true);
2631       if (prog->getType() == Program::TYPE_FRAGMENT)
2632          exportOutputs();
2633       if (info->io.genUserClip > 0)
2634          handleUserClipPlanes();
2635       mkOp(OP_EXIT, TYPE_NONE, NULL)->terminator = 1;
2636    }
2637       break;
2638    case TGSI_OPCODE_SWITCH:
2639    case TGSI_OPCODE_CASE:
2640       ERROR("switch/case opcode encountered, should have been lowered\n");
2641       abort();
2642       break;
2643    case TGSI_OPCODE_LOAD:
2644       handleLOAD(dst0);
2645       break;
2646    case TGSI_OPCODE_STORE:
2647       handleSTORE();
2648       break;
2649    case TGSI_OPCODE_BARRIER:
2650       geni = mkOp2(OP_BAR, TYPE_U32, NULL, mkImm(0), mkImm(0));
2651       geni->fixed = 1;
2652       geni->subOp = NV50_IR_SUBOP_BAR_SYNC;
2653       break;
2654    case TGSI_OPCODE_MFENCE:
2655    case TGSI_OPCODE_LFENCE:
2656    case TGSI_OPCODE_SFENCE:
2657       geni = mkOp(OP_MEMBAR, TYPE_NONE, NULL);
2658       geni->fixed = 1;
2659       geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode());
2660       break;
2661    case TGSI_OPCODE_ATOMUADD:
2662    case TGSI_OPCODE_ATOMXCHG:
2663    case TGSI_OPCODE_ATOMCAS:
2664    case TGSI_OPCODE_ATOMAND:
2665    case TGSI_OPCODE_ATOMOR:
2666    case TGSI_OPCODE_ATOMXOR:
2667    case TGSI_OPCODE_ATOMUMIN:
2668    case TGSI_OPCODE_ATOMIMIN:
2669    case TGSI_OPCODE_ATOMUMAX:
2670    case TGSI_OPCODE_ATOMIMAX:
2671       handleATOM(dst0, dstTy, tgsi::opcodeToSubOp(tgsi.getOpcode()));
2672       break;
2673    default:
2674       ERROR("unhandled TGSI opcode: %u\n", tgsi.getOpcode());
2675       assert(0);
2676       break;
2677    }
2678
2679    if (tgsi.dstCount()) {
2680       for (c = 0; c < 4; ++c) {
2681          if (!dst0[c])
2682             continue;
2683          if (dst0[c] != rDst0[c])
2684             mkMov(rDst0[c], dst0[c]);
2685          storeDst(0, c, rDst0[c]);
2686       }
2687    }
2688    vtxBaseValid = 0;
2689
2690    return true;
2691 }
2692
2693 void
2694 Converter::handleUserClipPlanes()
2695 {
2696    Value *res[8];
2697    int n, i, c;
2698
2699    for (c = 0; c < 4; ++c) {
2700       for (i = 0; i < info->io.genUserClip; ++i) {
2701          Symbol *sym = mkSymbol(FILE_MEMORY_CONST, info->io.ucpCBSlot,
2702                                 TYPE_F32, info->io.ucpBase + i * 16 + c * 4);
2703          Value *ucp = mkLoadv(TYPE_F32, sym, NULL);
2704          if (c == 0)
2705             res[i] = mkOp2v(OP_MUL, TYPE_F32, getScratch(), clipVtx[c], ucp);
2706          else
2707             mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
2708       }
2709    }
2710
2711    const int first = info->numOutputs - (info->io.genUserClip + 3) / 4;
2712
2713    for (i = 0; i < info->io.genUserClip; ++i) {
2714       n = i / 4 + first;
2715       c = i % 4;
2716       Symbol *sym =
2717          mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32, info->out[n].slot[c] * 4);
2718       mkStore(OP_EXPORT, TYPE_F32, sym, NULL, res[i]);
2719    }
2720 }
2721
2722 void
2723 Converter::exportOutputs()
2724 {
2725    for (unsigned int i = 0; i < info->numOutputs; ++i) {
2726       for (unsigned int c = 0; c < 4; ++c) {
2727          if (!oData.exists(sub.cur->values, i, c))
2728             continue;
2729          Symbol *sym = mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32,
2730                                 info->out[i].slot[c] * 4);
2731          Value *val = oData.load(sub.cur->values, i, c, NULL);
2732          if (val)
2733             mkStore(OP_EXPORT, TYPE_F32, sym, NULL, val);
2734       }
2735    }
2736 }
2737
2738 Converter::Converter(Program *ir, const tgsi::Source *code) : BuildUtil(ir),
2739      code(code),
2740      tgsi(NULL),
2741      tData(this), aData(this), pData(this), oData(this)
2742 {
2743    info = code->info;
2744
2745    const DataFile tFile = code->mainTempsInLMem ? FILE_MEMORY_LOCAL : FILE_GPR;
2746
2747    const unsigned tSize = code->fileSize(TGSI_FILE_TEMPORARY);
2748    const unsigned pSize = code->fileSize(TGSI_FILE_PREDICATE);
2749    const unsigned aSize = code->fileSize(TGSI_FILE_ADDRESS);
2750    const unsigned oSize = code->fileSize(TGSI_FILE_OUTPUT);
2751
2752    tData.setup(TGSI_FILE_TEMPORARY, 0, 0, tSize, 4, 4, tFile, 0);
2753    pData.setup(TGSI_FILE_PREDICATE, 0, 0, pSize, 4, 4, FILE_PREDICATE, 0);
2754    aData.setup(TGSI_FILE_ADDRESS, 0, 0, aSize, 4, 4, FILE_GPR, 0);
2755    oData.setup(TGSI_FILE_OUTPUT, 0, 0, oSize, 4, 4, FILE_GPR, 0);
2756
2757    zero = mkImm((uint32_t)0);
2758
2759    vtxBaseValid = 0;
2760 }
2761
2762 Converter::~Converter()
2763 {
2764 }
2765
2766 inline const Converter::Location *
2767 Converter::BindArgumentsPass::getValueLocation(Subroutine *s, Value *v)
2768 {
2769    ValueMap::l_iterator it = s->values.l.find(v);
2770    return it == s->values.l.end() ? NULL : &it->second;
2771 }
2772
2773 template<typename T> inline void
2774 Converter::BindArgumentsPass::updateCallArgs(
2775    Instruction *i, void (Instruction::*setArg)(int, Value *),
2776    T (Function::*proto))
2777 {
2778    Function *g = i->asFlow()->target.fn;
2779    Subroutine *subg = conv.getSubroutine(g);
2780
2781    for (unsigned a = 0; a < (g->*proto).size(); ++a) {
2782       Value *v = (g->*proto)[a].get();
2783       const Converter::Location &l = *getValueLocation(subg, v);
2784       Converter::DataArray *array = conv.getArrayForFile(l.array, l.arrayIdx);
2785
2786       (i->*setArg)(a, array->acquire(sub->values, l.i, l.c));
2787    }
2788 }
2789
2790 template<typename T> inline void
2791 Converter::BindArgumentsPass::updatePrototype(
2792    BitSet *set, void (Function::*updateSet)(), T (Function::*proto))
2793 {
2794    (func->*updateSet)();
2795
2796    for (unsigned i = 0; i < set->getSize(); ++i) {
2797       Value *v = func->getLValue(i);
2798       const Converter::Location *l = getValueLocation(sub, v);
2799
2800       // only include values with a matching TGSI register
2801       if (set->test(i) && l && !conv.code->locals.count(*l))
2802          (func->*proto).push_back(v);
2803    }
2804 }
2805
2806 bool
2807 Converter::BindArgumentsPass::visit(Function *f)
2808 {
2809    sub = conv.getSubroutine(f);
2810
2811    for (ArrayList::Iterator bi = f->allBBlocks.iterator();
2812         !bi.end(); bi.next()) {
2813       for (Instruction *i = BasicBlock::get(bi)->getFirst();
2814            i; i = i->next) {
2815          if (i->op == OP_CALL && !i->asFlow()->builtin) {
2816             updateCallArgs(i, &Instruction::setSrc, &Function::ins);
2817             updateCallArgs(i, &Instruction::setDef, &Function::outs);
2818          }
2819       }
2820    }
2821
2822    if (func == prog->main && prog->getType() != Program::TYPE_COMPUTE)
2823       return true;
2824    updatePrototype(&BasicBlock::get(f->cfg.getRoot())->liveSet,
2825                    &Function::buildLiveSets, &Function::ins);
2826    updatePrototype(&BasicBlock::get(f->cfgExit)->defSet,
2827                    &Function::buildDefSets, &Function::outs);
2828
2829    return true;
2830 }
2831
2832 bool
2833 Converter::run()
2834 {
2835    BasicBlock *entry = new BasicBlock(prog->main);
2836    BasicBlock *leave = new BasicBlock(prog->main);
2837
2838    prog->main->setEntry(entry);
2839    prog->main->setExit(leave);
2840
2841    setPosition(entry, true);
2842    sub.cur = getSubroutine(prog->main);
2843
2844    if (info->io.genUserClip > 0) {
2845       for (int c = 0; c < 4; ++c)
2846          clipVtx[c] = getScratch();
2847    }
2848
2849    if (prog->getType() == Program::TYPE_FRAGMENT) {
2850       Symbol *sv = mkSysVal(SV_POSITION, 3);
2851       fragCoord[3] = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), sv);
2852       mkOp1(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]);
2853    }
2854
2855    for (ip = 0; ip < code->scan.num_instructions; ++ip) {
2856       if (!handleInstruction(&code->insns[ip]))
2857          return false;
2858    }
2859
2860    if (!BindArgumentsPass(*this).run(prog))
2861       return false;
2862
2863    return true;
2864 }
2865
2866 } // unnamed namespace
2867
2868 namespace nv50_ir {
2869
2870 bool
2871 Program::makeFromTGSI(struct nv50_ir_prog_info *info)
2872 {
2873    tgsi::Source src(info);
2874    if (!src.scanSource())
2875       return false;
2876    tlsSize = info->bin.tlsSpace;
2877
2878    Converter builder(this, &src);
2879    return builder.run();
2880 }
2881
2882 } // namespace nv50_ir