src/gallium/drivers/nouveau/codegen/nv50_ir_from_tgsi.cpp

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 extern "C" {
  24 #include "tgsi/tgsi_dump.h"
  25 #include "tgsi/tgsi_scan.h"
  26 #include "tgsi/tgsi_util.h"
  27 }
  28
  29 #include <set>
  30
  31 #include "codegen/nv50_ir.h"
  32 #include "codegen/nv50_ir_util.h"
  33 #include "codegen/nv50_ir_build_util.h"
  34
  35 namespace tgsi {
  36
  37 class Source;
  38
  39 static nv50_ir::operation translateOpcode(uint opcode);
  40 static nv50_ir::DataFile translateFile(uint file);
  41 static nv50_ir::TexTarget translateTexture(uint texTarg);
  42 static nv50_ir::SVSemantic translateSysVal(uint sysval);
  43
  44 class Instruction
  45 {
  46 public:
  47    Instruction(const struct tgsi_full_instruction *inst) : insn(inst) { }
  48
  49    class SrcRegister
  50    {
  51    public:
  52       SrcRegister(const struct tgsi_full_src_register *src)
  53          : reg(src->Register),
  54            fsr(src)
  55       { }
  56
  57       SrcRegister(const struct tgsi_src_register& src) : reg(src), fsr(NULL) { }
  58
  59       SrcRegister(const struct tgsi_ind_register& ind)
  60          : reg(tgsi_util_get_src_from_ind(&ind)),
  61            fsr(NULL)
  62       { }
  63
  64       struct tgsi_src_register offsetToSrc(struct tgsi_texture_offset off)
  65       {
  66          struct tgsi_src_register reg;
  67          memset(&reg, 0, sizeof(reg));
  68          reg.Index = off.Index;
  69          reg.File = off.File;
  70          reg.SwizzleX = off.SwizzleX;
  71          reg.SwizzleY = off.SwizzleY;
  72          reg.SwizzleZ = off.SwizzleZ;
  73          return reg;
  74       }
  75
  76       SrcRegister(const struct tgsi_texture_offset& off) :
  77          reg(offsetToSrc(off)),
  78          fsr(NULL)
  79       { }
  80
  81       uint getFile() const { return reg.File; }
  82
  83       bool is2D() const { return reg.Dimension; }
  84
  85       bool isIndirect(int dim) const
  86       {
  87          return (dim && fsr) ? fsr->Dimension.Indirect : reg.Indirect;
  88       }
  89
  90       int getIndex(int dim) const
  91       {
  92          return (dim && fsr) ? fsr->Dimension.Index : reg.Index;
  93       }
  94
  95       int getSwizzle(int chan) const
  96       {
  97          return tgsi_util_get_src_register_swizzle(&reg, chan);
  98       }
  99
 100       nv50_ir::Modifier getMod(int chan) const;
 101
 102       SrcRegister getIndirect(int dim) const
 103       {
 104          assert(fsr && isIndirect(dim));
 105          if (dim)
 106             return SrcRegister(fsr->DimIndirect);
 107          return SrcRegister(fsr->Indirect);
 108       }
 109
 110       uint32_t getValueU32(int c, const struct nv50_ir_prog_info *info) const
 111       {
 112          assert(reg.File == TGSI_FILE_IMMEDIATE);
 113          assert(!reg.Absolute);
 114          assert(!reg.Negate);
 115          return info->immd.data[reg.Index * 4 + getSwizzle(c)];
 116       }
 117
 118    private:
 119       const struct tgsi_src_register reg;
 120       const struct tgsi_full_src_register *fsr;
 121    };
 122
 123    class DstRegister
 124    {
 125    public:
 126       DstRegister(const struct tgsi_full_dst_register *dst)
 127          : reg(dst->Register),
 128            fdr(dst)
 129       { }
 130
 131       DstRegister(const struct tgsi_dst_register& dst) : reg(dst), fdr(NULL) { }
 132
 133       uint getFile() const { return reg.File; }
 134
 135       bool is2D() const { return reg.Dimension; }
 136
 137       bool isIndirect(int dim) const
 138       {
 139          return (dim && fdr) ? fdr->Dimension.Indirect : reg.Indirect;
 140       }
 141
 142       int getIndex(int dim) const
 143       {
 144          return (dim && fdr) ? fdr->Dimension.Dimension : reg.Index;
 145       }
 146
 147       unsigned int getMask() const { return reg.WriteMask; }
 148
 149       bool isMasked(int chan) const { return !(getMask() & (1 << chan)); }
 150
 151       SrcRegister getIndirect(int dim) const
 152       {
 153          assert(fdr && isIndirect(dim));
 154          if (dim)
 155             return SrcRegister(fdr->DimIndirect);
 156          return SrcRegister(fdr->Indirect);
 157       }
 158
 159    private:
 160       const struct tgsi_dst_register reg;
 161       const struct tgsi_full_dst_register *fdr;
 162    };
 163
 164    inline uint getOpcode() const { return insn->Instruction.Opcode; }
 165
 166    unsigned int srcCount() const { return insn->Instruction.NumSrcRegs; }
 167    unsigned int dstCount() const { return insn->Instruction.NumDstRegs; }
 168
 169    // mask of used components of source s
 170    unsigned int srcMask(unsigned int s) const;
 171
 172    SrcRegister getSrc(unsigned int s) const
 173    {
 174       assert(s < srcCount());
 175       return SrcRegister(&insn->Src[s]);
 176    }
 177
 178    DstRegister getDst(unsigned int d) const
 179    {
 180       assert(d < dstCount());
 181       return DstRegister(&insn->Dst[d]);
 182    }
 183
 184    SrcRegister getTexOffset(unsigned int i) const
 185    {
 186       assert(i < TGSI_FULL_MAX_TEX_OFFSETS);
 187       return SrcRegister(insn->TexOffsets[i]);
 188    }
 189
 190    unsigned int getNumTexOffsets() const { return insn->Texture.NumOffsets; }
 191
 192    bool checkDstSrcAliasing() const;
 193
 194    inline nv50_ir::operation getOP() const {
 195       return translateOpcode(getOpcode()); }
 196
 197    nv50_ir::DataType inferSrcType() const;
 198    nv50_ir::DataType inferDstType() const;
 199
 200    nv50_ir::CondCode getSetCond() const;
 201
 202    nv50_ir::TexInstruction::Target getTexture(const Source *, int s) const;
 203
 204    inline uint getLabel() { return insn->Label.Label; }
 205
 206    unsigned getSaturate() const { return insn->Instruction.Saturate; }
 207
 208    void print() const
 209    {
 210       tgsi_dump_instruction(insn, 1);
 211    }
 212
 213 private:
 214    const struct tgsi_full_instruction *insn;
 215 };
 216
 217 unsigned int Instruction::srcMask(unsigned int s) const
 218 {
 219    unsigned int mask = insn->Dst[0].Register.WriteMask;
 220
 221    switch (insn->Instruction.Opcode) {
 222    case TGSI_OPCODE_COS:
 223    case TGSI_OPCODE_SIN:
 224       return (mask & 0x8) | ((mask & 0x7) ? 0x1 : 0x0);
 225    case TGSI_OPCODE_DP2:
 226       return 0x3;
 227    case TGSI_OPCODE_DP3:
 228       return 0x7;
 229    case TGSI_OPCODE_DP4:
 230    case TGSI_OPCODE_DPH:
 231    case TGSI_OPCODE_KILL_IF: /* WriteMask ignored */
 232       return 0xf;
 233    case TGSI_OPCODE_DST:
 234       return mask & (s ? 0xa : 0x6);
 235    case TGSI_OPCODE_EX2:
 236    case TGSI_OPCODE_EXP:
 237    case TGSI_OPCODE_LG2:
 238    case TGSI_OPCODE_LOG:
 239    case TGSI_OPCODE_POW:
 240    case TGSI_OPCODE_RCP:
 241    case TGSI_OPCODE_RSQ:
 242    case TGSI_OPCODE_SCS:
 243       return 0x1;
 244    case TGSI_OPCODE_IF:
 245    case TGSI_OPCODE_UIF:
 246       return 0x1;
 247    case TGSI_OPCODE_LIT:
 248       return 0xb;
 249    case TGSI_OPCODE_TEX2:
 250    case TGSI_OPCODE_TXB2:
 251    case TGSI_OPCODE_TXL2:
 252       return (s == 0) ? 0xf : 0x3;
 253    case TGSI_OPCODE_TEX:
 254    case TGSI_OPCODE_TXB:
 255    case TGSI_OPCODE_TXD:
 256    case TGSI_OPCODE_TXL:
 257    case TGSI_OPCODE_TXP:
 258    case TGSI_OPCODE_LODQ:
 259    {
 260       const struct tgsi_instruction_texture *tex = &insn->Texture;
 261
 262       assert(insn->Instruction.Texture);
 263
 264       mask = 0x7;
 265       if (insn->Instruction.Opcode != TGSI_OPCODE_TEX &&
 266           insn->Instruction.Opcode != TGSI_OPCODE_TXD)
 267          mask |= 0x8; /* bias, lod or proj */
 268
 269       switch (tex->Texture) {
 270       case TGSI_TEXTURE_1D:
 271          mask &= 0x9;
 272          break;
 273       case TGSI_TEXTURE_SHADOW1D:
 274          mask &= 0xd;
 275          break;
 276       case TGSI_TEXTURE_1D_ARRAY:
 277       case TGSI_TEXTURE_2D:
 278       case TGSI_TEXTURE_RECT:
 279          mask &= 0xb;
 280          break;
 281       case TGSI_TEXTURE_CUBE_ARRAY:
 282       case TGSI_TEXTURE_SHADOW2D_ARRAY:
 283       case TGSI_TEXTURE_SHADOWCUBE:
 284       case TGSI_TEXTURE_SHADOWCUBE_ARRAY:
 285          mask |= 0x8;
 286          break;
 287       default:
 288          break;
 289       }
 290    }
 291       return mask;
 292    case TGSI_OPCODE_XPD:
 293    {
 294       unsigned int x = 0;
 295       if (mask & 1) x |= 0x6;
 296       if (mask & 2) x |= 0x5;
 297       if (mask & 4) x |= 0x3;
 298       return x;
 299    }
 300    default:
 301       break;
 302    }
 303
 304    return mask;
 305 }
 306
 307 nv50_ir::Modifier Instruction::SrcRegister::getMod(int chan) const
 308 {
 309    nv50_ir::Modifier m(0);
 310
 311    if (reg.Absolute)
 312       m = m | nv50_ir::Modifier(NV50_IR_MOD_ABS);
 313    if (reg.Negate)
 314       m = m | nv50_ir::Modifier(NV50_IR_MOD_NEG);
 315    return m;
 316 }
 317
 318 static nv50_ir::DataFile translateFile(uint file)
 319 {
 320    switch (file) {
 321    case TGSI_FILE_CONSTANT:        return nv50_ir::FILE_MEMORY_CONST;
 322    case TGSI_FILE_INPUT:           return nv50_ir::FILE_SHADER_INPUT;
 323    case TGSI_FILE_OUTPUT:          return nv50_ir::FILE_SHADER_OUTPUT;
 324    case TGSI_FILE_TEMPORARY:       return nv50_ir::FILE_GPR;
 325    case TGSI_FILE_ADDRESS:         return nv50_ir::FILE_ADDRESS;
 326    case TGSI_FILE_PREDICATE:       return nv50_ir::FILE_PREDICATE;
 327    case TGSI_FILE_IMMEDIATE:       return nv50_ir::FILE_IMMEDIATE;
 328    case TGSI_FILE_SYSTEM_VALUE:    return nv50_ir::FILE_SYSTEM_VALUE;
 329    case TGSI_FILE_RESOURCE:        return nv50_ir::FILE_MEMORY_GLOBAL;
 330    case TGSI_FILE_SAMPLER:
 331    case TGSI_FILE_NULL:
 332    default:
 333       return nv50_ir::FILE_NULL;
 334    }
 335 }
 336
 337 static nv50_ir::SVSemantic translateSysVal(uint sysval)
 338 {
 339    switch (sysval) {
 340    case TGSI_SEMANTIC_FACE:       return nv50_ir::SV_FACE;
 341    case TGSI_SEMANTIC_PSIZE:      return nv50_ir::SV_POINT_SIZE;
 342    case TGSI_SEMANTIC_PRIMID:     return nv50_ir::SV_PRIMITIVE_ID;
 343    case TGSI_SEMANTIC_INSTANCEID: return nv50_ir::SV_INSTANCE_ID;
 344    case TGSI_SEMANTIC_VERTEXID:   return nv50_ir::SV_VERTEX_ID;
 345    case TGSI_SEMANTIC_GRID_SIZE:  return nv50_ir::SV_NCTAID;
 346    case TGSI_SEMANTIC_BLOCK_ID:   return nv50_ir::SV_CTAID;
 347    case TGSI_SEMANTIC_BLOCK_SIZE: return nv50_ir::SV_NTID;
 348    case TGSI_SEMANTIC_THREAD_ID:  return nv50_ir::SV_TID;
 349    default:
 350       assert(0);
 351       return nv50_ir::SV_CLOCK;
 352    }
 353 }
 354
 355 #define NV50_IR_TEX_TARG_CASE(a, b) \
 356    case TGSI_TEXTURE_##a: return nv50_ir::TEX_TARGET_##b;
 357
 358 static nv50_ir::TexTarget translateTexture(uint tex)
 359 {
 360    switch (tex) {
 361    NV50_IR_TEX_TARG_CASE(1D, 1D);
 362    NV50_IR_TEX_TARG_CASE(2D, 2D);
 363    NV50_IR_TEX_TARG_CASE(2D_MSAA, 2D_MS);
 364    NV50_IR_TEX_TARG_CASE(3D, 3D);
 365    NV50_IR_TEX_TARG_CASE(CUBE, CUBE);
 366    NV50_IR_TEX_TARG_CASE(RECT, RECT);
 367    NV50_IR_TEX_TARG_CASE(1D_ARRAY, 1D_ARRAY);
 368    NV50_IR_TEX_TARG_CASE(2D_ARRAY, 2D_ARRAY);
 369    NV50_IR_TEX_TARG_CASE(2D_ARRAY_MSAA, 2D_MS_ARRAY);
 370    NV50_IR_TEX_TARG_CASE(CUBE_ARRAY, CUBE_ARRAY);
 371    NV50_IR_TEX_TARG_CASE(SHADOW1D, 1D_SHADOW);
 372    NV50_IR_TEX_TARG_CASE(SHADOW2D, 2D_SHADOW);
 373    NV50_IR_TEX_TARG_CASE(SHADOWCUBE, CUBE_SHADOW);
 374    NV50_IR_TEX_TARG_CASE(SHADOWRECT, RECT_SHADOW);
 375    NV50_IR_TEX_TARG_CASE(SHADOW1D_ARRAY, 1D_ARRAY_SHADOW);
 376    NV50_IR_TEX_TARG_CASE(SHADOW2D_ARRAY, 2D_ARRAY_SHADOW);
 377    NV50_IR_TEX_TARG_CASE(SHADOWCUBE_ARRAY, CUBE_ARRAY_SHADOW);
 378    NV50_IR_TEX_TARG_CASE(BUFFER, BUFFER);
 379
 380    case TGSI_TEXTURE_UNKNOWN:
 381    default:
 382       assert(!"invalid texture target");
 383       return nv50_ir::TEX_TARGET_2D;
 384    }
 385 }
 386
 387 nv50_ir::DataType Instruction::inferSrcType() const
 388 {
 389    switch (getOpcode()) {
 390    case TGSI_OPCODE_UIF:
 391    case TGSI_OPCODE_AND:
 392    case TGSI_OPCODE_OR:
 393    case TGSI_OPCODE_XOR:
 394    case TGSI_OPCODE_NOT:
 395    case TGSI_OPCODE_U2F:
 396    case TGSI_OPCODE_UADD:
 397    case TGSI_OPCODE_UDIV:
 398    case TGSI_OPCODE_UMOD:
 399    case TGSI_OPCODE_UMAD:
 400    case TGSI_OPCODE_UMUL:
 401    case TGSI_OPCODE_UMAX:
 402    case TGSI_OPCODE_UMIN:
 403    case TGSI_OPCODE_USEQ:
 404    case TGSI_OPCODE_USGE:
 405    case TGSI_OPCODE_USLT:
 406    case TGSI_OPCODE_USNE:
 407    case TGSI_OPCODE_USHR:
 408    case TGSI_OPCODE_UCMP:
 409    case TGSI_OPCODE_ATOMUADD:
 410    case TGSI_OPCODE_ATOMXCHG:
 411    case TGSI_OPCODE_ATOMCAS:
 412    case TGSI_OPCODE_ATOMAND:
 413    case TGSI_OPCODE_ATOMOR:
 414    case TGSI_OPCODE_ATOMXOR:
 415    case TGSI_OPCODE_ATOMUMIN:
 416    case TGSI_OPCODE_ATOMUMAX:
 417       return nv50_ir::TYPE_U32;
 418    case TGSI_OPCODE_I2F:
 419    case TGSI_OPCODE_IDIV:
 420    case TGSI_OPCODE_IMAX:
 421    case TGSI_OPCODE_IMIN:
 422    case TGSI_OPCODE_IABS:
 423    case TGSI_OPCODE_INEG:
 424    case TGSI_OPCODE_ISGE:
 425    case TGSI_OPCODE_ISHR:
 426    case TGSI_OPCODE_ISLT:
 427    case TGSI_OPCODE_ISSG:
 428    case TGSI_OPCODE_SAD: // not sure about SAD, but no one has a float version
 429    case TGSI_OPCODE_MOD:
 430    case TGSI_OPCODE_UARL:
 431    case TGSI_OPCODE_ATOMIMIN:
 432    case TGSI_OPCODE_ATOMIMAX:
 433       return nv50_ir::TYPE_S32;
 434    default:
 435       return nv50_ir::TYPE_F32;
 436    }
 437 }
 438
 439 nv50_ir::DataType Instruction::inferDstType() const
 440 {
 441    switch (getOpcode()) {
 442    case TGSI_OPCODE_F2U: return nv50_ir::TYPE_U32;
 443    case TGSI_OPCODE_F2I: return nv50_ir::TYPE_S32;
 444    case TGSI_OPCODE_FSEQ:
 445    case TGSI_OPCODE_FSGE:
 446    case TGSI_OPCODE_FSLT:
 447    case TGSI_OPCODE_FSNE:
 448       return nv50_ir::TYPE_U32;
 449    case TGSI_OPCODE_I2F:
 450    case TGSI_OPCODE_U2F:
 451       return nv50_ir::TYPE_F32;
 452    default:
 453       return inferSrcType();
 454    }
 455 }
 456
 457 nv50_ir::CondCode Instruction::getSetCond() const
 458 {
 459    using namespace nv50_ir;
 460
 461    switch (getOpcode()) {
 462    case TGSI_OPCODE_SLT:
 463    case TGSI_OPCODE_ISLT:
 464    case TGSI_OPCODE_USLT:
 465    case TGSI_OPCODE_FSLT:
 466       return CC_LT;
 467    case TGSI_OPCODE_SLE:
 468       return CC_LE;
 469    case TGSI_OPCODE_SGE:
 470    case TGSI_OPCODE_ISGE:
 471    case TGSI_OPCODE_USGE:
 472    case TGSI_OPCODE_FSGE:
 473       return CC_GE;
 474    case TGSI_OPCODE_SGT:
 475       return CC_GT;
 476    case TGSI_OPCODE_SEQ:
 477    case TGSI_OPCODE_USEQ:
 478    case TGSI_OPCODE_FSEQ:
 479       return CC_EQ;
 480    case TGSI_OPCODE_SNE:
 481    case TGSI_OPCODE_FSNE:
 482       return CC_NEU;
 483    case TGSI_OPCODE_USNE:
 484       return CC_NE;
 485    case TGSI_OPCODE_SFL:
 486       return CC_NEVER;
 487    case TGSI_OPCODE_STR:
 488    default:
 489       return CC_ALWAYS;
 490    }
 491 }
 492
 493 #define NV50_IR_OPCODE_CASE(a, b) case TGSI_OPCODE_##a: return nv50_ir::OP_##b
 494
 495 static nv50_ir::operation translateOpcode(uint opcode)
 496 {
 497    switch (opcode) {
 498    NV50_IR_OPCODE_CASE(ARL, SHL);
 499    NV50_IR_OPCODE_CASE(MOV, MOV);
 500
 501    NV50_IR_OPCODE_CASE(RCP, RCP);
 502    NV50_IR_OPCODE_CASE(RSQ, RSQ);
 503
 504    NV50_IR_OPCODE_CASE(MUL, MUL);
 505    NV50_IR_OPCODE_CASE(ADD, ADD);
 506
 507    NV50_IR_OPCODE_CASE(MIN, MIN);
 508    NV50_IR_OPCODE_CASE(MAX, MAX);
 509    NV50_IR_OPCODE_CASE(SLT, SET);
 510    NV50_IR_OPCODE_CASE(SGE, SET);
 511    NV50_IR_OPCODE_CASE(MAD, MAD);
 512    NV50_IR_OPCODE_CASE(SUB, SUB);
 513
 514    NV50_IR_OPCODE_CASE(FLR, FLOOR);
 515    NV50_IR_OPCODE_CASE(ROUND, CVT);
 516    NV50_IR_OPCODE_CASE(EX2, EX2);
 517    NV50_IR_OPCODE_CASE(LG2, LG2);
 518    NV50_IR_OPCODE_CASE(POW, POW);
 519
 520    NV50_IR_OPCODE_CASE(ABS, ABS);
 521
 522    NV50_IR_OPCODE_CASE(COS, COS);
 523    NV50_IR_OPCODE_CASE(DDX, DFDX);
 524    NV50_IR_OPCODE_CASE(DDY, DFDY);
 525    NV50_IR_OPCODE_CASE(KILL, DISCARD);
 526
 527    NV50_IR_OPCODE_CASE(SEQ, SET);
 528    NV50_IR_OPCODE_CASE(SFL, SET);
 529    NV50_IR_OPCODE_CASE(SGT, SET);
 530    NV50_IR_OPCODE_CASE(SIN, SIN);
 531    NV50_IR_OPCODE_CASE(SLE, SET);
 532    NV50_IR_OPCODE_CASE(SNE, SET);
 533    NV50_IR_OPCODE_CASE(STR, SET);
 534    NV50_IR_OPCODE_CASE(TEX, TEX);
 535    NV50_IR_OPCODE_CASE(TXD, TXD);
 536    NV50_IR_OPCODE_CASE(TXP, TEX);
 537
 538    NV50_IR_OPCODE_CASE(BRA, BRA);
 539    NV50_IR_OPCODE_CASE(CAL, CALL);
 540    NV50_IR_OPCODE_CASE(RET, RET);
 541    NV50_IR_OPCODE_CASE(CMP, SLCT);
 542
 543    NV50_IR_OPCODE_CASE(TXB, TXB);
 544
 545    NV50_IR_OPCODE_CASE(DIV, DIV);
 546
 547    NV50_IR_OPCODE_CASE(TXL, TXL);
 548
 549    NV50_IR_OPCODE_CASE(CEIL, CEIL);
 550    NV50_IR_OPCODE_CASE(I2F, CVT);
 551    NV50_IR_OPCODE_CASE(NOT, NOT);
 552    NV50_IR_OPCODE_CASE(TRUNC, TRUNC);
 553    NV50_IR_OPCODE_CASE(SHL, SHL);
 554
 555    NV50_IR_OPCODE_CASE(AND, AND);
 556    NV50_IR_OPCODE_CASE(OR, OR);
 557    NV50_IR_OPCODE_CASE(MOD, MOD);
 558    NV50_IR_OPCODE_CASE(XOR, XOR);
 559    NV50_IR_OPCODE_CASE(SAD, SAD);
 560    NV50_IR_OPCODE_CASE(TXF, TXF);
 561    NV50_IR_OPCODE_CASE(TXQ, TXQ);
 562    NV50_IR_OPCODE_CASE(TG4, TXG);
 563    NV50_IR_OPCODE_CASE(LODQ, TXLQ);
 564
 565    NV50_IR_OPCODE_CASE(EMIT, EMIT);
 566    NV50_IR_OPCODE_CASE(ENDPRIM, RESTART);
 567
 568    NV50_IR_OPCODE_CASE(KILL_IF, DISCARD);
 569
 570    NV50_IR_OPCODE_CASE(F2I, CVT);
 571    NV50_IR_OPCODE_CASE(FSEQ, SET);
 572    NV50_IR_OPCODE_CASE(FSGE, SET);
 573    NV50_IR_OPCODE_CASE(FSLT, SET);
 574    NV50_IR_OPCODE_CASE(FSNE, SET);
 575    NV50_IR_OPCODE_CASE(IDIV, DIV);
 576    NV50_IR_OPCODE_CASE(IMAX, MAX);
 577    NV50_IR_OPCODE_CASE(IMIN, MIN);
 578    NV50_IR_OPCODE_CASE(IABS, ABS);
 579    NV50_IR_OPCODE_CASE(INEG, NEG);
 580    NV50_IR_OPCODE_CASE(ISGE, SET);
 581    NV50_IR_OPCODE_CASE(ISHR, SHR);
 582    NV50_IR_OPCODE_CASE(ISLT, SET);
 583    NV50_IR_OPCODE_CASE(F2U, CVT);
 584    NV50_IR_OPCODE_CASE(U2F, CVT);
 585    NV50_IR_OPCODE_CASE(UADD, ADD);
 586    NV50_IR_OPCODE_CASE(UDIV, DIV);
 587    NV50_IR_OPCODE_CASE(UMAD, MAD);
 588    NV50_IR_OPCODE_CASE(UMAX, MAX);
 589    NV50_IR_OPCODE_CASE(UMIN, MIN);
 590    NV50_IR_OPCODE_CASE(UMOD, MOD);
 591    NV50_IR_OPCODE_CASE(UMUL, MUL);
 592    NV50_IR_OPCODE_CASE(USEQ, SET);
 593    NV50_IR_OPCODE_CASE(USGE, SET);
 594    NV50_IR_OPCODE_CASE(USHR, SHR);
 595    NV50_IR_OPCODE_CASE(USLT, SET);
 596    NV50_IR_OPCODE_CASE(USNE, SET);
 597
 598    NV50_IR_OPCODE_CASE(SAMPLE, TEX);
 599    NV50_IR_OPCODE_CASE(SAMPLE_B, TXB);
 600    NV50_IR_OPCODE_CASE(SAMPLE_C, TEX);
 601    NV50_IR_OPCODE_CASE(SAMPLE_C_LZ, TEX);
 602    NV50_IR_OPCODE_CASE(SAMPLE_D, TXD);
 603    NV50_IR_OPCODE_CASE(SAMPLE_L, TXL);
 604    NV50_IR_OPCODE_CASE(SAMPLE_I, TXF);
 605    NV50_IR_OPCODE_CASE(SAMPLE_I_MS, TXF);
 606    NV50_IR_OPCODE_CASE(GATHER4, TXG);
 607    NV50_IR_OPCODE_CASE(SVIEWINFO, TXQ);
 608
 609    NV50_IR_OPCODE_CASE(ATOMUADD, ATOM);
 610    NV50_IR_OPCODE_CASE(ATOMXCHG, ATOM);
 611    NV50_IR_OPCODE_CASE(ATOMCAS, ATOM);
 612    NV50_IR_OPCODE_CASE(ATOMAND, ATOM);
 613    NV50_IR_OPCODE_CASE(ATOMOR, ATOM);
 614    NV50_IR_OPCODE_CASE(ATOMXOR, ATOM);
 615    NV50_IR_OPCODE_CASE(ATOMUMIN, ATOM);
 616    NV50_IR_OPCODE_CASE(ATOMUMAX, ATOM);
 617    NV50_IR_OPCODE_CASE(ATOMIMIN, ATOM);
 618    NV50_IR_OPCODE_CASE(ATOMIMAX, ATOM);
 619
 620    NV50_IR_OPCODE_CASE(TEX2, TEX);
 621    NV50_IR_OPCODE_CASE(TXB2, TXB);
 622    NV50_IR_OPCODE_CASE(TXL2, TXL);
 623
 624    NV50_IR_OPCODE_CASE(END, EXIT);
 625
 626    default:
 627       return nv50_ir::OP_NOP;
 628    }
 629 }
 630
 631 static uint16_t opcodeToSubOp(uint opcode)
 632 {
 633    switch (opcode) {
 634    case TGSI_OPCODE_LFENCE:   return NV50_IR_SUBOP_MEMBAR(L, GL);
 635    case TGSI_OPCODE_SFENCE:   return NV50_IR_SUBOP_MEMBAR(S, GL);
 636    case TGSI_OPCODE_MFENCE:   return NV50_IR_SUBOP_MEMBAR(M, GL);
 637    case TGSI_OPCODE_ATOMUADD: return NV50_IR_SUBOP_ATOM_ADD;
 638    case TGSI_OPCODE_ATOMXCHG: return NV50_IR_SUBOP_ATOM_EXCH;
 639    case TGSI_OPCODE_ATOMCAS:  return NV50_IR_SUBOP_ATOM_CAS;
 640    case TGSI_OPCODE_ATOMAND:  return NV50_IR_SUBOP_ATOM_AND;
 641    case TGSI_OPCODE_ATOMOR:   return NV50_IR_SUBOP_ATOM_OR;
 642    case TGSI_OPCODE_ATOMXOR:  return NV50_IR_SUBOP_ATOM_XOR;
 643    case TGSI_OPCODE_ATOMUMIN: return NV50_IR_SUBOP_ATOM_MIN;
 644    case TGSI_OPCODE_ATOMIMIN: return NV50_IR_SUBOP_ATOM_MIN;
 645    case TGSI_OPCODE_ATOMUMAX: return NV50_IR_SUBOP_ATOM_MAX;
 646    case TGSI_OPCODE_ATOMIMAX: return NV50_IR_SUBOP_ATOM_MAX;
 647    default:
 648       return 0;
 649    }
 650 }
 651
 652 bool Instruction::checkDstSrcAliasing() const
 653 {
 654    if (insn->Dst[0].Register.Indirect) // no danger if indirect, using memory
 655       return false;
 656
 657    for (int s = 0; s < TGSI_FULL_MAX_SRC_REGISTERS; ++s) {
 658       if (insn->Src[s].Register.File == TGSI_FILE_NULL)
 659          break;
 660       if (insn->Src[s].Register.File == insn->Dst[0].Register.File &&
 661           insn->Src[s].Register.Index == insn->Dst[0].Register.Index)
 662          return true;
 663    }
 664    return false;
 665 }
 666
 667 class Source
 668 {
 669 public:
 670    Source(struct nv50_ir_prog_info *);
 671    ~Source();
 672
 673 public:
 674    bool scanSource();
 675    unsigned fileSize(unsigned file) const { return scan.file_max[file] + 1; }
 676
 677 public:
 678    struct tgsi_shader_info scan;
 679    struct tgsi_full_instruction *insns;
 680    const struct tgsi_token *tokens;
 681    struct nv50_ir_prog_info *info;
 682
 683    nv50_ir::DynArray tempArrays;
 684    nv50_ir::DynArray immdArrays;
 685
 686    typedef nv50_ir::BuildUtil::Location Location;
 687    // these registers are per-subroutine, cannot be used for parameter passing
 688    std::set<Location> locals;
 689
 690    bool mainTempsInLMem;
 691
 692    int clipVertexOutput;
 693
 694    struct TextureView {
 695       uint8_t target; // TGSI_TEXTURE_*
 696    };
 697    std::vector<TextureView> textureViews;
 698
 699    struct Resource {
 700       uint8_t target; // TGSI_TEXTURE_*
 701       bool raw;
 702       uint8_t slot; // $surface index
 703    };
 704    std::vector<Resource> resources;
 705
 706 private:
 707    int inferSysValDirection(unsigned sn) const;
 708    bool scanDeclaration(const struct tgsi_full_declaration *);
 709    bool scanInstruction(const struct tgsi_full_instruction *);
 710    void scanProperty(const struct tgsi_full_property *);
 711    void scanImmediate(const struct tgsi_full_immediate *);
 712
 713    inline bool isEdgeFlagPassthrough(const Instruction&) const;
 714 };
 715
 716 Source::Source(struct nv50_ir_prog_info *prog) : info(prog)
 717 {
 718    tokens = (const struct tgsi_token *)info->bin.source;
 719
 720    if (prog->dbgFlags & NV50_IR_DEBUG_BASIC)
 721       tgsi_dump(tokens, 0);
 722
 723    mainTempsInLMem = FALSE;
 724 }
 725
 726 Source::~Source()
 727 {
 728    if (insns)
 729       FREE(insns);
 730
 731    if (info->immd.data)
 732       FREE(info->immd.data);
 733    if (info->immd.type)
 734       FREE(info->immd.type);
 735 }
 736
 737 bool Source::scanSource()
 738 {
 739    unsigned insnCount = 0;
 740    struct tgsi_parse_context parse;
 741
 742    tgsi_scan_shader(tokens, &scan);
 743
 744    insns = (struct tgsi_full_instruction *)MALLOC(scan.num_instructions *
 745                                                   sizeof(insns[0]));
 746    if (!insns)
 747       return false;
 748
 749    clipVertexOutput = -1;
 750
 751    textureViews.resize(scan.file_max[TGSI_FILE_SAMPLER_VIEW] + 1);
 752    resources.resize(scan.file_max[TGSI_FILE_RESOURCE] + 1);
 753
 754    info->immd.bufSize = 0;
 755
 756    info->numInputs = scan.file_max[TGSI_FILE_INPUT] + 1;
 757    info->numOutputs = scan.file_max[TGSI_FILE_OUTPUT] + 1;
 758    info->numSysVals = scan.file_max[TGSI_FILE_SYSTEM_VALUE] + 1;
 759
 760    if (info->type == PIPE_SHADER_FRAGMENT) {
 761       info->prop.fp.writesDepth = scan.writes_z;
 762       info->prop.fp.usesDiscard = scan.uses_kill;
 763    } else
 764    if (info->type == PIPE_SHADER_GEOMETRY) {
 765       info->prop.gp.instanceCount = 1; // default value
 766    }
 767
 768    info->immd.data = (uint32_t *)MALLOC(scan.immediate_count * 16);
 769    info->immd.type = (ubyte *)MALLOC(scan.immediate_count * sizeof(ubyte));
 770
 771    tgsi_parse_init(&parse, tokens);
 772    while (!tgsi_parse_end_of_tokens(&parse)) {
 773       tgsi_parse_token(&parse);
 774
 775       switch (parse.FullToken.Token.Type) {
 776       case TGSI_TOKEN_TYPE_IMMEDIATE:
 777          scanImmediate(&parse.FullToken.FullImmediate);
 778          break;
 779       case TGSI_TOKEN_TYPE_DECLARATION:
 780          scanDeclaration(&parse.FullToken.FullDeclaration);
 781          break;
 782       case TGSI_TOKEN_TYPE_INSTRUCTION:
 783          insns[insnCount++] = parse.FullToken.FullInstruction;
 784          scanInstruction(&parse.FullToken.FullInstruction);
 785          break;
 786       case TGSI_TOKEN_TYPE_PROPERTY:
 787          scanProperty(&parse.FullToken.FullProperty);
 788          break;
 789       default:
 790          INFO("unknown TGSI token type: %d\n", parse.FullToken.Token.Type);
 791          break;
 792       }
 793    }
 794    tgsi_parse_free(&parse);
 795
 796    if (mainTempsInLMem)
 797       info->bin.tlsSpace += (scan.file_max[TGSI_FILE_TEMPORARY] + 1) * 16;
 798
 799    if (info->io.genUserClip > 0) {
 800       info->io.clipDistanceMask = (1 << info->io.genUserClip) - 1;
 801
 802       const unsigned int nOut = (info->io.genUserClip + 3) / 4;
 803
 804       for (unsigned int n = 0; n < nOut; ++n) {
 805          unsigned int i = info->numOutputs++;
 806          info->out[i].id = i;
 807          info->out[i].sn = TGSI_SEMANTIC_CLIPDIST;
 808          info->out[i].si = n;
 809          info->out[i].mask = info->io.clipDistanceMask >> (n * 4);
 810       }
 811    }
 812
 813    return info->assignSlots(info) == 0;
 814 }
 815
 816 void Source::scanProperty(const struct tgsi_full_property *prop)
 817 {
 818    switch (prop->Property.PropertyName) {
 819    case TGSI_PROPERTY_GS_OUTPUT_PRIM:
 820       info->prop.gp.outputPrim = prop->u[0].Data;
 821       break;
 822    case TGSI_PROPERTY_GS_INPUT_PRIM:
 823       info->prop.gp.inputPrim = prop->u[0].Data;
 824       break;
 825    case TGSI_PROPERTY_GS_MAX_OUTPUT_VERTICES:
 826       info->prop.gp.maxVertices = prop->u[0].Data;
 827       break;
 828 #if 0
 829    case TGSI_PROPERTY_GS_INSTANCE_COUNT:
 830       info->prop.gp.instanceCount = prop->u[0].Data;
 831       break;
 832 #endif
 833    case TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS:
 834       info->prop.fp.separateFragData = TRUE;
 835       break;
 836    case TGSI_PROPERTY_FS_COORD_ORIGIN:
 837    case TGSI_PROPERTY_FS_COORD_PIXEL_CENTER:
 838       // we don't care
 839       break;
 840    case TGSI_PROPERTY_VS_PROHIBIT_UCPS:
 841       info->io.genUserClip = -1;
 842       break;
 843    default:
 844       INFO("unhandled TGSI property %d\n", prop->Property.PropertyName);
 845       break;
 846    }
 847 }
 848
 849 void Source::scanImmediate(const struct tgsi_full_immediate *imm)
 850 {
 851    const unsigned n = info->immd.count++;
 852
 853    assert(n < scan.immediate_count);
 854
 855    for (int c = 0; c < 4; ++c)
 856       info->immd.data[n * 4 + c] = imm->u[c].Uint;
 857
 858    info->immd.type[n] = imm->Immediate.DataType;
 859 }
 860
 861 int Source::inferSysValDirection(unsigned sn) const
 862 {
 863    switch (sn) {
 864    case TGSI_SEMANTIC_INSTANCEID:
 865    case TGSI_SEMANTIC_VERTEXID:
 866       return 1;
 867    case TGSI_SEMANTIC_LAYER:
 868 #if 0
 869    case TGSI_SEMANTIC_VIEWPORTINDEX:
 870       return 0;
 871 #endif
 872    case TGSI_SEMANTIC_PRIMID:
 873       return (info->type == PIPE_SHADER_FRAGMENT) ? 1 : 0;
 874    default:
 875       return 0;
 876    }
 877 }
 878
 879 bool Source::scanDeclaration(const struct tgsi_full_declaration *decl)
 880 {
 881    unsigned i, c;
 882    unsigned sn = TGSI_SEMANTIC_GENERIC;
 883    unsigned si = 0;
 884    const unsigned first = decl->Range.First, last = decl->Range.Last;
 885
 886    if (decl->Declaration.Semantic) {
 887       sn = decl->Semantic.Name;
 888       si = decl->Semantic.Index;
 889    }
 890
 891    if (decl->Declaration.Local) {
 892       for (i = first; i <= last; ++i) {
 893          for (c = 0; c < 4; ++c) {
 894             locals.insert(
 895                Location(decl->Declaration.File, decl->Dim.Index2D, i, c));
 896          }
 897       }
 898    }
 899
 900    switch (decl->Declaration.File) {
 901    case TGSI_FILE_INPUT:
 902       if (info->type == PIPE_SHADER_VERTEX) {
 903          // all vertex attributes are equal
 904          for (i = first; i <= last; ++i) {
 905             info->in[i].sn = TGSI_SEMANTIC_GENERIC;
 906             info->in[i].si = i;
 907          }
 908       } else {
 909          for (i = first; i <= last; ++i, ++si) {
 910             info->in[i].id = i;
 911             info->in[i].sn = sn;
 912             info->in[i].si = si;
 913             if (info->type == PIPE_SHADER_FRAGMENT) {
 914                // translate interpolation mode
 915                switch (decl->Interp.Interpolate) {
 916                case TGSI_INTERPOLATE_CONSTANT:
 917                   info->in[i].flat = 1;
 918                   break;
 919                case TGSI_INTERPOLATE_COLOR:
 920                   info->in[i].sc = 1;
 921                   break;
 922                case TGSI_INTERPOLATE_LINEAR:
 923                   info->in[i].linear = 1;
 924                   break;
 925                default:
 926                   break;
 927                }
 928                if (decl->Interp.Centroid)
 929                   info->in[i].centroid = 1;
 930             }
 931          }
 932       }
 933       break;
 934    case TGSI_FILE_OUTPUT:
 935       for (i = first; i <= last; ++i, ++si) {
 936          switch (sn) {
 937          case TGSI_SEMANTIC_POSITION:
 938             if (info->type == PIPE_SHADER_FRAGMENT)
 939                info->io.fragDepth = i;
 940             else
 941             if (clipVertexOutput < 0)
 942                clipVertexOutput = i;
 943             break;
 944          case TGSI_SEMANTIC_COLOR:
 945             if (info->type == PIPE_SHADER_FRAGMENT)
 946                info->prop.fp.numColourResults++;
 947             break;
 948          case TGSI_SEMANTIC_EDGEFLAG:
 949             info->io.edgeFlagOut = i;
 950             break;
 951          case TGSI_SEMANTIC_CLIPVERTEX:
 952             clipVertexOutput = i;
 953             break;
 954          case TGSI_SEMANTIC_CLIPDIST:
 955             info->io.clipDistanceMask |=
 956                decl->Declaration.UsageMask << (si * 4);
 957             info->io.genUserClip = -1;
 958             break;
 959          default:
 960             break;
 961          }
 962          info->out[i].id = i;
 963          info->out[i].sn = sn;
 964          info->out[i].si = si;
 965       }
 966       break;
 967    case TGSI_FILE_SYSTEM_VALUE:
 968       switch (sn) {
 969       case TGSI_SEMANTIC_INSTANCEID:
 970          info->io.instanceId = first;
 971          break;
 972       case TGSI_SEMANTIC_VERTEXID:
 973          info->io.vertexId = first;
 974          break;
 975       default:
 976          break;
 977       }
 978       for (i = first; i <= last; ++i, ++si) {
 979          info->sv[i].sn = sn;
 980          info->sv[i].si = si;
 981          info->sv[i].input = inferSysValDirection(sn);
 982       }
 983       break;
 984    case TGSI_FILE_RESOURCE:
 985       for (i = first; i <= last; ++i) {
 986          resources[i].target = decl->Resource.Resource;
 987          resources[i].raw = decl->Resource.Raw;
 988          resources[i].slot = i;
 989       }
 990       break;
 991    case TGSI_FILE_SAMPLER_VIEW:
 992       for (i = first; i <= last; ++i)
 993          textureViews[i].target = decl->SamplerView.Resource;
 994       break;
 995    case TGSI_FILE_NULL:
 996    case TGSI_FILE_TEMPORARY:
 997    case TGSI_FILE_ADDRESS:
 998    case TGSI_FILE_CONSTANT:
 999    case TGSI_FILE_IMMEDIATE:
1000    case TGSI_FILE_PREDICATE:
1001    case TGSI_FILE_SAMPLER:
1002       break;
1003    default:
1004       ERROR("unhandled TGSI_FILE %d\n", decl->Declaration.File);
1005       return false;
1006    }
1007    return true;
1008 }
1009
1010 inline bool Source::isEdgeFlagPassthrough(const Instruction& insn) const
1011 {
1012    return insn.getOpcode() == TGSI_OPCODE_MOV &&
1013       insn.getDst(0).getIndex(0) == info->io.edgeFlagOut &&
1014       insn.getSrc(0).getFile() == TGSI_FILE_INPUT;
1015 }
1016
1017 bool Source::scanInstruction(const struct tgsi_full_instruction *inst)
1018 {
1019    Instruction insn(inst);
1020
1021    if (insn.getOpcode() == TGSI_OPCODE_BARRIER)
1022       info->numBarriers = 1;
1023
1024    if (insn.dstCount()) {
1025       if (insn.getDst(0).getFile() == TGSI_FILE_OUTPUT) {
1026          Instruction::DstRegister dst = insn.getDst(0);
1027
1028          if (dst.isIndirect(0))
1029             for (unsigned i = 0; i < info->numOutputs; ++i)
1030                info->out[i].mask = 0xf;
1031          else
1032             info->out[dst.getIndex(0)].mask |= dst.getMask();
1033
1034          if (info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_PSIZE ||
1035              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_PRIMID ||
1036              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_LAYER ||
1037              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_VIEWPORT_INDEX ||
1038              info->out[dst.getIndex(0)].sn == TGSI_SEMANTIC_FOG)
1039             info->out[dst.getIndex(0)].mask &= 1;
1040
1041          if (isEdgeFlagPassthrough(insn))
1042             info->io.edgeFlagIn = insn.getSrc(0).getIndex(0);
1043       } else
1044       if (insn.getDst(0).getFile() == TGSI_FILE_TEMPORARY) {
1045          if (insn.getDst(0).isIndirect(0))
1046             mainTempsInLMem = TRUE;
1047       }
1048    }
1049
1050    for (unsigned s = 0; s < insn.srcCount(); ++s) {
1051       Instruction::SrcRegister src = insn.getSrc(s);
1052       if (src.getFile() == TGSI_FILE_TEMPORARY) {
1053          if (src.isIndirect(0))
1054             mainTempsInLMem = TRUE;
1055       } else
1056       if (src.getFile() == TGSI_FILE_RESOURCE) {
1057          if (src.getIndex(0) == TGSI_RESOURCE_GLOBAL)
1058             info->io.globalAccess |= (insn.getOpcode() == TGSI_OPCODE_LOAD) ?
1059                0x1 : 0x2;
1060       }
1061       if (src.getFile() != TGSI_FILE_INPUT)
1062          continue;
1063       unsigned mask = insn.srcMask(s);
1064
1065       if (src.isIndirect(0)) {
1066          for (unsigned i = 0; i < info->numInputs; ++i)
1067             info->in[i].mask = 0xf;
1068       } else {
1069          const int i = src.getIndex(0);
1070          for (unsigned c = 0; c < 4; ++c) {
1071             if (!(mask & (1 << c)))
1072                continue;
1073             int k = src.getSwizzle(c);
1074             if (k <= TGSI_SWIZZLE_W)
1075                info->in[i].mask |= 1 << k;
1076          }
1077          switch (info->in[i].sn) {
1078          case TGSI_SEMANTIC_PSIZE:
1079          case TGSI_SEMANTIC_PRIMID:
1080          case TGSI_SEMANTIC_FOG:
1081             info->in[i].mask &= 0x1;
1082             break;
1083          case TGSI_SEMANTIC_PCOORD:
1084             info->in[i].mask &= 0x3;
1085             break;
1086          default:
1087             break;
1088          }
1089       }
1090    }
1091    return true;
1092 }
1093
1094 nv50_ir::TexInstruction::Target
1095 Instruction::getTexture(const tgsi::Source *code, int s) const
1096 {
1097    // XXX: indirect access
1098    unsigned int r;
1099
1100    switch (getSrc(s).getFile()) {
1101    case TGSI_FILE_RESOURCE:
1102       r = getSrc(s).getIndex(0);
1103       return translateTexture(code->resources.at(r).target);
1104    case TGSI_FILE_SAMPLER_VIEW:
1105       r = getSrc(s).getIndex(0);
1106       return translateTexture(code->textureViews.at(r).target);
1107    default:
1108       return translateTexture(insn->Texture.Texture);
1109    }
1110 }
1111
1112 } // namespace tgsi
1113
1114 namespace {
1115
1116 using namespace nv50_ir;
1117
1118 class Converter : public BuildUtil
1119 {
1120 public:
1121    Converter(Program *, const tgsi::Source *);
1122    ~Converter();
1123
1124    bool run();
1125
1126 private:
1127    struct Subroutine
1128    {
1129       Subroutine(Function *f) : f(f) { }
1130       Function *f;
1131       ValueMap values;
1132    };
1133
1134    Value *shiftAddress(Value *);
1135    Value *getVertexBase(int s);
1136    DataArray *getArrayForFile(unsigned file, int idx);
1137    Value *fetchSrc(int s, int c);
1138    Value *acquireDst(int d, int c);
1139    void storeDst(int d, int c, Value *);
1140
1141    Value *fetchSrc(const tgsi::Instruction::SrcRegister src, int c, Value *ptr);
1142    void storeDst(const tgsi::Instruction::DstRegister dst, int c,
1143                  Value *val, Value *ptr);
1144
1145    Value *applySrcMod(Value *, int s, int c);
1146
1147    Symbol *makeSym(uint file, int fileIndex, int idx, int c, uint32_t addr);
1148    Symbol *srcToSym(tgsi::Instruction::SrcRegister, int c);
1149    Symbol *dstToSym(tgsi::Instruction::DstRegister, int c);
1150
1151    bool handleInstruction(const struct tgsi_full_instruction *);
1152    void exportOutputs();
1153    inline Subroutine *getSubroutine(unsigned ip);
1154    inline Subroutine *getSubroutine(Function *);
1155    inline bool isEndOfSubroutine(uint ip);
1156
1157    void loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask);
1158
1159    // R,S,L,C,Dx,Dy encode TGSI sources for respective values (0xSf for auto)
1160    void setTexRS(TexInstruction *, unsigned int& s, int R, int S);
1161    void handleTEX(Value *dst0[4], int R, int S, int L, int C, int Dx, int Dy);
1162    void handleTXF(Value *dst0[4], int R, int L_M);
1163    void handleTXQ(Value *dst0[4], enum TexQuery);
1164    void handleLIT(Value *dst0[4]);
1165    void handleUserClipPlanes();
1166
1167    Symbol *getResourceBase(int r);
1168    void getResourceCoords(std::vector<Value *>&, int r, int s);
1169
1170    void handleLOAD(Value *dst0[4]);
1171    void handleSTORE();
1172    void handleATOM(Value *dst0[4], DataType, uint16_t subOp);
1173
1174    Value *interpolate(tgsi::Instruction::SrcRegister, int c, Value *ptr);
1175
1176    void insertConvergenceOps(BasicBlock *conv, BasicBlock *fork);
1177
1178    Value *buildDot(int dim);
1179
1180    class BindArgumentsPass : public Pass {
1181    public:
1182       BindArgumentsPass(Converter &conv) : conv(conv) { }
1183
1184    private:
1185       Converter &conv;
1186       Subroutine *sub;
1187
1188       inline const Location *getValueLocation(Subroutine *, Value *);
1189
1190       template<typename T> inline void
1191       updateCallArgs(Instruction *i, void (Instruction::*setArg)(int, Value *),
1192                      T (Function::*proto));
1193
1194       template<typename T> inline void
1195       updatePrototype(BitSet *set, void (Function::*updateSet)(),
1196                       T (Function::*proto));
1197
1198    protected:
1199       bool visit(Function *);
1200       bool visit(BasicBlock *bb) { return false; }
1201    };
1202
1203 private:
1204    const struct tgsi::Source *code;
1205    const struct nv50_ir_prog_info *info;
1206
1207    struct {
1208       std::map<unsigned, Subroutine> map;
1209       Subroutine *cur;
1210    } sub;
1211
1212    uint ip; // instruction pointer
1213
1214    tgsi::Instruction tgsi;
1215
1216    DataType dstTy;
1217    DataType srcTy;
1218
1219    DataArray tData; // TGSI_FILE_TEMPORARY
1220    DataArray aData; // TGSI_FILE_ADDRESS
1221    DataArray pData; // TGSI_FILE_PREDICATE
1222    DataArray oData; // TGSI_FILE_OUTPUT (if outputs in registers)
1223
1224    Value *zero;
1225    Value *fragCoord[4];
1226    Value *clipVtx[4];
1227
1228    Value *vtxBase[5]; // base address of vertex in primitive (for TP/GP)
1229    uint8_t vtxBaseValid;
1230
1231    Stack condBBs;  // fork BB, then else clause BB
1232    Stack joinBBs;  // fork BB, for inserting join ops on ENDIF
1233    Stack loopBBs;  // loop headers
1234    Stack breakBBs; // end of / after loop
1235 };
1236
1237 Symbol *
1238 Converter::srcToSym(tgsi::Instruction::SrcRegister src, int c)
1239 {
1240    const int swz = src.getSwizzle(c);
1241
1242    return makeSym(src.getFile(),
1243                   src.is2D() ? src.getIndex(1) : 0,
1244                   src.isIndirect(0) ? -1 : src.getIndex(0), swz,
1245                   src.getIndex(0) * 16 + swz * 4);
1246 }
1247
1248 Symbol *
1249 Converter::dstToSym(tgsi::Instruction::DstRegister dst, int c)
1250 {
1251    return makeSym(dst.getFile(),
1252                   dst.is2D() ? dst.getIndex(1) : 0,
1253                   dst.isIndirect(0) ? -1 : dst.getIndex(0), c,
1254                   dst.getIndex(0) * 16 + c * 4);
1255 }
1256
1257 Symbol *
1258 Converter::makeSym(uint tgsiFile, int fileIdx, int idx, int c, uint32_t address)
1259 {
1260    Symbol *sym = new_Symbol(prog, tgsi::translateFile(tgsiFile));
1261
1262    sym->reg.fileIndex = fileIdx;
1263
1264    if (idx >= 0) {
1265       if (sym->reg.file == FILE_SHADER_INPUT)
1266          sym->setOffset(info->in[idx].slot[c] * 4);
1267       else
1268       if (sym->reg.file == FILE_SHADER_OUTPUT)
1269          sym->setOffset(info->out[idx].slot[c] * 4);
1270       else
1271       if (sym->reg.file == FILE_SYSTEM_VALUE)
1272          sym->setSV(tgsi::translateSysVal(info->sv[idx].sn), c);
1273       else
1274          sym->setOffset(address);
1275    } else {
1276       sym->setOffset(address);
1277    }
1278    return sym;
1279 }
1280
1281 static inline uint8_t
1282 translateInterpMode(const struct nv50_ir_varying *var, operation& op)
1283 {
1284    uint8_t mode = NV50_IR_INTERP_PERSPECTIVE;
1285
1286    if (var->flat)
1287       mode = NV50_IR_INTERP_FLAT;
1288    else
1289    if (var->linear)
1290       mode = NV50_IR_INTERP_LINEAR;
1291    else
1292    if (var->sc)
1293       mode = NV50_IR_INTERP_SC;
1294
1295    op = (mode == NV50_IR_INTERP_PERSPECTIVE || mode == NV50_IR_INTERP_SC)
1296       ? OP_PINTERP : OP_LINTERP;
1297
1298    if (var->centroid)
1299       mode |= NV50_IR_INTERP_CENTROID;
1300
1301    return mode;
1302 }
1303
1304 Value *
1305 Converter::interpolate(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1306 {
1307    operation op;
1308
1309    // XXX: no way to know interpolation mode if we don't know what's accessed
1310    const uint8_t mode = translateInterpMode(&info->in[ptr ? 0 :
1311                                                       src.getIndex(0)], op);
1312
1313    Instruction *insn = new_Instruction(func, op, TYPE_F32);
1314
1315    insn->setDef(0, getScratch());
1316    insn->setSrc(0, srcToSym(src, c));
1317    if (op == OP_PINTERP)
1318       insn->setSrc(1, fragCoord[3]);
1319    if (ptr)
1320       insn->setIndirect(0, 0, ptr);
1321
1322    insn->setInterpolate(mode);
1323
1324    bb->insertTail(insn);
1325    return insn->getDef(0);
1326 }
1327
1328 Value *
1329 Converter::applySrcMod(Value *val, int s, int c)
1330 {
1331    Modifier m = tgsi.getSrc(s).getMod(c);
1332    DataType ty = tgsi.inferSrcType();
1333
1334    if (m & Modifier(NV50_IR_MOD_ABS))
1335       val = mkOp1v(OP_ABS, ty, getScratch(), val);
1336
1337    if (m & Modifier(NV50_IR_MOD_NEG))
1338       val = mkOp1v(OP_NEG, ty, getScratch(), val);
1339
1340    return val;
1341 }
1342
1343 Value *
1344 Converter::getVertexBase(int s)
1345 {
1346    assert(s < 5);
1347    if (!(vtxBaseValid & (1 << s))) {
1348       const int index = tgsi.getSrc(s).getIndex(1);
1349       Value *rel = NULL;
1350       if (tgsi.getSrc(s).isIndirect(1))
1351          rel = fetchSrc(tgsi.getSrc(s).getIndirect(1), 0, NULL);
1352       vtxBaseValid |= 1 << s;
1353       vtxBase[s] = mkOp2v(OP_PFETCH, TYPE_U32, getSSA(4, FILE_ADDRESS),
1354                           mkImm(index), rel);
1355    }
1356    return vtxBase[s];
1357 }
1358
1359 Value *
1360 Converter::fetchSrc(int s, int c)
1361 {
1362    Value *res;
1363    Value *ptr = NULL, *dimRel = NULL;
1364
1365    tgsi::Instruction::SrcRegister src = tgsi.getSrc(s);
1366
1367    if (src.isIndirect(0))
1368       ptr = fetchSrc(src.getIndirect(0), 0, NULL);
1369
1370    if (src.is2D()) {
1371       switch (src.getFile()) {
1372       case TGSI_FILE_INPUT:
1373          dimRel = getVertexBase(s);
1374          break;
1375       case TGSI_FILE_CONSTANT:
1376          // on NVC0, this is valid and c{I+J}[k] == cI[(J << 16) + k]
1377          if (src.isIndirect(1))
1378             dimRel = fetchSrc(src.getIndirect(1), 0, 0);
1379          break;
1380       default:
1381          break;
1382       }
1383    }
1384
1385    res = fetchSrc(src, c, ptr);
1386
1387    if (dimRel)
1388       res->getInsn()->setIndirect(0, 1, dimRel);
1389
1390    return applySrcMod(res, s, c);
1391 }
1392
1393 Converter::DataArray *
1394 Converter::getArrayForFile(unsigned file, int idx)
1395 {
1396    switch (file) {
1397    case TGSI_FILE_TEMPORARY:
1398       return &tData;
1399    case TGSI_FILE_PREDICATE:
1400       return &pData;
1401    case TGSI_FILE_ADDRESS:
1402       return &aData;
1403    case TGSI_FILE_OUTPUT:
1404       assert(prog->getType() == Program::TYPE_FRAGMENT);
1405       return &oData;
1406    default:
1407       assert(!"invalid/unhandled TGSI source file");
1408       return NULL;
1409    }
1410 }
1411
1412 Value *
1413 Converter::shiftAddress(Value *index)
1414 {
1415    if (!index)
1416       return NULL;
1417    return mkOp2v(OP_SHL, TYPE_U32, getSSA(4, FILE_ADDRESS), index, mkImm(4));
1418 }
1419
1420 Value *
1421 Converter::fetchSrc(tgsi::Instruction::SrcRegister src, int c, Value *ptr)
1422 {
1423    const int idx2d = src.is2D() ? src.getIndex(1) : 0;
1424    const int idx = src.getIndex(0);
1425    const int swz = src.getSwizzle(c);
1426
1427    switch (src.getFile()) {
1428    case TGSI_FILE_IMMEDIATE:
1429       assert(!ptr);
1430       return loadImm(NULL, info->immd.data[idx * 4 + swz]);
1431    case TGSI_FILE_CONSTANT:
1432       return mkLoadv(TYPE_U32, srcToSym(src, c), shiftAddress(ptr));
1433    case TGSI_FILE_INPUT:
1434       if (prog->getType() == Program::TYPE_FRAGMENT) {
1435          // don't load masked inputs, won't be assigned a slot
1436          if (!ptr && !(info->in[idx].mask & (1 << swz)))
1437             return loadImm(NULL, swz == TGSI_SWIZZLE_W ? 1.0f : 0.0f);
1438          if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_FACE)
1439             return mkOp1v(OP_RDSV, TYPE_F32, getSSA(), mkSysVal(SV_FACE, 0));
1440          return interpolate(src, c, shiftAddress(ptr));
1441       } else
1442       if (prog->getType() == Program::TYPE_GEOMETRY) {
1443          if (!ptr && info->in[idx].sn == TGSI_SEMANTIC_PRIMID)
1444             return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), mkSysVal(SV_PRIMITIVE_ID, 0));
1445          // XXX: This is going to be a problem with scalar arrays, i.e. when
1446          // we cannot assume that the address is given in units of vec4.
1447          //
1448          // nv50 and nvc0 need different things here, so let the lowering
1449          // passes decide what to do with the address
1450          if (ptr)
1451             return mkLoadv(TYPE_U32, srcToSym(src, c), ptr);
1452       }
1453       return mkLoadv(TYPE_U32, srcToSym(src, c), shiftAddress(ptr));
1454    case TGSI_FILE_OUTPUT:
1455       assert(!"load from output file");
1456       return NULL;
1457    case TGSI_FILE_SYSTEM_VALUE:
1458       assert(!ptr);
1459       return mkOp1v(OP_RDSV, TYPE_U32, getSSA(), srcToSym(src, c));
1460    default:
1461       return getArrayForFile(src.getFile(), idx2d)->load(
1462          sub.cur->values, idx, swz, shiftAddress(ptr));
1463    }
1464 }
1465
1466 Value *
1467 Converter::acquireDst(int d, int c)
1468 {
1469    const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1470    const unsigned f = dst.getFile();
1471    const int idx = dst.getIndex(0);
1472    const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1473
1474    if (dst.isMasked(c) || f == TGSI_FILE_RESOURCE)
1475       return NULL;
1476
1477    if (dst.isIndirect(0) ||
1478        f == TGSI_FILE_SYSTEM_VALUE ||
1479        (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT))
1480       return getScratch();
1481
1482    return getArrayForFile(f, idx2d)-> acquire(sub.cur->values, idx, c);
1483 }
1484
1485 void
1486 Converter::storeDst(int d, int c, Value *val)
1487 {
1488    const tgsi::Instruction::DstRegister dst = tgsi.getDst(d);
1489
1490    switch (tgsi.getSaturate()) {
1491    case TGSI_SAT_NONE:
1492       break;
1493    case TGSI_SAT_ZERO_ONE:
1494       mkOp1(OP_SAT, dstTy, val, val);
1495       break;
1496    case TGSI_SAT_MINUS_PLUS_ONE:
1497       mkOp2(OP_MAX, dstTy, val, val, mkImm(-1.0f));
1498       mkOp2(OP_MIN, dstTy, val, val, mkImm(+1.0f));
1499       break;
1500    default:
1501       assert(!"invalid saturation mode");
1502       break;
1503    }
1504
1505    Value *ptr = NULL;
1506    if (dst.isIndirect(0))
1507       ptr = shiftAddress(fetchSrc(dst.getIndirect(0), 0, NULL));
1508
1509    if (info->io.genUserClip > 0 &&
1510        dst.getFile() == TGSI_FILE_OUTPUT &&
1511        !dst.isIndirect(0) && dst.getIndex(0) == code->clipVertexOutput) {
1512       mkMov(clipVtx[c], val);
1513       val = clipVtx[c];
1514    }
1515
1516    storeDst(dst, c, val, ptr);
1517 }
1518
1519 void
1520 Converter::storeDst(const tgsi::Instruction::DstRegister dst, int c,
1521                     Value *val, Value *ptr)
1522 {
1523    const unsigned f = dst.getFile();
1524    const int idx = dst.getIndex(0);
1525    const int idx2d = dst.is2D() ? dst.getIndex(1) : 0;
1526
1527    if (f == TGSI_FILE_SYSTEM_VALUE) {
1528       assert(!ptr);
1529       mkOp2(OP_WRSV, TYPE_U32, NULL, dstToSym(dst, c), val);
1530    } else
1531    if (f == TGSI_FILE_OUTPUT && prog->getType() != Program::TYPE_FRAGMENT) {
1532       if (ptr || (info->out[idx].mask & (1 << c)))
1533          mkStore(OP_EXPORT, TYPE_U32, dstToSym(dst, c), ptr, val);
1534    } else
1535    if (f == TGSI_FILE_TEMPORARY ||
1536        f == TGSI_FILE_PREDICATE ||
1537        f == TGSI_FILE_ADDRESS ||
1538        f == TGSI_FILE_OUTPUT) {
1539       getArrayForFile(f, idx2d)->store(sub.cur->values, idx, c, ptr, val);
1540    } else {
1541       assert(!"invalid dst file");
1542    }
1543 }
1544
1545 #define FOR_EACH_DST_ENABLED_CHANNEL(d, chan, inst) \
1546    for (chan = 0; chan < 4; ++chan)                 \
1547       if (!inst.getDst(d).isMasked(chan))
1548
1549 Value *
1550 Converter::buildDot(int dim)
1551 {
1552    assert(dim > 0);
1553
1554    Value *src0 = fetchSrc(0, 0), *src1 = fetchSrc(1, 0);
1555    Value *dotp = getScratch();
1556
1557    mkOp2(OP_MUL, TYPE_F32, dotp, src0, src1);
1558
1559    for (int c = 1; c < dim; ++c) {
1560       src0 = fetchSrc(0, c);
1561       src1 = fetchSrc(1, c);
1562       mkOp3(OP_MAD, TYPE_F32, dotp, src0, src1, dotp);
1563    }
1564    return dotp;
1565 }
1566
1567 void
1568 Converter::insertConvergenceOps(BasicBlock *conv, BasicBlock *fork)
1569 {
1570    FlowInstruction *join = new_FlowInstruction(func, OP_JOIN, NULL);
1571    join->fixed = 1;
1572    conv->insertHead(join);
1573
1574    fork->joinAt = new_FlowInstruction(func, OP_JOINAT, conv);
1575    fork->insertBefore(fork->getExit(), fork->joinAt);
1576 }
1577
1578 void
1579 Converter::setTexRS(TexInstruction *tex, unsigned int& s, int R, int S)
1580 {
1581    unsigned rIdx = 0, sIdx = 0;
1582
1583    if (R >= 0)
1584       rIdx = tgsi.getSrc(R).getIndex(0);
1585    if (S >= 0)
1586       sIdx = tgsi.getSrc(S).getIndex(0);
1587
1588    tex->setTexture(tgsi.getTexture(code, R), rIdx, sIdx);
1589
1590    if (tgsi.getSrc(R).isIndirect(0)) {
1591       tex->tex.rIndirectSrc = s;
1592       tex->setSrc(s++, fetchSrc(tgsi.getSrc(R).getIndirect(0), 0, NULL));
1593    }
1594    if (S >= 0 && tgsi.getSrc(S).isIndirect(0)) {
1595       tex->tex.sIndirectSrc = s;
1596       tex->setSrc(s++, fetchSrc(tgsi.getSrc(S).getIndirect(0), 0, NULL));
1597    }
1598 }
1599
1600 void
1601 Converter::handleTXQ(Value *dst0[4], enum TexQuery query)
1602 {
1603    TexInstruction *tex = new_TexInstruction(func, OP_TXQ);
1604    tex->tex.query = query;
1605    unsigned int c, d;
1606
1607    for (d = 0, c = 0; c < 4; ++c) {
1608       if (!dst0[c])
1609          continue;
1610       tex->tex.mask |= 1 << c;
1611       tex->setDef(d++, dst0[c]);
1612    }
1613    tex->setSrc((c = 0), fetchSrc(0, 0)); // mip level
1614
1615    setTexRS(tex, c, 1, -1);
1616
1617    bb->insertTail(tex);
1618 }
1619
1620 void
1621 Converter::loadProjTexCoords(Value *dst[4], Value *src[4], unsigned int mask)
1622 {
1623    Value *proj = fetchSrc(0, 3);
1624    Instruction *insn = proj->getUniqueInsn();
1625    int c;
1626
1627    if (insn->op == OP_PINTERP) {
1628       bb->insertTail(insn = cloneForward(func, insn));
1629       insn->op = OP_LINTERP;
1630       insn->setInterpolate(NV50_IR_INTERP_LINEAR | insn->getSampleMode());
1631       insn->setSrc(1, NULL);
1632       proj = insn->getDef(0);
1633    }
1634    proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), proj);
1635
1636    for (c = 0; c < 4; ++c) {
1637       if (!(mask & (1 << c)))
1638          continue;
1639       if ((insn = src[c]->getUniqueInsn())->op != OP_PINTERP)
1640          continue;
1641       mask &= ~(1 << c);
1642
1643       bb->insertTail(insn = cloneForward(func, insn));
1644       insn->setInterpolate(NV50_IR_INTERP_PERSPECTIVE | insn->getSampleMode());
1645       insn->setSrc(1, proj);
1646       dst[c] = insn->getDef(0);
1647    }
1648    if (!mask)
1649       return;
1650
1651    proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), fetchSrc(0, 3));
1652
1653    for (c = 0; c < 4; ++c)
1654       if (mask & (1 << c))
1655          dst[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), src[c], proj);
1656 }
1657
1658 // order of nv50 ir sources: x y z layer lod/bias shadow
1659 // order of TGSI TEX sources: x y z layer shadow lod/bias
1660 //  lowering will finally set the hw specific order (like array first on nvc0)
1661 void
1662 Converter::handleTEX(Value *dst[4], int R, int S, int L, int C, int Dx, int Dy)
1663 {
1664    Value *val;
1665    Value *arg[4], *src[8];
1666    Value *lod = NULL, *shd = NULL;
1667    unsigned int s, c, d;
1668    TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1669
1670    TexInstruction::Target tgt = tgsi.getTexture(code, R);
1671
1672    for (s = 0; s < tgt.getArgCount(); ++s)
1673       arg[s] = src[s] = fetchSrc(0, s);
1674
1675    if (texi->op == OP_TXL || texi->op == OP_TXB)
1676       lod = fetchSrc(L >> 4, L & 3);
1677
1678    if (C == 0x0f)
1679       C = 0x00 | MAX2(tgt.getArgCount(), 2); // guess DC src
1680
1681    if (tgt.isShadow())
1682       shd = fetchSrc(C >> 4, C & 3);
1683
1684    if (texi->op == OP_TXD) {
1685       for (c = 0; c < tgt.getDim(); ++c) {
1686          texi->dPdx[c].set(fetchSrc(Dx >> 4, (Dx & 3) + c));
1687          texi->dPdy[c].set(fetchSrc(Dy >> 4, (Dy & 3) + c));
1688       }
1689    }
1690
1691    // cube textures don't care about projection value, it's divided out
1692    if (tgsi.getOpcode() == TGSI_OPCODE_TXP && !tgt.isCube() && !tgt.isArray()) {
1693       unsigned int n = tgt.getDim();
1694       if (shd) {
1695          arg[n] = shd;
1696          ++n;
1697          assert(tgt.getDim() == tgt.getArgCount());
1698       }
1699       loadProjTexCoords(src, arg, (1 << n) - 1);
1700       if (shd)
1701          shd = src[n - 1];
1702    }
1703
1704    if (tgt.isCube()) {
1705       for (c = 0; c < 3; ++c)
1706          src[c] = mkOp1v(OP_ABS, TYPE_F32, getSSA(), arg[c]);
1707       val = getScratch();
1708       mkOp2(OP_MAX, TYPE_F32, val, src[0], src[1]);
1709       mkOp2(OP_MAX, TYPE_F32, val, src[2], val);
1710       mkOp1(OP_RCP, TYPE_F32, val, val);
1711       for (c = 0; c < 3; ++c)
1712          src[c] = mkOp2v(OP_MUL, TYPE_F32, getSSA(), arg[c], val);
1713    }
1714
1715    for (c = 0, d = 0; c < 4; ++c) {
1716       if (dst[c]) {
1717          texi->setDef(d++, dst[c]);
1718          texi->tex.mask |= 1 << c;
1719       } else {
1720          // NOTE: maybe hook up def too, for CSE
1721       }
1722    }
1723    for (s = 0; s < tgt.getArgCount(); ++s)
1724       texi->setSrc(s, src[s]);
1725    if (lod)
1726       texi->setSrc(s++, lod);
1727    if (shd)
1728       texi->setSrc(s++, shd);
1729
1730    setTexRS(texi, s, R, S);
1731
1732    if (tgsi.getOpcode() == TGSI_OPCODE_SAMPLE_C_LZ)
1733       texi->tex.levelZero = true;
1734
1735    for (s = 0; s < tgsi.getNumTexOffsets(); ++s) {
1736       for (c = 0; c < 3; ++c) {
1737          texi->tex.offset[s][c] = tgsi.getTexOffset(s).getValueU32(c, info);
1738          if (texi->tex.offset[s][c])
1739             texi->tex.useOffsets = s + 1;
1740       }
1741    }
1742
1743    bb->insertTail(texi);
1744 }
1745
1746 // 1st source: xyz = coordinates, w = lod/sample
1747 // 2nd source: offset
1748 void
1749 Converter::handleTXF(Value *dst[4], int R, int L_M)
1750 {
1751    TexInstruction *texi = new_TexInstruction(func, tgsi.getOP());
1752    int ms;
1753    unsigned int c, d, s;
1754
1755    texi->tex.target = tgsi.getTexture(code, R);
1756
1757    ms = texi->tex.target.isMS() ? 1 : 0;
1758    texi->tex.levelZero = ms; /* MS textures don't have mip-maps */
1759
1760    for (c = 0, d = 0; c < 4; ++c) {
1761       if (dst[c]) {
1762          texi->setDef(d++, dst[c]);
1763          texi->tex.mask |= 1 << c;
1764       }
1765    }
1766    for (c = 0; c < (texi->tex.target.getArgCount() - ms); ++c)
1767       texi->setSrc(c, fetchSrc(0, c));
1768    texi->setSrc(c++, fetchSrc(L_M >> 4, L_M & 3)); // lod or ms
1769
1770    setTexRS(texi, c, R, -1);
1771
1772    for (s = 0; s < tgsi.getNumTexOffsets(); ++s) {
1773       for (c = 0; c < 3; ++c) {
1774          texi->tex.offset[s][c] = tgsi.getTexOffset(s).getValueU32(c, info);
1775          if (texi->tex.offset[s][c])
1776             texi->tex.useOffsets = s + 1;
1777       }
1778    }
1779
1780    bb->insertTail(texi);
1781 }
1782
1783 void
1784 Converter::handleLIT(Value *dst0[4])
1785 {
1786    Value *val0 = NULL;
1787    unsigned int mask = tgsi.getDst(0).getMask();
1788
1789    if (mask & (1 << 0))
1790       loadImm(dst0[0], 1.0f);
1791
1792    if (mask & (1 << 3))
1793       loadImm(dst0[3], 1.0f);
1794
1795    if (mask & (3 << 1)) {
1796       val0 = getScratch();
1797       mkOp2(OP_MAX, TYPE_F32, val0, fetchSrc(0, 0), zero);
1798       if (mask & (1 << 1))
1799          mkMov(dst0[1], val0);
1800    }
1801
1802    if (mask & (1 << 2)) {
1803       Value *src1 = fetchSrc(0, 1), *src3 = fetchSrc(0, 3);
1804       Value *val1 = getScratch(), *val3 = getScratch();
1805
1806       Value *pos128 = loadImm(NULL, +127.999999f);
1807       Value *neg128 = loadImm(NULL, -127.999999f);
1808
1809       mkOp2(OP_MAX, TYPE_F32, val1, src1, zero);
1810       mkOp2(OP_MAX, TYPE_F32, val3, src3, neg128);
1811       mkOp2(OP_MIN, TYPE_F32, val3, val3, pos128);
1812       mkOp2(OP_POW, TYPE_F32, val3, val1, val3);
1813
1814       mkCmp(OP_SLCT, CC_GT, TYPE_F32, dst0[2], TYPE_F32, val3, zero, val0);
1815    }
1816 }
1817
1818 static inline bool
1819 isResourceSpecial(const int r)
1820 {
1821    return (r == TGSI_RESOURCE_GLOBAL ||
1822            r == TGSI_RESOURCE_LOCAL ||
1823            r == TGSI_RESOURCE_PRIVATE ||
1824            r == TGSI_RESOURCE_INPUT);
1825 }
1826
1827 static inline bool
1828 isResourceRaw(const struct tgsi::Source *code, const int r)
1829 {
1830    return isResourceSpecial(r) || code->resources[r].raw;
1831 }
1832
1833 static inline nv50_ir::TexTarget
1834 getResourceTarget(const struct tgsi::Source *code, int r)
1835 {
1836    if (isResourceSpecial(r))
1837       return nv50_ir::TEX_TARGET_BUFFER;
1838    return tgsi::translateTexture(code->resources.at(r).target);
1839 }
1840
1841 Symbol *
1842 Converter::getResourceBase(const int r)
1843 {
1844    Symbol *sym = NULL;
1845
1846    switch (r) {
1847    case TGSI_RESOURCE_GLOBAL:
1848       sym = new_Symbol(prog, nv50_ir::FILE_MEMORY_GLOBAL, 15);
1849       break;
1850    case TGSI_RESOURCE_LOCAL:
1851       assert(prog->getType() == Program::TYPE_COMPUTE);
1852       sym = mkSymbol(nv50_ir::FILE_MEMORY_SHARED, 0, TYPE_U32,
1853                      info->prop.cp.sharedOffset);
1854       break;
1855    case TGSI_RESOURCE_PRIVATE:
1856       sym = mkSymbol(nv50_ir::FILE_MEMORY_LOCAL, 0, TYPE_U32,
1857                      info->bin.tlsSpace);
1858       break;
1859    case TGSI_RESOURCE_INPUT:
1860       assert(prog->getType() == Program::TYPE_COMPUTE);
1861       sym = mkSymbol(nv50_ir::FILE_SHADER_INPUT, 0, TYPE_U32,
1862                      info->prop.cp.inputOffset);
1863       break;
1864    default:
1865       sym = new_Symbol(prog,
1866                        nv50_ir::FILE_MEMORY_GLOBAL, code->resources.at(r).slot);
1867       break;
1868    }
1869    return sym;
1870 }
1871
1872 void
1873 Converter::getResourceCoords(std::vector<Value *> &coords, int r, int s)
1874 {
1875    const int arg =
1876       TexInstruction::Target(getResourceTarget(code, r)).getArgCount();
1877
1878    for (int c = 0; c < arg; ++c)
1879       coords.push_back(fetchSrc(s, c));
1880
1881    // NOTE: TGSI_RESOURCE_GLOBAL needs FILE_GPR; this is an nv50 quirk
1882    if (r == TGSI_RESOURCE_LOCAL ||
1883        r == TGSI_RESOURCE_PRIVATE ||
1884        r == TGSI_RESOURCE_INPUT)
1885       coords[0] = mkOp1v(OP_MOV, TYPE_U32, getScratch(4, FILE_ADDRESS),
1886                          coords[0]);
1887 }
1888
1889 static inline int
1890 partitionLoadStore(uint8_t comp[2], uint8_t size[2], uint8_t mask)
1891 {
1892    int n = 0;
1893
1894    while (mask) {
1895       if (mask & 1) {
1896          size[n]++;
1897       } else {
1898          if (size[n])
1899             comp[n = 1] = size[0] + 1;
1900          else
1901             comp[n]++;
1902       }
1903       mask >>= 1;
1904    }
1905    if (size[0] == 3) {
1906       n = 1;
1907       size[0] = (comp[0] == 1) ? 1 : 2;
1908       size[1] = 3 - size[0];
1909       comp[1] = comp[0] + size[0];
1910    }
1911    return n + 1;
1912 }
1913
1914 // For raw loads, granularity is 4 byte.
1915 // Usage of the texture read mask on OP_SULDP is not allowed.
1916 void
1917 Converter::handleLOAD(Value *dst0[4])
1918 {
1919    const int r = tgsi.getSrc(0).getIndex(0);
1920    int c;
1921    std::vector<Value *> off, src, ldv, def;
1922
1923    getResourceCoords(off, r, 1);
1924
1925    if (isResourceRaw(code, r)) {
1926       uint8_t mask = 0;
1927       uint8_t comp[2] = { 0, 0 };
1928       uint8_t size[2] = { 0, 0 };
1929
1930       Symbol *base = getResourceBase(r);
1931
1932       // determine the base and size of the at most 2 load ops
1933       for (c = 0; c < 4; ++c)
1934          if (!tgsi.getDst(0).isMasked(c))
1935             mask |= 1 << (tgsi.getSrc(0).getSwizzle(c) - TGSI_SWIZZLE_X);
1936
1937       int n = partitionLoadStore(comp, size, mask);
1938
1939       src = off;
1940
1941       def.resize(4); // index by component, the ones we need will be non-NULL
1942       for (c = 0; c < 4; ++c) {
1943          if (dst0[c] && tgsi.getSrc(0).getSwizzle(c) == (TGSI_SWIZZLE_X + c))
1944             def[c] = dst0[c];
1945          else
1946          if (mask & (1 << c))
1947             def[c] = getScratch();
1948       }
1949
1950       const bool useLd = isResourceSpecial(r) ||
1951          (info->io.nv50styleSurfaces &&
1952           code->resources[r].target == TGSI_TEXTURE_BUFFER);
1953
1954       for (int i = 0; i < n; ++i) {
1955          ldv.assign(def.begin() + comp[i], def.begin() + comp[i] + size[i]);
1956
1957          if (comp[i]) // adjust x component of source address if necessary
1958             src[0] = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, off[0]->reg.file),
1959                             off[0], mkImm(comp[i] * 4));
1960          else
1961             src[0] = off[0];
1962
1963          if (useLd) {
1964             Instruction *ld =
1965                mkLoad(typeOfSize(size[i] * 4), ldv[0], base, src[0]);
1966             for (size_t c = 1; c < ldv.size(); ++c)
1967                ld->setDef(c, ldv[c]);
1968          } else {
1969             mkTex(OP_SULDB, getResourceTarget(code, r), code->resources[r].slot,
1970                   0, ldv, src)->dType = typeOfSize(size[i] * 4);
1971          }
1972       }
1973    } else {
1974       def.resize(4);
1975       for (c = 0; c < 4; ++c) {
1976          if (!dst0[c] || tgsi.getSrc(0).getSwizzle(c) != (TGSI_SWIZZLE_X + c))
1977             def[c] = getScratch();
1978          else
1979             def[c] = dst0[c];
1980       }
1981
1982       mkTex(OP_SULDP, getResourceTarget(code, r), code->resources[r].slot, 0,
1983             def, off);
1984    }
1985    FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
1986       if (dst0[c] != def[c])
1987          mkMov(dst0[c], def[tgsi.getSrc(0).getSwizzle(c)]);
1988 }
1989
1990 // For formatted stores, the write mask on OP_SUSTP can be used.
1991 // Raw stores have to be split.
1992 void
1993 Converter::handleSTORE()
1994 {
1995    const int r = tgsi.getDst(0).getIndex(0);
1996    int c;
1997    std::vector<Value *> off, src, dummy;
1998
1999    getResourceCoords(off, r, 0);
2000    src = off;
2001    const int s = src.size();
2002
2003    if (isResourceRaw(code, r)) {
2004       uint8_t comp[2] = { 0, 0 };
2005       uint8_t size[2] = { 0, 0 };
2006
2007       int n = partitionLoadStore(comp, size, tgsi.getDst(0).getMask());
2008
2009       Symbol *base = getResourceBase(r);
2010
2011       const bool useSt = isResourceSpecial(r) ||
2012          (info->io.nv50styleSurfaces &&
2013           code->resources[r].target == TGSI_TEXTURE_BUFFER);
2014
2015       for (int i = 0; i < n; ++i) {
2016          if (comp[i]) // adjust x component of source address if necessary
2017             src[0] = mkOp2v(OP_ADD, TYPE_U32, getSSA(4, off[0]->reg.file),
2018                             off[0], mkImm(comp[i] * 4));
2019          else
2020             src[0] = off[0];
2021
2022          const DataType stTy = typeOfSize(size[i] * 4);
2023
2024          if (useSt) {
2025             Instruction *st =
2026                mkStore(OP_STORE, stTy, base, NULL, fetchSrc(1, comp[i]));
2027             for (c = 1; c < size[i]; ++c)
2028                st->setSrc(1 + c, fetchSrc(1, comp[i] + c));
2029             st->setIndirect(0, 0, src[0]);
2030          } else {
2031             // attach values to be stored
2032             src.resize(s + size[i]);
2033             for (c = 0; c < size[i]; ++c)
2034                src[s + c] = fetchSrc(1, comp[i] + c);
2035             mkTex(OP_SUSTB, getResourceTarget(code, r), code->resources[r].slot,
2036                   0, dummy, src)->setType(stTy);
2037          }
2038       }
2039    } else {
2040       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2041          src.push_back(fetchSrc(1, c));
2042
2043       mkTex(OP_SUSTP, getResourceTarget(code, r), code->resources[r].slot, 0,
2044             dummy, src)->tex.mask = tgsi.getDst(0).getMask();
2045    }
2046 }
2047
2048 // XXX: These only work on resources with the single-component u32/s32 formats.
2049 // Therefore the result is replicated. This might not be intended by TGSI, but
2050 // operating on more than 1 component would produce undefined results because
2051 // they do not exist.
2052 void
2053 Converter::handleATOM(Value *dst0[4], DataType ty, uint16_t subOp)
2054 {
2055    const int r = tgsi.getSrc(0).getIndex(0);
2056    std::vector<Value *> srcv;
2057    std::vector<Value *> defv;
2058    LValue *dst = getScratch();
2059
2060    getResourceCoords(srcv, r, 1);
2061
2062    if (isResourceSpecial(r)) {
2063       assert(r != TGSI_RESOURCE_INPUT);
2064       Instruction *insn;
2065       insn = mkOp2(OP_ATOM, ty, dst, getResourceBase(r), fetchSrc(2, 0));
2066       insn->subOp = subOp;
2067       if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2068          insn->setSrc(2, fetchSrc(3, 0));
2069       insn->setIndirect(0, 0, srcv.at(0));
2070    } else {
2071       operation op = isResourceRaw(code, r) ? OP_SUREDB : OP_SUREDP;
2072       TexTarget targ = getResourceTarget(code, r);
2073       int idx = code->resources[r].slot;
2074       defv.push_back(dst);
2075       srcv.push_back(fetchSrc(2, 0));
2076       if (subOp == NV50_IR_SUBOP_ATOM_CAS)
2077          srcv.push_back(fetchSrc(3, 0));
2078       TexInstruction *tex = mkTex(op, targ, idx, 0, defv, srcv);
2079       tex->subOp = subOp;
2080       tex->tex.mask = 1;
2081       tex->setType(ty);
2082    }
2083
2084    for (int c = 0; c < 4; ++c)
2085       if (dst0[c])
2086          dst0[c] = dst; // not equal to rDst so handleInstruction will do mkMov
2087 }
2088
2089 Converter::Subroutine *
2090 Converter::getSubroutine(unsigned ip)
2091 {
2092    std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
2093
2094    if (it == sub.map.end())
2095       it = sub.map.insert(std::make_pair(
2096               ip, Subroutine(new Function(prog, "SUB", ip)))).first;
2097
2098    return &it->second;
2099 }
2100
2101 Converter::Subroutine *
2102 Converter::getSubroutine(Function *f)
2103 {
2104    unsigned ip = f->getLabel();
2105    std::map<unsigned, Subroutine>::iterator it = sub.map.find(ip);
2106
2107    if (it == sub.map.end())
2108       it = sub.map.insert(std::make_pair(ip, Subroutine(f))).first;
2109
2110    return &it->second;
2111 }
2112
2113 bool
2114 Converter::isEndOfSubroutine(uint ip)
2115 {
2116    assert(ip < code->scan.num_instructions);
2117    tgsi::Instruction insn(&code->insns[ip]);
2118    return (insn.getOpcode() == TGSI_OPCODE_END ||
2119            insn.getOpcode() == TGSI_OPCODE_ENDSUB ||
2120            // does END occur at end of main or the very end ?
2121            insn.getOpcode() == TGSI_OPCODE_BGNSUB);
2122 }
2123
2124 bool
2125 Converter::handleInstruction(const struct tgsi_full_instruction *insn)
2126 {
2127    Instruction *geni;
2128
2129    Value *dst0[4], *rDst0[4];
2130    Value *src0, *src1, *src2;
2131    Value *val0, *val1;
2132    int c;
2133
2134    tgsi = tgsi::Instruction(insn);
2135
2136    bool useScratchDst = tgsi.checkDstSrcAliasing();
2137
2138    operation op = tgsi.getOP();
2139    dstTy = tgsi.inferDstType();
2140    srcTy = tgsi.inferSrcType();
2141
2142    unsigned int mask = tgsi.dstCount() ? tgsi.getDst(0).getMask() : 0;
2143
2144    if (tgsi.dstCount()) {
2145       for (c = 0; c < 4; ++c) {
2146          rDst0[c] = acquireDst(0, c);
2147          dst0[c] = (useScratchDst && rDst0[c]) ? getScratch() : rDst0[c];
2148       }
2149    }
2150
2151    switch (tgsi.getOpcode()) {
2152    case TGSI_OPCODE_ADD:
2153    case TGSI_OPCODE_UADD:
2154    case TGSI_OPCODE_AND:
2155    case TGSI_OPCODE_DIV:
2156    case TGSI_OPCODE_IDIV:
2157    case TGSI_OPCODE_UDIV:
2158    case TGSI_OPCODE_MAX:
2159    case TGSI_OPCODE_MIN:
2160    case TGSI_OPCODE_IMAX:
2161    case TGSI_OPCODE_IMIN:
2162    case TGSI_OPCODE_UMAX:
2163    case TGSI_OPCODE_UMIN:
2164    case TGSI_OPCODE_MOD:
2165    case TGSI_OPCODE_UMOD:
2166    case TGSI_OPCODE_MUL:
2167    case TGSI_OPCODE_UMUL:
2168    case TGSI_OPCODE_OR:
2169    case TGSI_OPCODE_POW:
2170    case TGSI_OPCODE_SHL:
2171    case TGSI_OPCODE_ISHR:
2172    case TGSI_OPCODE_USHR:
2173    case TGSI_OPCODE_SUB:
2174    case TGSI_OPCODE_XOR:
2175       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2176          src0 = fetchSrc(0, c);
2177          src1 = fetchSrc(1, c);
2178          mkOp2(op, dstTy, dst0[c], src0, src1);
2179       }
2180       break;
2181    case TGSI_OPCODE_MAD:
2182    case TGSI_OPCODE_UMAD:
2183    case TGSI_OPCODE_SAD:
2184       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2185          src0 = fetchSrc(0, c);
2186          src1 = fetchSrc(1, c);
2187          src2 = fetchSrc(2, c);
2188          mkOp3(op, dstTy, dst0[c], src0, src1, src2);
2189       }
2190       break;
2191    case TGSI_OPCODE_MOV:
2192    case TGSI_OPCODE_ABS:
2193    case TGSI_OPCODE_CEIL:
2194    case TGSI_OPCODE_FLR:
2195    case TGSI_OPCODE_TRUNC:
2196    case TGSI_OPCODE_RCP:
2197    case TGSI_OPCODE_IABS:
2198    case TGSI_OPCODE_INEG:
2199    case TGSI_OPCODE_NOT:
2200    case TGSI_OPCODE_DDX:
2201    case TGSI_OPCODE_DDY:
2202       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2203          mkOp1(op, dstTy, dst0[c], fetchSrc(0, c));
2204       break;
2205    case TGSI_OPCODE_RSQ:
2206       src0 = fetchSrc(0, 0);
2207       val0 = getScratch();
2208       mkOp1(OP_ABS, TYPE_F32, val0, src0);
2209       mkOp1(OP_RSQ, TYPE_F32, val0, val0);
2210       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2211          mkMov(dst0[c], val0);
2212       break;
2213    case TGSI_OPCODE_ARL:
2214       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2215          src0 = fetchSrc(0, c);
2216          mkCvt(OP_CVT, TYPE_S32, dst0[c], TYPE_F32, src0)->rnd = ROUND_M;
2217       }
2218       break;
2219    case TGSI_OPCODE_UARL:
2220       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2221          mkOp1(OP_MOV, TYPE_U32, dst0[c], fetchSrc(0, c));
2222       break;
2223    case TGSI_OPCODE_EX2:
2224    case TGSI_OPCODE_LG2:
2225       val0 = mkOp1(op, TYPE_F32, getScratch(), fetchSrc(0, 0))->getDef(0);
2226       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2227          mkOp1(OP_MOV, TYPE_F32, dst0[c], val0);
2228       break;
2229    case TGSI_OPCODE_COS:
2230    case TGSI_OPCODE_SIN:
2231       val0 = getScratch();
2232       if (mask & 7) {
2233          mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 0));
2234          mkOp1(op, TYPE_F32, val0, val0);
2235          for (c = 0; c < 3; ++c)
2236             if (dst0[c])
2237                mkMov(dst0[c], val0);
2238       }
2239       if (dst0[3]) {
2240          mkOp1(OP_PRESIN, TYPE_F32, val0, fetchSrc(0, 3));
2241          mkOp1(op, TYPE_F32, dst0[3], val0);
2242       }
2243       break;
2244    case TGSI_OPCODE_SCS:
2245       if (mask & 3) {
2246          val0 = mkOp1v(OP_PRESIN, TYPE_F32, getSSA(), fetchSrc(0, 0));
2247          if (dst0[0])
2248             mkOp1(OP_COS, TYPE_F32, dst0[0], val0);
2249          if (dst0[1])
2250             mkOp1(OP_SIN, TYPE_F32, dst0[1], val0);
2251       }
2252       if (dst0[2])
2253          loadImm(dst0[2], 0.0f);
2254       if (dst0[3])
2255          loadImm(dst0[3], 1.0f);
2256       break;
2257    case TGSI_OPCODE_EXP:
2258       src0 = fetchSrc(0, 0);
2259       val0 = mkOp1v(OP_FLOOR, TYPE_F32, getSSA(), src0);
2260       if (dst0[1])
2261          mkOp2(OP_SUB, TYPE_F32, dst0[1], src0, val0);
2262       if (dst0[0])
2263          mkOp1(OP_EX2, TYPE_F32, dst0[0], val0);
2264       if (dst0[2])
2265          mkOp1(OP_EX2, TYPE_F32, dst0[2], src0);
2266       if (dst0[3])
2267          loadImm(dst0[3], 1.0f);
2268       break;
2269    case TGSI_OPCODE_LOG:
2270       src0 = mkOp1v(OP_ABS, TYPE_F32, getSSA(), fetchSrc(0, 0));
2271       val0 = mkOp1v(OP_LG2, TYPE_F32, dst0[2] ? dst0[2] : getSSA(), src0);
2272       if (dst0[0] || dst0[1])
2273          val1 = mkOp1v(OP_FLOOR, TYPE_F32, dst0[0] ? dst0[0] : getSSA(), val0);
2274       if (dst0[1]) {
2275          mkOp1(OP_EX2, TYPE_F32, dst0[1], val1);
2276          mkOp1(OP_RCP, TYPE_F32, dst0[1], dst0[1]);
2277          mkOp2(OP_MUL, TYPE_F32, dst0[1], dst0[1], src0);
2278       }
2279       if (dst0[3])
2280          loadImm(dst0[3], 1.0f);
2281       break;
2282    case TGSI_OPCODE_DP2:
2283       val0 = buildDot(2);
2284       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2285          mkMov(dst0[c], val0);
2286       break;
2287    case TGSI_OPCODE_DP3:
2288       val0 = buildDot(3);
2289       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2290          mkMov(dst0[c], val0);
2291       break;
2292    case TGSI_OPCODE_DP4:
2293       val0 = buildDot(4);
2294       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2295          mkMov(dst0[c], val0);
2296       break;
2297    case TGSI_OPCODE_DPH:
2298       val0 = buildDot(3);
2299       src1 = fetchSrc(1, 3);
2300       mkOp2(OP_ADD, TYPE_F32, val0, val0, src1);
2301       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2302          mkMov(dst0[c], val0);
2303       break;
2304    case TGSI_OPCODE_DST:
2305       if (dst0[0])
2306          loadImm(dst0[0], 1.0f);
2307       if (dst0[1]) {
2308          src0 = fetchSrc(0, 1);
2309          src1 = fetchSrc(1, 1);
2310          mkOp2(OP_MUL, TYPE_F32, dst0[1], src0, src1);
2311       }
2312       if (dst0[2])
2313          mkMov(dst0[2], fetchSrc(0, 2));
2314       if (dst0[3])
2315          mkMov(dst0[3], fetchSrc(1, 3));
2316       break;
2317    case TGSI_OPCODE_LRP:
2318       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2319          src0 = fetchSrc(0, c);
2320          src1 = fetchSrc(1, c);
2321          src2 = fetchSrc(2, c);
2322          mkOp3(OP_MAD, TYPE_F32, dst0[c],
2323                mkOp2v(OP_SUB, TYPE_F32, getSSA(), src1, src2), src0, src2);
2324       }
2325       break;
2326    case TGSI_OPCODE_LIT:
2327       handleLIT(dst0);
2328       break;
2329    case TGSI_OPCODE_XPD:
2330       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2331          if (c < 3) {
2332             val0 = getSSA();
2333             src0 = fetchSrc(1, (c + 1) % 3);
2334             src1 = fetchSrc(0, (c + 2) % 3);
2335             mkOp2(OP_MUL, TYPE_F32, val0, src0, src1);
2336             mkOp1(OP_NEG, TYPE_F32, val0, val0);
2337
2338             src0 = fetchSrc(0, (c + 1) % 3);
2339             src1 = fetchSrc(1, (c + 2) % 3);
2340             mkOp3(OP_MAD, TYPE_F32, dst0[c], src0, src1, val0);
2341          } else {
2342             loadImm(dst0[c], 1.0f);
2343          }
2344       }
2345       break;
2346    case TGSI_OPCODE_ISSG:
2347    case TGSI_OPCODE_SSG:
2348       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2349          src0 = fetchSrc(0, c);
2350          val0 = getScratch();
2351          val1 = getScratch();
2352          mkCmp(OP_SET, CC_GT, srcTy, val0, srcTy, src0, zero);
2353          mkCmp(OP_SET, CC_LT, srcTy, val1, srcTy, src0, zero);
2354          if (srcTy == TYPE_F32)
2355             mkOp2(OP_SUB, TYPE_F32, dst0[c], val0, val1);
2356          else
2357             mkOp2(OP_SUB, TYPE_S32, dst0[c], val1, val0);
2358       }
2359       break;
2360    case TGSI_OPCODE_UCMP:
2361    case TGSI_OPCODE_CMP:
2362       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2363          src0 = fetchSrc(0, c);
2364          src1 = fetchSrc(1, c);
2365          src2 = fetchSrc(2, c);
2366          if (src1 == src2)
2367             mkMov(dst0[c], src1);
2368          else
2369             mkCmp(OP_SLCT, (srcTy == TYPE_F32) ? CC_LT : CC_NE,
2370                   srcTy, dst0[c], srcTy, src1, src2, src0);
2371       }
2372       break;
2373    case TGSI_OPCODE_FRC:
2374       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2375          src0 = fetchSrc(0, c);
2376          val0 = getScratch();
2377          mkOp1(OP_FLOOR, TYPE_F32, val0, src0);
2378          mkOp2(OP_SUB, TYPE_F32, dst0[c], src0, val0);
2379       }
2380       break;
2381    case TGSI_OPCODE_ROUND:
2382       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2383          mkCvt(OP_CVT, TYPE_F32, dst0[c], TYPE_F32, fetchSrc(0, c))
2384          ->rnd = ROUND_NI;
2385       break;
2386    case TGSI_OPCODE_CLAMP:
2387       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2388          src0 = fetchSrc(0, c);
2389          src1 = fetchSrc(1, c);
2390          src2 = fetchSrc(2, c);
2391          val0 = getScratch();
2392          mkOp2(OP_MIN, TYPE_F32, val0, src0, src1);
2393          mkOp2(OP_MAX, TYPE_F32, dst0[c], val0, src2);
2394       }
2395       break;
2396    case TGSI_OPCODE_SLT:
2397    case TGSI_OPCODE_SGE:
2398    case TGSI_OPCODE_SEQ:
2399    case TGSI_OPCODE_SFL:
2400    case TGSI_OPCODE_SGT:
2401    case TGSI_OPCODE_SLE:
2402    case TGSI_OPCODE_SNE:
2403    case TGSI_OPCODE_STR:
2404    case TGSI_OPCODE_FSEQ:
2405    case TGSI_OPCODE_FSGE:
2406    case TGSI_OPCODE_FSLT:
2407    case TGSI_OPCODE_FSNE:
2408    case TGSI_OPCODE_ISGE:
2409    case TGSI_OPCODE_ISLT:
2410    case TGSI_OPCODE_USEQ:
2411    case TGSI_OPCODE_USGE:
2412    case TGSI_OPCODE_USLT:
2413    case TGSI_OPCODE_USNE:
2414       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi) {
2415          src0 = fetchSrc(0, c);
2416          src1 = fetchSrc(1, c);
2417          mkCmp(op, tgsi.getSetCond(), dstTy, dst0[c], srcTy, src0, src1);
2418       }
2419       break;
2420    case TGSI_OPCODE_KILL_IF:
2421       val0 = new_LValue(func, FILE_PREDICATE);
2422       for (c = 0; c < 4; ++c) {
2423          mkCmp(OP_SET, CC_LT, TYPE_F32, val0, TYPE_F32, fetchSrc(0, c), zero);
2424          mkOp(OP_DISCARD, TYPE_NONE, NULL)->setPredicate(CC_P, val0);
2425       }
2426       break;
2427    case TGSI_OPCODE_KILL:
2428       mkOp(OP_DISCARD, TYPE_NONE, NULL);
2429       break;
2430    case TGSI_OPCODE_TEX:
2431    case TGSI_OPCODE_TXB:
2432    case TGSI_OPCODE_TXL:
2433    case TGSI_OPCODE_TXP:
2434    case TGSI_OPCODE_LODQ:
2435       //              R  S     L     C    Dx    Dy
2436       handleTEX(dst0, 1, 1, 0x03, 0x0f, 0x00, 0x00);
2437       break;
2438    case TGSI_OPCODE_TXD:
2439       handleTEX(dst0, 3, 3, 0x03, 0x0f, 0x10, 0x20);
2440       break;
2441    case TGSI_OPCODE_TG4:
2442       handleTEX(dst0, 2, 2, 0x03, 0x0f, 0x00, 0x00);
2443       break;
2444    case TGSI_OPCODE_TEX2:
2445       handleTEX(dst0, 2, 2, 0x03, 0x10, 0x00, 0x00);
2446       break;
2447    case TGSI_OPCODE_TXB2:
2448    case TGSI_OPCODE_TXL2:
2449       handleTEX(dst0, 2, 2, 0x10, 0x11, 0x00, 0x00);
2450       break;
2451    case TGSI_OPCODE_SAMPLE:
2452    case TGSI_OPCODE_SAMPLE_B:
2453    case TGSI_OPCODE_SAMPLE_D:
2454    case TGSI_OPCODE_SAMPLE_L:
2455    case TGSI_OPCODE_SAMPLE_C:
2456    case TGSI_OPCODE_SAMPLE_C_LZ:
2457       handleTEX(dst0, 1, 2, 0x30, 0x30, 0x30, 0x40);
2458       break;
2459    case TGSI_OPCODE_TXF:
2460       handleTXF(dst0, 1, 0x03);
2461       break;
2462    case TGSI_OPCODE_SAMPLE_I:
2463       handleTXF(dst0, 1, 0x03);
2464       break;
2465    case TGSI_OPCODE_SAMPLE_I_MS:
2466       handleTXF(dst0, 1, 0x20);
2467       break;
2468    case TGSI_OPCODE_TXQ:
2469    case TGSI_OPCODE_SVIEWINFO:
2470       handleTXQ(dst0, TXQ_DIMS);
2471       break;
2472    case TGSI_OPCODE_F2I:
2473    case TGSI_OPCODE_F2U:
2474       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2475          mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c))->rnd = ROUND_Z;
2476       break;
2477    case TGSI_OPCODE_I2F:
2478    case TGSI_OPCODE_U2F:
2479       FOR_EACH_DST_ENABLED_CHANNEL(0, c, tgsi)
2480          mkCvt(OP_CVT, dstTy, dst0[c], srcTy, fetchSrc(0, c));
2481       break;
2482    case TGSI_OPCODE_EMIT:
2483    case TGSI_OPCODE_ENDPRIM:
2484       // get vertex stream if specified (must be immediate)
2485       src0 = tgsi.srcCount() ?
2486          mkImm(tgsi.getSrc(0).getValueU32(0, info)) : zero;
2487       mkOp1(op, TYPE_U32, NULL, src0)->fixed = 1;
2488       break;
2489    case TGSI_OPCODE_IF:
2490    case TGSI_OPCODE_UIF:
2491    {
2492       BasicBlock *ifBB = new BasicBlock(func);
2493
2494       bb->cfg.attach(&ifBB->cfg, Graph::Edge::TREE);
2495       condBBs.push(bb);
2496       joinBBs.push(bb);
2497
2498       mkFlow(OP_BRA, NULL, CC_NOT_P, fetchSrc(0, 0))->setType(srcTy);
2499
2500       setPosition(ifBB, true);
2501    }
2502       break;
2503    case TGSI_OPCODE_ELSE:
2504    {
2505       BasicBlock *elseBB = new BasicBlock(func);
2506       BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2507
2508       forkBB->cfg.attach(&elseBB->cfg, Graph::Edge::TREE);
2509       condBBs.push(bb);
2510
2511       forkBB->getExit()->asFlow()->target.bb = elseBB;
2512       if (!bb->isTerminated())
2513          mkFlow(OP_BRA, NULL, CC_ALWAYS, NULL);
2514
2515       setPosition(elseBB, true);
2516    }
2517       break;
2518    case TGSI_OPCODE_ENDIF:
2519    {
2520       BasicBlock *convBB = new BasicBlock(func);
2521       BasicBlock *prevBB = reinterpret_cast<BasicBlock *>(condBBs.pop().u.p);
2522       BasicBlock *forkBB = reinterpret_cast<BasicBlock *>(joinBBs.pop().u.p);
2523
2524       if (!bb->isTerminated()) {
2525          // we only want join if none of the clauses ended with CONT/BREAK/RET
2526          if (prevBB->getExit()->op == OP_BRA && joinBBs.getSize() < 6)
2527             insertConvergenceOps(convBB, forkBB);
2528          mkFlow(OP_BRA, convBB, CC_ALWAYS, NULL);
2529          bb->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2530       }
2531
2532       if (prevBB->getExit()->op == OP_BRA) {
2533          prevBB->cfg.attach(&convBB->cfg, Graph::Edge::FORWARD);
2534          prevBB->getExit()->asFlow()->target.bb = convBB;
2535       }
2536       setPosition(convBB, true);
2537    }
2538       break;
2539    case TGSI_OPCODE_BGNLOOP:
2540    {
2541       BasicBlock *lbgnBB = new BasicBlock(func);
2542       BasicBlock *lbrkBB = new BasicBlock(func);
2543
2544       loopBBs.push(lbgnBB);
2545       breakBBs.push(lbrkBB);
2546       if (loopBBs.getSize() > func->loopNestingBound)
2547          func->loopNestingBound++;
2548
2549       mkFlow(OP_PREBREAK, lbrkBB, CC_ALWAYS, NULL);
2550
2551       bb->cfg.attach(&lbgnBB->cfg, Graph::Edge::TREE);
2552       setPosition(lbgnBB, true);
2553       mkFlow(OP_PRECONT, lbgnBB, CC_ALWAYS, NULL);
2554    }
2555       break;
2556    case TGSI_OPCODE_ENDLOOP:
2557    {
2558       BasicBlock *loopBB = reinterpret_cast<BasicBlock *>(loopBBs.pop().u.p);
2559
2560       if (!bb->isTerminated()) {
2561          mkFlow(OP_CONT, loopBB, CC_ALWAYS, NULL);
2562          bb->cfg.attach(&loopBB->cfg, Graph::Edge::BACK);
2563       }
2564       setPosition(reinterpret_cast<BasicBlock *>(breakBBs.pop().u.p), true);
2565    }
2566       break;
2567    case TGSI_OPCODE_BRK:
2568    {
2569       if (bb->isTerminated())
2570          break;
2571       BasicBlock *brkBB = reinterpret_cast<BasicBlock *>(breakBBs.peek().u.p);
2572       mkFlow(OP_BREAK, brkBB, CC_ALWAYS, NULL);
2573       bb->cfg.attach(&brkBB->cfg, Graph::Edge::CROSS);
2574    }
2575       break;
2576    case TGSI_OPCODE_CONT:
2577    {
2578       if (bb->isTerminated())
2579          break;
2580       BasicBlock *contBB = reinterpret_cast<BasicBlock *>(loopBBs.peek().u.p);
2581       mkFlow(OP_CONT, contBB, CC_ALWAYS, NULL);
2582       contBB->explicitCont = true;
2583       bb->cfg.attach(&contBB->cfg, Graph::Edge::BACK);
2584    }
2585       break;
2586    case TGSI_OPCODE_BGNSUB:
2587    {
2588       Subroutine *s = getSubroutine(ip);
2589       BasicBlock *entry = new BasicBlock(s->f);
2590       BasicBlock *leave = new BasicBlock(s->f);
2591
2592       // multiple entrypoints possible, keep the graph connected
2593       if (prog->getType() == Program::TYPE_COMPUTE)
2594          prog->main->call.attach(&s->f->call, Graph::Edge::TREE);
2595
2596       sub.cur = s;
2597       s->f->setEntry(entry);
2598       s->f->setExit(leave);
2599       setPosition(entry, true);
2600       return true;
2601    }
2602    case TGSI_OPCODE_ENDSUB:
2603    {
2604       sub.cur = getSubroutine(prog->main);
2605       setPosition(BasicBlock::get(sub.cur->f->cfg.getRoot()), true);
2606       return true;
2607    }
2608    case TGSI_OPCODE_CAL:
2609    {
2610       Subroutine *s = getSubroutine(tgsi.getLabel());
2611       mkFlow(OP_CALL, s->f, CC_ALWAYS, NULL);
2612       func->call.attach(&s->f->call, Graph::Edge::TREE);
2613       return true;
2614    }
2615    case TGSI_OPCODE_RET:
2616    {
2617       if (bb->isTerminated())
2618          return true;
2619       BasicBlock *leave = BasicBlock::get(func->cfgExit);
2620
2621       if (!isEndOfSubroutine(ip + 1)) {
2622          // insert a PRERET at the entry if this is an early return
2623          // (only needed for sharing code in the epilogue)
2624          BasicBlock *pos = getBB();
2625          setPosition(BasicBlock::get(func->cfg.getRoot()), false);
2626          mkFlow(OP_PRERET, leave, CC_ALWAYS, NULL)->fixed = 1;
2627          setPosition(pos, true);
2628       }
2629       mkFlow(OP_RET, NULL, CC_ALWAYS, NULL)->fixed = 1;
2630       bb->cfg.attach(&leave->cfg, Graph::Edge::CROSS);
2631    }
2632       break;
2633    case TGSI_OPCODE_END:
2634    {
2635       // attach and generate epilogue code
2636       BasicBlock *epilogue = BasicBlock::get(func->cfgExit);
2637       bb->cfg.attach(&epilogue->cfg, Graph::Edge::TREE);
2638       setPosition(epilogue, true);
2639       if (prog->getType() == Program::TYPE_FRAGMENT)
2640          exportOutputs();
2641       if (info->io.genUserClip > 0)
2642          handleUserClipPlanes();
2643       mkOp(OP_EXIT, TYPE_NONE, NULL)->terminator = 1;
2644    }
2645       break;
2646    case TGSI_OPCODE_SWITCH:
2647    case TGSI_OPCODE_CASE:
2648       ERROR("switch/case opcode encountered, should have been lowered\n");
2649       abort();
2650       break;
2651    case TGSI_OPCODE_LOAD:
2652       handleLOAD(dst0);
2653       break;
2654    case TGSI_OPCODE_STORE:
2655       handleSTORE();
2656       break;
2657    case TGSI_OPCODE_BARRIER:
2658       geni = mkOp2(OP_BAR, TYPE_U32, NULL, mkImm(0), mkImm(0));
2659       geni->fixed = 1;
2660       geni->subOp = NV50_IR_SUBOP_BAR_SYNC;
2661       break;
2662    case TGSI_OPCODE_MFENCE:
2663    case TGSI_OPCODE_LFENCE:
2664    case TGSI_OPCODE_SFENCE:
2665       geni = mkOp(OP_MEMBAR, TYPE_NONE, NULL);
2666       geni->fixed = 1;
2667       geni->subOp = tgsi::opcodeToSubOp(tgsi.getOpcode());
2668       break;
2669    case TGSI_OPCODE_ATOMUADD:
2670    case TGSI_OPCODE_ATOMXCHG:
2671    case TGSI_OPCODE_ATOMCAS:
2672    case TGSI_OPCODE_ATOMAND:
2673    case TGSI_OPCODE_ATOMOR:
2674    case TGSI_OPCODE_ATOMXOR:
2675    case TGSI_OPCODE_ATOMUMIN:
2676    case TGSI_OPCODE_ATOMIMIN:
2677    case TGSI_OPCODE_ATOMUMAX:
2678    case TGSI_OPCODE_ATOMIMAX:
2679       handleATOM(dst0, dstTy, tgsi::opcodeToSubOp(tgsi.getOpcode()));
2680       break;
2681    default:
2682       ERROR("unhandled TGSI opcode: %u\n", tgsi.getOpcode());
2683       assert(0);
2684       break;
2685    }
2686
2687    if (tgsi.dstCount()) {
2688       for (c = 0; c < 4; ++c) {
2689          if (!dst0[c])
2690             continue;
2691          if (dst0[c] != rDst0[c])
2692             mkMov(rDst0[c], dst0[c]);
2693          storeDst(0, c, rDst0[c]);
2694       }
2695    }
2696    vtxBaseValid = 0;
2697
2698    return true;
2699 }
2700
2701 void
2702 Converter::handleUserClipPlanes()
2703 {
2704    Value *res[8];
2705    int n, i, c;
2706
2707    for (c = 0; c < 4; ++c) {
2708       for (i = 0; i < info->io.genUserClip; ++i) {
2709          Symbol *sym = mkSymbol(FILE_MEMORY_CONST, info->io.ucpCBSlot,
2710                                 TYPE_F32, info->io.ucpBase + i * 16 + c * 4);
2711          Value *ucp = mkLoadv(TYPE_F32, sym, NULL);
2712          if (c == 0)
2713             res[i] = mkOp2v(OP_MUL, TYPE_F32, getScratch(), clipVtx[c], ucp);
2714          else
2715             mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
2716       }
2717    }
2718
2719    const int first = info->numOutputs - (info->io.genUserClip + 3) / 4;
2720
2721    for (i = 0; i < info->io.genUserClip; ++i) {
2722       n = i / 4 + first;
2723       c = i % 4;
2724       Symbol *sym =
2725          mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32, info->out[n].slot[c] * 4);
2726       mkStore(OP_EXPORT, TYPE_F32, sym, NULL, res[i]);
2727    }
2728 }
2729
2730 void
2731 Converter::exportOutputs()
2732 {
2733    for (unsigned int i = 0; i < info->numOutputs; ++i) {
2734       for (unsigned int c = 0; c < 4; ++c) {
2735          if (!oData.exists(sub.cur->values, i, c))
2736             continue;
2737          Symbol *sym = mkSymbol(FILE_SHADER_OUTPUT, 0, TYPE_F32,
2738                                 info->out[i].slot[c] * 4);
2739          Value *val = oData.load(sub.cur->values, i, c, NULL);
2740          if (val)
2741             mkStore(OP_EXPORT, TYPE_F32, sym, NULL, val);
2742       }
2743    }
2744 }
2745
2746 Converter::Converter(Program *ir, const tgsi::Source *code) : BuildUtil(ir),
2747      code(code),
2748      tgsi(NULL),
2749      tData(this), aData(this), pData(this), oData(this)
2750 {
2751    info = code->info;
2752
2753    const DataFile tFile = code->mainTempsInLMem ? FILE_MEMORY_LOCAL : FILE_GPR;
2754
2755    const unsigned tSize = code->fileSize(TGSI_FILE_TEMPORARY);
2756    const unsigned pSize = code->fileSize(TGSI_FILE_PREDICATE);
2757    const unsigned aSize = code->fileSize(TGSI_FILE_ADDRESS);
2758    const unsigned oSize = code->fileSize(TGSI_FILE_OUTPUT);
2759
2760    tData.setup(TGSI_FILE_TEMPORARY, 0, 0, tSize, 4, 4, tFile, 0);
2761    pData.setup(TGSI_FILE_PREDICATE, 0, 0, pSize, 4, 4, FILE_PREDICATE, 0);
2762    aData.setup(TGSI_FILE_ADDRESS, 0, 0, aSize, 4, 4, FILE_GPR, 0);
2763    oData.setup(TGSI_FILE_OUTPUT, 0, 0, oSize, 4, 4, FILE_GPR, 0);
2764
2765    zero = mkImm((uint32_t)0);
2766
2767    vtxBaseValid = 0;
2768 }
2769
2770 Converter::~Converter()
2771 {
2772 }
2773
2774 inline const Converter::Location *
2775 Converter::BindArgumentsPass::getValueLocation(Subroutine *s, Value *v)
2776 {
2777    ValueMap::l_iterator it = s->values.l.find(v);
2778    return it == s->values.l.end() ? NULL : &it->second;
2779 }
2780
2781 template<typename T> inline void
2782 Converter::BindArgumentsPass::updateCallArgs(
2783    Instruction *i, void (Instruction::*setArg)(int, Value *),
2784    T (Function::*proto))
2785 {
2786    Function *g = i->asFlow()->target.fn;
2787    Subroutine *subg = conv.getSubroutine(g);
2788
2789    for (unsigned a = 0; a < (g->*proto).size(); ++a) {
2790       Value *v = (g->*proto)[a].get();
2791       const Converter::Location &l = *getValueLocation(subg, v);
2792       Converter::DataArray *array = conv.getArrayForFile(l.array, l.arrayIdx);
2793
2794       (i->*setArg)(a, array->acquire(sub->values, l.i, l.c));
2795    }
2796 }
2797
2798 template<typename T> inline void
2799 Converter::BindArgumentsPass::updatePrototype(
2800    BitSet *set, void (Function::*updateSet)(), T (Function::*proto))
2801 {
2802    (func->*updateSet)();
2803
2804    for (unsigned i = 0; i < set->getSize(); ++i) {
2805       Value *v = func->getLValue(i);
2806       const Converter::Location *l = getValueLocation(sub, v);
2807
2808       // only include values with a matching TGSI register
2809       if (set->test(i) && l && !conv.code->locals.count(*l))
2810          (func->*proto).push_back(v);
2811    }
2812 }
2813
2814 bool
2815 Converter::BindArgumentsPass::visit(Function *f)
2816 {
2817    sub = conv.getSubroutine(f);
2818
2819    for (ArrayList::Iterator bi = f->allBBlocks.iterator();
2820         !bi.end(); bi.next()) {
2821       for (Instruction *i = BasicBlock::get(bi)->getFirst();
2822            i; i = i->next) {
2823          if (i->op == OP_CALL && !i->asFlow()->builtin) {
2824             updateCallArgs(i, &Instruction::setSrc, &Function::ins);
2825             updateCallArgs(i, &Instruction::setDef, &Function::outs);
2826          }
2827       }
2828    }
2829
2830    if (func == prog->main && prog->getType() != Program::TYPE_COMPUTE)
2831       return true;
2832    updatePrototype(&BasicBlock::get(f->cfg.getRoot())->liveSet,
2833                    &Function::buildLiveSets, &Function::ins);
2834    updatePrototype(&BasicBlock::get(f->cfgExit)->defSet,
2835                    &Function::buildDefSets, &Function::outs);
2836
2837    return true;
2838 }
2839
2840 bool
2841 Converter::run()
2842 {
2843    BasicBlock *entry = new BasicBlock(prog->main);
2844    BasicBlock *leave = new BasicBlock(prog->main);
2845
2846    prog->main->setEntry(entry);
2847    prog->main->setExit(leave);
2848
2849    setPosition(entry, true);
2850    sub.cur = getSubroutine(prog->main);
2851
2852    if (info->io.genUserClip > 0) {
2853       for (int c = 0; c < 4; ++c)
2854          clipVtx[c] = getScratch();
2855    }
2856
2857    if (prog->getType() == Program::TYPE_FRAGMENT) {
2858       Symbol *sv = mkSysVal(SV_POSITION, 3);
2859       fragCoord[3] = mkOp1v(OP_RDSV, TYPE_F32, getSSA(), sv);
2860       mkOp1(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]);
2861    }
2862
2863    for (ip = 0; ip < code->scan.num_instructions; ++ip) {
2864       if (!handleInstruction(&code->insns[ip]))
2865          return false;
2866    }
2867
2868    if (!BindArgumentsPass(*this).run(prog))
2869       return false;
2870
2871    return true;
2872 }
2873
2874 } // unnamed namespace
2875
2876 namespace nv50_ir {
2877
2878 bool
2879 Program::makeFromTGSI(struct nv50_ir_prog_info *info)
2880 {
2881    tgsi::Source src(info);
2882    if (!src.scanSource())
2883       return false;
2884    tlsSize = info->bin.tlsSpace;
2885
2886    Converter builder(this, &src);
2887    return builder.run();
2888 }
2889
2890 } // namespace nv50_ir