nvc0: add maxwell (sm50) compiler backend
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_lowering_nvc0.h
1 /*
2 * Copyright 2011 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir.h"
24 #include "codegen/nv50_ir_build_util.h"
25
26 namespace nv50_ir {
27
28 class NVC0LegalizeSSA : public Pass
29 {
30 private:
31 virtual bool visit(BasicBlock *);
32 virtual bool visit(Function *);
33
34 // we want to insert calls to the builtin library only after optimization
35 void handleDIV(Instruction *); // integer division, modulus
36 void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt
37
38 private:
39 BuildUtil bld;
40 };
41
42 class NVC0LegalizePostRA : public Pass
43 {
44 public:
45 NVC0LegalizePostRA(const Program *);
46
47 private:
48 virtual bool visit(Function *);
49 virtual bool visit(BasicBlock *);
50
51 void replaceZero(Instruction *);
52 bool tryReplaceContWithBra(BasicBlock *);
53 void propagateJoin(BasicBlock *);
54
55 struct TexUse
56 {
57 TexUse(Instruction *use, const Instruction *tex)
58 : insn(use), tex(tex), level(-1) { }
59 Instruction *insn;
60 const Instruction *tex; // or split / mov
61 int level;
62 };
63 struct Limits
64 {
65 Limits() { }
66 Limits(int min, int max) : min(min), max(max) { }
67 int min, max;
68 };
69 bool insertTextureBarriers(Function *);
70 inline bool insnDominatedBy(const Instruction *, const Instruction *) const;
71 void findFirstUses(const Instruction *tex, const Instruction *def,
72 std::list<TexUse>&);
73 void findOverwritingDefs(const Instruction *tex, Instruction *insn,
74 const BasicBlock *term,
75 std::list<TexUse>&);
76 void addTexUse(std::list<TexUse>&, Instruction *, const Instruction *);
77 const Instruction *recurseDef(const Instruction *);
78
79 private:
80 LValue *rZero;
81 LValue *carry;
82 const bool needTexBar;
83 };
84
85 class NVC0LoweringPass : public Pass
86 {
87 public:
88 NVC0LoweringPass(Program *);
89
90 protected:
91 bool handleRDSV(Instruction *);
92 bool handleWRSV(Instruction *);
93 bool handleEXPORT(Instruction *);
94 bool handleOUT(Instruction *);
95 bool handleDIV(Instruction *);
96 bool handleMOD(Instruction *);
97 bool handleSQRT(Instruction *);
98 bool handlePOW(Instruction *);
99 bool handleTEX(TexInstruction *);
100 bool handleTXD(TexInstruction *);
101 bool handleTXQ(TexInstruction *);
102 virtual bool handleManualTXD(TexInstruction *);
103 bool handleTXLQ(TexInstruction *);
104 bool handleATOM(Instruction *);
105 bool handleCasExch(Instruction *, bool needCctl);
106 void handleSurfaceOpNVE4(TexInstruction *);
107
108 void checkPredicate(Instruction *);
109
110 private:
111 virtual bool visit(Function *);
112 virtual bool visit(BasicBlock *);
113 virtual bool visit(Instruction *);
114
115 void readTessCoord(LValue *dst, int c);
116
117 Value *loadResInfo32(Value *ptr, uint32_t off);
118 Value *loadMsInfo32(Value *ptr, uint32_t off);
119 Value *loadTexHandle(Value *ptr, unsigned int slot);
120
121 void adjustCoordinatesMS(TexInstruction *);
122 void processSurfaceCoordsNVE4(TexInstruction *);
123
124 protected:
125 BuildUtil bld;
126
127 private:
128 const Target *const targ;
129
130 Symbol *gMemBase;
131 LValue *gpEmitAddress;
132 };
133
134 } // namespace nv50_ir