nv50/ir: enable early fragment test with explicit user control
[mesa.git] / src / gallium / drivers / nouveau / codegen / nv50_ir_lowering_nvc0.h
1 /*
2 * Copyright 2011 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "codegen/nv50_ir.h"
24 #include "codegen/nv50_ir_build_util.h"
25
26 namespace nv50_ir {
27
28 class NVC0LegalizeSSA : public Pass
29 {
30 private:
31 virtual bool visit(BasicBlock *);
32 virtual bool visit(Function *);
33
34 // we want to insert calls to the builtin library only after optimization
35 void handleDIV(Instruction *); // integer division, modulus
36 void handleRCPRSQ(Instruction *); // double precision float recip/rsqrt
37 void handleFTZ(Instruction *);
38
39 private:
40 BuildUtil bld;
41 };
42
43 class NVC0LegalizePostRA : public Pass
44 {
45 public:
46 NVC0LegalizePostRA(const Program *);
47
48 private:
49 virtual bool visit(Function *);
50 virtual bool visit(BasicBlock *);
51
52 void replaceZero(Instruction *);
53 bool tryReplaceContWithBra(BasicBlock *);
54 void propagateJoin(BasicBlock *);
55
56 struct TexUse
57 {
58 TexUse(Instruction *use, const Instruction *tex)
59 : insn(use), tex(tex), level(-1) { }
60 Instruction *insn;
61 const Instruction *tex; // or split / mov
62 int level;
63 };
64 struct Limits
65 {
66 Limits() { }
67 Limits(int min, int max) : min(min), max(max) { }
68 int min, max;
69 };
70 bool insertTextureBarriers(Function *);
71 inline bool insnDominatedBy(const Instruction *, const Instruction *) const;
72 void findFirstUses(Instruction *texi, std::list<TexUse> &uses);
73 void findFirstUsesBB(int minGPR, int maxGPR, Instruction *start,
74 const Instruction *texi, std::list<TexUse> &uses,
75 unordered_set<const BasicBlock *> &visited);
76 void addTexUse(std::list<TexUse>&, Instruction *, const Instruction *);
77 const Instruction *recurseDef(const Instruction *);
78
79 private:
80 LValue *rZero;
81 LValue *carry;
82 const bool needTexBar;
83 };
84
85 class NVC0LoweringPass : public Pass
86 {
87 public:
88 NVC0LoweringPass(Program *);
89
90 protected:
91 bool handleRDSV(Instruction *);
92 bool handleWRSV(Instruction *);
93 bool handleEXPORT(Instruction *);
94 bool handleOUT(Instruction *);
95 bool handleDIV(Instruction *);
96 bool handleMOD(Instruction *);
97 bool handleSQRT(Instruction *);
98 bool handlePOW(Instruction *);
99 bool handleTEX(TexInstruction *);
100 bool handleTXD(TexInstruction *);
101 bool handleTXQ(TexInstruction *);
102 virtual bool handleManualTXD(TexInstruction *);
103 bool handleTXLQ(TexInstruction *);
104 bool handleSUQ(Instruction *);
105 bool handleATOM(Instruction *);
106 bool handleCasExch(Instruction *, bool needCctl);
107 void handleSurfaceOpNVE4(TexInstruction *);
108 void handleSharedATOM(Instruction *);
109 void handleSharedATOMNVE4(Instruction *);
110 void handleLDST(Instruction *);
111
112 void checkPredicate(Instruction *);
113
114 virtual bool visit(Instruction *);
115
116 private:
117 virtual bool visit(Function *);
118 virtual bool visit(BasicBlock *);
119
120 void readTessCoord(LValue *dst, int c);
121
122 Value *loadResInfo32(Value *ptr, uint32_t off, uint16_t base);
123 Value *loadResInfo64(Value *ptr, uint32_t off, uint16_t base);
124 Value *loadResLength32(Value *ptr, uint32_t off, uint16_t base);
125 Value *loadSuInfo32(Value *ptr, uint32_t off);
126 Value *loadSuInfo64(Value *ptr, uint32_t off);
127 Value *loadSuLength32(Value *ptr, uint32_t off);
128 Value *loadBufInfo32(Value *ptr, uint32_t off);
129 Value *loadBufInfo64(Value *ptr, uint32_t off);
130 Value *loadBufLength32(Value *ptr, uint32_t off);
131 Value *loadUboInfo32(Value *ptr, uint32_t off);
132 Value *loadUboInfo64(Value *ptr, uint32_t off);
133 Value *loadUboLength32(Value *ptr, uint32_t off);
134 Value *loadMsInfo32(Value *ptr, uint32_t off);
135 Value *loadTexHandle(Value *ptr, unsigned int slot);
136
137 void adjustCoordinatesMS(TexInstruction *);
138 void processSurfaceCoordsNVE4(TexInstruction *);
139
140 protected:
141 BuildUtil bld;
142
143 private:
144 const Target *const targ;
145
146 Symbol *gMemBase;
147 LValue *gpEmitAddress;
148 };
149
150 } // namespace nv50_ir