2 * Copyright 2011 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "codegen/nv50_ir.h"
24 #include "codegen/nv50_ir_target.h"
29 #if __cplusplus >= 201103L
30 #include <unordered_map>
32 #include <tr1/unordered_map>
37 #if __cplusplus >= 201103L
39 using std::unordered_map
;
40 #elif !defined(ANDROID)
42 using std::tr1::unordered_map
;
44 #error Android release before Lollipop is not supported!
47 #define MAX_REGISTER_FILE_SIZE 256
52 RegisterSet(const Target
*);
54 void init(const Target
*);
55 void reset(DataFile
, bool resetMax
= false);
57 void periodicMask(DataFile f
, uint32_t lock
, uint32_t unlock
);
58 void intersect(DataFile f
, const RegisterSet
*);
60 bool assign(int32_t& reg
, DataFile f
, unsigned int size
);
61 void release(DataFile f
, int32_t reg
, unsigned int size
);
62 void occupy(DataFile f
, int32_t reg
, unsigned int size
);
63 void occupy(const Value
*);
64 void occupyMask(DataFile f
, int32_t reg
, uint8_t mask
);
65 bool isOccupied(DataFile f
, int32_t reg
, unsigned int size
) const;
66 bool testOccupy(const Value
*);
67 bool testOccupy(DataFile f
, int32_t reg
, unsigned int size
);
69 inline int getMaxAssigned(DataFile f
) const { return fill
[f
]; }
71 inline unsigned int getFileSize(DataFile f
, uint8_t regSize
) const
73 if (restrictedGPR16Range
&& f
== FILE_GPR
&& regSize
== 2)
74 return (last
[f
] + 1) / 2;
78 inline unsigned int units(DataFile f
, unsigned int size
) const
80 return size
>> unit
[f
];
82 // for regs of size >= 4, id is counted in 4-byte words (like nv50/c0 binary)
83 inline unsigned int idToBytes(const Value
*v
) const
85 return v
->reg
.data
.id
* MIN2(v
->reg
.size
, 4);
87 inline unsigned int idToUnits(const Value
*v
) const
89 return units(v
->reg
.file
, idToBytes(v
));
91 inline int bytesToId(Value
*v
, unsigned int bytes
) const
94 return units(v
->reg
.file
, bytes
);
97 inline int unitsToId(DataFile f
, int u
, uint8_t size
) const
101 return (size
< 4) ? u
: ((u
<< unit
[f
]) / 4);
104 void print(DataFile f
) const;
106 const bool restrictedGPR16Range
;
109 BitSet bits
[LAST_REGISTER_FILE
+ 1];
111 int unit
[LAST_REGISTER_FILE
+ 1]; // log2 of allocation granularity
113 int last
[LAST_REGISTER_FILE
+ 1];
114 int fill
[LAST_REGISTER_FILE
+ 1];
118 RegisterSet::reset(DataFile f
, bool resetMax
)
126 RegisterSet::init(const Target
*targ
)
128 for (unsigned int rf
= 0; rf
<= FILE_ADDRESS
; ++rf
) {
129 DataFile f
= static_cast<DataFile
>(rf
);
130 last
[rf
] = targ
->getFileSize(f
) - 1;
131 unit
[rf
] = targ
->getFileUnit(f
);
133 assert(last
[rf
] < MAX_REGISTER_FILE_SIZE
);
134 bits
[rf
].allocate(last
[rf
] + 1, true);
138 RegisterSet::RegisterSet(const Target
*targ
)
139 : restrictedGPR16Range(targ
->getChipset() < 0xc0)
142 for (unsigned int i
= 0; i
<= LAST_REGISTER_FILE
; ++i
)
143 reset(static_cast<DataFile
>(i
));
147 RegisterSet::periodicMask(DataFile f
, uint32_t lock
, uint32_t unlock
)
149 bits
[f
].periodicMask32(lock
, unlock
);
153 RegisterSet::intersect(DataFile f
, const RegisterSet
*set
)
155 bits
[f
] |= set
->bits
[f
];
159 RegisterSet::print(DataFile f
) const
167 RegisterSet::assign(int32_t& reg
, DataFile f
, unsigned int size
)
169 reg
= bits
[f
].findFreeRange(size
);
172 fill
[f
] = MAX2(fill
[f
], (int32_t)(reg
+ size
- 1));
177 RegisterSet::isOccupied(DataFile f
, int32_t reg
, unsigned int size
) const
179 return bits
[f
].testRange(reg
, size
);
183 RegisterSet::occupy(const Value
*v
)
185 occupy(v
->reg
.file
, idToUnits(v
), v
->reg
.size
>> unit
[v
->reg
.file
]);
189 RegisterSet::occupyMask(DataFile f
, int32_t reg
, uint8_t mask
)
191 bits
[f
].setMask(reg
& ~31, static_cast<uint32_t>(mask
) << (reg
% 32));
195 RegisterSet::occupy(DataFile f
, int32_t reg
, unsigned int size
)
197 bits
[f
].setRange(reg
, size
);
199 INFO_DBG(0, REG_ALLOC
, "reg occupy: %u[%i] %u\n", f
, reg
, size
);
201 fill
[f
] = MAX2(fill
[f
], (int32_t)(reg
+ size
- 1));
205 RegisterSet::testOccupy(const Value
*v
)
207 return testOccupy(v
->reg
.file
,
208 idToUnits(v
), v
->reg
.size
>> unit
[v
->reg
.file
]);
212 RegisterSet::testOccupy(DataFile f
, int32_t reg
, unsigned int size
)
214 if (isOccupied(f
, reg
, size
))
216 occupy(f
, reg
, size
);
221 RegisterSet::release(DataFile f
, int32_t reg
, unsigned int size
)
223 bits
[f
].clrRange(reg
, size
);
225 INFO_DBG(0, REG_ALLOC
, "reg release: %u[%i] %u\n", f
, reg
, size
);
231 RegAlloc(Program
*program
) : prog(program
), sequence(0) { }
237 class PhiMovesPass
: public Pass
{
239 virtual bool visit(BasicBlock
*);
240 inline bool needNewElseBlock(BasicBlock
*b
, BasicBlock
*p
);
241 inline void splitEdges(BasicBlock
*b
);
244 class ArgumentMovesPass
: public Pass
{
246 virtual bool visit(BasicBlock
*);
249 class BuildIntervalsPass
: public Pass
{
251 virtual bool visit(BasicBlock
*);
252 void collectLiveValues(BasicBlock
*);
253 void addLiveRange(Value
*, const BasicBlock
*, int end
);
256 class InsertConstraintsPass
: public Pass
{
258 bool exec(Function
*func
);
260 virtual bool visit(BasicBlock
*);
262 bool insertConstraintMoves();
264 void condenseDefs(Instruction
*);
265 void condenseSrcs(Instruction
*, const int first
, const int last
);
267 void addHazard(Instruction
*i
, const ValueRef
*src
);
268 void textureMask(TexInstruction
*);
269 void addConstraint(Instruction
*, int s
, int n
);
270 bool detectConflict(Instruction
*, int s
);
272 // target specific functions, TODO: put in subclass or Target
273 void texConstraintNV50(TexInstruction
*);
274 void texConstraintNVC0(TexInstruction
*);
275 void texConstraintNVE0(TexInstruction
*);
276 void texConstraintGM107(TexInstruction
*);
278 std::list
<Instruction
*> constrList
;
283 bool buildLiveSets(BasicBlock
*);
289 // instructions in control flow / chronological order
292 int sequence
; // for manual passes through CFG
295 typedef std::pair
<Value
*, Value
*> ValuePair
;
297 class SpillCodeInserter
300 SpillCodeInserter(Function
*fn
) : func(fn
), stackSize(0), stackBase(0) { }
302 bool run(const std::list
<ValuePair
>&);
304 Symbol
*assignSlot(const Interval
&, const unsigned int size
);
305 Value
*offsetSlot(Value
*, const LValue
*);
306 inline int32_t getStackSize() const { return stackSize
; }
314 std::list
<Value
*> residents
; // needed to recalculate occup
317 inline uint8_t size() const { return sym
->reg
.size
; }
319 std::list
<SpillSlot
> slots
;
323 LValue
*unspill(Instruction
*usei
, LValue
*, Value
*slot
);
324 void spill(Instruction
*defi
, Value
*slot
, LValue
*);
328 RegAlloc::BuildIntervalsPass::addLiveRange(Value
*val
,
329 const BasicBlock
*bb
,
332 Instruction
*insn
= val
->getUniqueInsn();
335 insn
= bb
->getFirst();
337 assert(bb
->getFirst()->serial
<= bb
->getExit()->serial
);
338 assert(bb
->getExit()->serial
+ 1 >= end
);
340 int begin
= insn
->serial
;
341 if (begin
< bb
->getEntry()->serial
|| begin
> bb
->getExit()->serial
)
342 begin
= bb
->getEntry()->serial
;
344 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "%%%i <- live range [%i(%i), %i)\n",
345 val
->id
, begin
, insn
->serial
, end
);
347 if (begin
!= end
) // empty ranges are only added as hazards for fixed regs
348 val
->livei
.extend(begin
, end
);
352 RegAlloc::PhiMovesPass::needNewElseBlock(BasicBlock
*b
, BasicBlock
*p
)
354 if (b
->cfg
.incidentCount() <= 1)
358 for (Graph::EdgeIterator ei
= p
->cfg
.outgoing(); !ei
.end(); ei
.next())
359 if (ei
.getType() == Graph::Edge::TREE
||
360 ei
.getType() == Graph::Edge::FORWARD
)
366 size_t operator()(const std::pair
<Instruction
*, BasicBlock
*>& val
) const {
367 return hash
<Instruction
*>()(val
.first
) * 31 +
368 hash
<BasicBlock
*>()(val
.second
);
372 typedef unordered_map
<
373 std::pair
<Instruction
*, BasicBlock
*>, Value
*, PhiMapHash
> PhiMap
;
375 // Critical edges need to be split up so that work can be inserted along
376 // specific edge transitions. Unfortunately manipulating incident edges into a
377 // BB invalidates all the PHI nodes since their sources are implicitly ordered
378 // by incident edge order.
380 // TODO: Make it so that that is not the case, and PHI nodes store pointers to
383 RegAlloc::PhiMovesPass::splitEdges(BasicBlock
*bb
)
387 Graph::EdgeIterator ei
;
388 std::stack
<BasicBlock
*> stack
;
391 for (ei
= bb
->cfg
.incident(); !ei
.end(); ei
.next()) {
392 pb
= BasicBlock::get(ei
.getNode());
394 if (needNewElseBlock(bb
, pb
))
398 // No critical edges were found, no need to perform any work.
402 // We're about to, potentially, reorder the inbound edges. This means that
403 // we need to hold on to the (phi, bb) -> src mapping, and fix up the phi
404 // nodes after the graph has been modified.
408 for (ei
= bb
->cfg
.incident(); !ei
.end(); ei
.next(), j
++) {
409 pb
= BasicBlock::get(ei
.getNode());
410 for (phi
= bb
->getPhi(); phi
&& phi
->op
== OP_PHI
; phi
= phi
->next
)
411 phis
.insert(std::make_pair(std::make_pair(phi
, pb
), phi
->getSrc(j
)));
414 while (!stack
.empty()) {
416 pn
= new BasicBlock(func
);
419 pb
->cfg
.detach(&bb
->cfg
);
420 pb
->cfg
.attach(&pn
->cfg
, Graph::Edge::TREE
);
421 pn
->cfg
.attach(&bb
->cfg
, Graph::Edge::FORWARD
);
423 assert(pb
->getExit()->op
!= OP_CALL
);
424 if (pb
->getExit()->asFlow()->target
.bb
== bb
)
425 pb
->getExit()->asFlow()->target
.bb
= pn
;
427 for (phi
= bb
->getPhi(); phi
&& phi
->op
== OP_PHI
; phi
= phi
->next
) {
428 PhiMap::iterator it
= phis
.find(std::make_pair(phi
, pb
));
429 assert(it
!= phis
.end());
430 phis
.insert(std::make_pair(std::make_pair(phi
, pn
), it
->second
));
435 // Now go through and fix up all of the phi node sources.
437 for (ei
= bb
->cfg
.incident(); !ei
.end(); ei
.next(), j
++) {
438 pb
= BasicBlock::get(ei
.getNode());
439 for (phi
= bb
->getPhi(); phi
&& phi
->op
== OP_PHI
; phi
= phi
->next
) {
440 PhiMap::const_iterator it
= phis
.find(std::make_pair(phi
, pb
));
441 assert(it
!= phis
.end());
443 phi
->setSrc(j
, it
->second
);
448 // For each operand of each PHI in b, generate a new value by inserting a MOV
449 // at the end of the block it is coming from and replace the operand with its
450 // result. This eliminates liveness conflicts and enables us to let values be
451 // copied to the right register if such a conflict exists nonetheless.
453 // These MOVs are also crucial in making sure the live intervals of phi srces
454 // are extended until the end of the loop, since they are not included in the
457 RegAlloc::PhiMovesPass::visit(BasicBlock
*bb
)
459 Instruction
*phi
, *mov
;
463 // insert MOVs (phi->src(j) should stem from j-th in-BB)
465 for (Graph::EdgeIterator ei
= bb
->cfg
.incident(); !ei
.end(); ei
.next()) {
466 BasicBlock
*pb
= BasicBlock::get(ei
.getNode());
467 if (!pb
->isTerminated())
468 pb
->insertTail(new_FlowInstruction(func
, OP_BRA
, bb
));
470 for (phi
= bb
->getPhi(); phi
&& phi
->op
== OP_PHI
; phi
= phi
->next
) {
471 LValue
*tmp
= new_LValue(func
, phi
->getDef(0)->asLValue());
472 mov
= new_Instruction(func
, OP_MOV
, typeOfSize(tmp
->reg
.size
));
474 mov
->setSrc(0, phi
->getSrc(j
));
478 pb
->insertBefore(pb
->getExit(), mov
);
487 RegAlloc::ArgumentMovesPass::visit(BasicBlock
*bb
)
489 // Bind function call inputs/outputs to the same physical register
490 // the callee uses, inserting moves as appropriate for the case a
492 for (Instruction
*i
= bb
->getEntry(); i
; i
= i
->next
) {
493 FlowInstruction
*cal
= i
->asFlow();
494 // TODO: Handle indirect calls.
495 // Right now they should only be generated for builtins.
496 if (!cal
|| cal
->op
!= OP_CALL
|| cal
->builtin
|| cal
->indirect
)
498 RegisterSet
clobberSet(prog
->getTarget());
500 // Bind input values.
501 for (int s
= cal
->indirect
? 1 : 0; cal
->srcExists(s
); ++s
) {
502 const int t
= cal
->indirect
? (s
- 1) : s
;
503 LValue
*tmp
= new_LValue(func
, cal
->getSrc(s
)->asLValue());
504 tmp
->reg
.data
.id
= cal
->target
.fn
->ins
[t
].rep()->reg
.data
.id
;
507 new_Instruction(func
, OP_MOV
, typeOfSize(tmp
->reg
.size
));
509 mov
->setSrc(0, cal
->getSrc(s
));
512 bb
->insertBefore(cal
, mov
);
515 // Bind output values.
516 for (int d
= 0; cal
->defExists(d
); ++d
) {
517 LValue
*tmp
= new_LValue(func
, cal
->getDef(d
)->asLValue());
518 tmp
->reg
.data
.id
= cal
->target
.fn
->outs
[d
].rep()->reg
.data
.id
;
521 new_Instruction(func
, OP_MOV
, typeOfSize(tmp
->reg
.size
));
523 mov
->setDef(0, cal
->getDef(d
));
526 bb
->insertAfter(cal
, mov
);
527 clobberSet
.occupy(tmp
);
530 // Bind clobbered values.
531 for (std::deque
<Value
*>::iterator it
= cal
->target
.fn
->clobbers
.begin();
532 it
!= cal
->target
.fn
->clobbers
.end();
534 if (clobberSet
.testOccupy(*it
)) {
535 Value
*tmp
= new_LValue(func
, (*it
)->asLValue());
536 tmp
->reg
.data
.id
= (*it
)->reg
.data
.id
;
537 cal
->setDef(cal
->defCount(), tmp
);
542 // Update the clobber set of the function.
543 if (BasicBlock::get(func
->cfgExit
) == bb
) {
544 func
->buildDefSets();
545 for (unsigned int i
= 0; i
< bb
->defSet
.getSize(); ++i
)
546 if (bb
->defSet
.test(i
))
547 func
->clobbers
.push_back(func
->getLValue(i
));
553 // Build the set of live-in variables of bb.
555 RegAlloc::buildLiveSets(BasicBlock
*bb
)
557 Function
*f
= bb
->getFunction();
562 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "buildLiveSets(BB:%i)\n", bb
->getId());
564 bb
->liveSet
.allocate(func
->allLValues
.getSize(), false);
567 for (Graph::EdgeIterator ei
= bb
->cfg
.outgoing(); !ei
.end(); ei
.next()) {
568 bn
= BasicBlock::get(ei
.getNode());
571 if (bn
->cfg
.visit(sequence
))
572 if (!buildLiveSets(bn
))
574 if (n
++ || bb
->liveSet
.marker
)
575 bb
->liveSet
|= bn
->liveSet
;
577 bb
->liveSet
= bn
->liveSet
;
579 if (!n
&& !bb
->liveSet
.marker
)
581 bb
->liveSet
.marker
= true;
583 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
) {
584 INFO("BB:%i live set of out blocks:\n", bb
->getId());
588 // if (!bb->getEntry())
591 if (bb
== BasicBlock::get(f
->cfgExit
)) {
592 for (std::deque
<ValueRef
>::iterator it
= f
->outs
.begin();
593 it
!= f
->outs
.end(); ++it
) {
594 assert(it
->get()->asLValue());
595 bb
->liveSet
.set(it
->get()->id
);
599 for (i
= bb
->getExit(); i
&& i
!= bb
->getEntry()->prev
; i
= i
->prev
) {
600 for (d
= 0; i
->defExists(d
); ++d
)
601 bb
->liveSet
.clr(i
->getDef(d
)->id
);
602 for (s
= 0; i
->srcExists(s
); ++s
)
603 if (i
->getSrc(s
)->asLValue())
604 bb
->liveSet
.set(i
->getSrc(s
)->id
);
606 for (i
= bb
->getPhi(); i
&& i
->op
== OP_PHI
; i
= i
->next
)
607 bb
->liveSet
.clr(i
->getDef(0)->id
);
609 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
) {
610 INFO("BB:%i live set after propagation:\n", bb
->getId());
618 RegAlloc::BuildIntervalsPass::collectLiveValues(BasicBlock
*bb
)
620 BasicBlock
*bbA
= NULL
, *bbB
= NULL
;
622 if (bb
->cfg
.outgoingCount()) {
623 // trickery to save a loop of OR'ing liveSets
624 // aliasing works fine with BitSet::setOr
625 for (Graph::EdgeIterator ei
= bb
->cfg
.outgoing(); !ei
.end(); ei
.next()) {
626 if (ei
.getType() == Graph::Edge::DUMMY
)
629 bb
->liveSet
.setOr(&bbA
->liveSet
, &bbB
->liveSet
);
634 bbB
= BasicBlock::get(ei
.getNode());
636 bb
->liveSet
.setOr(&bbB
->liveSet
, bbA
? &bbA
->liveSet
: NULL
);
638 if (bb
->cfg
.incidentCount()) {
644 RegAlloc::BuildIntervalsPass::visit(BasicBlock
*bb
)
646 collectLiveValues(bb
);
648 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "BuildIntervals(BB:%i)\n", bb
->getId());
650 // go through out blocks and delete phi sources that do not originate from
651 // the current block from the live set
652 for (Graph::EdgeIterator ei
= bb
->cfg
.outgoing(); !ei
.end(); ei
.next()) {
653 BasicBlock
*out
= BasicBlock::get(ei
.getNode());
655 for (Instruction
*i
= out
->getPhi(); i
&& i
->op
== OP_PHI
; i
= i
->next
) {
656 bb
->liveSet
.clr(i
->getDef(0)->id
);
658 for (int s
= 0; i
->srcExists(s
); ++s
) {
659 assert(i
->src(s
).getInsn());
660 if (i
->getSrc(s
)->getUniqueInsn()->bb
== bb
) // XXX: reachableBy ?
661 bb
->liveSet
.set(i
->getSrc(s
)->id
);
663 bb
->liveSet
.clr(i
->getSrc(s
)->id
);
668 // remaining live-outs are live until end
670 for (unsigned int j
= 0; j
< bb
->liveSet
.getSize(); ++j
)
671 if (bb
->liveSet
.test(j
))
672 addLiveRange(func
->getLValue(j
), bb
, bb
->getExit()->serial
+ 1);
675 for (Instruction
*i
= bb
->getExit(); i
&& i
->op
!= OP_PHI
; i
= i
->prev
) {
676 for (int d
= 0; i
->defExists(d
); ++d
) {
677 bb
->liveSet
.clr(i
->getDef(d
)->id
);
678 if (i
->getDef(d
)->reg
.data
.id
>= 0) // add hazard for fixed regs
679 i
->getDef(d
)->livei
.extend(i
->serial
, i
->serial
);
682 for (int s
= 0; i
->srcExists(s
); ++s
) {
683 if (!i
->getSrc(s
)->asLValue())
685 if (!bb
->liveSet
.test(i
->getSrc(s
)->id
)) {
686 bb
->liveSet
.set(i
->getSrc(s
)->id
);
687 addLiveRange(i
->getSrc(s
), bb
, i
->serial
);
692 if (bb
== BasicBlock::get(func
->cfg
.getRoot())) {
693 for (std::deque
<ValueDef
>::iterator it
= func
->ins
.begin();
694 it
!= func
->ins
.end(); ++it
) {
695 if (it
->get()->reg
.data
.id
>= 0) // add hazard for fixed regs
696 it
->get()->livei
.extend(0, 1);
704 #define JOIN_MASK_PHI (1 << 0)
705 #define JOIN_MASK_UNION (1 << 1)
706 #define JOIN_MASK_MOV (1 << 2)
707 #define JOIN_MASK_TEX (1 << 3)
712 GCRA(Function
*, SpillCodeInserter
&);
715 bool allocateRegisters(ArrayList
& insns
);
717 void printNodeInfo() const;
720 class RIG_Node
: public Graph::Node
725 void init(const RegisterSet
&, LValue
*);
727 void addInterference(RIG_Node
*);
728 void addRegPreference(RIG_Node
*);
730 inline LValue
*getValue() const
732 return reinterpret_cast<LValue
*>(data
);
734 inline void setValue(LValue
*lval
) { data
= lval
; }
736 inline uint8_t getCompMask() const
738 return ((1 << colors
) - 1) << (reg
& 7);
741 static inline RIG_Node
*get(const Graph::EdgeIterator
& ei
)
743 return static_cast<RIG_Node
*>(ei
.getNode());
748 uint16_t degreeLimit
; // if deg < degLimit, node is trivially colourable
756 // list pointers for simplify() phase
760 // union of the live intervals of all coalesced values (we want to retain
761 // the separate intervals for testing interference of compound values)
764 std::list
<RIG_Node
*> prefRegs
;
768 inline RIG_Node
*getNode(const LValue
*v
) const { return &nodes
[v
->id
]; }
770 void buildRIG(ArrayList
&);
771 bool coalesce(ArrayList
&);
772 bool doCoalesce(ArrayList
&, unsigned int mask
);
773 void calculateSpillWeights();
775 bool selectRegisters();
776 void cleanup(const bool success
);
778 void simplifyEdge(RIG_Node
*, RIG_Node
*);
779 void simplifyNode(RIG_Node
*);
781 bool coalesceValues(Value
*, Value
*, bool force
);
782 void resolveSplitsAndMerges();
783 void makeCompound(Instruction
*, bool isSplit
);
785 inline void checkInterference(const RIG_Node
*, Graph::EdgeIterator
&);
787 inline void insertOrderedTail(std::list
<RIG_Node
*>&, RIG_Node
*);
788 void checkList(std::list
<RIG_Node
*>&);
791 std::stack
<uint32_t> stack
;
793 // list headers for simplify() phase
799 unsigned int nodeCount
;
804 static uint8_t relDegree
[17][17];
808 // need to fixup register id for participants of OP_MERGE/SPLIT
809 std::list
<Instruction
*> merges
;
810 std::list
<Instruction
*> splits
;
812 SpillCodeInserter
& spill
;
813 std::list
<ValuePair
> mustSpill
;
816 uint8_t GCRA::relDegree
[17][17];
818 GCRA::RIG_Node::RIG_Node() : Node(NULL
), next(this), prev(this)
824 GCRA::printNodeInfo() const
826 for (unsigned int i
= 0; i
< nodeCount
; ++i
) {
827 if (!nodes
[i
].colors
)
829 INFO("RIG_Node[%%%i]($[%u]%i): %u colors, weight %f, deg %u/%u\n X",
831 nodes
[i
].f
,nodes
[i
].reg
,nodes
[i
].colors
,
833 nodes
[i
].degree
, nodes
[i
].degreeLimit
);
835 for (Graph::EdgeIterator ei
= nodes
[i
].outgoing(); !ei
.end(); ei
.next())
836 INFO(" %%%i", RIG_Node::get(ei
)->getValue()->id
);
837 for (Graph::EdgeIterator ei
= nodes
[i
].incident(); !ei
.end(); ei
.next())
838 INFO(" %%%i", RIG_Node::get(ei
)->getValue()->id
);
844 isShortRegOp(Instruction
*insn
)
846 // Immediates are always in src1. Every other situation can be resolved by
847 // using a long encoding.
848 return insn
->srcExists(1) && insn
->src(1).getFile() == FILE_IMMEDIATE
;
851 // Check if this LValue is ever used in an instruction that can't be encoded
852 // with long registers (i.e. > r63)
854 isShortRegVal(LValue
*lval
)
856 if (lval
->getInsn() == NULL
)
858 for (Value::DefCIterator def
= lval
->defs
.begin();
859 def
!= lval
->defs
.end(); ++def
)
860 if (isShortRegOp((*def
)->getInsn()))
862 for (Value::UseCIterator use
= lval
->uses
.begin();
863 use
!= lval
->uses
.end(); ++use
)
864 if (isShortRegOp((*use
)->getInsn()))
870 GCRA::RIG_Node::init(const RegisterSet
& regs
, LValue
*lval
)
873 if (lval
->reg
.data
.id
>= 0)
874 lval
->noSpill
= lval
->fixedReg
= 1;
876 colors
= regs
.units(lval
->reg
.file
, lval
->reg
.size
);
879 if (lval
->reg
.data
.id
>= 0)
880 reg
= regs
.idToUnits(lval
);
882 weight
= std::numeric_limits
<float>::infinity();
884 int size
= regs
.getFileSize(f
, lval
->reg
.size
);
885 // On nv50, we lose a bit of gpr encoding when there's an embedded
887 if (regs
.restrictedGPR16Range
&& f
== FILE_GPR
&& isShortRegVal(lval
))
890 degreeLimit
-= relDegree
[1][colors
] - 1;
892 livei
.insert(lval
->livei
);
896 GCRA::coalesceValues(Value
*dst
, Value
*src
, bool force
)
898 LValue
*rep
= dst
->join
->asLValue();
899 LValue
*val
= src
->join
->asLValue();
901 if (!force
&& val
->reg
.data
.id
>= 0) {
902 rep
= src
->join
->asLValue();
903 val
= dst
->join
->asLValue();
905 RIG_Node
*nRep
= &nodes
[rep
->id
];
906 RIG_Node
*nVal
= &nodes
[val
->id
];
908 if (src
->reg
.file
!= dst
->reg
.file
) {
911 WARN("forced coalescing of values in different files !\n");
913 if (!force
&& dst
->reg
.size
!= src
->reg
.size
)
916 if ((rep
->reg
.data
.id
>= 0) && (rep
->reg
.data
.id
!= val
->reg
.data
.id
)) {
918 if (val
->reg
.data
.id
>= 0)
919 WARN("forced coalescing of values in different fixed regs !\n");
921 if (val
->reg
.data
.id
>= 0)
923 // make sure that there is no overlap with the fixed register of rep
924 for (ArrayList::Iterator it
= func
->allLValues
.iterator();
925 !it
.end(); it
.next()) {
926 Value
*reg
= reinterpret_cast<Value
*>(it
.get())->asLValue();
928 if (reg
->interfers(rep
) && reg
->livei
.overlaps(nVal
->livei
))
934 if (!force
&& nRep
->livei
.overlaps(nVal
->livei
))
937 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "joining %%%i($%i) <- %%%i\n",
938 rep
->id
, rep
->reg
.data
.id
, val
->id
);
940 // set join pointer of all values joined with val
941 for (Value::DefIterator def
= val
->defs
.begin(); def
!= val
->defs
.end();
943 (*def
)->get()->join
= rep
;
944 assert(rep
->join
== rep
&& val
->join
== rep
);
946 // add val's definitions to rep and extend the live interval of its RIG node
947 rep
->defs
.insert(rep
->defs
.end(), val
->defs
.begin(), val
->defs
.end());
948 nRep
->livei
.unify(nVal
->livei
);
953 GCRA::coalesce(ArrayList
& insns
)
955 bool ret
= doCoalesce(insns
, JOIN_MASK_PHI
);
958 switch (func
->getProgram()->getTarget()->getChipset() & ~0xf) {
963 ret
= doCoalesce(insns
, JOIN_MASK_UNION
| JOIN_MASK_TEX
);
973 ret
= doCoalesce(insns
, JOIN_MASK_UNION
);
980 return doCoalesce(insns
, JOIN_MASK_MOV
);
983 static inline uint8_t makeCompMask(int compSize
, int base
, int size
)
985 uint8_t m
= ((1 << size
) - 1) << base
;
997 assert(compSize
<= 8);
1002 // Used when coalescing moves. The non-compound value will become one, e.g.:
1003 // mov b32 $r0 $r2 / merge b64 $r0d { $r0 $r1 }
1004 // split b64 { $r0 $r1 } $r0d / mov b64 $r0d f64 $r2d
1005 static inline void copyCompound(Value
*dst
, Value
*src
)
1007 LValue
*ldst
= dst
->asLValue();
1008 LValue
*lsrc
= src
->asLValue();
1010 if (ldst
->compound
&& !lsrc
->compound
) {
1011 LValue
*swap
= lsrc
;
1016 ldst
->compound
= lsrc
->compound
;
1017 ldst
->compMask
= lsrc
->compMask
;
1021 GCRA::makeCompound(Instruction
*insn
, bool split
)
1023 LValue
*rep
= (split
? insn
->getSrc(0) : insn
->getDef(0))->asLValue();
1025 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
) {
1026 INFO("makeCompound(split = %i): ", split
);
1030 const unsigned int size
= getNode(rep
)->colors
;
1031 unsigned int base
= 0;
1034 rep
->compMask
= 0xff;
1037 for (int c
= 0; split
? insn
->defExists(c
) : insn
->srcExists(c
); ++c
) {
1038 LValue
*val
= (split
? insn
->getDef(c
) : insn
->getSrc(c
))->asLValue();
1042 val
->compMask
= 0xff;
1043 val
->compMask
&= makeCompMask(size
, base
, getNode(val
)->colors
);
1044 assert(val
->compMask
);
1046 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "compound: %%%i:%02x <- %%%i:%02x\n",
1047 rep
->id
, rep
->compMask
, val
->id
, val
->compMask
);
1049 base
+= getNode(val
)->colors
;
1051 assert(base
== size
);
1055 GCRA::doCoalesce(ArrayList
& insns
, unsigned int mask
)
1059 for (n
= 0; n
< insns
.getSize(); ++n
) {
1061 Instruction
*insn
= reinterpret_cast<Instruction
*>(insns
.get(n
));
1065 if (!(mask
& JOIN_MASK_PHI
))
1067 for (c
= 0; insn
->srcExists(c
); ++c
)
1068 if (!coalesceValues(insn
->getDef(0), insn
->getSrc(c
), false)) {
1070 ERROR("failed to coalesce phi operands\n");
1076 if (!(mask
& JOIN_MASK_UNION
))
1078 for (c
= 0; insn
->srcExists(c
); ++c
)
1079 coalesceValues(insn
->getDef(0), insn
->getSrc(c
), true);
1080 if (insn
->op
== OP_MERGE
) {
1081 merges
.push_back(insn
);
1082 if (insn
->srcExists(1))
1083 makeCompound(insn
, false);
1087 if (!(mask
& JOIN_MASK_UNION
))
1089 splits
.push_back(insn
);
1090 for (c
= 0; insn
->defExists(c
); ++c
)
1091 coalesceValues(insn
->getSrc(0), insn
->getDef(c
), true);
1092 makeCompound(insn
, true);
1095 if (!(mask
& JOIN_MASK_MOV
))
1098 if (!insn
->getDef(0)->uses
.empty())
1099 i
= (*insn
->getDef(0)->uses
.begin())->getInsn();
1100 // if this is a contraint-move there will only be a single use
1101 if (i
&& i
->op
== OP_MERGE
) // do we really still need this ?
1103 i
= insn
->getSrc(0)->getUniqueInsn();
1104 if (i
&& !i
->constrainedDefs()) {
1105 if (coalesceValues(insn
->getDef(0), insn
->getSrc(0), false))
1106 copyCompound(insn
->getSrc(0), insn
->getDef(0));
1119 if (!(mask
& JOIN_MASK_TEX
))
1121 for (c
= 0; insn
->srcExists(c
) && c
!= insn
->predSrc
; ++c
)
1122 coalesceValues(insn
->getDef(c
), insn
->getSrc(c
), true);
1132 GCRA::RIG_Node::addInterference(RIG_Node
*node
)
1134 this->degree
+= relDegree
[node
->colors
][colors
];
1135 node
->degree
+= relDegree
[colors
][node
->colors
];
1137 this->attach(node
, Graph::Edge::CROSS
);
1141 GCRA::RIG_Node::addRegPreference(RIG_Node
*node
)
1143 prefRegs
.push_back(node
);
1146 GCRA::GCRA(Function
*fn
, SpillCodeInserter
& spill
) :
1148 regs(fn
->getProgram()->getTarget()),
1151 prog
= func
->getProgram();
1153 // initialize relative degrees array - i takes away from j
1154 for (int i
= 1; i
<= 16; ++i
)
1155 for (int j
= 1; j
<= 16; ++j
)
1156 relDegree
[i
][j
] = j
* ((i
+ j
- 1) / j
);
1166 GCRA::checkList(std::list
<RIG_Node
*>& lst
)
1168 GCRA::RIG_Node
*prev
= NULL
;
1170 for (std::list
<RIG_Node
*>::iterator it
= lst
.begin();
1173 assert((*it
)->getValue()->join
== (*it
)->getValue());
1175 assert(prev
->livei
.begin() <= (*it
)->livei
.begin());
1181 GCRA::insertOrderedTail(std::list
<RIG_Node
*>& list
, RIG_Node
*node
)
1183 if (node
->livei
.isEmpty())
1185 // only the intervals of joined values don't necessarily arrive in order
1186 std::list
<RIG_Node
*>::iterator prev
, it
;
1187 for (it
= list
.end(); it
!= list
.begin(); it
= prev
) {
1190 if ((*prev
)->livei
.begin() <= node
->livei
.begin())
1193 list
.insert(it
, node
);
1197 GCRA::buildRIG(ArrayList
& insns
)
1199 std::list
<RIG_Node
*> values
, active
;
1201 for (std::deque
<ValueDef
>::iterator it
= func
->ins
.begin();
1202 it
!= func
->ins
.end(); ++it
)
1203 insertOrderedTail(values
, getNode(it
->get()->asLValue()));
1205 for (int i
= 0; i
< insns
.getSize(); ++i
) {
1206 Instruction
*insn
= reinterpret_cast<Instruction
*>(insns
.get(i
));
1207 for (int d
= 0; insn
->defExists(d
); ++d
)
1208 if (insn
->getDef(d
)->rep() == insn
->getDef(d
))
1209 insertOrderedTail(values
, getNode(insn
->getDef(d
)->asLValue()));
1213 while (!values
.empty()) {
1214 RIG_Node
*cur
= values
.front();
1216 for (std::list
<RIG_Node
*>::iterator it
= active
.begin();
1217 it
!= active
.end();) {
1218 RIG_Node
*node
= *it
;
1220 if (node
->livei
.end() <= cur
->livei
.begin()) {
1221 it
= active
.erase(it
);
1223 if (node
->f
== cur
->f
&& node
->livei
.overlaps(cur
->livei
))
1224 cur
->addInterference(node
);
1229 active
.push_back(cur
);
1234 GCRA::calculateSpillWeights()
1236 for (unsigned int i
= 0; i
< nodeCount
; ++i
) {
1237 RIG_Node
*const n
= &nodes
[i
];
1238 if (!nodes
[i
].colors
|| nodes
[i
].livei
.isEmpty())
1240 if (nodes
[i
].reg
>= 0) {
1242 regs
.occupy(n
->f
, n
->reg
, n
->colors
);
1245 LValue
*val
= nodes
[i
].getValue();
1247 if (!val
->noSpill
) {
1249 for (Value::DefIterator it
= val
->defs
.begin();
1250 it
!= val
->defs
.end();
1252 rc
+= (*it
)->get()->refCount();
1255 (float)rc
* (float)rc
/ (float)nodes
[i
].livei
.extent();
1258 if (nodes
[i
].degree
< nodes
[i
].degreeLimit
) {
1260 if (val
->reg
.size
> 4)
1262 DLLIST_ADDHEAD(&lo
[l
], &nodes
[i
]);
1264 DLLIST_ADDHEAD(&hi
, &nodes
[i
]);
1267 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
)
1272 GCRA::simplifyEdge(RIG_Node
*a
, RIG_Node
*b
)
1274 bool move
= b
->degree
>= b
->degreeLimit
;
1276 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
,
1277 "edge: (%%%i, deg %u/%u) >-< (%%%i, deg %u/%u)\n",
1278 a
->getValue()->id
, a
->degree
, a
->degreeLimit
,
1279 b
->getValue()->id
, b
->degree
, b
->degreeLimit
);
1281 b
->degree
-= relDegree
[a
->colors
][b
->colors
];
1283 move
= move
&& b
->degree
< b
->degreeLimit
;
1284 if (move
&& !DLLIST_EMPTY(b
)) {
1285 int l
= (b
->getValue()->reg
.size
> 4) ? 1 : 0;
1287 DLLIST_ADDTAIL(&lo
[l
], b
);
1292 GCRA::simplifyNode(RIG_Node
*node
)
1294 for (Graph::EdgeIterator ei
= node
->outgoing(); !ei
.end(); ei
.next())
1295 simplifyEdge(node
, RIG_Node::get(ei
));
1297 for (Graph::EdgeIterator ei
= node
->incident(); !ei
.end(); ei
.next())
1298 simplifyEdge(node
, RIG_Node::get(ei
));
1301 stack
.push(node
->getValue()->id
);
1303 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "SIMPLIFY: pushed %%%i%s\n",
1304 node
->getValue()->id
,
1305 (node
->degree
< node
->degreeLimit
) ? "" : "(spill)");
1312 if (!DLLIST_EMPTY(&lo
[0])) {
1314 simplifyNode(lo
[0].next
);
1315 } while (!DLLIST_EMPTY(&lo
[0]));
1317 if (!DLLIST_EMPTY(&lo
[1])) {
1318 simplifyNode(lo
[1].next
);
1320 if (!DLLIST_EMPTY(&hi
)) {
1321 RIG_Node
*best
= hi
.next
;
1322 float bestScore
= best
->weight
/ (float)best
->degree
;
1324 for (RIG_Node
*it
= best
->next
; it
!= &hi
; it
= it
->next
) {
1325 float score
= it
->weight
/ (float)it
->degree
;
1326 if (score
< bestScore
) {
1331 if (isinf(bestScore
)) {
1332 ERROR("no viable spill candidates left\n");
1343 GCRA::checkInterference(const RIG_Node
*node
, Graph::EdgeIterator
& ei
)
1345 const RIG_Node
*intf
= RIG_Node::get(ei
);
1349 const LValue
*vA
= node
->getValue();
1350 const LValue
*vB
= intf
->getValue();
1352 const uint8_t intfMask
= ((1 << intf
->colors
) - 1) << (intf
->reg
& 7);
1354 if (vA
->compound
| vB
->compound
) {
1355 // NOTE: this only works for >aligned< register tuples !
1356 for (Value::DefCIterator D
= vA
->defs
.begin(); D
!= vA
->defs
.end(); ++D
) {
1357 for (Value::DefCIterator d
= vB
->defs
.begin(); d
!= vB
->defs
.end(); ++d
) {
1358 const LValue
*vD
= (*D
)->get()->asLValue();
1359 const LValue
*vd
= (*d
)->get()->asLValue();
1361 if (!vD
->livei
.overlaps(vd
->livei
)) {
1362 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "(%%%i) X (%%%i): no overlap\n",
1367 uint8_t mask
= vD
->compound
? vD
->compMask
: ~0;
1369 assert(vB
->compound
);
1370 mask
&= vd
->compMask
& vB
->compMask
;
1375 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
,
1376 "(%%%i)%02x X (%%%i)%02x & %02x: $r%i.%02x\n",
1378 vD
->compound
? vD
->compMask
: 0xff,
1380 vd
->compound
? vd
->compMask
: intfMask
,
1381 vB
->compMask
, intf
->reg
& ~7, mask
);
1383 regs
.occupyMask(node
->f
, intf
->reg
& ~7, mask
);
1387 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
,
1388 "(%%%i) X (%%%i): $r%i + %u\n",
1389 vA
->id
, vB
->id
, intf
->reg
, intf
->colors
);
1390 regs
.occupy(node
->f
, intf
->reg
, intf
->colors
);
1395 GCRA::selectRegisters()
1397 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "\nSELECT phase\n");
1399 while (!stack
.empty()) {
1400 RIG_Node
*node
= &nodes
[stack
.top()];
1403 regs
.reset(node
->f
);
1405 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "\nNODE[%%%i, %u colors]\n",
1406 node
->getValue()->id
, node
->colors
);
1408 for (Graph::EdgeIterator ei
= node
->outgoing(); !ei
.end(); ei
.next())
1409 checkInterference(node
, ei
);
1410 for (Graph::EdgeIterator ei
= node
->incident(); !ei
.end(); ei
.next())
1411 checkInterference(node
, ei
);
1413 if (!node
->prefRegs
.empty()) {
1414 for (std::list
<RIG_Node
*>::const_iterator it
= node
->prefRegs
.begin();
1415 it
!= node
->prefRegs
.end();
1417 if ((*it
)->reg
>= 0 &&
1418 regs
.testOccupy(node
->f
, (*it
)->reg
, node
->colors
)) {
1419 node
->reg
= (*it
)->reg
;
1426 LValue
*lval
= node
->getValue();
1427 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
)
1428 regs
.print(node
->f
);
1429 bool ret
= regs
.assign(node
->reg
, node
->f
, node
->colors
);
1431 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "assigned reg %i\n", node
->reg
);
1432 lval
->compMask
= node
->getCompMask();
1434 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "must spill: %%%i (size %u)\n",
1435 lval
->id
, lval
->reg
.size
);
1436 Symbol
*slot
= NULL
;
1437 if (lval
->reg
.file
== FILE_GPR
)
1438 slot
= spill
.assignSlot(node
->livei
, lval
->reg
.size
);
1439 mustSpill
.push_back(ValuePair(lval
, slot
));
1442 if (!mustSpill
.empty())
1444 for (unsigned int i
= 0; i
< nodeCount
; ++i
) {
1445 LValue
*lval
= nodes
[i
].getValue();
1446 if (nodes
[i
].reg
>= 0 && nodes
[i
].colors
> 0)
1448 regs
.unitsToId(nodes
[i
].f
, nodes
[i
].reg
, lval
->reg
.size
);
1454 GCRA::allocateRegisters(ArrayList
& insns
)
1458 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
,
1459 "allocateRegisters to %u instructions\n", insns
.getSize());
1461 nodeCount
= func
->allLValues
.getSize();
1462 nodes
= new RIG_Node
[nodeCount
];
1465 for (unsigned int i
= 0; i
< nodeCount
; ++i
) {
1466 LValue
*lval
= reinterpret_cast<LValue
*>(func
->allLValues
.get(i
));
1468 nodes
[i
].init(regs
, lval
);
1469 RIG
.insert(&nodes
[i
]);
1471 if (lval
->inFile(FILE_GPR
) && lval
->getInsn() != NULL
&&
1472 prog
->getTarget()->getChipset() < 0xc0) {
1473 Instruction
*insn
= lval
->getInsn();
1474 if (insn
->op
== OP_MAD
|| insn
->op
== OP_SAD
)
1475 // Short encoding only possible if they're all GPRs, no need to
1476 // affect them otherwise.
1477 if (insn
->flagsDef
< 0 &&
1478 insn
->src(0).getFile() == FILE_GPR
&&
1479 insn
->src(1).getFile() == FILE_GPR
&&
1480 insn
->src(2).getFile() == FILE_GPR
)
1481 nodes
[i
].addRegPreference(getNode(insn
->getSrc(2)->asLValue()));
1486 // coalesce first, we use only 1 RIG node for a group of joined values
1487 ret
= coalesce(insns
);
1491 if (func
->getProgram()->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
)
1492 func
->printLiveIntervals();
1495 calculateSpillWeights();
1500 ret
= selectRegisters();
1502 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
,
1503 "selectRegisters failed, inserting spill code ...\n");
1504 regs
.reset(FILE_GPR
, true);
1505 spill
.run(mustSpill
);
1506 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
)
1509 prog
->maxGPR
= std::max(prog
->maxGPR
, regs
.getMaxAssigned(FILE_GPR
));
1518 GCRA::cleanup(const bool success
)
1522 for (ArrayList::Iterator it
= func
->allLValues
.iterator();
1523 !it
.end(); it
.next()) {
1524 LValue
*lval
= reinterpret_cast<LValue
*>(it
.get());
1526 lval
->livei
.clear();
1531 if (lval
->join
== lval
)
1535 lval
->reg
.data
.id
= lval
->join
->reg
.data
.id
;
1537 for (Value::DefIterator d
= lval
->defs
.begin(); d
!= lval
->defs
.end();
1539 lval
->join
->defs
.remove(*d
);
1545 resolveSplitsAndMerges();
1546 splits
.clear(); // avoid duplicate entries on next coalesce pass
1551 hi
.next
= hi
.prev
= &hi
;
1552 lo
[0].next
= lo
[0].prev
= &lo
[0];
1553 lo
[1].next
= lo
[1].prev
= &lo
[1];
1557 SpillCodeInserter::assignSlot(const Interval
&livei
, const unsigned int size
)
1560 int32_t offsetBase
= stackSize
;
1562 std::list
<SpillSlot
>::iterator pos
= slots
.end(), it
= slots
.begin();
1564 if (offsetBase
% size
)
1565 offsetBase
+= size
- (offsetBase
% size
);
1569 for (offset
= offsetBase
; offset
< stackSize
; offset
+= size
) {
1570 const int32_t entryEnd
= offset
+ size
;
1571 while (it
!= slots
.end() && it
->offset
< offset
)
1573 if (it
== slots
.end()) // no slots left
1575 std::list
<SpillSlot
>::iterator bgn
= it
;
1577 while (it
!= slots
.end() && it
->offset
< entryEnd
) {
1579 if (it
->occup
.overlaps(livei
))
1583 if (it
== slots
.end() || it
->offset
>= entryEnd
) {
1585 for (; bgn
!= slots
.end() && bgn
->offset
< entryEnd
; ++bgn
) {
1586 bgn
->occup
.insert(livei
);
1587 if (bgn
->size() == size
)
1588 slot
.sym
= bgn
->sym
;
1594 stackSize
= offset
+ size
;
1595 slot
.offset
= offset
;
1596 slot
.sym
= new_Symbol(func
->getProgram(), FILE_MEMORY_LOCAL
);
1597 if (!func
->stackPtr
)
1598 offset
+= func
->tlsBase
;
1599 slot
.sym
->setAddress(NULL
, offset
);
1600 slot
.sym
->reg
.size
= size
;
1601 slots
.insert(pos
, slot
)->occup
.insert(livei
);
1607 SpillCodeInserter::offsetSlot(Value
*base
, const LValue
*lval
)
1609 if (!lval
->compound
|| (lval
->compMask
& 0x1))
1611 Value
*slot
= cloneShallow(func
, base
);
1613 slot
->reg
.data
.offset
+= (ffs(lval
->compMask
) - 1) * lval
->reg
.size
;
1614 slot
->reg
.size
= lval
->reg
.size
;
1620 SpillCodeInserter::spill(Instruction
*defi
, Value
*slot
, LValue
*lval
)
1622 const DataType ty
= typeOfSize(lval
->reg
.size
);
1624 slot
= offsetSlot(slot
, lval
);
1627 if (slot
->reg
.file
== FILE_MEMORY_LOCAL
) {
1629 if (ty
!= TYPE_B96
) {
1630 st
= new_Instruction(func
, OP_STORE
, ty
);
1631 st
->setSrc(0, slot
);
1632 st
->setSrc(1, lval
);
1634 st
= new_Instruction(func
, OP_SPLIT
, ty
);
1635 st
->setSrc(0, lval
);
1636 for (int d
= 0; d
< lval
->reg
.size
/ 4; ++d
)
1637 st
->setDef(d
, new_LValue(func
, FILE_GPR
));
1639 for (int d
= lval
->reg
.size
/ 4 - 1; d
>= 0; --d
) {
1640 Value
*tmp
= cloneShallow(func
, slot
);
1642 tmp
->reg
.data
.offset
+= 4 * d
;
1644 Instruction
*s
= new_Instruction(func
, OP_STORE
, TYPE_U32
);
1646 s
->setSrc(1, st
->getDef(d
));
1647 defi
->bb
->insertAfter(defi
, s
);
1651 st
= new_Instruction(func
, OP_CVT
, ty
);
1652 st
->setDef(0, slot
);
1653 st
->setSrc(0, lval
);
1654 if (lval
->reg
.file
== FILE_FLAGS
)
1657 defi
->bb
->insertAfter(defi
, st
);
1661 SpillCodeInserter::unspill(Instruction
*usei
, LValue
*lval
, Value
*slot
)
1663 const DataType ty
= typeOfSize(lval
->reg
.size
);
1665 slot
= offsetSlot(slot
, lval
);
1666 lval
= cloneShallow(func
, lval
);
1669 if (slot
->reg
.file
== FILE_MEMORY_LOCAL
) {
1671 if (ty
!= TYPE_B96
) {
1672 ld
= new_Instruction(func
, OP_LOAD
, ty
);
1674 ld
= new_Instruction(func
, OP_MERGE
, ty
);
1675 for (int d
= 0; d
< lval
->reg
.size
/ 4; ++d
) {
1676 Value
*tmp
= cloneShallow(func
, slot
);
1679 tmp
->reg
.data
.offset
+= 4 * d
;
1681 Instruction
*l
= new_Instruction(func
, OP_LOAD
, TYPE_U32
);
1682 l
->setDef(0, (val
= new_LValue(func
, FILE_GPR
)));
1684 usei
->bb
->insertBefore(usei
, l
);
1688 ld
->setDef(0, lval
);
1689 usei
->bb
->insertBefore(usei
, ld
);
1693 ld
= new_Instruction(func
, OP_CVT
, ty
);
1695 ld
->setDef(0, lval
);
1696 ld
->setSrc(0, slot
);
1697 if (lval
->reg
.file
== FILE_FLAGS
)
1700 usei
->bb
->insertBefore(usei
, ld
);
1705 value_cmp(ValueRef
*a
, ValueRef
*b
) {
1706 Instruction
*ai
= a
->getInsn(), *bi
= b
->getInsn();
1707 if (ai
->bb
!= bi
->bb
)
1708 return ai
->bb
->getId() < bi
->bb
->getId();
1709 return ai
->serial
< bi
->serial
;
1712 // For each value that is to be spilled, go through all its definitions.
1713 // A value can have multiple definitions if it has been coalesced before.
1714 // For each definition, first go through all its uses and insert an unspill
1715 // instruction before it, then replace the use with the temporary register.
1716 // Unspill can be either a load from memory or simply a move to another
1718 // For "Pseudo" instructions (like PHI, SPLIT, MERGE) we can erase the use
1719 // if we have spilled to a memory location, or simply with the new register.
1720 // No load or conversion instruction should be needed.
1722 SpillCodeInserter::run(const std::list
<ValuePair
>& lst
)
1724 for (std::list
<ValuePair
>::const_iterator it
= lst
.begin(); it
!= lst
.end();
1726 LValue
*lval
= it
->first
->asLValue();
1727 Symbol
*mem
= it
->second
? it
->second
->asSym() : NULL
;
1729 // Keep track of which instructions to delete later. Deleting them
1730 // inside the loop is unsafe since a single instruction may have
1731 // multiple destinations that all need to be spilled (like OP_SPLIT).
1732 unordered_set
<Instruction
*> to_del
;
1734 for (Value::DefIterator d
= lval
->defs
.begin(); d
!= lval
->defs
.end();
1737 static_cast<Value
*>(mem
) : new_LValue(func
, FILE_GPR
);
1739 Instruction
*last
= NULL
;
1741 LValue
*dval
= (*d
)->get()->asLValue();
1742 Instruction
*defi
= (*d
)->getInsn();
1744 // Sort all the uses by BB/instruction so that we don't unspill
1745 // multiple times in a row, and also remove a source of
1747 std::vector
<ValueRef
*> refs(dval
->uses
.begin(), dval
->uses
.end());
1748 std::sort(refs
.begin(), refs
.end(), value_cmp
);
1750 // Unspill at each use *before* inserting spill instructions,
1751 // we don't want to have the spill instructions in the use list here.
1752 for (std::vector
<ValueRef
*>::const_iterator it
= refs
.begin();
1753 it
!= refs
.end(); ++it
) {
1755 Instruction
*usei
= u
->getInsn();
1757 if (usei
->isPseudo()) {
1758 tmp
= (slot
->reg
.file
== FILE_MEMORY_LOCAL
) ? NULL
: slot
;
1761 if (!last
|| (usei
!= last
->next
&& usei
!= last
))
1762 tmp
= unspill(usei
, dval
, slot
);
1769 if (defi
->isPseudo()) {
1770 d
= lval
->defs
.erase(d
);
1772 if (slot
->reg
.file
== FILE_MEMORY_LOCAL
)
1773 to_del
.insert(defi
);
1775 defi
->setDef(0, slot
);
1777 spill(defi
, slot
, dval
);
1781 for (unordered_set
<Instruction
*>::const_iterator it
= to_del
.begin();
1782 it
!= to_del
.end(); ++it
)
1783 delete_Instruction(func
->getProgram(), *it
);
1786 // TODO: We're not trying to reuse old slots in a potential next iteration.
1787 // We have to update the slots' livei intervals to be able to do that.
1788 stackBase
= stackSize
;
1796 for (IteratorRef it
= prog
->calls
.iteratorDFS(false);
1797 !it
->end(); it
->next()) {
1798 func
= Function::get(reinterpret_cast<Graph::Node
*>(it
->get()));
1800 func
->tlsBase
= prog
->tlsSize
;
1803 prog
->tlsSize
+= func
->tlsSize
;
1809 RegAlloc::execFunc()
1811 InsertConstraintsPass insertConstr
;
1812 PhiMovesPass insertPhiMoves
;
1813 ArgumentMovesPass insertArgMoves
;
1814 BuildIntervalsPass buildIntervals
;
1815 SpillCodeInserter
insertSpills(func
);
1817 GCRA
gcra(func
, insertSpills
);
1819 unsigned int i
, retries
;
1822 if (!func
->ins
.empty()) {
1823 // Insert a nop at the entry so inputs only used by the first instruction
1824 // don't count as having an empty live range.
1825 Instruction
*nop
= new_Instruction(func
, OP_NOP
, TYPE_NONE
);
1826 BasicBlock::get(func
->cfg
.getRoot())->insertHead(nop
);
1829 ret
= insertConstr
.exec(func
);
1833 ret
= insertPhiMoves
.run(func
);
1837 ret
= insertArgMoves
.run(func
);
1841 // TODO: need to fix up spill slot usage ranges to support > 1 retry
1842 for (retries
= 0; retries
< 3; ++retries
) {
1843 if (retries
&& (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
))
1844 INFO("Retry: %i\n", retries
);
1845 if (prog
->dbgFlags
& NV50_IR_DEBUG_REG_ALLOC
)
1848 // spilling to registers may add live ranges, need to rebuild everything
1850 for (sequence
= func
->cfg
.nextSequence(), i
= 0;
1851 ret
&& i
<= func
->loopNestingBound
;
1852 sequence
= func
->cfg
.nextSequence(), ++i
)
1853 ret
= buildLiveSets(BasicBlock::get(func
->cfg
.getRoot()));
1855 for (ArrayList::Iterator bi
= func
->allBBlocks
.iterator();
1856 !bi
.end(); bi
.next())
1857 BasicBlock::get(bi
)->liveSet
.marker
= false;
1860 func
->orderInstructions(this->insns
);
1862 ret
= buildIntervals
.run(func
);
1865 ret
= gcra
.allocateRegisters(insns
);
1869 INFO_DBG(prog
->dbgFlags
, REG_ALLOC
, "RegAlloc done: %i\n", ret
);
1871 func
->tlsSize
= insertSpills
.getStackSize();
1876 // TODO: check if modifying Instruction::join here breaks anything
1878 GCRA::resolveSplitsAndMerges()
1880 for (std::list
<Instruction
*>::iterator it
= splits
.begin();
1883 Instruction
*split
= *it
;
1884 unsigned int reg
= regs
.idToBytes(split
->getSrc(0));
1885 for (int d
= 0; split
->defExists(d
); ++d
) {
1886 Value
*v
= split
->getDef(d
);
1887 v
->reg
.data
.id
= regs
.bytesToId(v
, reg
);
1894 for (std::list
<Instruction
*>::iterator it
= merges
.begin();
1897 Instruction
*merge
= *it
;
1898 unsigned int reg
= regs
.idToBytes(merge
->getDef(0));
1899 for (int s
= 0; merge
->srcExists(s
); ++s
) {
1900 Value
*v
= merge
->getSrc(s
);
1901 v
->reg
.data
.id
= regs
.bytesToId(v
, reg
);
1903 // If the value is defined by a phi/union node, we also need to
1904 // perform the same fixup on that node's sources, since after RA
1905 // their registers should be identical.
1906 if (v
->getInsn()->op
== OP_PHI
|| v
->getInsn()->op
== OP_UNION
) {
1907 Instruction
*phi
= v
->getInsn();
1908 for (int phis
= 0; phi
->srcExists(phis
); ++phis
) {
1909 phi
->getSrc(phis
)->join
= v
;
1910 phi
->getSrc(phis
)->reg
.data
.id
= v
->reg
.data
.id
;
1919 bool Program::registerAllocation()
1926 RegAlloc::InsertConstraintsPass::exec(Function
*ir
)
1930 bool ret
= run(ir
, true, true);
1932 ret
= insertConstraintMoves();
1936 // TODO: make part of texture insn
1938 RegAlloc::InsertConstraintsPass::textureMask(TexInstruction
*tex
)
1944 for (d
= 0, k
= 0, c
= 0; c
< 4; ++c
) {
1945 if (!(tex
->tex
.mask
& (1 << c
)))
1947 if (tex
->getDef(k
)->refCount()) {
1949 def
[d
++] = tex
->getDef(k
);
1953 tex
->tex
.mask
= mask
;
1955 for (c
= 0; c
< d
; ++c
)
1956 tex
->setDef(c
, def
[c
]);
1958 tex
->setDef(c
, NULL
);
1962 RegAlloc::InsertConstraintsPass::detectConflict(Instruction
*cst
, int s
)
1964 Value
*v
= cst
->getSrc(s
);
1966 // current register allocation can't handle it if a value participates in
1967 // multiple constraints
1968 for (Value::UseIterator it
= v
->uses
.begin(); it
!= v
->uses
.end(); ++it
) {
1969 if (cst
!= (*it
)->getInsn())
1973 // can start at s + 1 because detectConflict is called on all sources
1974 for (int c
= s
+ 1; cst
->srcExists(c
); ++c
)
1975 if (v
== cst
->getSrc(c
))
1978 Instruction
*defi
= v
->getInsn();
1980 return (!defi
|| defi
->constrainedDefs());
1984 RegAlloc::InsertConstraintsPass::addConstraint(Instruction
*i
, int s
, int n
)
1989 // first, look for an existing identical constraint op
1990 for (std::list
<Instruction
*>::iterator it
= constrList
.begin();
1991 it
!= constrList
.end();
1994 if (!i
->bb
->dominatedBy(cst
->bb
))
1996 for (d
= 0; d
< n
; ++d
)
1997 if (cst
->getSrc(d
) != i
->getSrc(d
+ s
))
2000 for (d
= 0; d
< n
; ++d
, ++s
)
2001 i
->setSrc(s
, cst
->getDef(d
));
2005 cst
= new_Instruction(func
, OP_CONSTRAINT
, i
->dType
);
2007 for (d
= 0; d
< n
; ++s
, ++d
) {
2008 cst
->setDef(d
, new_LValue(func
, FILE_GPR
));
2009 cst
->setSrc(d
, i
->getSrc(s
));
2010 i
->setSrc(s
, cst
->getDef(d
));
2012 i
->bb
->insertBefore(i
, cst
);
2014 constrList
.push_back(cst
);
2017 // Add a dummy use of the pointer source of >= 8 byte loads after the load
2018 // to prevent it from being assigned a register which overlapping the load's
2019 // destination, which would produce random corruptions.
2021 RegAlloc::InsertConstraintsPass::addHazard(Instruction
*i
, const ValueRef
*src
)
2023 Instruction
*hzd
= new_Instruction(func
, OP_NOP
, TYPE_NONE
);
2024 hzd
->setSrc(0, src
->get());
2025 i
->bb
->insertAfter(i
, hzd
);
2029 // b32 { %r0 %r1 %r2 %r3 } -> b128 %r0q
2031 RegAlloc::InsertConstraintsPass::condenseDefs(Instruction
*insn
)
2035 for (n
= 0; insn
->defExists(n
) && insn
->def(n
).getFile() == FILE_GPR
; ++n
)
2036 size
+= insn
->getDef(n
)->reg
.size
;
2039 LValue
*lval
= new_LValue(func
, FILE_GPR
);
2040 lval
->reg
.size
= size
;
2042 Instruction
*split
= new_Instruction(func
, OP_SPLIT
, typeOfSize(size
));
2043 split
->setSrc(0, lval
);
2044 for (int d
= 0; d
< n
; ++d
) {
2045 split
->setDef(d
, insn
->getDef(d
));
2046 insn
->setDef(d
, NULL
);
2048 insn
->setDef(0, lval
);
2050 for (int k
= 1, d
= n
; insn
->defExists(d
); ++d
, ++k
) {
2051 insn
->setDef(k
, insn
->getDef(d
));
2052 insn
->setDef(d
, NULL
);
2054 // carry over predicate if any (mainly for OP_UNION uses)
2055 split
->setPredicate(insn
->cc
, insn
->getPredicate());
2057 insn
->bb
->insertAfter(insn
, split
);
2058 constrList
.push_back(split
);
2061 RegAlloc::InsertConstraintsPass::condenseSrcs(Instruction
*insn
,
2062 const int a
, const int b
)
2067 for (int s
= a
; s
<= b
; ++s
)
2068 size
+= insn
->getSrc(s
)->reg
.size
;
2071 LValue
*lval
= new_LValue(func
, FILE_GPR
);
2072 lval
->reg
.size
= size
;
2075 insn
->takeExtraSources(0, save
);
2077 Instruction
*merge
= new_Instruction(func
, OP_MERGE
, typeOfSize(size
));
2078 merge
->setDef(0, lval
);
2079 for (int s
= a
, i
= 0; s
<= b
; ++s
, ++i
) {
2080 merge
->setSrc(i
, insn
->getSrc(s
));
2082 insn
->moveSources(b
+ 1, a
- b
);
2083 insn
->setSrc(a
, lval
);
2084 insn
->bb
->insertBefore(insn
, merge
);
2086 insn
->putExtraSources(0, save
);
2088 constrList
.push_back(merge
);
2092 RegAlloc::InsertConstraintsPass::texConstraintGM107(TexInstruction
*tex
)
2096 if (isTextureOp(tex
->op
))
2100 if (isSurfaceOp(tex
->op
)) {
2101 int s
= tex
->tex
.target
.getDim() +
2102 (tex
->tex
.target
.isArray() || tex
->tex
.target
.isCube());
2112 if (tex
->subOp
== NV50_IR_SUBOP_ATOM_CAS
)
2120 condenseSrcs(tex
, 0, s
- 1);
2122 condenseSrcs(tex
, 1, n
); // do not condense the tex handle
2124 if (isTextureOp(tex
->op
)) {
2125 if (tex
->op
!= OP_TXQ
) {
2126 s
= tex
->tex
.target
.getArgCount() - tex
->tex
.target
.isMS();
2127 if (tex
->op
== OP_TXD
) {
2128 // Indirect handle belongs in the first arg
2129 if (tex
->tex
.rIndirectSrc
>= 0)
2131 if (!tex
->tex
.target
.isArray() && tex
->tex
.useOffsets
)
2134 n
= tex
->srcCount(0xff) - s
;
2136 s
= tex
->srcCount(0xff);
2141 condenseSrcs(tex
, 0, s
- 1);
2142 if (n
> 1) // NOTE: first call modified positions already
2143 condenseSrcs(tex
, 1, n
);
2148 RegAlloc::InsertConstraintsPass::texConstraintNVE0(TexInstruction
*tex
)
2150 if (isTextureOp(tex
->op
))
2154 if (tex
->op
== OP_SUSTB
|| tex
->op
== OP_SUSTP
) {
2155 condenseSrcs(tex
, 3, 6);
2157 if (isTextureOp(tex
->op
)) {
2158 int n
= tex
->srcCount(0xff, true);
2160 condenseSrcs(tex
, 0, 3);
2161 if (n
> 5) // NOTE: first call modified positions already
2162 condenseSrcs(tex
, 4 - (4 - 1), n
- 1 - (4 - 1));
2165 condenseSrcs(tex
, 0, n
- 1);
2171 RegAlloc::InsertConstraintsPass::texConstraintNVC0(TexInstruction
*tex
)
2175 if (isTextureOp(tex
->op
))
2178 if (tex
->op
== OP_TXQ
) {
2179 s
= tex
->srcCount(0xff);
2181 } else if (isSurfaceOp(tex
->op
)) {
2182 s
= tex
->tex
.target
.getDim() + (tex
->tex
.target
.isArray() || tex
->tex
.target
.isCube());
2183 if (tex
->op
== OP_SUSTB
|| tex
->op
== OP_SUSTP
)
2188 s
= tex
->tex
.target
.getArgCount() - tex
->tex
.target
.isMS();
2189 if (!tex
->tex
.target
.isArray() &&
2190 (tex
->tex
.rIndirectSrc
>= 0 || tex
->tex
.sIndirectSrc
>= 0))
2192 if (tex
->op
== OP_TXD
&& tex
->tex
.useOffsets
)
2194 n
= tex
->srcCount(0xff) - s
;
2199 condenseSrcs(tex
, 0, s
- 1);
2200 if (n
> 1) // NOTE: first call modified positions already
2201 condenseSrcs(tex
, 1, n
);
2207 RegAlloc::InsertConstraintsPass::texConstraintNV50(TexInstruction
*tex
)
2209 Value
*pred
= tex
->getPredicate();
2211 tex
->setPredicate(tex
->cc
, NULL
);
2215 assert(tex
->defExists(0) && tex
->srcExists(0));
2216 // make src and def count match
2218 for (c
= 0; tex
->srcExists(c
) || tex
->defExists(c
); ++c
) {
2219 if (!tex
->srcExists(c
))
2220 tex
->setSrc(c
, new_LValue(func
, tex
->getSrc(0)->asLValue()));
2221 if (!tex
->defExists(c
))
2222 tex
->setDef(c
, new_LValue(func
, tex
->getDef(0)->asLValue()));
2225 tex
->setPredicate(tex
->cc
, pred
);
2227 condenseSrcs(tex
, 0, c
- 1);
2230 // Insert constraint markers for instructions whose multiple sources must be
2231 // located in consecutive registers.
2233 RegAlloc::InsertConstraintsPass::visit(BasicBlock
*bb
)
2235 TexInstruction
*tex
;
2239 targ
= bb
->getProgram()->getTarget();
2241 for (Instruction
*i
= bb
->getEntry(); i
; i
= next
) {
2244 if ((tex
= i
->asTex())) {
2245 switch (targ
->getChipset() & ~0xf) {
2250 texConstraintNV50(tex
);
2254 texConstraintNVC0(tex
);
2259 texConstraintNVE0(tex
);
2264 texConstraintGM107(tex
);
2270 if (i
->op
== OP_EXPORT
|| i
->op
== OP_STORE
) {
2271 for (size
= typeSizeof(i
->dType
), s
= 1; size
> 0; ++s
) {
2272 assert(i
->srcExists(s
));
2273 size
-= i
->getSrc(s
)->reg
.size
;
2275 condenseSrcs(i
, 1, s
- 1);
2277 if (i
->op
== OP_LOAD
|| i
->op
== OP_VFETCH
) {
2279 if (i
->src(0).isIndirect(0) && typeSizeof(i
->dType
) >= 8)
2280 addHazard(i
, i
->src(0).getIndirect(0));
2281 if (i
->src(0).isIndirect(1) && typeSizeof(i
->dType
) >= 8)
2282 addHazard(i
, i
->src(0).getIndirect(1));
2284 if (i
->op
== OP_UNION
||
2285 i
->op
== OP_MERGE
||
2286 i
->op
== OP_SPLIT
) {
2287 constrList
.push_back(i
);
2293 // Insert extra moves so that, if multiple register constraints on a value are
2294 // in conflict, these conflicts can be resolved.
2296 RegAlloc::InsertConstraintsPass::insertConstraintMoves()
2298 for (std::list
<Instruction
*>::iterator it
= constrList
.begin();
2299 it
!= constrList
.end();
2301 Instruction
*cst
= *it
;
2304 if (cst
->op
== OP_SPLIT
&& 0) {
2305 // spilling splits is annoying, just make sure they're separate
2306 for (int d
= 0; cst
->defExists(d
); ++d
) {
2307 if (!cst
->getDef(d
)->refCount())
2309 LValue
*lval
= new_LValue(func
, cst
->def(d
).getFile());
2310 const uint8_t size
= cst
->def(d
).getSize();
2311 lval
->reg
.size
= size
;
2313 mov
= new_Instruction(func
, OP_MOV
, typeOfSize(size
));
2314 mov
->setSrc(0, lval
);
2315 mov
->setDef(0, cst
->getDef(d
));
2316 cst
->setDef(d
, mov
->getSrc(0));
2317 cst
->bb
->insertAfter(cst
, mov
);
2319 cst
->getSrc(0)->asLValue()->noSpill
= 1;
2320 mov
->getSrc(0)->asLValue()->noSpill
= 1;
2323 if (cst
->op
== OP_MERGE
|| cst
->op
== OP_UNION
) {
2324 for (int s
= 0; cst
->srcExists(s
); ++s
) {
2325 const uint8_t size
= cst
->src(s
).getSize();
2327 if (!cst
->getSrc(s
)->defs
.size()) {
2328 mov
= new_Instruction(func
, OP_NOP
, typeOfSize(size
));
2329 mov
->setDef(0, cst
->getSrc(s
));
2330 cst
->bb
->insertBefore(cst
, mov
);
2333 assert(cst
->getSrc(s
)->defs
.size() == 1); // still SSA
2335 Instruction
*defi
= cst
->getSrc(s
)->defs
.front()->getInsn();
2336 // catch some cases where don't really need MOVs
2337 if (cst
->getSrc(s
)->refCount() == 1 && !defi
->constrainedDefs())
2340 LValue
*lval
= new_LValue(func
, cst
->src(s
).getFile());
2341 lval
->reg
.size
= size
;
2343 mov
= new_Instruction(func
, OP_MOV
, typeOfSize(size
));
2344 mov
->setDef(0, lval
);
2345 mov
->setSrc(0, cst
->getSrc(s
));
2346 cst
->setSrc(s
, mov
->getDef(0));
2347 cst
->bb
->insertBefore(cst
, mov
);
2349 cst
->getDef(0)->asLValue()->noSpill
= 1; // doesn't help
2351 if (cst
->op
== OP_UNION
)
2352 mov
->setPredicate(defi
->cc
, defi
->getPredicate());
2360 } // namespace nv50_ir