src/gallium/drivers/nouveau/codegen/nv50_ir_ra.cpp

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #include "codegen/nv50_ir.h"
  24 #include "codegen/nv50_ir_target.h"
  25
  26 #include <algorithm>
  27 #include <stack>
  28 #include <limits>
  29 #if __cplusplus >= 201103L
  30 #include <unordered_map>
  31 #else
  32 #include <tr1/unordered_map>
  33 #endif
  34
  35 namespace nv50_ir {
  36
  37 #if __cplusplus >= 201103L
  38 using std::hash;
  39 using std::unordered_map;
  40 #elif !defined(ANDROID)
  41 using std::tr1::hash;
  42 using std::tr1::unordered_map;
  43 #else
  44 #error Android release before Lollipop is not supported!
  45 #endif
  46
  47 #define MAX_REGISTER_FILE_SIZE 256
  48
  49 class RegisterSet
  50 {
  51 public:
  52    RegisterSet(const Target *);
  53
  54    void init(const Target *);
  55    void reset(DataFile, bool resetMax = false);
  56
  57    void periodicMask(DataFile f, uint32_t lock, uint32_t unlock);
  58    void intersect(DataFile f, const RegisterSet *);
  59
  60    bool assign(int32_t& reg, DataFile f, unsigned int size);
  61    void release(DataFile f, int32_t reg, unsigned int size);
  62    void occupy(DataFile f, int32_t reg, unsigned int size);
  63    void occupy(const Value *);
  64    void occupyMask(DataFile f, int32_t reg, uint8_t mask);
  65    bool isOccupied(DataFile f, int32_t reg, unsigned int size) const;
  66    bool testOccupy(const Value *);
  67    bool testOccupy(DataFile f, int32_t reg, unsigned int size);
  68
  69    inline int getMaxAssigned(DataFile f) const { return fill[f]; }
  70
  71    inline unsigned int getFileSize(DataFile f, uint8_t regSize) const
  72    {
  73       if (restrictedGPR16Range && f == FILE_GPR && regSize == 2)
  74          return (last[f] + 1) / 2;
  75       return last[f] + 1;
  76    }
  77
  78    inline unsigned int units(DataFile f, unsigned int size) const
  79    {
  80       return size >> unit[f];
  81    }
  82    // for regs of size >= 4, id is counted in 4-byte words (like nv50/c0 binary)
  83    inline unsigned int idToBytes(const Value *v) const
  84    {
  85       return v->reg.data.id * MIN2(v->reg.size, 4);
  86    }
  87    inline unsigned int idToUnits(const Value *v) const
  88    {
  89       return units(v->reg.file, idToBytes(v));
  90    }
  91    inline int bytesToId(Value *v, unsigned int bytes) const
  92    {
  93       if (v->reg.size < 4)
  94          return units(v->reg.file, bytes);
  95       return bytes / 4;
  96    }
  97    inline int unitsToId(DataFile f, int u, uint8_t size) const
  98    {
  99       if (u < 0)
 100          return -1;
 101       return (size < 4) ? u : ((u << unit[f]) / 4);
 102    }
 103
 104    void print() const;
 105
 106 private:
 107    BitSet bits[LAST_REGISTER_FILE + 1];
 108
 109    int unit[LAST_REGISTER_FILE + 1]; // log2 of allocation granularity
 110
 111    int last[LAST_REGISTER_FILE + 1];
 112    int fill[LAST_REGISTER_FILE + 1];
 113
 114    const bool restrictedGPR16Range;
 115 };
 116
 117 void
 118 RegisterSet::reset(DataFile f, bool resetMax)
 119 {
 120    bits[f].fill(0);
 121    if (resetMax)
 122       fill[f] = -1;
 123 }
 124
 125 void
 126 RegisterSet::init(const Target *targ)
 127 {
 128    for (unsigned int rf = 0; rf <= FILE_ADDRESS; ++rf) {
 129       DataFile f = static_cast<DataFile>(rf);
 130       last[rf] = targ->getFileSize(f) - 1;
 131       unit[rf] = targ->getFileUnit(f);
 132       fill[rf] = -1;
 133       assert(last[rf] < MAX_REGISTER_FILE_SIZE);
 134       bits[rf].allocate(last[rf] + 1, true);
 135    }
 136 }
 137
 138 RegisterSet::RegisterSet(const Target *targ)
 139   : restrictedGPR16Range(targ->getChipset() < 0xc0)
 140 {
 141    init(targ);
 142    for (unsigned int i = 0; i <= LAST_REGISTER_FILE; ++i)
 143       reset(static_cast<DataFile>(i));
 144 }
 145
 146 void
 147 RegisterSet::periodicMask(DataFile f, uint32_t lock, uint32_t unlock)
 148 {
 149    bits[f].periodicMask32(lock, unlock);
 150 }
 151
 152 void
 153 RegisterSet::intersect(DataFile f, const RegisterSet *set)
 154 {
 155    bits[f] |= set->bits[f];
 156 }
 157
 158 void
 159 RegisterSet::print() const
 160 {
 161    INFO("GPR:");
 162    bits[FILE_GPR].print();
 163    INFO("\n");
 164 }
 165
 166 bool
 167 RegisterSet::assign(int32_t& reg, DataFile f, unsigned int size)
 168 {
 169    reg = bits[f].findFreeRange(size);
 170    if (reg < 0)
 171       return false;
 172    fill[f] = MAX2(fill[f], (int32_t)(reg + size - 1));
 173    return true;
 174 }
 175
 176 bool
 177 RegisterSet::isOccupied(DataFile f, int32_t reg, unsigned int size) const
 178 {
 179    return bits[f].testRange(reg, size);
 180 }
 181
 182 void
 183 RegisterSet::occupy(const Value *v)
 184 {
 185    occupy(v->reg.file, idToUnits(v), v->reg.size >> unit[v->reg.file]);
 186 }
 187
 188 void
 189 RegisterSet::occupyMask(DataFile f, int32_t reg, uint8_t mask)
 190 {
 191    bits[f].setMask(reg & ~31, static_cast<uint32_t>(mask) << (reg % 32));
 192 }
 193
 194 void
 195 RegisterSet::occupy(DataFile f, int32_t reg, unsigned int size)
 196 {
 197    bits[f].setRange(reg, size);
 198
 199    INFO_DBG(0, REG_ALLOC, "reg occupy: %u[%i] %u\n", f, reg, size);
 200
 201    fill[f] = MAX2(fill[f], (int32_t)(reg + size - 1));
 202 }
 203
 204 bool
 205 RegisterSet::testOccupy(const Value *v)
 206 {
 207    return testOccupy(v->reg.file,
 208                      idToUnits(v), v->reg.size >> unit[v->reg.file]);
 209 }
 210
 211 bool
 212 RegisterSet::testOccupy(DataFile f, int32_t reg, unsigned int size)
 213 {
 214    if (isOccupied(f, reg, size))
 215       return false;
 216    occupy(f, reg, size);
 217    return true;
 218 }
 219
 220 void
 221 RegisterSet::release(DataFile f, int32_t reg, unsigned int size)
 222 {
 223    bits[f].clrRange(reg, size);
 224
 225    INFO_DBG(0, REG_ALLOC, "reg release: %u[%i] %u\n", f, reg, size);
 226 }
 227
 228 class RegAlloc
 229 {
 230 public:
 231    RegAlloc(Program *program) : prog(program), sequence(0) { }
 232
 233    bool exec();
 234    bool execFunc();
 235
 236 private:
 237    class PhiMovesPass : public Pass {
 238    private:
 239       virtual bool visit(BasicBlock *);
 240       inline bool needNewElseBlock(BasicBlock *b, BasicBlock *p);
 241       inline void splitEdges(BasicBlock *b);
 242    };
 243
 244    class ArgumentMovesPass : public Pass {
 245    private:
 246       virtual bool visit(BasicBlock *);
 247    };
 248
 249    class BuildIntervalsPass : public Pass {
 250    private:
 251       virtual bool visit(BasicBlock *);
 252       void collectLiveValues(BasicBlock *);
 253       void addLiveRange(Value *, const BasicBlock *, int end);
 254    };
 255
 256    class InsertConstraintsPass : public Pass {
 257    public:
 258       bool exec(Function *func);
 259    private:
 260       virtual bool visit(BasicBlock *);
 261
 262       bool insertConstraintMoves();
 263
 264       void condenseDefs(Instruction *);
 265       void condenseSrcs(Instruction *, const int first, const int last);
 266
 267       void addHazard(Instruction *i, const ValueRef *src);
 268       void textureMask(TexInstruction *);
 269       void addConstraint(Instruction *, int s, int n);
 270       bool detectConflict(Instruction *, int s);
 271
 272       // target specific functions, TODO: put in subclass or Target
 273       void texConstraintNV50(TexInstruction *);
 274       void texConstraintNVC0(TexInstruction *);
 275       void texConstraintNVE0(TexInstruction *);
 276       void texConstraintGM107(TexInstruction *);
 277
 278       std::list<Instruction *> constrList;
 279
 280       const Target *targ;
 281    };
 282
 283    bool buildLiveSets(BasicBlock *);
 284
 285 private:
 286    Program *prog;
 287    Function *func;
 288
 289    // instructions in control flow / chronological order
 290    ArrayList insns;
 291
 292    int sequence; // for manual passes through CFG
 293 };
 294
 295 typedef std::pair<Value *, Value *> ValuePair;
 296
 297 class SpillCodeInserter
 298 {
 299 public:
 300    SpillCodeInserter(Function *fn) : func(fn), stackSize(0), stackBase(0) { }
 301
 302    bool run(const std::list<ValuePair>&);
 303
 304    Symbol *assignSlot(const Interval&, const unsigned int size);
 305    Value *offsetSlot(Value *, const LValue *);
 306    inline int32_t getStackSize() const { return stackSize; }
 307
 308 private:
 309    Function *func;
 310
 311    struct SpillSlot
 312    {
 313       Interval occup;
 314       std::list<Value *> residents; // needed to recalculate occup
 315       Symbol *sym;
 316       int32_t offset;
 317       inline uint8_t size() const { return sym->reg.size; }
 318    };
 319    std::list<SpillSlot> slots;
 320    int32_t stackSize;
 321    int32_t stackBase;
 322
 323    LValue *unspill(Instruction *usei, LValue *, Value *slot);
 324    void spill(Instruction *defi, Value *slot, LValue *);
 325 };
 326
 327 void
 328 RegAlloc::BuildIntervalsPass::addLiveRange(Value *val,
 329                                            const BasicBlock *bb,
 330                                            int end)
 331 {
 332    Instruction *insn = val->getUniqueInsn();
 333
 334    if (!insn)
 335       insn = bb->getFirst();
 336
 337    assert(bb->getFirst()->serial <= bb->getExit()->serial);
 338    assert(bb->getExit()->serial + 1 >= end);
 339
 340    int begin = insn->serial;
 341    if (begin < bb->getEntry()->serial || begin > bb->getExit()->serial)
 342       begin = bb->getEntry()->serial;
 343
 344    INFO_DBG(prog->dbgFlags, REG_ALLOC, "%%%i <- live range [%i(%i), %i)\n",
 345             val->id, begin, insn->serial, end);
 346
 347    if (begin != end) // empty ranges are only added as hazards for fixed regs
 348       val->livei.extend(begin, end);
 349 }
 350
 351 bool
 352 RegAlloc::PhiMovesPass::needNewElseBlock(BasicBlock *b, BasicBlock *p)
 353 {
 354    if (b->cfg.incidentCount() <= 1)
 355       return false;
 356
 357    int n = 0;
 358    for (Graph::EdgeIterator ei = p->cfg.outgoing(); !ei.end(); ei.next())
 359       if (ei.getType() == Graph::Edge::TREE ||
 360           ei.getType() == Graph::Edge::FORWARD)
 361          ++n;
 362    return (n == 2);
 363 }
 364
 365 struct PhiMapHash {
 366    size_t operator()(const std::pair<Instruction *, BasicBlock *>& val) const {
 367       return hash<Instruction*>()(val.first) * 31 +
 368          hash<BasicBlock*>()(val.second);
 369    }
 370 };
 371
 372 typedef unordered_map<
 373    std::pair<Instruction *, BasicBlock *>, Value *, PhiMapHash> PhiMap;
 374
 375 // Critical edges need to be split up so that work can be inserted along
 376 // specific edge transitions. Unfortunately manipulating incident edges into a
 377 // BB invalidates all the PHI nodes since their sources are implicitly ordered
 378 // by incident edge order.
 379 //
 380 // TODO: Make it so that that is not the case, and PHI nodes store pointers to
 381 // the original BBs.
 382 void
 383 RegAlloc::PhiMovesPass::splitEdges(BasicBlock *bb)
 384 {
 385    BasicBlock *pb, *pn;
 386    Instruction *phi;
 387    Graph::EdgeIterator ei;
 388    std::stack<BasicBlock *> stack;
 389    int j = 0;
 390
 391    for (ei = bb->cfg.incident(); !ei.end(); ei.next()) {
 392       pb = BasicBlock::get(ei.getNode());
 393       assert(pb);
 394       if (needNewElseBlock(bb, pb))
 395          stack.push(pb);
 396    }
 397
 398    // No critical edges were found, no need to perform any work.
 399    if (stack.empty())
 400       return;
 401
 402    // We're about to, potentially, reorder the inbound edges. This means that
 403    // we need to hold on to the (phi, bb) -> src mapping, and fix up the phi
 404    // nodes after the graph has been modified.
 405    PhiMap phis;
 406
 407    j = 0;
 408    for (ei = bb->cfg.incident(); !ei.end(); ei.next(), j++) {
 409       pb = BasicBlock::get(ei.getNode());
 410       for (phi = bb->getPhi(); phi && phi->op == OP_PHI; phi = phi->next)
 411          phis.insert(std::make_pair(std::make_pair(phi, pb), phi->getSrc(j)));
 412    }
 413
 414    while (!stack.empty()) {
 415       pb = stack.top();
 416       pn = new BasicBlock(func);
 417       stack.pop();
 418
 419       pb->cfg.detach(&bb->cfg);
 420       pb->cfg.attach(&pn->cfg, Graph::Edge::TREE);
 421       pn->cfg.attach(&bb->cfg, Graph::Edge::FORWARD);
 422
 423       assert(pb->getExit()->op != OP_CALL);
 424       if (pb->getExit()->asFlow()->target.bb == bb)
 425          pb->getExit()->asFlow()->target.bb = pn;
 426
 427       for (phi = bb->getPhi(); phi && phi->op == OP_PHI; phi = phi->next) {
 428          PhiMap::iterator it = phis.find(std::make_pair(phi, pb));
 429          assert(it != phis.end());
 430          phis.insert(std::make_pair(std::make_pair(phi, pn), it->second));
 431          phis.erase(it);
 432       }
 433    }
 434
 435    // Now go through and fix up all of the phi node sources.
 436    j = 0;
 437    for (ei = bb->cfg.incident(); !ei.end(); ei.next(), j++) {
 438       pb = BasicBlock::get(ei.getNode());
 439       for (phi = bb->getPhi(); phi && phi->op == OP_PHI; phi = phi->next) {
 440          PhiMap::const_iterator it = phis.find(std::make_pair(phi, pb));
 441          assert(it != phis.end());
 442
 443          phi->setSrc(j, it->second);
 444       }
 445    }
 446 }
 447
 448 // For each operand of each PHI in b, generate a new value by inserting a MOV
 449 // at the end of the block it is coming from and replace the operand with its
 450 // result. This eliminates liveness conflicts and enables us to let values be
 451 // copied to the right register if such a conflict exists nonetheless.
 452 //
 453 // These MOVs are also crucial in making sure the live intervals of phi srces
 454 // are extended until the end of the loop, since they are not included in the
 455 // live-in sets.
 456 bool
 457 RegAlloc::PhiMovesPass::visit(BasicBlock *bb)
 458 {
 459    Instruction *phi, *mov;
 460
 461    splitEdges(bb);
 462
 463    // insert MOVs (phi->src(j) should stem from j-th in-BB)
 464    int j = 0;
 465    for (Graph::EdgeIterator ei = bb->cfg.incident(); !ei.end(); ei.next()) {
 466       BasicBlock *pb = BasicBlock::get(ei.getNode());
 467       if (!pb->isTerminated())
 468          pb->insertTail(new_FlowInstruction(func, OP_BRA, bb));
 469
 470       for (phi = bb->getPhi(); phi && phi->op == OP_PHI; phi = phi->next) {
 471          LValue *tmp = new_LValue(func, phi->getDef(0)->asLValue());
 472          mov = new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size));
 473
 474          mov->setSrc(0, phi->getSrc(j));
 475          mov->setDef(0, tmp);
 476          phi->setSrc(j, tmp);
 477
 478          pb->insertBefore(pb->getExit(), mov);
 479       }
 480       ++j;
 481    }
 482
 483    return true;
 484 }
 485
 486 bool
 487 RegAlloc::ArgumentMovesPass::visit(BasicBlock *bb)
 488 {
 489    // Bind function call inputs/outputs to the same physical register
 490    // the callee uses, inserting moves as appropriate for the case a
 491    // conflict arises.
 492    for (Instruction *i = bb->getEntry(); i; i = i->next) {
 493       FlowInstruction *cal = i->asFlow();
 494       // TODO: Handle indirect calls.
 495       // Right now they should only be generated for builtins.
 496       if (!cal || cal->op != OP_CALL || cal->builtin || cal->indirect)
 497          continue;
 498       RegisterSet clobberSet(prog->getTarget());
 499
 500       // Bind input values.
 501       for (int s = cal->indirect ? 1 : 0; cal->srcExists(s); ++s) {
 502          const int t = cal->indirect ? (s - 1) : s;
 503          LValue *tmp = new_LValue(func, cal->getSrc(s)->asLValue());
 504          tmp->reg.data.id = cal->target.fn->ins[t].rep()->reg.data.id;
 505
 506          Instruction *mov =
 507             new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size));
 508          mov->setDef(0, tmp);
 509          mov->setSrc(0, cal->getSrc(s));
 510          cal->setSrc(s, tmp);
 511
 512          bb->insertBefore(cal, mov);
 513       }
 514
 515       // Bind output values.
 516       for (int d = 0; cal->defExists(d); ++d) {
 517          LValue *tmp = new_LValue(func, cal->getDef(d)->asLValue());
 518          tmp->reg.data.id = cal->target.fn->outs[d].rep()->reg.data.id;
 519
 520          Instruction *mov =
 521             new_Instruction(func, OP_MOV, typeOfSize(tmp->reg.size));
 522          mov->setSrc(0, tmp);
 523          mov->setDef(0, cal->getDef(d));
 524          cal->setDef(d, tmp);
 525
 526          bb->insertAfter(cal, mov);
 527          clobberSet.occupy(tmp);
 528       }
 529
 530       // Bind clobbered values.
 531       for (std::deque<Value *>::iterator it = cal->target.fn->clobbers.begin();
 532            it != cal->target.fn->clobbers.end();
 533            ++it) {
 534          if (clobberSet.testOccupy(*it)) {
 535             Value *tmp = new_LValue(func, (*it)->asLValue());
 536             tmp->reg.data.id = (*it)->reg.data.id;
 537             cal->setDef(cal->defCount(), tmp);
 538          }
 539       }
 540    }
 541
 542    // Update the clobber set of the function.
 543    if (BasicBlock::get(func->cfgExit) == bb) {
 544       func->buildDefSets();
 545       for (unsigned int i = 0; i < bb->defSet.getSize(); ++i)
 546          if (bb->defSet.test(i))
 547             func->clobbers.push_back(func->getLValue(i));
 548    }
 549
 550    return true;
 551 }
 552
 553 // Build the set of live-in variables of bb.
 554 bool
 555 RegAlloc::buildLiveSets(BasicBlock *bb)
 556 {
 557    Function *f = bb->getFunction();
 558    BasicBlock *bn;
 559    Instruction *i;
 560    unsigned int s, d;
 561
 562    INFO_DBG(prog->dbgFlags, REG_ALLOC, "buildLiveSets(BB:%i)\n", bb->getId());
 563
 564    bb->liveSet.allocate(func->allLValues.getSize(), false);
 565
 566    int n = 0;
 567    for (Graph::EdgeIterator ei = bb->cfg.outgoing(); !ei.end(); ei.next()) {
 568       bn = BasicBlock::get(ei.getNode());
 569       if (bn == bb)
 570          continue;
 571       if (bn->cfg.visit(sequence))
 572          if (!buildLiveSets(bn))
 573             return false;
 574       if (n++ || bb->liveSet.marker)
 575          bb->liveSet |= bn->liveSet;
 576       else
 577          bb->liveSet = bn->liveSet;
 578    }
 579    if (!n && !bb->liveSet.marker)
 580       bb->liveSet.fill(0);
 581    bb->liveSet.marker = true;
 582
 583    if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC) {
 584       INFO("BB:%i live set of out blocks:\n", bb->getId());
 585       bb->liveSet.print();
 586    }
 587
 588    // if (!bb->getEntry())
 589    //   return true;
 590
 591    if (bb == BasicBlock::get(f->cfgExit)) {
 592       for (std::deque<ValueRef>::iterator it = f->outs.begin();
 593            it != f->outs.end(); ++it) {
 594          assert(it->get()->asLValue());
 595          bb->liveSet.set(it->get()->id);
 596       }
 597    }
 598
 599    for (i = bb->getExit(); i && i != bb->getEntry()->prev; i = i->prev) {
 600       for (d = 0; i->defExists(d); ++d)
 601          bb->liveSet.clr(i->getDef(d)->id);
 602       for (s = 0; i->srcExists(s); ++s)
 603          if (i->getSrc(s)->asLValue())
 604             bb->liveSet.set(i->getSrc(s)->id);
 605    }
 606    for (i = bb->getPhi(); i && i->op == OP_PHI; i = i->next)
 607       bb->liveSet.clr(i->getDef(0)->id);
 608
 609    if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC) {
 610       INFO("BB:%i live set after propagation:\n", bb->getId());
 611       bb->liveSet.print();
 612    }
 613
 614    return true;
 615 }
 616
 617 void
 618 RegAlloc::BuildIntervalsPass::collectLiveValues(BasicBlock *bb)
 619 {
 620    BasicBlock *bbA = NULL, *bbB = NULL;
 621
 622    if (bb->cfg.outgoingCount()) {
 623       // trickery to save a loop of OR'ing liveSets
 624       // aliasing works fine with BitSet::setOr
 625       for (Graph::EdgeIterator ei = bb->cfg.outgoing(); !ei.end(); ei.next()) {
 626          if (ei.getType() == Graph::Edge::DUMMY)
 627             continue;
 628          if (bbA) {
 629             bb->liveSet.setOr(&bbA->liveSet, &bbB->liveSet);
 630             bbA = bb;
 631          } else {
 632             bbA = bbB;
 633          }
 634          bbB = BasicBlock::get(ei.getNode());
 635       }
 636       bb->liveSet.setOr(&bbB->liveSet, bbA ? &bbA->liveSet : NULL);
 637    } else
 638    if (bb->cfg.incidentCount()) {
 639       bb->liveSet.fill(0);
 640    }
 641 }
 642
 643 bool
 644 RegAlloc::BuildIntervalsPass::visit(BasicBlock *bb)
 645 {
 646    collectLiveValues(bb);
 647
 648    INFO_DBG(prog->dbgFlags, REG_ALLOC, "BuildIntervals(BB:%i)\n", bb->getId());
 649
 650    // go through out blocks and delete phi sources that do not originate from
 651    // the current block from the live set
 652    for (Graph::EdgeIterator ei = bb->cfg.outgoing(); !ei.end(); ei.next()) {
 653       BasicBlock *out = BasicBlock::get(ei.getNode());
 654
 655       for (Instruction *i = out->getPhi(); i && i->op == OP_PHI; i = i->next) {
 656          bb->liveSet.clr(i->getDef(0)->id);
 657
 658          for (int s = 0; i->srcExists(s); ++s) {
 659             assert(i->src(s).getInsn());
 660             if (i->getSrc(s)->getUniqueInsn()->bb == bb) // XXX: reachableBy ?
 661                bb->liveSet.set(i->getSrc(s)->id);
 662             else
 663                bb->liveSet.clr(i->getSrc(s)->id);
 664          }
 665       }
 666    }
 667
 668    // remaining live-outs are live until end
 669    if (bb->getExit()) {
 670       for (unsigned int j = 0; j < bb->liveSet.getSize(); ++j)
 671          if (bb->liveSet.test(j))
 672             addLiveRange(func->getLValue(j), bb, bb->getExit()->serial + 1);
 673    }
 674
 675    for (Instruction *i = bb->getExit(); i && i->op != OP_PHI; i = i->prev) {
 676       for (int d = 0; i->defExists(d); ++d) {
 677          bb->liveSet.clr(i->getDef(d)->id);
 678          if (i->getDef(d)->reg.data.id >= 0) // add hazard for fixed regs
 679             i->getDef(d)->livei.extend(i->serial, i->serial);
 680       }
 681
 682       for (int s = 0; i->srcExists(s); ++s) {
 683          if (!i->getSrc(s)->asLValue())
 684             continue;
 685          if (!bb->liveSet.test(i->getSrc(s)->id)) {
 686             bb->liveSet.set(i->getSrc(s)->id);
 687             addLiveRange(i->getSrc(s), bb, i->serial);
 688          }
 689       }
 690    }
 691
 692    if (bb == BasicBlock::get(func->cfg.getRoot())) {
 693       for (std::deque<ValueDef>::iterator it = func->ins.begin();
 694            it != func->ins.end(); ++it) {
 695          if (it->get()->reg.data.id >= 0) // add hazard for fixed regs
 696             it->get()->livei.extend(0, 1);
 697       }
 698    }
 699
 700    return true;
 701 }
 702
 703
 704 #define JOIN_MASK_PHI        (1 << 0)
 705 #define JOIN_MASK_UNION      (1 << 1)
 706 #define JOIN_MASK_MOV        (1 << 2)
 707 #define JOIN_MASK_TEX        (1 << 3)
 708
 709 class GCRA
 710 {
 711 public:
 712    GCRA(Function *, SpillCodeInserter&);
 713    ~GCRA();
 714
 715    bool allocateRegisters(ArrayList& insns);
 716
 717    void printNodeInfo() const;
 718
 719 private:
 720    class RIG_Node : public Graph::Node
 721    {
 722    public:
 723       RIG_Node();
 724
 725       void init(const RegisterSet&, LValue *);
 726
 727       void addInterference(RIG_Node *);
 728       void addRegPreference(RIG_Node *);
 729
 730       inline LValue *getValue() const
 731       {
 732          return reinterpret_cast<LValue *>(data);
 733       }
 734       inline void setValue(LValue *lval) { data = lval; }
 735
 736       inline uint8_t getCompMask() const
 737       {
 738          return ((1 << colors) - 1) << (reg & 7);
 739       }
 740
 741       static inline RIG_Node *get(const Graph::EdgeIterator& ei)
 742       {
 743          return static_cast<RIG_Node *>(ei.getNode());
 744       }
 745
 746    public:
 747       uint32_t degree;
 748       uint16_t degreeLimit; // if deg < degLimit, node is trivially colourable
 749       uint16_t colors;
 750
 751       DataFile f;
 752       int32_t reg;
 753
 754       float weight;
 755
 756       // list pointers for simplify() phase
 757       RIG_Node *next;
 758       RIG_Node *prev;
 759
 760       // union of the live intervals of all coalesced values (we want to retain
 761       //  the separate intervals for testing interference of compound values)
 762       Interval livei;
 763
 764       std::list<RIG_Node *> prefRegs;
 765    };
 766
 767 private:
 768    inline RIG_Node *getNode(const LValue *v) const { return &nodes[v->id]; }
 769
 770    void buildRIG(ArrayList&);
 771    bool coalesce(ArrayList&);
 772    bool doCoalesce(ArrayList&, unsigned int mask);
 773    void calculateSpillWeights();
 774    void simplify();
 775    bool selectRegisters();
 776    void cleanup(const bool success);
 777
 778    void simplifyEdge(RIG_Node *, RIG_Node *);
 779    void simplifyNode(RIG_Node *);
 780
 781    bool coalesceValues(Value *, Value *, bool force);
 782    void resolveSplitsAndMerges();
 783    void makeCompound(Instruction *, bool isSplit);
 784
 785    inline void checkInterference(const RIG_Node *, Graph::EdgeIterator&);
 786
 787    inline void insertOrderedTail(std::list<RIG_Node *>&, RIG_Node *);
 788    void checkList(std::list<RIG_Node *>&);
 789
 790 private:
 791    std::stack<uint32_t> stack;
 792
 793    // list headers for simplify() phase
 794    RIG_Node lo[2];
 795    RIG_Node hi;
 796
 797    Graph RIG;
 798    RIG_Node *nodes;
 799    unsigned int nodeCount;
 800
 801    Function *func;
 802    Program *prog;
 803
 804    static uint8_t relDegree[17][17];
 805
 806    RegisterSet regs;
 807
 808    // need to fixup register id for participants of OP_MERGE/SPLIT
 809    std::list<Instruction *> merges;
 810    std::list<Instruction *> splits;
 811
 812    SpillCodeInserter& spill;
 813    std::list<ValuePair> mustSpill;
 814 };
 815
 816 uint8_t GCRA::relDegree[17][17];
 817
 818 GCRA::RIG_Node::RIG_Node() : Node(NULL), next(this), prev(this)
 819 {
 820    colors = 0;
 821 }
 822
 823 void
 824 GCRA::printNodeInfo() const
 825 {
 826    for (unsigned int i = 0; i < nodeCount; ++i) {
 827       if (!nodes[i].colors)
 828          continue;
 829       INFO("RIG_Node[%%%i]($[%u]%i): %u colors, weight %f, deg %u/%u\n X",
 830            i,
 831            nodes[i].f,nodes[i].reg,nodes[i].colors,
 832            nodes[i].weight,
 833            nodes[i].degree, nodes[i].degreeLimit);
 834
 835       for (Graph::EdgeIterator ei = nodes[i].outgoing(); !ei.end(); ei.next())
 836          INFO(" %%%i", RIG_Node::get(ei)->getValue()->id);
 837       for (Graph::EdgeIterator ei = nodes[i].incident(); !ei.end(); ei.next())
 838          INFO(" %%%i", RIG_Node::get(ei)->getValue()->id);
 839       INFO("\n");
 840    }
 841 }
 842
 843 void
 844 GCRA::RIG_Node::init(const RegisterSet& regs, LValue *lval)
 845 {
 846    setValue(lval);
 847    if (lval->reg.data.id >= 0)
 848       lval->noSpill = lval->fixedReg = 1;
 849
 850    colors = regs.units(lval->reg.file, lval->reg.size);
 851    f = lval->reg.file;
 852    reg = -1;
 853    if (lval->reg.data.id >= 0)
 854       reg = regs.idToUnits(lval);
 855
 856    weight = std::numeric_limits<float>::infinity();
 857    degree = 0;
 858    degreeLimit = regs.getFileSize(f, lval->reg.size);
 859    degreeLimit -= relDegree[1][colors] - 1;
 860
 861    livei.insert(lval->livei);
 862 }
 863
 864 bool
 865 GCRA::coalesceValues(Value *dst, Value *src, bool force)
 866 {
 867    LValue *rep = dst->join->asLValue();
 868    LValue *val = src->join->asLValue();
 869
 870    if (!force && val->reg.data.id >= 0) {
 871       rep = src->join->asLValue();
 872       val = dst->join->asLValue();
 873    }
 874    RIG_Node *nRep = &nodes[rep->id];
 875    RIG_Node *nVal = &nodes[val->id];
 876
 877    if (src->reg.file != dst->reg.file) {
 878       if (!force)
 879          return false;
 880       WARN("forced coalescing of values in different files !\n");
 881    }
 882    if (!force && dst->reg.size != src->reg.size)
 883       return false;
 884
 885    if ((rep->reg.data.id >= 0) && (rep->reg.data.id != val->reg.data.id)) {
 886       if (force) {
 887          if (val->reg.data.id >= 0)
 888             WARN("forced coalescing of values in different fixed regs !\n");
 889       } else {
 890          if (val->reg.data.id >= 0)
 891             return false;
 892          // make sure that there is no overlap with the fixed register of rep
 893          for (ArrayList::Iterator it = func->allLValues.iterator();
 894               !it.end(); it.next()) {
 895             Value *reg = reinterpret_cast<Value *>(it.get())->asLValue();
 896             assert(reg);
 897             if (reg->interfers(rep) && reg->livei.overlaps(nVal->livei))
 898                return false;
 899          }
 900       }
 901    }
 902
 903    if (!force && nRep->livei.overlaps(nVal->livei))
 904       return false;
 905
 906    INFO_DBG(prog->dbgFlags, REG_ALLOC, "joining %%%i($%i) <- %%%i\n",
 907             rep->id, rep->reg.data.id, val->id);
 908
 909    // set join pointer of all values joined with val
 910    for (Value::DefIterator def = val->defs.begin(); def != val->defs.end();
 911         ++def)
 912       (*def)->get()->join = rep;
 913    assert(rep->join == rep && val->join == rep);
 914
 915    // add val's definitions to rep and extend the live interval of its RIG node
 916    rep->defs.insert(rep->defs.end(), val->defs.begin(), val->defs.end());
 917    nRep->livei.unify(nVal->livei);
 918    return true;
 919 }
 920
 921 bool
 922 GCRA::coalesce(ArrayList& insns)
 923 {
 924    bool ret = doCoalesce(insns, JOIN_MASK_PHI);
 925    if (!ret)
 926       return false;
 927    switch (func->getProgram()->getTarget()->getChipset() & ~0xf) {
 928    case 0x50:
 929    case 0x80:
 930    case 0x90:
 931    case 0xa0:
 932       ret = doCoalesce(insns, JOIN_MASK_UNION | JOIN_MASK_TEX);
 933       break;
 934    case 0xc0:
 935    case 0xd0:
 936    case 0xe0:
 937    case 0xf0:
 938    case 0x100:
 939    case 0x110:
 940       ret = doCoalesce(insns, JOIN_MASK_UNION);
 941       break;
 942    default:
 943       break;
 944    }
 945    if (!ret)
 946       return false;
 947    return doCoalesce(insns, JOIN_MASK_MOV);
 948 }
 949
 950 static inline uint8_t makeCompMask(int compSize, int base, int size)
 951 {
 952    uint8_t m = ((1 << size) - 1) << base;
 953
 954    switch (compSize) {
 955    case 1:
 956       return 0xff;
 957    case 2:
 958       m |= (m << 2);
 959       return (m << 4) | m;
 960    case 3:
 961    case 4:
 962       return (m << 4) | m;
 963    default:
 964       assert(compSize <= 8);
 965       return m;
 966    }
 967 }
 968
 969 // Used when coalescing moves. The non-compound value will become one, e.g.:
 970 // mov b32 $r0 $r2            / merge b64 $r0d { $r0 $r1 }
 971 // split b64 { $r0 $r1 } $r0d / mov b64 $r0d f64 $r2d
 972 static inline void copyCompound(Value *dst, Value *src)
 973 {
 974    LValue *ldst = dst->asLValue();
 975    LValue *lsrc = src->asLValue();
 976
 977    if (ldst->compound && !lsrc->compound) {
 978       LValue *swap = lsrc;
 979       lsrc = ldst;
 980       ldst = swap;
 981    }
 982
 983    ldst->compound = lsrc->compound;
 984    ldst->compMask = lsrc->compMask;
 985 }
 986
 987 void
 988 GCRA::makeCompound(Instruction *insn, bool split)
 989 {
 990    LValue *rep = (split ? insn->getSrc(0) : insn->getDef(0))->asLValue();
 991
 992    if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC) {
 993       INFO("makeCompound(split = %i): ", split);
 994       insn->print();
 995    }
 996
 997    const unsigned int size = getNode(rep)->colors;
 998    unsigned int base = 0;
 999
1000    if (!rep->compound)
1001       rep->compMask = 0xff;
1002    rep->compound = 1;
1003
1004    for (int c = 0; split ? insn->defExists(c) : insn->srcExists(c); ++c) {
1005       LValue *val = (split ? insn->getDef(c) : insn->getSrc(c))->asLValue();
1006
1007       val->compound = 1;
1008       if (!val->compMask)
1009          val->compMask = 0xff;
1010       val->compMask &= makeCompMask(size, base, getNode(val)->colors);
1011       assert(val->compMask);
1012
1013       INFO_DBG(prog->dbgFlags, REG_ALLOC, "compound: %%%i:%02x <- %%%i:%02x\n",
1014            rep->id, rep->compMask, val->id, val->compMask);
1015
1016       base += getNode(val)->colors;
1017    }
1018    assert(base == size);
1019 }
1020
1021 bool
1022 GCRA::doCoalesce(ArrayList& insns, unsigned int mask)
1023 {
1024    int c, n;
1025
1026    for (n = 0; n < insns.getSize(); ++n) {
1027       Instruction *i;
1028       Instruction *insn = reinterpret_cast<Instruction *>(insns.get(n));
1029
1030       switch (insn->op) {
1031       case OP_PHI:
1032          if (!(mask & JOIN_MASK_PHI))
1033             break;
1034          for (c = 0; insn->srcExists(c); ++c)
1035             if (!coalesceValues(insn->getDef(0), insn->getSrc(c), false)) {
1036                // this is bad
1037                ERROR("failed to coalesce phi operands\n");
1038                return false;
1039             }
1040          break;
1041       case OP_UNION:
1042       case OP_MERGE:
1043          if (!(mask & JOIN_MASK_UNION))
1044             break;
1045          for (c = 0; insn->srcExists(c); ++c)
1046             coalesceValues(insn->getDef(0), insn->getSrc(c), true);
1047          if (insn->op == OP_MERGE) {
1048             merges.push_back(insn);
1049             if (insn->srcExists(1))
1050                makeCompound(insn, false);
1051          }
1052          break;
1053       case OP_SPLIT:
1054          if (!(mask & JOIN_MASK_UNION))
1055             break;
1056          splits.push_back(insn);
1057          for (c = 0; insn->defExists(c); ++c)
1058             coalesceValues(insn->getSrc(0), insn->getDef(c), true);
1059          makeCompound(insn, true);
1060          break;
1061       case OP_MOV:
1062          if (!(mask & JOIN_MASK_MOV))
1063             break;
1064          i = NULL;
1065          if (!insn->getDef(0)->uses.empty())
1066             i = (*insn->getDef(0)->uses.begin())->getInsn();
1067          // if this is a contraint-move there will only be a single use
1068          if (i && i->op == OP_MERGE) // do we really still need this ?
1069             break;
1070          i = insn->getSrc(0)->getUniqueInsn();
1071          if (i && !i->constrainedDefs()) {
1072             if (coalesceValues(insn->getDef(0), insn->getSrc(0), false))
1073                copyCompound(insn->getSrc(0), insn->getDef(0));
1074          }
1075          break;
1076       case OP_TEX:
1077       case OP_TXB:
1078       case OP_TXL:
1079       case OP_TXF:
1080       case OP_TXQ:
1081       case OP_TXD:
1082       case OP_TXG:
1083       case OP_TXLQ:
1084       case OP_TEXCSAA:
1085       case OP_TEXPREP:
1086          if (!(mask & JOIN_MASK_TEX))
1087             break;
1088          for (c = 0; insn->srcExists(c) && c != insn->predSrc; ++c)
1089             coalesceValues(insn->getDef(c), insn->getSrc(c), true);
1090          break;
1091       default:
1092          break;
1093       }
1094    }
1095    return true;
1096 }
1097
1098 void
1099 GCRA::RIG_Node::addInterference(RIG_Node *node)
1100 {
1101    this->degree += relDegree[node->colors][colors];
1102    node->degree += relDegree[colors][node->colors];
1103
1104    this->attach(node, Graph::Edge::CROSS);
1105 }
1106
1107 void
1108 GCRA::RIG_Node::addRegPreference(RIG_Node *node)
1109 {
1110    prefRegs.push_back(node);
1111 }
1112
1113 GCRA::GCRA(Function *fn, SpillCodeInserter& spill) :
1114    func(fn),
1115    regs(fn->getProgram()->getTarget()),
1116    spill(spill)
1117 {
1118    prog = func->getProgram();
1119
1120    // initialize relative degrees array - i takes away from j
1121    for (int i = 1; i <= 16; ++i)
1122       for (int j = 1; j <= 16; ++j)
1123          relDegree[i][j] = j * ((i + j - 1) / j);
1124 }
1125
1126 GCRA::~GCRA()
1127 {
1128    if (nodes)
1129       delete[] nodes;
1130 }
1131
1132 void
1133 GCRA::checkList(std::list<RIG_Node *>& lst)
1134 {
1135    GCRA::RIG_Node *prev = NULL;
1136
1137    for (std::list<RIG_Node *>::iterator it = lst.begin();
1138         it != lst.end();
1139         ++it) {
1140       assert((*it)->getValue()->join == (*it)->getValue());
1141       if (prev)
1142          assert(prev->livei.begin() <= (*it)->livei.begin());
1143       prev = *it;
1144    }
1145 }
1146
1147 void
1148 GCRA::insertOrderedTail(std::list<RIG_Node *>& list, RIG_Node *node)
1149 {
1150    if (node->livei.isEmpty())
1151       return;
1152    // only the intervals of joined values don't necessarily arrive in order
1153    std::list<RIG_Node *>::iterator prev, it;
1154    for (it = list.end(); it != list.begin(); it = prev) {
1155       prev = it;
1156       --prev;
1157       if ((*prev)->livei.begin() <= node->livei.begin())
1158          break;
1159    }
1160    list.insert(it, node);
1161 }
1162
1163 void
1164 GCRA::buildRIG(ArrayList& insns)
1165 {
1166    std::list<RIG_Node *> values, active;
1167
1168    for (std::deque<ValueDef>::iterator it = func->ins.begin();
1169         it != func->ins.end(); ++it)
1170       insertOrderedTail(values, getNode(it->get()->asLValue()));
1171
1172    for (int i = 0; i < insns.getSize(); ++i) {
1173       Instruction *insn = reinterpret_cast<Instruction *>(insns.get(i));
1174       for (int d = 0; insn->defExists(d); ++d)
1175          if (insn->getDef(d)->rep() == insn->getDef(d))
1176             insertOrderedTail(values, getNode(insn->getDef(d)->asLValue()));
1177    }
1178    checkList(values);
1179
1180    while (!values.empty()) {
1181       RIG_Node *cur = values.front();
1182
1183       for (std::list<RIG_Node *>::iterator it = active.begin();
1184            it != active.end();) {
1185          RIG_Node *node = *it;
1186
1187          if (node->livei.end() <= cur->livei.begin()) {
1188             it = active.erase(it);
1189          } else {
1190             if (node->f == cur->f && node->livei.overlaps(cur->livei))
1191                cur->addInterference(node);
1192             ++it;
1193          }
1194       }
1195       values.pop_front();
1196       active.push_back(cur);
1197    }
1198 }
1199
1200 void
1201 GCRA::calculateSpillWeights()
1202 {
1203    for (unsigned int i = 0; i < nodeCount; ++i) {
1204       RIG_Node *const n = &nodes[i];
1205       if (!nodes[i].colors || nodes[i].livei.isEmpty())
1206          continue;
1207       if (nodes[i].reg >= 0) {
1208          // update max reg
1209          regs.occupy(n->f, n->reg, n->colors);
1210          continue;
1211       }
1212       LValue *val = nodes[i].getValue();
1213
1214       if (!val->noSpill) {
1215          int rc = 0;
1216          for (Value::DefIterator it = val->defs.begin();
1217               it != val->defs.end();
1218               ++it)
1219             rc += (*it)->get()->refCount();
1220
1221          nodes[i].weight =
1222             (float)rc * (float)rc / (float)nodes[i].livei.extent();
1223       }
1224
1225       if (nodes[i].degree < nodes[i].degreeLimit) {
1226          int l = 0;
1227          if (val->reg.size > 4)
1228             l = 1;
1229          DLLIST_ADDHEAD(&lo[l], &nodes[i]);
1230       } else {
1231          DLLIST_ADDHEAD(&hi, &nodes[i]);
1232       }
1233    }
1234    if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC)
1235       printNodeInfo();
1236 }
1237
1238 void
1239 GCRA::simplifyEdge(RIG_Node *a, RIG_Node *b)
1240 {
1241    bool move = b->degree >= b->degreeLimit;
1242
1243    INFO_DBG(prog->dbgFlags, REG_ALLOC,
1244             "edge: (%%%i, deg %u/%u) >-< (%%%i, deg %u/%u)\n",
1245             a->getValue()->id, a->degree, a->degreeLimit,
1246             b->getValue()->id, b->degree, b->degreeLimit);
1247
1248    b->degree -= relDegree[a->colors][b->colors];
1249
1250    move = move && b->degree < b->degreeLimit;
1251    if (move && !DLLIST_EMPTY(b)) {
1252       int l = (b->getValue()->reg.size > 4) ? 1 : 0;
1253       DLLIST_DEL(b);
1254       DLLIST_ADDTAIL(&lo[l], b);
1255    }
1256 }
1257
1258 void
1259 GCRA::simplifyNode(RIG_Node *node)
1260 {
1261    for (Graph::EdgeIterator ei = node->outgoing(); !ei.end(); ei.next())
1262       simplifyEdge(node, RIG_Node::get(ei));
1263
1264    for (Graph::EdgeIterator ei = node->incident(); !ei.end(); ei.next())
1265       simplifyEdge(node, RIG_Node::get(ei));
1266
1267    DLLIST_DEL(node);
1268    stack.push(node->getValue()->id);
1269
1270    INFO_DBG(prog->dbgFlags, REG_ALLOC, "SIMPLIFY: pushed %%%i%s\n",
1271             node->getValue()->id,
1272             (node->degree < node->degreeLimit) ? "" : "(spill)");
1273 }
1274
1275 void
1276 GCRA::simplify()
1277 {
1278    for (;;) {
1279       if (!DLLIST_EMPTY(&lo[0])) {
1280          do {
1281             simplifyNode(lo[0].next);
1282          } while (!DLLIST_EMPTY(&lo[0]));
1283       } else
1284       if (!DLLIST_EMPTY(&lo[1])) {
1285          simplifyNode(lo[1].next);
1286       } else
1287       if (!DLLIST_EMPTY(&hi)) {
1288          RIG_Node *best = hi.next;
1289          float bestScore = best->weight / (float)best->degree;
1290          // spill candidate
1291          for (RIG_Node *it = best->next; it != &hi; it = it->next) {
1292             float score = it->weight / (float)it->degree;
1293             if (score < bestScore) {
1294                best = it;
1295                bestScore = score;
1296             }
1297          }
1298          if (isinf(bestScore)) {
1299             ERROR("no viable spill candidates left\n");
1300             break;
1301          }
1302          simplifyNode(best);
1303       } else {
1304          break;
1305       }
1306    }
1307 }
1308
1309 void
1310 GCRA::checkInterference(const RIG_Node *node, Graph::EdgeIterator& ei)
1311 {
1312    const RIG_Node *intf = RIG_Node::get(ei);
1313
1314    if (intf->reg < 0)
1315       return;
1316    const LValue *vA = node->getValue();
1317    const LValue *vB = intf->getValue();
1318
1319    const uint8_t intfMask = ((1 << intf->colors) - 1) << (intf->reg & 7);
1320
1321    if (vA->compound | vB->compound) {
1322       // NOTE: this only works for >aligned< register tuples !
1323       for (Value::DefCIterator D = vA->defs.begin(); D != vA->defs.end(); ++D) {
1324       for (Value::DefCIterator d = vB->defs.begin(); d != vB->defs.end(); ++d) {
1325          const LValue *vD = (*D)->get()->asLValue();
1326          const LValue *vd = (*d)->get()->asLValue();
1327
1328          if (!vD->livei.overlaps(vd->livei)) {
1329             INFO_DBG(prog->dbgFlags, REG_ALLOC, "(%%%i) X (%%%i): no overlap\n",
1330                      vD->id, vd->id);
1331             continue;
1332          }
1333
1334          uint8_t mask = vD->compound ? vD->compMask : ~0;
1335          if (vd->compound) {
1336             assert(vB->compound);
1337             mask &= vd->compMask & vB->compMask;
1338          } else {
1339             mask &= intfMask;
1340          }
1341
1342          INFO_DBG(prog->dbgFlags, REG_ALLOC,
1343                   "(%%%i)%02x X (%%%i)%02x & %02x: $r%i.%02x\n",
1344                   vD->id,
1345                   vD->compound ? vD->compMask : 0xff,
1346                   vd->id,
1347                   vd->compound ? vd->compMask : intfMask,
1348                   vB->compMask, intf->reg & ~7, mask);
1349          if (mask)
1350             regs.occupyMask(node->f, intf->reg & ~7, mask);
1351       }
1352       }
1353    } else {
1354       INFO_DBG(prog->dbgFlags, REG_ALLOC,
1355                "(%%%i) X (%%%i): $r%i + %u\n",
1356                vA->id, vB->id, intf->reg, intf->colors);
1357       regs.occupy(node->f, intf->reg, intf->colors);
1358    }
1359 }
1360
1361 bool
1362 GCRA::selectRegisters()
1363 {
1364    INFO_DBG(prog->dbgFlags, REG_ALLOC, "\nSELECT phase\n");
1365
1366    while (!stack.empty()) {
1367       RIG_Node *node = &nodes[stack.top()];
1368       stack.pop();
1369
1370       regs.reset(node->f);
1371
1372       INFO_DBG(prog->dbgFlags, REG_ALLOC, "\nNODE[%%%i, %u colors]\n",
1373                node->getValue()->id, node->colors);
1374
1375       for (Graph::EdgeIterator ei = node->outgoing(); !ei.end(); ei.next())
1376          checkInterference(node, ei);
1377       for (Graph::EdgeIterator ei = node->incident(); !ei.end(); ei.next())
1378          checkInterference(node, ei);
1379
1380       if (!node->prefRegs.empty()) {
1381          for (std::list<RIG_Node *>::const_iterator it = node->prefRegs.begin();
1382               it != node->prefRegs.end();
1383               ++it) {
1384             if ((*it)->reg >= 0 &&
1385                 regs.testOccupy(node->f, (*it)->reg, node->colors)) {
1386                node->reg = (*it)->reg;
1387                break;
1388             }
1389          }
1390       }
1391       if (node->reg >= 0)
1392          continue;
1393       LValue *lval = node->getValue();
1394       if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC)
1395          regs.print();
1396       bool ret = regs.assign(node->reg, node->f, node->colors);
1397       if (ret) {
1398          INFO_DBG(prog->dbgFlags, REG_ALLOC, "assigned reg %i\n", node->reg);
1399          lval->compMask = node->getCompMask();
1400       } else {
1401          INFO_DBG(prog->dbgFlags, REG_ALLOC, "must spill: %%%i (size %u)\n",
1402                   lval->id, lval->reg.size);
1403          Symbol *slot = NULL;
1404          if (lval->reg.file == FILE_GPR)
1405             slot = spill.assignSlot(node->livei, lval->reg.size);
1406          mustSpill.push_back(ValuePair(lval, slot));
1407       }
1408    }
1409    if (!mustSpill.empty())
1410       return false;
1411    for (unsigned int i = 0; i < nodeCount; ++i) {
1412       LValue *lval = nodes[i].getValue();
1413       if (nodes[i].reg >= 0 && nodes[i].colors > 0)
1414          lval->reg.data.id =
1415             regs.unitsToId(nodes[i].f, nodes[i].reg, lval->reg.size);
1416    }
1417    return true;
1418 }
1419
1420 bool
1421 GCRA::allocateRegisters(ArrayList& insns)
1422 {
1423    bool ret;
1424
1425    INFO_DBG(prog->dbgFlags, REG_ALLOC,
1426             "allocateRegisters to %u instructions\n", insns.getSize());
1427
1428    nodeCount = func->allLValues.getSize();
1429    nodes = new RIG_Node[nodeCount];
1430    if (!nodes)
1431       return false;
1432    for (unsigned int i = 0; i < nodeCount; ++i) {
1433       LValue *lval = reinterpret_cast<LValue *>(func->allLValues.get(i));
1434       if (lval) {
1435          nodes[i].init(regs, lval);
1436          RIG.insert(&nodes[i]);
1437       }
1438    }
1439
1440    // coalesce first, we use only 1 RIG node for a group of joined values
1441    ret = coalesce(insns);
1442    if (!ret)
1443       goto out;
1444
1445    if (func->getProgram()->dbgFlags & NV50_IR_DEBUG_REG_ALLOC)
1446       func->printLiveIntervals();
1447
1448    buildRIG(insns);
1449    calculateSpillWeights();
1450    simplify();
1451
1452    ret = selectRegisters();
1453    if (!ret) {
1454       INFO_DBG(prog->dbgFlags, REG_ALLOC,
1455                "selectRegisters failed, inserting spill code ...\n");
1456       regs.reset(FILE_GPR, true);
1457       spill.run(mustSpill);
1458       if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC)
1459          func->print();
1460    } else {
1461       prog->maxGPR = std::max(prog->maxGPR, regs.getMaxAssigned(FILE_GPR));
1462    }
1463
1464 out:
1465    cleanup(ret);
1466    return ret;
1467 }
1468
1469 void
1470 GCRA::cleanup(const bool success)
1471 {
1472    mustSpill.clear();
1473
1474    for (ArrayList::Iterator it = func->allLValues.iterator();
1475         !it.end(); it.next()) {
1476       LValue *lval =  reinterpret_cast<LValue *>(it.get());
1477
1478       lval->livei.clear();
1479
1480       lval->compound = 0;
1481       lval->compMask = 0;
1482
1483       if (lval->join == lval)
1484          continue;
1485
1486       if (success) {
1487          lval->reg.data.id = lval->join->reg.data.id;
1488       } else {
1489          for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
1490               ++d)
1491             lval->join->defs.remove(*d);
1492          lval->join = lval;
1493       }
1494    }
1495
1496    if (success)
1497       resolveSplitsAndMerges();
1498    splits.clear(); // avoid duplicate entries on next coalesce pass
1499    merges.clear();
1500
1501    delete[] nodes;
1502    nodes = NULL;
1503 }
1504
1505 Symbol *
1506 SpillCodeInserter::assignSlot(const Interval &livei, const unsigned int size)
1507 {
1508    SpillSlot slot;
1509    int32_t offsetBase = stackSize;
1510    int32_t offset;
1511    std::list<SpillSlot>::iterator pos = slots.end(), it = slots.begin();
1512
1513    if (offsetBase % size)
1514       offsetBase += size - (offsetBase % size);
1515
1516    slot.sym = NULL;
1517
1518    for (offset = offsetBase; offset < stackSize; offset += size) {
1519       const int32_t entryEnd = offset + size;
1520       while (it != slots.end() && it->offset < offset)
1521          ++it;
1522       if (it == slots.end()) // no slots left
1523          break;
1524       std::list<SpillSlot>::iterator bgn = it;
1525
1526       while (it != slots.end() && it->offset < entryEnd) {
1527          it->occup.print();
1528          if (it->occup.overlaps(livei))
1529             break;
1530          ++it;
1531       }
1532       if (it == slots.end() || it->offset >= entryEnd) {
1533          // fits
1534          for (; bgn != slots.end() && bgn->offset < entryEnd; ++bgn) {
1535             bgn->occup.insert(livei);
1536             if (bgn->size() == size)
1537                slot.sym = bgn->sym;
1538          }
1539          break;
1540       }
1541    }
1542    if (!slot.sym) {
1543       stackSize = offset + size;
1544       slot.offset = offset;
1545       slot.sym = new_Symbol(func->getProgram(), FILE_MEMORY_LOCAL);
1546       if (!func->stackPtr)
1547          offset += func->tlsBase;
1548       slot.sym->setAddress(NULL, offset);
1549       slot.sym->reg.size = size;
1550       slots.insert(pos, slot)->occup.insert(livei);
1551    }
1552    return slot.sym;
1553 }
1554
1555 Value *
1556 SpillCodeInserter::offsetSlot(Value *base, const LValue *lval)
1557 {
1558    if (!lval->compound || (lval->compMask & 0x1))
1559       return base;
1560    Value *slot = cloneShallow(func, base);
1561
1562    slot->reg.data.offset += (ffs(lval->compMask) - 1) * lval->reg.size;
1563    slot->reg.size = lval->reg.size;
1564
1565    return slot;
1566 }
1567
1568 void
1569 SpillCodeInserter::spill(Instruction *defi, Value *slot, LValue *lval)
1570 {
1571    const DataType ty = typeOfSize(lval->reg.size);
1572
1573    slot = offsetSlot(slot, lval);
1574
1575    Instruction *st;
1576    if (slot->reg.file == FILE_MEMORY_LOCAL) {
1577       lval->noSpill = 1;
1578       if (ty != TYPE_B96) {
1579          st = new_Instruction(func, OP_STORE, ty);
1580          st->setSrc(0, slot);
1581          st->setSrc(1, lval);
1582       } else {
1583          st = new_Instruction(func, OP_SPLIT, ty);
1584          st->setSrc(0, lval);
1585          for (int d = 0; d < lval->reg.size / 4; ++d)
1586             st->setDef(d, new_LValue(func, FILE_GPR));
1587
1588          for (int d = lval->reg.size / 4 - 1; d >= 0; --d) {
1589             Value *tmp = cloneShallow(func, slot);
1590             tmp->reg.size = 4;
1591             tmp->reg.data.offset += 4 * d;
1592
1593             Instruction *s = new_Instruction(func, OP_STORE, TYPE_U32);
1594             s->setSrc(0, tmp);
1595             s->setSrc(1, st->getDef(d));
1596             defi->bb->insertAfter(defi, s);
1597          }
1598       }
1599    } else {
1600       st = new_Instruction(func, OP_CVT, ty);
1601       st->setDef(0, slot);
1602       st->setSrc(0, lval);
1603       if (lval->reg.file == FILE_FLAGS)
1604          st->flagsSrc = 0;
1605    }
1606    defi->bb->insertAfter(defi, st);
1607 }
1608
1609 LValue *
1610 SpillCodeInserter::unspill(Instruction *usei, LValue *lval, Value *slot)
1611 {
1612    const DataType ty = typeOfSize(lval->reg.size);
1613
1614    slot = offsetSlot(slot, lval);
1615    lval = cloneShallow(func, lval);
1616
1617    Instruction *ld;
1618    if (slot->reg.file == FILE_MEMORY_LOCAL) {
1619       lval->noSpill = 1;
1620       if (ty != TYPE_B96) {
1621          ld = new_Instruction(func, OP_LOAD, ty);
1622       } else {
1623          ld = new_Instruction(func, OP_MERGE, ty);
1624          for (int d = 0; d < lval->reg.size / 4; ++d) {
1625             Value *tmp = cloneShallow(func, slot);
1626             LValue *val;
1627             tmp->reg.size = 4;
1628             tmp->reg.data.offset += 4 * d;
1629
1630             Instruction *l = new_Instruction(func, OP_LOAD, TYPE_U32);
1631             l->setDef(0, (val = new_LValue(func, FILE_GPR)));
1632             l->setSrc(0, tmp);
1633             usei->bb->insertBefore(usei, l);
1634             ld->setSrc(d, val);
1635             val->noSpill = 1;
1636          }
1637          ld->setDef(0, lval);
1638          usei->bb->insertBefore(usei, ld);
1639          return lval;
1640       }
1641    } else {
1642       ld = new_Instruction(func, OP_CVT, ty);
1643    }
1644    ld->setDef(0, lval);
1645    ld->setSrc(0, slot);
1646    if (lval->reg.file == FILE_FLAGS)
1647       ld->flagsDef = 0;
1648
1649    usei->bb->insertBefore(usei, ld);
1650    return lval;
1651 }
1652
1653 static bool
1654 value_cmp(ValueRef *a, ValueRef *b) {
1655    Instruction *ai = a->getInsn(), *bi = b->getInsn();
1656    if (ai->bb != bi->bb)
1657       return ai->bb->getId() < bi->bb->getId();
1658    return ai->serial < bi->serial;
1659 }
1660
1661 // For each value that is to be spilled, go through all its definitions.
1662 // A value can have multiple definitions if it has been coalesced before.
1663 // For each definition, first go through all its uses and insert an unspill
1664 // instruction before it, then replace the use with the temporary register.
1665 // Unspill can be either a load from memory or simply a move to another
1666 // register file.
1667 // For "Pseudo" instructions (like PHI, SPLIT, MERGE) we can erase the use
1668 // if we have spilled to a memory location, or simply with the new register.
1669 // No load or conversion instruction should be needed.
1670 bool
1671 SpillCodeInserter::run(const std::list<ValuePair>& lst)
1672 {
1673    for (std::list<ValuePair>::const_iterator it = lst.begin(); it != lst.end();
1674         ++it) {
1675       LValue *lval = it->first->asLValue();
1676       Symbol *mem = it->second ? it->second->asSym() : NULL;
1677
1678       // Keep track of which instructions to delete later. Deleting them
1679       // inside the loop is unsafe since a single instruction may have
1680       // multiple destinations that all need to be spilled (like OP_SPLIT).
1681       unordered_set<Instruction *> to_del;
1682
1683       for (Value::DefIterator d = lval->defs.begin(); d != lval->defs.end();
1684            ++d) {
1685          Value *slot = mem ?
1686             static_cast<Value *>(mem) : new_LValue(func, FILE_GPR);
1687          Value *tmp = NULL;
1688          Instruction *last = NULL;
1689
1690          LValue *dval = (*d)->get()->asLValue();
1691          Instruction *defi = (*d)->getInsn();
1692
1693          // Sort all the uses by BB/instruction so that we don't unspill
1694          // multiple times in a row, and also remove a source of
1695          // non-determinism.
1696          std::vector<ValueRef *> refs(dval->uses.begin(), dval->uses.end());
1697          std::sort(refs.begin(), refs.end(), value_cmp);
1698
1699          // Unspill at each use *before* inserting spill instructions,
1700          // we don't want to have the spill instructions in the use list here.
1701          for (std::vector<ValueRef*>::const_iterator it = refs.begin();
1702               it != refs.end(); ++it) {
1703             ValueRef *u = *it;
1704             Instruction *usei = u->getInsn();
1705             assert(usei);
1706             if (usei->isPseudo()) {
1707                tmp = (slot->reg.file == FILE_MEMORY_LOCAL) ? NULL : slot;
1708                last = NULL;
1709             } else {
1710                if (!last || (usei != last->next && usei != last))
1711                   tmp = unspill(usei, dval, slot);
1712                last = usei;
1713             }
1714             u->set(tmp);
1715          }
1716
1717          assert(defi);
1718          if (defi->isPseudo()) {
1719             d = lval->defs.erase(d);
1720             --d;
1721             if (slot->reg.file == FILE_MEMORY_LOCAL)
1722                to_del.insert(defi);
1723             else
1724                defi->setDef(0, slot);
1725          } else {
1726             spill(defi, slot, dval);
1727          }
1728       }
1729
1730       for (unordered_set<Instruction *>::const_iterator it = to_del.begin();
1731            it != to_del.end(); ++it)
1732          delete_Instruction(func->getProgram(), *it);
1733    }
1734
1735    // TODO: We're not trying to reuse old slots in a potential next iteration.
1736    //  We have to update the slots' livei intervals to be able to do that.
1737    stackBase = stackSize;
1738    slots.clear();
1739    return true;
1740 }
1741
1742 bool
1743 RegAlloc::exec()
1744 {
1745    for (IteratorRef it = prog->calls.iteratorDFS(false);
1746         !it->end(); it->next()) {
1747       func = Function::get(reinterpret_cast<Graph::Node *>(it->get()));
1748
1749       func->tlsBase = prog->tlsSize;
1750       if (!execFunc())
1751          return false;
1752       prog->tlsSize += func->tlsSize;
1753    }
1754    return true;
1755 }
1756
1757 bool
1758 RegAlloc::execFunc()
1759 {
1760    InsertConstraintsPass insertConstr;
1761    PhiMovesPass insertPhiMoves;
1762    ArgumentMovesPass insertArgMoves;
1763    BuildIntervalsPass buildIntervals;
1764    SpillCodeInserter insertSpills(func);
1765
1766    GCRA gcra(func, insertSpills);
1767
1768    unsigned int i, retries;
1769    bool ret;
1770
1771    if (!func->ins.empty()) {
1772       // Insert a nop at the entry so inputs only used by the first instruction
1773       // don't count as having an empty live range.
1774       Instruction *nop = new_Instruction(func, OP_NOP, TYPE_NONE);
1775       BasicBlock::get(func->cfg.getRoot())->insertHead(nop);
1776    }
1777
1778    ret = insertConstr.exec(func);
1779    if (!ret)
1780       goto out;
1781
1782    ret = insertPhiMoves.run(func);
1783    if (!ret)
1784       goto out;
1785
1786    ret = insertArgMoves.run(func);
1787    if (!ret)
1788       goto out;
1789
1790    // TODO: need to fix up spill slot usage ranges to support > 1 retry
1791    for (retries = 0; retries < 3; ++retries) {
1792       if (retries && (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC))
1793          INFO("Retry: %i\n", retries);
1794       if (prog->dbgFlags & NV50_IR_DEBUG_REG_ALLOC)
1795          func->print();
1796
1797       // spilling to registers may add live ranges, need to rebuild everything
1798       ret = true;
1799       for (sequence = func->cfg.nextSequence(), i = 0;
1800            ret && i <= func->loopNestingBound;
1801            sequence = func->cfg.nextSequence(), ++i)
1802          ret = buildLiveSets(BasicBlock::get(func->cfg.getRoot()));
1803       // reset marker
1804       for (ArrayList::Iterator bi = func->allBBlocks.iterator();
1805            !bi.end(); bi.next())
1806          BasicBlock::get(bi)->liveSet.marker = false;
1807       if (!ret)
1808          break;
1809       func->orderInstructions(this->insns);
1810
1811       ret = buildIntervals.run(func);
1812       if (!ret)
1813          break;
1814       ret = gcra.allocateRegisters(insns);
1815       if (ret)
1816          break; // success
1817    }
1818    INFO_DBG(prog->dbgFlags, REG_ALLOC, "RegAlloc done: %i\n", ret);
1819
1820    func->tlsSize = insertSpills.getStackSize();
1821 out:
1822    return ret;
1823 }
1824
1825 // TODO: check if modifying Instruction::join here breaks anything
1826 void
1827 GCRA::resolveSplitsAndMerges()
1828 {
1829    for (std::list<Instruction *>::iterator it = splits.begin();
1830         it != splits.end();
1831         ++it) {
1832       Instruction *split = *it;
1833       unsigned int reg = regs.idToBytes(split->getSrc(0));
1834       for (int d = 0; split->defExists(d); ++d) {
1835          Value *v = split->getDef(d);
1836          v->reg.data.id = regs.bytesToId(v, reg);
1837          v->join = v;
1838          reg += v->reg.size;
1839       }
1840    }
1841    splits.clear();
1842
1843    for (std::list<Instruction *>::iterator it = merges.begin();
1844         it != merges.end();
1845         ++it) {
1846       Instruction *merge = *it;
1847       unsigned int reg = regs.idToBytes(merge->getDef(0));
1848       for (int s = 0; merge->srcExists(s); ++s) {
1849          Value *v = merge->getSrc(s);
1850          v->reg.data.id = regs.bytesToId(v, reg);
1851          v->join = v;
1852          // If the value is defined by a phi/union node, we also need to
1853          // perform the same fixup on that node's sources, since after RA
1854          // their registers should be identical.
1855          if (v->getInsn()->op == OP_PHI || v->getInsn()->op == OP_UNION) {
1856             Instruction *phi = v->getInsn();
1857             for (int phis = 0; phi->srcExists(phis); ++phis)
1858                phi->getSrc(phis)->join = v;
1859          }
1860          reg += v->reg.size;
1861       }
1862    }
1863    merges.clear();
1864 }
1865
1866 bool Program::registerAllocation()
1867 {
1868    RegAlloc ra(this);
1869    return ra.exec();
1870 }
1871
1872 bool
1873 RegAlloc::InsertConstraintsPass::exec(Function *ir)
1874 {
1875    constrList.clear();
1876
1877    bool ret = run(ir, true, true);
1878    if (ret)
1879       ret = insertConstraintMoves();
1880    return ret;
1881 }
1882
1883 // TODO: make part of texture insn
1884 void
1885 RegAlloc::InsertConstraintsPass::textureMask(TexInstruction *tex)
1886 {
1887    Value *def[4];
1888    int c, k, d;
1889    uint8_t mask = 0;
1890
1891    for (d = 0, k = 0, c = 0; c < 4; ++c) {
1892       if (!(tex->tex.mask & (1 << c)))
1893          continue;
1894       if (tex->getDef(k)->refCount()) {
1895          mask |= 1 << c;
1896          def[d++] = tex->getDef(k);
1897       }
1898       ++k;
1899    }
1900    tex->tex.mask = mask;
1901
1902    for (c = 0; c < d; ++c)
1903       tex->setDef(c, def[c]);
1904    for (; c < 4; ++c)
1905       tex->setDef(c, NULL);
1906 }
1907
1908 bool
1909 RegAlloc::InsertConstraintsPass::detectConflict(Instruction *cst, int s)
1910 {
1911    Value *v = cst->getSrc(s);
1912
1913    // current register allocation can't handle it if a value participates in
1914    // multiple constraints
1915    for (Value::UseIterator it = v->uses.begin(); it != v->uses.end(); ++it) {
1916       if (cst != (*it)->getInsn())
1917          return true;
1918    }
1919
1920    // can start at s + 1 because detectConflict is called on all sources
1921    for (int c = s + 1; cst->srcExists(c); ++c)
1922       if (v == cst->getSrc(c))
1923          return true;
1924
1925    Instruction *defi = v->getInsn();
1926
1927    return (!defi || defi->constrainedDefs());
1928 }
1929
1930 void
1931 RegAlloc::InsertConstraintsPass::addConstraint(Instruction *i, int s, int n)
1932 {
1933    Instruction *cst;
1934    int d;
1935
1936    // first, look for an existing identical constraint op
1937    for (std::list<Instruction *>::iterator it = constrList.begin();
1938         it != constrList.end();
1939         ++it) {
1940       cst = (*it);
1941       if (!i->bb->dominatedBy(cst->bb))
1942          break;
1943       for (d = 0; d < n; ++d)
1944          if (cst->getSrc(d) != i->getSrc(d + s))
1945             break;
1946       if (d >= n) {
1947          for (d = 0; d < n; ++d, ++s)
1948             i->setSrc(s, cst->getDef(d));
1949          return;
1950       }
1951    }
1952    cst = new_Instruction(func, OP_CONSTRAINT, i->dType);
1953
1954    for (d = 0; d < n; ++s, ++d) {
1955       cst->setDef(d, new_LValue(func, FILE_GPR));
1956       cst->setSrc(d, i->getSrc(s));
1957       i->setSrc(s, cst->getDef(d));
1958    }
1959    i->bb->insertBefore(i, cst);
1960
1961    constrList.push_back(cst);
1962 }
1963
1964 // Add a dummy use of the pointer source of >= 8 byte loads after the load
1965 // to prevent it from being assigned a register which overlapping the load's
1966 // destination, which would produce random corruptions.
1967 void
1968 RegAlloc::InsertConstraintsPass::addHazard(Instruction *i, const ValueRef *src)
1969 {
1970    Instruction *hzd = new_Instruction(func, OP_NOP, TYPE_NONE);
1971    hzd->setSrc(0, src->get());
1972    i->bb->insertAfter(i, hzd);
1973
1974 }
1975
1976 // b32 { %r0 %r1 %r2 %r3 } -> b128 %r0q
1977 void
1978 RegAlloc::InsertConstraintsPass::condenseDefs(Instruction *insn)
1979 {
1980    uint8_t size = 0;
1981    int n;
1982    for (n = 0; insn->defExists(n) && insn->def(n).getFile() == FILE_GPR; ++n)
1983       size += insn->getDef(n)->reg.size;
1984    if (n < 2)
1985       return;
1986    LValue *lval = new_LValue(func, FILE_GPR);
1987    lval->reg.size = size;
1988
1989    Instruction *split = new_Instruction(func, OP_SPLIT, typeOfSize(size));
1990    split->setSrc(0, lval);
1991    for (int d = 0; d < n; ++d) {
1992       split->setDef(d, insn->getDef(d));
1993       insn->setDef(d, NULL);
1994    }
1995    insn->setDef(0, lval);
1996
1997    for (int k = 1, d = n; insn->defExists(d); ++d, ++k) {
1998       insn->setDef(k, insn->getDef(d));
1999       insn->setDef(d, NULL);
2000    }
2001    // carry over predicate if any (mainly for OP_UNION uses)
2002    split->setPredicate(insn->cc, insn->getPredicate());
2003
2004    insn->bb->insertAfter(insn, split);
2005    constrList.push_back(split);
2006 }
2007 void
2008 RegAlloc::InsertConstraintsPass::condenseSrcs(Instruction *insn,
2009                                               const int a, const int b)
2010 {
2011    uint8_t size = 0;
2012    if (a >= b)
2013       return;
2014    for (int s = a; s <= b; ++s)
2015       size += insn->getSrc(s)->reg.size;
2016    if (!size)
2017       return;
2018    LValue *lval = new_LValue(func, FILE_GPR);
2019    lval->reg.size = size;
2020
2021    Value *save[3];
2022    insn->takeExtraSources(0, save);
2023
2024    Instruction *merge = new_Instruction(func, OP_MERGE, typeOfSize(size));
2025    merge->setDef(0, lval);
2026    for (int s = a, i = 0; s <= b; ++s, ++i) {
2027       merge->setSrc(i, insn->getSrc(s));
2028       insn->setSrc(s, NULL);
2029    }
2030    insn->setSrc(a, lval);
2031
2032    for (int k = a + 1, s = b + 1; insn->srcExists(s); ++s, ++k) {
2033       insn->setSrc(k, insn->getSrc(s));
2034       insn->setSrc(s, NULL);
2035    }
2036    insn->bb->insertBefore(insn, merge);
2037
2038    insn->putExtraSources(0, save);
2039
2040    constrList.push_back(merge);
2041 }
2042
2043 void
2044 RegAlloc::InsertConstraintsPass::texConstraintGM107(TexInstruction *tex)
2045 {
2046    int n, s;
2047
2048    if (isTextureOp(tex->op))
2049       textureMask(tex);
2050    condenseDefs(tex);
2051
2052    if (tex->op == OP_SUSTB || tex->op == OP_SUSTP) {
2053       condenseSrcs(tex, 3, (3 + typeSizeof(tex->dType) / 4) - 1);
2054    } else
2055    if (isTextureOp(tex->op)) {
2056       if (tex->op != OP_TXQ) {
2057          s = tex->tex.target.getArgCount() - tex->tex.target.isMS();
2058          if (tex->op == OP_TXD) {
2059             // Indirect handle belongs in the first arg
2060             if (tex->tex.rIndirectSrc >= 0)
2061                s++;
2062             if (!tex->tex.target.isArray() && tex->tex.useOffsets)
2063                s++;
2064          }
2065          n = tex->srcCount(0xff) - s;
2066       } else {
2067          s = tex->srcCount(0xff);
2068          n = 0;
2069       }
2070
2071       if (s > 1)
2072          condenseSrcs(tex, 0, s - 1);
2073       if (n > 1) // NOTE: first call modified positions already
2074          condenseSrcs(tex, 1, n);
2075    }
2076 }
2077
2078 void
2079 RegAlloc::InsertConstraintsPass::texConstraintNVE0(TexInstruction *tex)
2080 {
2081    if (isTextureOp(tex->op))
2082       textureMask(tex);
2083    condenseDefs(tex);
2084
2085    if (tex->op == OP_SUSTB || tex->op == OP_SUSTP) {
2086       condenseSrcs(tex, 3, (3 + typeSizeof(tex->dType) / 4) - 1);
2087    } else
2088    if (isTextureOp(tex->op)) {
2089       int n = tex->srcCount(0xff, true);
2090       if (n > 4) {
2091          condenseSrcs(tex, 0, 3);
2092          if (n > 5) // NOTE: first call modified positions already
2093             condenseSrcs(tex, 4 - (4 - 1), n - 1 - (4 - 1));
2094       } else
2095       if (n > 1) {
2096          condenseSrcs(tex, 0, n - 1);
2097       }
2098    }
2099 }
2100
2101 void
2102 RegAlloc::InsertConstraintsPass::texConstraintNVC0(TexInstruction *tex)
2103 {
2104    int n, s;
2105
2106    if (isTextureOp(tex->op))
2107       textureMask(tex);
2108
2109    if (tex->op == OP_TXQ) {
2110       s = tex->srcCount(0xff);
2111       n = 0;
2112    } else {
2113       s = tex->tex.target.getArgCount() - tex->tex.target.isMS();
2114       if (!tex->tex.target.isArray() &&
2115           (tex->tex.rIndirectSrc >= 0 || tex->tex.sIndirectSrc >= 0))
2116          ++s;
2117       if (tex->op == OP_TXD && tex->tex.useOffsets)
2118          ++s;
2119       n = tex->srcCount(0xff) - s;
2120       assert(n <= 4);
2121    }
2122
2123    if (s > 1)
2124       condenseSrcs(tex, 0, s - 1);
2125    if (n > 1) // NOTE: first call modified positions already
2126       condenseSrcs(tex, 1, n);
2127
2128    condenseDefs(tex);
2129 }
2130
2131 void
2132 RegAlloc::InsertConstraintsPass::texConstraintNV50(TexInstruction *tex)
2133 {
2134    Value *pred = tex->getPredicate();
2135    if (pred)
2136       tex->setPredicate(tex->cc, NULL);
2137
2138    textureMask(tex);
2139
2140    assert(tex->defExists(0) && tex->srcExists(0));
2141    // make src and def count match
2142    int c;
2143    for (c = 0; tex->srcExists(c) || tex->defExists(c); ++c) {
2144       if (!tex->srcExists(c))
2145          tex->setSrc(c, new_LValue(func, tex->getSrc(0)->asLValue()));
2146       if (!tex->defExists(c))
2147          tex->setDef(c, new_LValue(func, tex->getDef(0)->asLValue()));
2148    }
2149    if (pred)
2150       tex->setPredicate(tex->cc, pred);
2151    condenseDefs(tex);
2152    condenseSrcs(tex, 0, c - 1);
2153 }
2154
2155 // Insert constraint markers for instructions whose multiple sources must be
2156 // located in consecutive registers.
2157 bool
2158 RegAlloc::InsertConstraintsPass::visit(BasicBlock *bb)
2159 {
2160    TexInstruction *tex;
2161    Instruction *next;
2162    int s, size;
2163
2164    targ = bb->getProgram()->getTarget();
2165
2166    for (Instruction *i = bb->getEntry(); i; i = next) {
2167       next = i->next;
2168
2169       if ((tex = i->asTex())) {
2170          switch (targ->getChipset() & ~0xf) {
2171          case 0x50:
2172          case 0x80:
2173          case 0x90:
2174          case 0xa0:
2175             texConstraintNV50(tex);
2176             break;
2177          case 0xc0:
2178          case 0xd0:
2179             texConstraintNVC0(tex);
2180             break;
2181          case 0xe0:
2182          case 0xf0:
2183          case 0x100:
2184             texConstraintNVE0(tex);
2185             break;
2186          case 0x110:
2187             texConstraintGM107(tex);
2188             break;
2189          default:
2190             break;
2191          }
2192       } else
2193       if (i->op == OP_EXPORT || i->op == OP_STORE) {
2194          for (size = typeSizeof(i->dType), s = 1; size > 0; ++s) {
2195             assert(i->srcExists(s));
2196             size -= i->getSrc(s)->reg.size;
2197          }
2198          condenseSrcs(i, 1, s - 1);
2199       } else
2200       if (i->op == OP_LOAD || i->op == OP_VFETCH) {
2201          condenseDefs(i);
2202          if (i->src(0).isIndirect(0) && typeSizeof(i->dType) >= 8)
2203             addHazard(i, i->src(0).getIndirect(0));
2204          if (i->src(0).isIndirect(1) && typeSizeof(i->dType) >= 8)
2205             addHazard(i, i->src(0).getIndirect(1));
2206       } else
2207       if (i->op == OP_UNION ||
2208           i->op == OP_MERGE ||
2209           i->op == OP_SPLIT) {
2210          constrList.push_back(i);
2211       }
2212    }
2213    return true;
2214 }
2215
2216 // Insert extra moves so that, if multiple register constraints on a value are
2217 // in conflict, these conflicts can be resolved.
2218 bool
2219 RegAlloc::InsertConstraintsPass::insertConstraintMoves()
2220 {
2221    for (std::list<Instruction *>::iterator it = constrList.begin();
2222         it != constrList.end();
2223         ++it) {
2224       Instruction *cst = *it;
2225       Instruction *mov;
2226
2227       if (cst->op == OP_SPLIT && 0) {
2228          // spilling splits is annoying, just make sure they're separate
2229          for (int d = 0; cst->defExists(d); ++d) {
2230             if (!cst->getDef(d)->refCount())
2231                continue;
2232             LValue *lval = new_LValue(func, cst->def(d).getFile());
2233             const uint8_t size = cst->def(d).getSize();
2234             lval->reg.size = size;
2235
2236             mov = new_Instruction(func, OP_MOV, typeOfSize(size));
2237             mov->setSrc(0, lval);
2238             mov->setDef(0, cst->getDef(d));
2239             cst->setDef(d, mov->getSrc(0));
2240             cst->bb->insertAfter(cst, mov);
2241
2242             cst->getSrc(0)->asLValue()->noSpill = 1;
2243             mov->getSrc(0)->asLValue()->noSpill = 1;
2244          }
2245       } else
2246       if (cst->op == OP_MERGE || cst->op == OP_UNION) {
2247          for (int s = 0; cst->srcExists(s); ++s) {
2248             const uint8_t size = cst->src(s).getSize();
2249
2250             if (!cst->getSrc(s)->defs.size()) {
2251                mov = new_Instruction(func, OP_NOP, typeOfSize(size));
2252                mov->setDef(0, cst->getSrc(s));
2253                cst->bb->insertBefore(cst, mov);
2254                continue;
2255             }
2256             assert(cst->getSrc(s)->defs.size() == 1); // still SSA
2257
2258             Instruction *defi = cst->getSrc(s)->defs.front()->getInsn();
2259             // catch some cases where don't really need MOVs
2260             if (cst->getSrc(s)->refCount() == 1 && !defi->constrainedDefs())
2261                continue;
2262
2263             LValue *lval = new_LValue(func, cst->src(s).getFile());
2264             lval->reg.size = size;
2265
2266             mov = new_Instruction(func, OP_MOV, typeOfSize(size));
2267             mov->setDef(0, lval);
2268             mov->setSrc(0, cst->getSrc(s));
2269             cst->setSrc(s, mov->getDef(0));
2270             cst->bb->insertBefore(cst, mov);
2271
2272             cst->getDef(0)->asLValue()->noSpill = 1; // doesn't help
2273
2274             if (cst->op == OP_UNION)
2275                mov->setPredicate(defi->cc, defi->getPredicate());
2276          }
2277       }
2278    }
2279
2280    return true;
2281 }
2282
2283 } // namespace nv50_ir