2 * Copyright 2011 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "codegen/nv50_ir.h"
24 #include "codegen/nv50_ir_target.h"
28 const uint8_t Target::operationSrcNr
[] =
31 0, 0, 0, 0, // UNION, SPLIT, MERGE, CONSTRAINT
32 1, 1, 2, // MOV, LOAD, STORE
33 2, 2, 2, 2, 2, 3, 3, 3, // ADD, SUB, MUL, DIV, MOD, MAD, FMA, SAD
34 1, 1, 1, // ABS, NEG, NOT
35 2, 2, 2, 2, 2, // AND, OR, XOR, SHL, SHR
36 2, 2, 1, // MAX, MIN, SAT
37 1, 1, 1, 1, // CEIL, FLOOR, TRUNC, CVT
38 3, 3, 3, 2, 3, 3, // SET_AND,OR,XOR, SET, SELP, SLCT
39 1, 1, 1, 1, 1, 1, // RCP, RSQ, LG2, SIN, COS, EX2
40 1, 1, 1, 1, 1, 2, // EXP, LOG, PRESIN, PREEX2, SQRT, POW
41 0, 0, 0, 0, 0, // BRA, CALL, RET, CONT, BREAK,
42 0, 0, 0, // PRERET,CONT,BREAK
43 0, 0, 0, 0, 0, 0, // BRKPT, JOINAT, JOIN, DISCARD, EXIT, MEMBAR
44 1, 1, 2, 1, 2, // VFETCH, PFETCH, EXPORT, LINTERP, PINTERP
45 1, 1, // EMIT, RESTART
46 1, 1, 1, // TEX, TXB, TXL,
47 1, 1, 1, 1, 1, 1, 2, // TXF, TXQ, TXD, TXG, TXLQ, TEXCSAA, TEXPREP
48 1, 1, 2, 2, 2, 2, 2, // SULDB, SULDP, SUSTB, SUSTP, SUREDB, SUREDP, SULEA
49 3, 3, 3, 3, // SUBFM, SUCLAMP, SUEAU, MADSP
52 1, 2, 1, 2, 0, 0, // RDSV, WRSV, PIXLD, QUADOP, QUADON, QUADPOP
53 2, 3, 2, 1, 3, // POPCNT, INSBF, EXTBF, BFIND, PERMT
55 2, 2, 2, 2, 3, 2, // VADD, VAVG, VMIN, VMAX, VSAD, VSET,
56 2, 2, 2, 1, // VSHR, VSHL, VSEL, CCTL
61 const OpClass
Target::operationClass
[] =
63 // NOP; PHI; UNION, SPLIT, MERGE, CONSTRAINT
66 OPCLASS_PSEUDO
, OPCLASS_PSEUDO
, OPCLASS_PSEUDO
, OPCLASS_PSEUDO
,
71 // ADD, SUB, MUL; DIV, MOD; MAD, FMA, SAD
72 OPCLASS_ARITH
, OPCLASS_ARITH
, OPCLASS_ARITH
,
73 OPCLASS_ARITH
, OPCLASS_ARITH
,
74 OPCLASS_ARITH
, OPCLASS_ARITH
, OPCLASS_ARITH
,
75 // ABS, NEG; NOT, AND, OR, XOR; SHL, SHR
76 OPCLASS_CONVERT
, OPCLASS_CONVERT
,
77 OPCLASS_LOGIC
, OPCLASS_LOGIC
, OPCLASS_LOGIC
, OPCLASS_LOGIC
,
78 OPCLASS_SHIFT
, OPCLASS_SHIFT
,
80 OPCLASS_COMPARE
, OPCLASS_COMPARE
,
81 // SAT, CEIL, FLOOR, TRUNC; CVT
82 OPCLASS_CONVERT
, OPCLASS_CONVERT
, OPCLASS_CONVERT
, OPCLASS_CONVERT
,
84 // SET(AND,OR,XOR); SELP, SLCT
85 OPCLASS_COMPARE
, OPCLASS_COMPARE
, OPCLASS_COMPARE
, OPCLASS_COMPARE
,
86 OPCLASS_COMPARE
, OPCLASS_COMPARE
,
87 // RCP, RSQ, LG2, SIN, COS; EX2, EXP, LOG, PRESIN, PREEX2; SQRT, POW
88 OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
,
89 OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
, OPCLASS_SFU
,
90 OPCLASS_SFU
, OPCLASS_SFU
,
91 // BRA, CALL, RET; CONT, BREAK, PRE(RET,CONT,BREAK); BRKPT, JOINAT, JOIN
92 OPCLASS_FLOW
, OPCLASS_FLOW
, OPCLASS_FLOW
,
93 OPCLASS_FLOW
, OPCLASS_FLOW
, OPCLASS_FLOW
, OPCLASS_FLOW
, OPCLASS_FLOW
,
94 OPCLASS_FLOW
, OPCLASS_FLOW
, OPCLASS_FLOW
,
96 OPCLASS_FLOW
, OPCLASS_FLOW
,
99 // VFETCH, PFETCH, EXPORT
100 OPCLASS_LOAD
, OPCLASS_OTHER
, OPCLASS_STORE
,
102 OPCLASS_SFU
, OPCLASS_SFU
,
104 OPCLASS_CONTROL
, OPCLASS_CONTROL
,
105 // TEX, TXB, TXL, TXF; TXQ, TXD, TXG, TXLQ; TEXCSAA, TEXPREP
106 OPCLASS_TEXTURE
, OPCLASS_TEXTURE
, OPCLASS_TEXTURE
, OPCLASS_TEXTURE
,
107 OPCLASS_TEXTURE
, OPCLASS_TEXTURE
, OPCLASS_TEXTURE
, OPCLASS_TEXTURE
,
108 OPCLASS_TEXTURE
, OPCLASS_TEXTURE
,
109 // SULDB, SULDP, SUSTB, SUSTP; SUREDB, SUREDP, SULEA
110 OPCLASS_SURFACE
, OPCLASS_SURFACE
, OPCLASS_ATOMIC
, OPCLASS_SURFACE
,
111 OPCLASS_SURFACE
, OPCLASS_SURFACE
, OPCLASS_SURFACE
,
112 // SUBFM, SUCLAMP, SUEAU, MADSP
113 OPCLASS_OTHER
, OPCLASS_OTHER
, OPCLASS_OTHER
, OPCLASS_ARITH
,
116 // DFDX, DFDY, RDSV, WRSV; PIXLD, QUADOP, QUADON, QUADPOP
117 OPCLASS_OTHER
, OPCLASS_OTHER
, OPCLASS_OTHER
, OPCLASS_OTHER
,
118 OPCLASS_OTHER
, OPCLASS_OTHER
, OPCLASS_CONTROL
, OPCLASS_CONTROL
,
119 // POPCNT, INSBF, EXTBF, BFIND; PERMT
120 OPCLASS_BITFIELD
, OPCLASS_BITFIELD
, OPCLASS_BITFIELD
, OPCLASS_BITFIELD
,
123 OPCLASS_ATOMIC
, OPCLASS_CONTROL
,
124 // VADD, VAVG, VMIN, VMAX
125 OPCLASS_VECTOR
, OPCLASS_VECTOR
, OPCLASS_VECTOR
, OPCLASS_VECTOR
,
126 // VSAD, VSET, VSHR, VSHL
127 OPCLASS_VECTOR
, OPCLASS_VECTOR
, OPCLASS_VECTOR
, OPCLASS_VECTOR
,
129 OPCLASS_VECTOR
, OPCLASS_CONTROL
,
132 OPCLASS_PSEUDO
// LAST
136 extern Target
*getTargetGM107(unsigned int chipset
);
137 extern Target
*getTargetNVC0(unsigned int chipset
);
138 extern Target
*getTargetNV50(unsigned int chipset
);
140 Target
*Target::create(unsigned int chipset
)
142 STATIC_ASSERT(Elements(operationSrcNr
) == OP_LAST
+ 1);
143 STATIC_ASSERT(Elements(operationClass
) == OP_LAST
+ 1);
144 switch (chipset
& ~0xf) {
146 return getTargetGM107(chipset
);
152 return getTargetNVC0(chipset
);
157 return getTargetNV50(chipset
);
159 ERROR("unsupported target: NV%x\n", chipset
);
164 void Target::destroy(Target
*targ
)
169 CodeEmitter::CodeEmitter(const Target
*target
) : targ(target
)
174 CodeEmitter::setCodeLocation(void *ptr
, uint32_t size
)
176 code
= reinterpret_cast<uint32_t *>(ptr
);
178 codeSizeLimit
= size
;
182 CodeEmitter::printBinary() const
184 uint32_t *bin
= code
- codeSize
/ 4;
185 INFO("program binary (%u bytes)", codeSize
);
186 for (unsigned int pos
= 0; pos
< codeSize
/ 4; ++pos
) {
189 INFO("%08x ", bin
[pos
]);
194 static inline uint32_t sizeToBundlesNVE4(uint32_t size
)
196 return (size
+ 55) / 56;
200 CodeEmitter::prepareEmission(Program
*prog
)
202 for (ArrayList::Iterator fi
= prog
->allFuncs
.iterator();
203 !fi
.end(); fi
.next()) {
204 Function
*func
= reinterpret_cast<Function
*>(fi
.get());
205 func
->binPos
= prog
->binSize
;
206 prepareEmission(func
);
208 // adjust sizes & positions for schedulding info:
209 if (prog
->getTarget()->hasSWSched
) {
210 uint32_t adjPos
= func
->binPos
;
211 BasicBlock
*bb
= NULL
;
212 for (int i
= 0; i
< func
->bbCount
; ++i
) {
213 bb
= func
->bbArray
[i
];
214 int32_t adjSize
= bb
->binSize
;
216 adjSize
-= 64 - adjPos
% 64;
220 adjSize
= bb
->binSize
+ sizeToBundlesNVE4(adjSize
) * 8;
222 bb
->binSize
= adjSize
;
226 func
->binSize
= adjPos
- func
->binPos
;
229 prog
->binSize
+= func
->binSize
;
234 CodeEmitter::prepareEmission(Function
*func
)
237 func
->bbArray
= new BasicBlock
* [func
->cfg
.getSize()];
239 BasicBlock::get(func
->cfg
.getRoot())->binPos
= func
->binPos
;
241 for (IteratorRef it
= func
->cfg
.iteratorCFG(); !it
->end(); it
->next())
242 prepareEmission(BasicBlock::get(*it
));
246 CodeEmitter::prepareEmission(BasicBlock
*bb
)
248 Instruction
*i
, *next
;
249 Function
*func
= bb
->getFunction();
253 for (j
= func
->bbCount
- 1; j
>= 0 && !func
->bbArray
[j
]->binSize
; --j
);
255 for (; j
>= 0; --j
) {
256 BasicBlock
*in
= func
->bbArray
[j
];
257 Instruction
*exit
= in
->getExit();
259 if (exit
&& exit
->op
== OP_BRA
&& exit
->asFlow()->target
.bb
== bb
) {
263 for (++j
; j
< func
->bbCount
; ++j
)
264 func
->bbArray
[j
]->binPos
-= 8;
268 bb
->binPos
= in
->binPos
+ in
->binSize
;
269 if (in
->binSize
) // no more no-op branches to bb
272 func
->bbArray
[func
->bbCount
++] = bb
;
277 // determine encoding size, try to group short instructions
279 for (i
= bb
->getEntry(); i
; i
= next
) {
282 if (i
->op
== OP_MEMBAR
&& !targ
->isOpSupported(OP_MEMBAR
, TYPE_NONE
)) {
287 i
->encSize
= getMinEncodingSize(i
);
288 if (next
&& i
->encSize
< 8)
291 if ((nShort
& 1) && next
&& getMinEncodingSize(next
) == 4) {
292 if (i
->isCommutationLegal(i
->next
)) {
293 bb
->permuteAdjacent(i
, next
);
299 if (i
->isCommutationLegal(i
->prev
) && next
->next
) {
300 bb
->permuteAdjacent(i
->prev
, i
);
307 i
->prev
->encSize
= 8;
314 i
->prev
->encSize
= 8;
319 bb
->binSize
+= i
->encSize
;
322 if (bb
->getExit()->encSize
== 4) {
324 bb
->getExit()->encSize
= 8;
327 if ((bb
->getExit()->prev
->encSize
== 4) && !(nShort
& 1)) {
329 bb
->getExit()->prev
->encSize
= 8;
332 assert(!bb
->getEntry() || (bb
->getExit() && bb
->getExit()->encSize
== 8));
334 func
->binSize
+= bb
->binSize
;
338 Program::emitSymbolTable(struct nv50_ir_prog_info
*info
)
340 unsigned int n
= 0, nMax
= allFuncs
.getSize();
343 (struct nv50_ir_prog_symbol
*)MALLOC(nMax
* sizeof(*info
->bin
.syms
));
345 for (ArrayList::Iterator fi
= allFuncs
.iterator();
348 Function
*f
= (Function
*)fi
.get();
351 info
->bin
.syms
[n
].label
= f
->getLabel();
352 info
->bin
.syms
[n
].offset
= f
->binPos
;
355 info
->bin
.numSyms
= n
;
359 Program::emitBinary(struct nv50_ir_prog_info
*info
)
361 CodeEmitter
*emit
= target
->getCodeEmitter(progType
);
363 emit
->prepareEmission(this);
365 if (dbgFlags
& NV50_IR_DEBUG_BASIC
)
372 code
= reinterpret_cast<uint32_t *>(MALLOC(binSize
));
375 emit
->setCodeLocation(code
, binSize
);
377 for (ArrayList::Iterator fi
= allFuncs
.iterator(); !fi
.end(); fi
.next()) {
378 Function
*fn
= reinterpret_cast<Function
*>(fi
.get());
380 assert(emit
->getCodeSize() == fn
->binPos
);
382 for (int b
= 0; b
< fn
->bbCount
; ++b
)
383 for (Instruction
*i
= fn
->bbArray
[b
]->getEntry(); i
; i
= i
->next
)
384 emit
->emitInstruction(i
);
386 info
->bin
.relocData
= emit
->getRelocInfo();
388 emitSymbolTable(info
);
390 // the nvc0 driver will print the binary iself together with the header
391 if ((dbgFlags
& NV50_IR_DEBUG_BASIC
) && getTarget()->getChipset() < 0xc0)
398 #define RELOC_ALLOC_INCREMENT 8
401 CodeEmitter::addReloc(RelocEntry::Type ty
, int w
, uint32_t data
, uint32_t m
,
404 unsigned int n
= relocInfo
? relocInfo
->count
: 0;
406 if (!(n
% RELOC_ALLOC_INCREMENT
)) {
407 size_t size
= sizeof(RelocInfo
) + n
* sizeof(RelocEntry
);
408 relocInfo
= reinterpret_cast<RelocInfo
*>(
409 REALLOC(relocInfo
, n
? size
: 0,
410 size
+ RELOC_ALLOC_INCREMENT
* sizeof(RelocEntry
)));
414 memset(relocInfo
, 0, sizeof(RelocInfo
));
418 relocInfo
->entry
[n
].data
= data
;
419 relocInfo
->entry
[n
].mask
= m
;
420 relocInfo
->entry
[n
].offset
= codeSize
+ w
* 4;
421 relocInfo
->entry
[n
].bitPos
= s
;
422 relocInfo
->entry
[n
].type
= ty
;
428 RelocEntry::apply(uint32_t *binary
, const RelocInfo
*info
) const
433 case TYPE_CODE
: value
= info
->codePos
; break;
434 case TYPE_BUILTIN
: value
= info
->libPos
; break;
435 case TYPE_DATA
: value
= info
->dataPos
; break;
441 value
= (bitPos
< 0) ? (value
>> -bitPos
) : (value
<< bitPos
);
443 binary
[offset
/ 4] &= ~mask
;
444 binary
[offset
/ 4] |= value
& mask
;
447 } // namespace nv50_ir
450 #include "codegen/nv50_ir_driver.h"
455 nv50_ir_relocate_code(void *relocData
, uint32_t *code
,
460 nv50_ir::RelocInfo
*info
= reinterpret_cast<nv50_ir::RelocInfo
*>(relocData
);
462 info
->codePos
= codePos
;
463 info
->libPos
= libPos
;
464 info
->dataPos
= dataPos
;
466 for (unsigned int i
= 0; i
< info
->count
; ++i
)
467 info
->entry
[i
].apply(code
, info
);
471 nv50_ir_get_target_library(uint32_t chipset
,
472 const uint32_t **code
, uint32_t *size
)
474 nv50_ir::Target
*targ
= nv50_ir::Target::create(chipset
);
475 targ
->getBuiltinCode(code
, size
);
476 nv50_ir::Target::destroy(targ
);