src/gallium/drivers/nouveau/codegen/nv50_ir_target.h

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22
  23 #ifndef __NV50_IR_TARGET_H__
  24 #define __NV50_IR_TARGET_H__
  25
  26 #include "codegen/nv50_ir.h"
  27
  28 namespace nv50_ir {
  29
  30 struct RelocInfo;
  31
  32 struct RelocEntry
  33 {
  34    enum Type
  35    {
  36       TYPE_CODE,
  37       TYPE_BUILTIN,
  38       TYPE_DATA
  39    };
  40
  41    uint32_t data;
  42    uint32_t mask;
  43    uint32_t offset;
  44    int8_t bitPos;
  45    Type type;
  46
  47    inline void apply(uint32_t *binary, const RelocInfo *info) const;
  48 };
  49
  50 struct RelocInfo
  51 {
  52    uint32_t codePos;
  53    uint32_t libPos;
  54    uint32_t dataPos;
  55
  56    uint32_t count;
  57
  58    RelocEntry entry[0];
  59 };
  60
  61 class CodeEmitter
  62 {
  63 public:
  64    CodeEmitter(const Target *);
  65    virtual ~CodeEmitter() { }
  66
  67    // returns whether the instruction was encodable and written
  68    virtual bool emitInstruction(Instruction *) = 0;
  69
  70    virtual uint32_t getMinEncodingSize(const Instruction *) const = 0;
  71
  72    void setCodeLocation(void *, uint32_t size);
  73    inline void *getCodeLocation() const { return code; }
  74    inline uint32_t getCodeSize() const { return codeSize; }
  75
  76    bool addReloc(RelocEntry::Type, int w, uint32_t data, uint32_t m,
  77                  int s);
  78
  79    inline void *getRelocInfo() const { return relocInfo; }
  80
  81    virtual void prepareEmission(Program *);
  82    virtual void prepareEmission(Function *);
  83    virtual void prepareEmission(BasicBlock *);
  84
  85    void printBinary() const;
  86
  87 protected:
  88    const Target *targ;
  89
  90    uint32_t *code;
  91    uint32_t codeSize;
  92    uint32_t codeSizeLimit;
  93
  94    RelocInfo *relocInfo;
  95 };
  96
  97
  98 enum OpClass
  99 {
 100    OPCLASS_MOVE          = 0,
 101    OPCLASS_LOAD          = 1,
 102    OPCLASS_STORE         = 2,
 103    OPCLASS_ARITH         = 3,
 104    OPCLASS_SHIFT         = 4,
 105    OPCLASS_SFU           = 5,
 106    OPCLASS_LOGIC         = 6,
 107    OPCLASS_COMPARE       = 7,
 108    OPCLASS_CONVERT       = 8,
 109    OPCLASS_ATOMIC        = 9,
 110    OPCLASS_TEXTURE       = 10,
 111    OPCLASS_SURFACE       = 11,
 112    OPCLASS_FLOW          = 12,
 113    OPCLASS_PSEUDO        = 14,
 114    OPCLASS_VECTOR        = 15,
 115    OPCLASS_BITFIELD      = 16,
 116    OPCLASS_CONTROL       = 17,
 117    OPCLASS_OTHER         = 18
 118 };
 119
 120 class Target
 121 {
 122 public:
 123    Target(bool m, bool j, bool s) : hasJoin(m), joinAnterior(j), hasSWSched(s) { }
 124    virtual ~Target() { }
 125
 126    static Target *create(uint32_t chipset);
 127    static void destroy(Target *);
 128
 129    // 0x50 and 0x84 to 0xaf for nv50
 130    // 0xc0 to 0xdf for nvc0
 131    inline uint32_t getChipset() const { return chipset; }
 132
 133    virtual CodeEmitter *getCodeEmitter(Program::Type) = 0;
 134
 135    // Drivers should upload this so we can use it from all programs.
 136    // The address chosen is supplied to the relocation routine.
 137    virtual void getBuiltinCode(const uint32_t **code, uint32_t *size) const = 0;
 138
 139    virtual void parseDriverInfo(const struct nv50_ir_prog_info *info) { }
 140
 141    virtual bool runLegalizePass(Program *, CGStage stage) const = 0;
 142
 143 public:
 144    struct OpInfo
 145    {
 146       OpInfo *variants;
 147       operation op;
 148       uint16_t srcTypes;
 149       uint16_t dstTypes;
 150       uint32_t immdBits;
 151       uint8_t srcNr;
 152       uint8_t srcMods[3];
 153       uint8_t dstMods;
 154       uint16_t srcFiles[3];
 155       uint16_t dstFiles;
 156       unsigned int minEncSize  : 4;
 157       unsigned int vector      : 1;
 158       unsigned int predicate   : 1;
 159       unsigned int commutative : 1;
 160       unsigned int pseudo      : 1;
 161       unsigned int flow        : 1;
 162       unsigned int hasDest     : 1;
 163       unsigned int terminator  : 1;
 164    };
 165
 166    inline const OpInfo& getOpInfo(const Instruction *) const;
 167    inline const OpInfo& getOpInfo(const operation) const;
 168
 169    inline DataFile nativeFile(DataFile f) const;
 170
 171    virtual bool insnCanLoad(const Instruction *insn, int s,
 172                             const Instruction *ld) const = 0;
 173    virtual bool isOpSupported(operation, DataType) const = 0;
 174    virtual bool isAccessSupported(DataFile, DataType) const = 0;
 175    virtual bool isModSupported(const Instruction *,
 176                                int s, Modifier) const = 0;
 177    virtual bool isSatSupported(const Instruction *) const = 0;
 178    virtual bool isPostMultiplySupported(operation op, float f,
 179                                         int& e) const { return false; }
 180    virtual bool mayPredicate(const Instruction *,
 181                              const Value *) const = 0;
 182
 183    // whether @insn can be issued together with @next (order matters)
 184    virtual bool canDualIssue(const Instruction *insn,
 185                              const Instruction *next) const { return false; }
 186    virtual int getLatency(const Instruction *) const { return 1; }
 187    virtual int getThroughput(const Instruction *) const { return 1; }
 188
 189    virtual unsigned int getFileSize(DataFile) const = 0;
 190    virtual unsigned int getFileUnit(DataFile) const = 0;
 191
 192    virtual uint32_t getSVAddress(DataFile, const Symbol *) const = 0;
 193
 194 public:
 195    const bool hasJoin;      // true if instructions have a join modifier
 196    const bool joinAnterior; // true if join is executed before the op
 197    const bool hasSWSched;   // true if code should provide scheduling data
 198
 199    static const uint8_t operationSrcNr[];
 200    static const OpClass operationClass[];
 201
 202    static inline uint8_t getOpSrcNr(operation op)
 203    {
 204       return operationSrcNr[op];
 205    }
 206    static inline OpClass getOpClass(operation op)
 207    {
 208       return operationClass[op];
 209    }
 210
 211 protected:
 212    uint32_t chipset;
 213
 214    DataFile nativeFileMap[DATA_FILE_COUNT];
 215
 216    OpInfo opInfo[OP_LAST + 1];
 217 };
 218
 219 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const
 220 {
 221    return opInfo[MIN2(insn->op, OP_LAST)];
 222 }
 223
 224 const Target::OpInfo& Target::getOpInfo(const operation op) const
 225 {
 226    return opInfo[op];
 227 }
 228
 229 inline DataFile Target::nativeFile(DataFile f) const
 230 {
 231    return nativeFileMap[f];
 232 }
 233
 234 } // namespace nv50_ir
 235
 236 #endif // __NV50_IR_TARGET_H__