2 * Copyright 2011 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef __NV50_IR_TARGET_H__
24 #define __NV50_IR_TARGET_H__
26 #include "codegen/nv50_ir.h"
47 inline void apply(uint32_t *binary
, const RelocInfo
*info
) const;
62 FixupData(bool force
, bool flat
) :
63 force_persample_interp(force
), flatshade(flat
) {}
64 bool force_persample_interp
;
69 typedef void (*FixupApply
)(const FixupEntry
*, uint32_t*, const FixupData
&);
73 FixupEntry(FixupApply apply
, int ipa
, int reg
, int loc
) :
74 apply(apply
), ipa(ipa
), reg(reg
), loc(loc
) {}
79 uint32_t ipa
:4; // SC mode used to identify colors
80 uint32_t reg
:8; // The reg used for perspective division
81 uint32_t loc
:20; // Let's hope we don't have more than 1M-sized shaders
96 CodeEmitter(const Target
*);
97 virtual ~CodeEmitter() { }
99 // returns whether the instruction was encodable and written
100 virtual bool emitInstruction(Instruction
*) = 0;
102 virtual uint32_t getMinEncodingSize(const Instruction
*) const = 0;
104 void setCodeLocation(void *, uint32_t size
);
105 inline void *getCodeLocation() const { return code
; }
106 inline uint32_t getCodeSize() const { return codeSize
; }
108 bool addReloc(RelocEntry::Type
, int w
, uint32_t data
, uint32_t m
,
111 inline void *getRelocInfo() const { return relocInfo
; }
113 bool addInterp(int ipa
, int reg
, FixupApply apply
);
114 inline void *getFixupInfo() const { return fixupInfo
; }
116 virtual void prepareEmission(Program
*);
117 virtual void prepareEmission(Function
*);
118 virtual void prepareEmission(BasicBlock
*);
120 void printBinary() const;
127 uint32_t codeSizeLimit
;
129 RelocInfo
*relocInfo
;
130 FixupInfo
*fixupInfo
;
146 OPCLASS_TEXTURE
= 10,
147 OPCLASS_SURFACE
= 11,
151 OPCLASS_BITFIELD
= 16,
152 OPCLASS_CONTROL
= 17,
159 Target(bool m
, bool j
, bool s
) : hasJoin(m
), joinAnterior(j
), hasSWSched(s
) { }
160 virtual ~Target() { }
162 static Target
*create(uint32_t chipset
);
163 static void destroy(Target
*);
165 // 0x50 and 0x84 to 0xaf for nv50
166 // 0xc0 to 0xdf for nvc0
167 inline uint32_t getChipset() const { return chipset
; }
169 virtual CodeEmitter
*getCodeEmitter(Program::Type
) = 0;
171 // Drivers should upload this so we can use it from all programs.
172 // The address chosen is supplied to the relocation routine.
173 virtual void getBuiltinCode(const uint32_t **code
, uint32_t *size
) const = 0;
175 virtual void parseDriverInfo(const struct nv50_ir_prog_info
*info
) { }
177 virtual bool runLegalizePass(Program
*, CGStage stage
) const = 0;
190 uint16_t srcFiles
[3];
192 unsigned int minEncSize
: 4;
193 unsigned int vector
: 1;
194 unsigned int predicate
: 1;
195 unsigned int commutative
: 1;
196 unsigned int pseudo
: 1;
197 unsigned int flow
: 1;
198 unsigned int hasDest
: 1;
199 unsigned int terminator
: 1;
202 inline const OpInfo
& getOpInfo(const Instruction
*) const;
203 inline const OpInfo
& getOpInfo(const operation
) const;
205 inline DataFile
nativeFile(DataFile f
) const;
207 virtual bool insnCanLoad(const Instruction
*insn
, int s
,
208 const Instruction
*ld
) const = 0;
209 virtual bool insnCanLoadOffset(const Instruction
*insn
, int s
,
210 int offset
) const = 0;
211 virtual bool isOpSupported(operation
, DataType
) const = 0;
212 virtual bool isAccessSupported(DataFile
, DataType
) const = 0;
213 virtual bool isModSupported(const Instruction
*,
214 int s
, Modifier
) const = 0;
215 virtual bool isSatSupported(const Instruction
*) const = 0;
216 virtual bool isPostMultiplySupported(operation op
, float f
,
217 int& e
) const { return false; }
218 virtual bool mayPredicate(const Instruction
*,
219 const Value
*) const = 0;
221 // whether @insn can be issued together with @next (order matters)
222 virtual bool canDualIssue(const Instruction
*insn
,
223 const Instruction
*next
) const { return false; }
224 virtual int getLatency(const Instruction
*) const { return 1; }
225 virtual int getThroughput(const Instruction
*) const { return 1; }
227 virtual unsigned int getFileSize(DataFile
) const = 0;
228 virtual unsigned int getFileUnit(DataFile
) const = 0;
230 virtual uint32_t getSVAddress(DataFile
, const Symbol
*) const = 0;
233 const bool hasJoin
; // true if instructions have a join modifier
234 const bool joinAnterior
; // true if join is executed before the op
235 const bool hasSWSched
; // true if code should provide scheduling data
237 static const uint8_t operationSrcNr
[];
238 static const OpClass operationClass
[];
240 static inline uint8_t getOpSrcNr(operation op
)
242 return operationSrcNr
[op
];
244 static inline OpClass
getOpClass(operation op
)
246 return operationClass
[op
];
252 DataFile nativeFileMap
[DATA_FILE_COUNT
];
254 OpInfo opInfo
[OP_LAST
+ 1];
257 const Target::OpInfo
& Target::getOpInfo(const Instruction
*insn
) const
259 return opInfo
[MIN2(insn
->op
, OP_LAST
)];
262 const Target::OpInfo
& Target::getOpInfo(const operation op
) const
267 inline DataFile
Target::nativeFile(DataFile f
) const
269 return nativeFileMap
[f
];
272 } // namespace nv50_ir
274 #endif // __NV50_IR_TARGET_H__