src/gallium/drivers/nouveau/nouveau_buffer.c

   1
   2 #include "util/u_inlines.h"
   3 #include "util/u_memory.h"
   4 #include "util/u_math.h"
   5 #include "util/u_surface.h"
   6
   7 #include "nouveau_screen.h"
   8 #include "nouveau_context.h"
   9 #include "nouveau_winsys.h"
  10 #include "nouveau_fence.h"
  11 #include "nouveau_buffer.h"
  12 #include "nouveau_mm.h"
  13
  14 #define NOUVEAU_TRANSFER_PUSHBUF_THRESHOLD 192
  15
  16 struct nouveau_transfer {
  17    struct pipe_transfer base;
  18
  19    uint8_t *map;
  20    struct nouveau_bo *bo;
  21    struct nouveau_mm_allocation *mm;
  22    uint32_t offset;
  23 };
  24
  25 static inline struct nouveau_transfer *
  26 nouveau_transfer(struct pipe_transfer *transfer)
  27 {
  28    return (struct nouveau_transfer *)transfer;
  29 }
  30
  31 static inline bool
  32 nouveau_buffer_malloc(struct nv04_resource *buf)
  33 {
  34    if (!buf->data)
  35       buf->data = align_malloc(buf->base.width0, NOUVEAU_MIN_BUFFER_MAP_ALIGN);
  36    return !!buf->data;
  37 }
  38
  39 static inline bool
  40 nouveau_buffer_allocate(struct nouveau_screen *screen,
  41                         struct nv04_resource *buf, unsigned domain)
  42 {
  43    uint32_t size = align(buf->base.width0, 0x100);
  44
  45    if (domain == NOUVEAU_BO_VRAM) {
  46       buf->mm = nouveau_mm_allocate(screen->mm_VRAM, size,
  47                                     &buf->bo, &buf->offset);
  48       if (!buf->bo)
  49          return nouveau_buffer_allocate(screen, buf, NOUVEAU_BO_GART);
  50       NOUVEAU_DRV_STAT(screen, buf_obj_current_bytes_vid, buf->base.width0);
  51    } else
  52    if (domain == NOUVEAU_BO_GART) {
  53       buf->mm = nouveau_mm_allocate(screen->mm_GART, size,
  54                                     &buf->bo, &buf->offset);
  55       if (!buf->bo)
  56          return false;
  57       NOUVEAU_DRV_STAT(screen, buf_obj_current_bytes_sys, buf->base.width0);
  58    } else {
  59       assert(domain == 0);
  60       if (!nouveau_buffer_malloc(buf))
  61          return false;
  62    }
  63    buf->domain = domain;
  64    if (buf->bo)
  65       buf->address = buf->bo->offset + buf->offset;
  66
  67    util_range_set_empty(&buf->valid_buffer_range);
  68
  69    return true;
  70 }
  71
  72 static inline void
  73 release_allocation(struct nouveau_mm_allocation **mm,
  74                    struct nouveau_fence *fence)
  75 {
  76    nouveau_fence_work(fence, nouveau_mm_free_work, *mm);
  77    (*mm) = NULL;
  78 }
  79
  80 inline void
  81 nouveau_buffer_release_gpu_storage(struct nv04_resource *buf)
  82 {
  83    if (buf->fence && buf->fence->state < NOUVEAU_FENCE_STATE_FLUSHED) {
  84       nouveau_fence_work(buf->fence, nouveau_fence_unref_bo, buf->bo);
  85       buf->bo = NULL;
  86    } else {
  87       nouveau_bo_ref(NULL, &buf->bo);
  88    }
  89
  90    if (buf->mm)
  91       release_allocation(&buf->mm, buf->fence);
  92
  93    if (buf->domain == NOUVEAU_BO_VRAM)
  94       NOUVEAU_DRV_STAT_RES(buf, buf_obj_current_bytes_vid, -(uint64_t)buf->base.width0);
  95    if (buf->domain == NOUVEAU_BO_GART)
  96       NOUVEAU_DRV_STAT_RES(buf, buf_obj_current_bytes_sys, -(uint64_t)buf->base.width0);
  97
  98    buf->domain = 0;
  99 }
 100
 101 static inline bool
 102 nouveau_buffer_reallocate(struct nouveau_screen *screen,
 103                           struct nv04_resource *buf, unsigned domain)
 104 {
 105    nouveau_buffer_release_gpu_storage(buf);
 106
 107    nouveau_fence_ref(NULL, &buf->fence);
 108    nouveau_fence_ref(NULL, &buf->fence_wr);
 109
 110    buf->status &= NOUVEAU_BUFFER_STATUS_REALLOC_MASK;
 111
 112    return nouveau_buffer_allocate(screen, buf, domain);
 113 }
 114
 115 static void
 116 nouveau_buffer_destroy(struct pipe_screen *pscreen,
 117                        struct pipe_resource *presource)
 118 {
 119    struct nv04_resource *res = nv04_resource(presource);
 120
 121    nouveau_buffer_release_gpu_storage(res);
 122
 123    if (res->data && !(res->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY))
 124       align_free(res->data);
 125
 126    nouveau_fence_ref(NULL, &res->fence);
 127    nouveau_fence_ref(NULL, &res->fence_wr);
 128
 129    util_range_destroy(&res->valid_buffer_range);
 130
 131    FREE(res);
 132
 133    NOUVEAU_DRV_STAT(nouveau_screen(pscreen), buf_obj_current_count, -1);
 134 }
 135
 136 /* Set up a staging area for the transfer. This is either done in "regular"
 137  * system memory if the driver supports push_data (nv50+) and the data is
 138  * small enough (and permit_pb == true), or in GART memory.
 139  */
 140 static uint8_t *
 141 nouveau_transfer_staging(struct nouveau_context *nv,
 142                          struct nouveau_transfer *tx, bool permit_pb)
 143 {
 144    const unsigned adj = tx->base.box.x & NOUVEAU_MIN_BUFFER_MAP_ALIGN_MASK;
 145    const unsigned size = align(tx->base.box.width, 4) + adj;
 146
 147    if (!nv->push_data)
 148       permit_pb = false;
 149
 150    if ((size <= NOUVEAU_TRANSFER_PUSHBUF_THRESHOLD) && permit_pb) {
 151       tx->map = align_malloc(size, NOUVEAU_MIN_BUFFER_MAP_ALIGN);
 152       if (tx->map)
 153          tx->map += adj;
 154    } else {
 155       tx->mm =
 156          nouveau_mm_allocate(nv->screen->mm_GART, size, &tx->bo, &tx->offset);
 157       if (tx->bo) {
 158          tx->offset += adj;
 159          if (!nouveau_bo_map(tx->bo, 0, NULL))
 160             tx->map = (uint8_t *)tx->bo->map + tx->offset;
 161       }
 162    }
 163    return tx->map;
 164 }
 165
 166 /* Copies data from the resource into the the transfer's temporary GART
 167  * buffer. Also updates buf->data if present.
 168  *
 169  * Maybe just migrate to GART right away if we actually need to do this. */
 170 static bool
 171 nouveau_transfer_read(struct nouveau_context *nv, struct nouveau_transfer *tx)
 172 {
 173    struct nv04_resource *buf = nv04_resource(tx->base.resource);
 174    const unsigned base = tx->base.box.x;
 175    const unsigned size = tx->base.box.width;
 176
 177    NOUVEAU_DRV_STAT(nv->screen, buf_read_bytes_staging_vid, size);
 178
 179    nv->copy_data(nv, tx->bo, tx->offset, NOUVEAU_BO_GART,
 180                  buf->bo, buf->offset + base, buf->domain, size);
 181
 182    if (nouveau_bo_wait(tx->bo, NOUVEAU_BO_RD, nv->client))
 183       return false;
 184
 185    if (buf->data)
 186       memcpy(buf->data + base, tx->map, size);
 187
 188    return true;
 189 }
 190
 191 static void
 192 nouveau_transfer_write(struct nouveau_context *nv, struct nouveau_transfer *tx,
 193                        unsigned offset, unsigned size)
 194 {
 195    struct nv04_resource *buf = nv04_resource(tx->base.resource);
 196    uint8_t *data = tx->map + offset;
 197    const unsigned base = tx->base.box.x + offset;
 198    const bool can_cb = !((base | size) & 3);
 199
 200    if (buf->data)
 201       memcpy(data, buf->data + base, size);
 202    else
 203       buf->status |= NOUVEAU_BUFFER_STATUS_DIRTY;
 204
 205    if (buf->domain == NOUVEAU_BO_VRAM)
 206       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_staging_vid, size);
 207    if (buf->domain == NOUVEAU_BO_GART)
 208       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_staging_sys, size);
 209
 210    if (tx->bo)
 211       nv->copy_data(nv, buf->bo, buf->offset + base, buf->domain,
 212                     tx->bo, tx->offset + offset, NOUVEAU_BO_GART, size);
 213    else
 214    if (nv->push_cb && can_cb)
 215       nv->push_cb(nv, buf,
 216                   base, size / 4, (const uint32_t *)data);
 217    else
 218       nv->push_data(nv, buf->bo, buf->offset + base, buf->domain, size, data);
 219
 220    nouveau_fence_ref(nv->screen->fence.current, &buf->fence);
 221    nouveau_fence_ref(nv->screen->fence.current, &buf->fence_wr);
 222 }
 223
 224 /* Does a CPU wait for the buffer's backing data to become reliably accessible
 225  * for write/read by waiting on the buffer's relevant fences.
 226  */
 227 static inline bool
 228 nouveau_buffer_sync(struct nv04_resource *buf, unsigned rw)
 229 {
 230    if (rw == PIPE_TRANSFER_READ) {
 231       if (!buf->fence_wr)
 232          return true;
 233       NOUVEAU_DRV_STAT_RES(buf, buf_non_kernel_fence_sync_count,
 234                            !nouveau_fence_signalled(buf->fence_wr));
 235       if (!nouveau_fence_wait(buf->fence_wr))
 236          return false;
 237    } else {
 238       if (!buf->fence)
 239          return true;
 240       NOUVEAU_DRV_STAT_RES(buf, buf_non_kernel_fence_sync_count,
 241                            !nouveau_fence_signalled(buf->fence));
 242       if (!nouveau_fence_wait(buf->fence))
 243          return false;
 244
 245       nouveau_fence_ref(NULL, &buf->fence);
 246    }
 247    nouveau_fence_ref(NULL, &buf->fence_wr);
 248
 249    return true;
 250 }
 251
 252 static inline bool
 253 nouveau_buffer_busy(struct nv04_resource *buf, unsigned rw)
 254 {
 255    if (rw == PIPE_TRANSFER_READ)
 256       return (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr));
 257    else
 258       return (buf->fence && !nouveau_fence_signalled(buf->fence));
 259 }
 260
 261 static inline void
 262 nouveau_buffer_transfer_init(struct nouveau_transfer *tx,
 263                              struct pipe_resource *resource,
 264                              const struct pipe_box *box,
 265                              unsigned usage)
 266 {
 267    tx->base.resource = resource;
 268    tx->base.level = 0;
 269    tx->base.usage = usage;
 270    tx->base.box.x = box->x;
 271    tx->base.box.y = 0;
 272    tx->base.box.z = 0;
 273    tx->base.box.width = box->width;
 274    tx->base.box.height = 1;
 275    tx->base.box.depth = 1;
 276    tx->base.stride = 0;
 277    tx->base.layer_stride = 0;
 278
 279    tx->bo = NULL;
 280    tx->map = NULL;
 281 }
 282
 283 static inline void
 284 nouveau_buffer_transfer_del(struct nouveau_context *nv,
 285                             struct nouveau_transfer *tx)
 286 {
 287    if (tx->map) {
 288       if (likely(tx->bo)) {
 289          nouveau_fence_work(nv->screen->fence.current,
 290                             nouveau_fence_unref_bo, tx->bo);
 291          if (tx->mm)
 292             release_allocation(&tx->mm, nv->screen->fence.current);
 293       } else {
 294          align_free(tx->map -
 295                     (tx->base.box.x & NOUVEAU_MIN_BUFFER_MAP_ALIGN_MASK));
 296       }
 297    }
 298 }
 299
 300 /* Creates a cache in system memory of the buffer data. */
 301 static bool
 302 nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf)
 303 {
 304    struct nouveau_transfer tx;
 305    bool ret;
 306    tx.base.resource = &buf->base;
 307    tx.base.box.x = 0;
 308    tx.base.box.width = buf->base.width0;
 309    tx.bo = NULL;
 310    tx.map = NULL;
 311
 312    if (!buf->data)
 313       if (!nouveau_buffer_malloc(buf))
 314          return false;
 315    if (!(buf->status & NOUVEAU_BUFFER_STATUS_DIRTY))
 316       return true;
 317    nv->stats.buf_cache_count++;
 318
 319    if (!nouveau_transfer_staging(nv, &tx, false))
 320       return false;
 321
 322    ret = nouveau_transfer_read(nv, &tx);
 323    if (ret) {
 324       buf->status &= ~NOUVEAU_BUFFER_STATUS_DIRTY;
 325       memcpy(buf->data, tx.map, buf->base.width0);
 326    }
 327    nouveau_buffer_transfer_del(nv, &tx);
 328    return ret;
 329 }
 330
 331
 332 #define NOUVEAU_TRANSFER_DISCARD \
 333    (PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)
 334
 335 /* Checks whether it is possible to completely discard the memory backing this
 336  * resource. This can be useful if we would otherwise have to wait for a read
 337  * operation to complete on this data.
 338  */
 339 static inline bool
 340 nouveau_buffer_should_discard(struct nv04_resource *buf, unsigned usage)
 341 {
 342    if (!(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))
 343       return false;
 344    if (unlikely(buf->base.bind & PIPE_BIND_SHARED))
 345       return false;
 346    if (unlikely(usage & PIPE_TRANSFER_PERSISTENT))
 347       return false;
 348    return buf->mm && nouveau_buffer_busy(buf, PIPE_TRANSFER_WRITE);
 349 }
 350
 351 /* Returns a pointer to a memory area representing a window into the
 352  * resource's data.
 353  *
 354  * This may or may not be the _actual_ memory area of the resource. However
 355  * when calling nouveau_buffer_transfer_unmap, if it wasn't the actual memory
 356  * area, the contents of the returned map are copied over to the resource.
 357  *
 358  * The usage indicates what the caller plans to do with the map:
 359  *
 360  *   WRITE means that the user plans to write to it
 361  *
 362  *   READ means that the user plans on reading from it
 363  *
 364  *   DISCARD_WHOLE_RESOURCE means that the whole resource is going to be
 365  *   potentially overwritten, and even if it isn't, the bits that aren't don't
 366  *   need to be maintained.
 367  *
 368  *   DISCARD_RANGE means that all the data in the specified range is going to
 369  *   be overwritten.
 370  *
 371  * The strategy for determining what kind of memory area to return is complex,
 372  * see comments inside of the function.
 373  */
 374 static void *
 375 nouveau_buffer_transfer_map(struct pipe_context *pipe,
 376                             struct pipe_resource *resource,
 377                             unsigned level, unsigned usage,
 378                             const struct pipe_box *box,
 379                             struct pipe_transfer **ptransfer)
 380 {
 381    struct nouveau_context *nv = nouveau_context(pipe);
 382    struct nv04_resource *buf = nv04_resource(resource);
 383    struct nouveau_transfer *tx = MALLOC_STRUCT(nouveau_transfer);
 384    uint8_t *map;
 385    int ret;
 386
 387    if (!tx)
 388       return NULL;
 389    nouveau_buffer_transfer_init(tx, resource, box, usage);
 390    *ptransfer = &tx->base;
 391
 392    if (usage & PIPE_TRANSFER_READ)
 393       NOUVEAU_DRV_STAT(nv->screen, buf_transfers_rd, 1);
 394    if (usage & PIPE_TRANSFER_WRITE)
 395       NOUVEAU_DRV_STAT(nv->screen, buf_transfers_wr, 1);
 396
 397    /* If we are trying to write to an uninitialized range, the user shouldn't
 398     * care what was there before. So we can treat the write as if the target
 399     * range were being discarded. Furthermore, since we know that even if this
 400     * buffer is busy due to GPU activity, because the contents were
 401     * uninitialized, the GPU can't care what was there, and so we can treat
 402     * the write as being unsynchronized.
 403     */
 404    if ((usage & PIPE_TRANSFER_WRITE) &&
 405        !util_ranges_intersect(&buf->valid_buffer_range, box->x, box->x + box->width))
 406       usage |= PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_UNSYNCHRONIZED;
 407
 408    if (usage & PIPE_TRANSFER_PERSISTENT)
 409       usage |= PIPE_TRANSFER_UNSYNCHRONIZED;
 410
 411    if (buf->domain == NOUVEAU_BO_VRAM) {
 412       if (usage & NOUVEAU_TRANSFER_DISCARD) {
 413          /* Set up a staging area for the user to write to. It will be copied
 414           * back into VRAM on unmap. */
 415          if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)
 416             buf->status &= NOUVEAU_BUFFER_STATUS_REALLOC_MASK;
 417          nouveau_transfer_staging(nv, tx, true);
 418       } else {
 419          if (buf->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
 420             /* The GPU is currently writing to this buffer. Copy its current
 421              * contents to a staging area in the GART. This is necessary since
 422              * not the whole area being mapped is being discarded.
 423              */
 424             if (buf->data) {
 425                align_free(buf->data);
 426                buf->data = NULL;
 427             }
 428             nouveau_transfer_staging(nv, tx, false);
 429             nouveau_transfer_read(nv, tx);
 430          } else {
 431             /* The buffer is currently idle. Create a staging area for writes,
 432              * and make sure that the cached data is up-to-date. */
 433             if (usage & PIPE_TRANSFER_WRITE)
 434                nouveau_transfer_staging(nv, tx, true);
 435             if (!buf->data)
 436                nouveau_buffer_cache(nv, buf);
 437          }
 438       }
 439       return buf->data ? (buf->data + box->x) : tx->map;
 440    } else
 441    if (unlikely(buf->domain == 0)) {
 442       return buf->data + box->x;
 443    }
 444
 445    /* At this point, buf->domain == GART */
 446
 447    if (nouveau_buffer_should_discard(buf, usage)) {
 448       int ref = buf->base.reference.count - 1;
 449       nouveau_buffer_reallocate(nv->screen, buf, buf->domain);
 450       if (ref > 0) /* any references inside context possible ? */
 451          nv->invalidate_resource_storage(nv, &buf->base, ref);
 452    }
 453
 454    /* Note that nouveau_bo_map ends up doing a nouveau_bo_wait with the
 455     * relevant flags. If buf->mm is set, that means this resource is part of a
 456     * larger slab bo that holds multiple resources. So in that case, don't
 457     * wait on the whole slab and instead use the logic below to return a
 458     * reasonable buffer for that case.
 459     */
 460    ret = nouveau_bo_map(buf->bo,
 461                         buf->mm ? 0 : nouveau_screen_transfer_flags(usage),
 462                         nv->client);
 463    if (ret) {
 464       FREE(tx);
 465       return NULL;
 466    }
 467    map = (uint8_t *)buf->bo->map + buf->offset + box->x;
 468
 469    /* using kernel fences only if !buf->mm */
 470    if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) || !buf->mm)
 471       return map;
 472
 473    /* If the GPU is currently reading/writing this buffer, we shouldn't
 474     * interfere with its progress. So instead we either wait for the GPU to
 475     * complete its operation, or set up a staging area to perform our work in.
 476     */
 477    if (nouveau_buffer_busy(buf, usage & PIPE_TRANSFER_READ_WRITE)) {
 478       if (unlikely(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)) {
 479          /* Discarding was not possible, must sync because
 480           * subsequent transfers might use UNSYNCHRONIZED. */
 481          nouveau_buffer_sync(buf, usage & PIPE_TRANSFER_READ_WRITE);
 482       } else
 483       if (usage & PIPE_TRANSFER_DISCARD_RANGE) {
 484          /* The whole range is being discarded, so it doesn't matter what was
 485           * there before. No need to copy anything over. */
 486          nouveau_transfer_staging(nv, tx, true);
 487          map = tx->map;
 488       } else
 489       if (nouveau_buffer_busy(buf, PIPE_TRANSFER_READ)) {
 490          if (usage & PIPE_TRANSFER_DONTBLOCK)
 491             map = NULL;
 492          else
 493             nouveau_buffer_sync(buf, usage & PIPE_TRANSFER_READ_WRITE);
 494       } else {
 495          /* It is expected that the returned buffer be a representation of the
 496           * data in question, so we must copy it over from the buffer. */
 497          nouveau_transfer_staging(nv, tx, true);
 498          if (tx->map)
 499             memcpy(tx->map, map, box->width);
 500          map = tx->map;
 501       }
 502    }
 503    if (!map)
 504       FREE(tx);
 505    return map;
 506 }
 507
 508
 509
 510 static void
 511 nouveau_buffer_transfer_flush_region(struct pipe_context *pipe,
 512                                      struct pipe_transfer *transfer,
 513                                      const struct pipe_box *box)
 514 {
 515    struct nouveau_transfer *tx = nouveau_transfer(transfer);
 516    struct nv04_resource *buf = nv04_resource(transfer->resource);
 517
 518    if (tx->map)
 519       nouveau_transfer_write(nouveau_context(pipe), tx, box->x, box->width);
 520
 521    util_range_add(&buf->valid_buffer_range,
 522                   tx->base.box.x + box->x,
 523                   tx->base.box.x + box->x + box->width);
 524 }
 525
 526 /* Unmap stage of the transfer. If it was a WRITE transfer and the map that
 527  * was returned was not the real resource's data, this needs to transfer the
 528  * data back to the resource.
 529  *
 530  * Also marks vbo dirty based on the buffer's binding
 531  */
 532 static void
 533 nouveau_buffer_transfer_unmap(struct pipe_context *pipe,
 534                               struct pipe_transfer *transfer)
 535 {
 536    struct nouveau_context *nv = nouveau_context(pipe);
 537    struct nouveau_transfer *tx = nouveau_transfer(transfer);
 538    struct nv04_resource *buf = nv04_resource(transfer->resource);
 539
 540    if (tx->base.usage & PIPE_TRANSFER_WRITE) {
 541       if (!(tx->base.usage & PIPE_TRANSFER_FLUSH_EXPLICIT)) {
 542          if (tx->map)
 543             nouveau_transfer_write(nv, tx, 0, tx->base.box.width);
 544
 545          util_range_add(&buf->valid_buffer_range,
 546                         tx->base.box.x, tx->base.box.x + tx->base.box.width);
 547       }
 548
 549       if (likely(buf->domain)) {
 550          const uint8_t bind = buf->base.bind;
 551          /* make sure we invalidate dedicated caches */
 552          if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER))
 553             nv->vbo_dirty = true;
 554       }
 555    }
 556
 557    if (!tx->bo && (tx->base.usage & PIPE_TRANSFER_WRITE))
 558       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_direct, tx->base.box.width);
 559
 560    nouveau_buffer_transfer_del(nv, tx);
 561    FREE(tx);
 562 }
 563
 564
 565 void
 566 nouveau_copy_buffer(struct nouveau_context *nv,
 567                     struct nv04_resource *dst, unsigned dstx,
 568                     struct nv04_resource *src, unsigned srcx, unsigned size)
 569 {
 570    assert(dst->base.target == PIPE_BUFFER && src->base.target == PIPE_BUFFER);
 571
 572    if (likely(dst->domain) && likely(src->domain)) {
 573       nv->copy_data(nv,
 574                     dst->bo, dst->offset + dstx, dst->domain,
 575                     src->bo, src->offset + srcx, src->domain, size);
 576
 577       dst->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
 578       nouveau_fence_ref(nv->screen->fence.current, &dst->fence);
 579       nouveau_fence_ref(nv->screen->fence.current, &dst->fence_wr);
 580
 581       src->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
 582       nouveau_fence_ref(nv->screen->fence.current, &src->fence);
 583    } else {
 584       struct pipe_box src_box;
 585       src_box.x = srcx;
 586       src_box.y = 0;
 587       src_box.z = 0;
 588       src_box.width = size;
 589       src_box.height = 1;
 590       src_box.depth = 1;
 591       util_resource_copy_region(&nv->pipe,
 592                                 &dst->base, 0, dstx, 0, 0,
 593                                 &src->base, 0, &src_box);
 594    }
 595
 596    util_range_add(&dst->valid_buffer_range, dstx, dstx + size);
 597 }
 598
 599
 600 void *
 601 nouveau_resource_map_offset(struct nouveau_context *nv,
 602                             struct nv04_resource *res, uint32_t offset,
 603                             uint32_t flags)
 604 {
 605    if (unlikely(res->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY))
 606       return res->data + offset;
 607
 608    if (res->domain == NOUVEAU_BO_VRAM) {
 609       if (!res->data || (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING))
 610          nouveau_buffer_cache(nv, res);
 611    }
 612    if (res->domain != NOUVEAU_BO_GART)
 613       return res->data + offset;
 614
 615    if (res->mm) {
 616       unsigned rw;
 617       rw = (flags & NOUVEAU_BO_WR) ? PIPE_TRANSFER_WRITE : PIPE_TRANSFER_READ;
 618       nouveau_buffer_sync(res, rw);
 619       if (nouveau_bo_map(res->bo, 0, NULL))
 620          return NULL;
 621    } else {
 622       if (nouveau_bo_map(res->bo, flags, nv->client))
 623          return NULL;
 624    }
 625    return (uint8_t *)res->bo->map + res->offset + offset;
 626 }
 627
 628
 629 const struct u_resource_vtbl nouveau_buffer_vtbl =
 630 {
 631    u_default_resource_get_handle,     /* get_handle */
 632    nouveau_buffer_destroy,               /* resource_destroy */
 633    nouveau_buffer_transfer_map,          /* transfer_map */
 634    nouveau_buffer_transfer_flush_region, /* transfer_flush_region */
 635    nouveau_buffer_transfer_unmap,        /* transfer_unmap */
 636    u_default_transfer_inline_write    /* transfer_inline_write */
 637 };
 638
 639 struct pipe_resource *
 640 nouveau_buffer_create(struct pipe_screen *pscreen,
 641                       const struct pipe_resource *templ)
 642 {
 643    struct nouveau_screen *screen = nouveau_screen(pscreen);
 644    struct nv04_resource *buffer;
 645    bool ret;
 646
 647    buffer = CALLOC_STRUCT(nv04_resource);
 648    if (!buffer)
 649       return NULL;
 650
 651    buffer->base = *templ;
 652    buffer->vtbl = &nouveau_buffer_vtbl;
 653    pipe_reference_init(&buffer->base.reference, 1);
 654    buffer->base.screen = pscreen;
 655
 656    if (buffer->base.flags & (PIPE_RESOURCE_FLAG_MAP_PERSISTENT |
 657                              PIPE_RESOURCE_FLAG_MAP_COHERENT)) {
 658       buffer->domain = NOUVEAU_BO_GART;
 659    } else if (buffer->base.bind &
 660               (screen->vidmem_bindings & screen->sysmem_bindings)) {
 661       switch (buffer->base.usage) {
 662       case PIPE_USAGE_DEFAULT:
 663       case PIPE_USAGE_IMMUTABLE:
 664          buffer->domain = NV_VRAM_DOMAIN(screen);
 665          break;
 666       case PIPE_USAGE_DYNAMIC:
 667          /* For most apps, we'd have to do staging transfers to avoid sync
 668           * with this usage, and GART -> GART copies would be suboptimal.
 669           */
 670          buffer->domain = NV_VRAM_DOMAIN(screen);
 671          break;
 672       case PIPE_USAGE_STAGING:
 673       case PIPE_USAGE_STREAM:
 674          buffer->domain = NOUVEAU_BO_GART;
 675          break;
 676       default:
 677          assert(0);
 678          break;
 679       }
 680    } else {
 681       if (buffer->base.bind & screen->vidmem_bindings)
 682          buffer->domain = NV_VRAM_DOMAIN(screen);
 683       else
 684       if (buffer->base.bind & screen->sysmem_bindings)
 685          buffer->domain = NOUVEAU_BO_GART;
 686    }
 687    ret = nouveau_buffer_allocate(screen, buffer, buffer->domain);
 688
 689    if (ret == false)
 690       goto fail;
 691
 692    if (buffer->domain == NOUVEAU_BO_VRAM && screen->hint_buf_keep_sysmem_copy)
 693       nouveau_buffer_cache(NULL, buffer);
 694
 695    NOUVEAU_DRV_STAT(screen, buf_obj_current_count, 1);
 696
 697    util_range_init(&buffer->valid_buffer_range);
 698
 699    return &buffer->base;
 700
 701 fail:
 702    FREE(buffer);
 703    return NULL;
 704 }
 705
 706
 707 struct pipe_resource *
 708 nouveau_user_buffer_create(struct pipe_screen *pscreen, void *ptr,
 709                            unsigned bytes, unsigned bind)
 710 {
 711    struct nv04_resource *buffer;
 712
 713    buffer = CALLOC_STRUCT(nv04_resource);
 714    if (!buffer)
 715       return NULL;
 716
 717    pipe_reference_init(&buffer->base.reference, 1);
 718    buffer->vtbl = &nouveau_buffer_vtbl;
 719    buffer->base.screen = pscreen;
 720    buffer->base.format = PIPE_FORMAT_R8_UNORM;
 721    buffer->base.usage = PIPE_USAGE_IMMUTABLE;
 722    buffer->base.bind = bind;
 723    buffer->base.width0 = bytes;
 724    buffer->base.height0 = 1;
 725    buffer->base.depth0 = 1;
 726
 727    buffer->data = ptr;
 728    buffer->status = NOUVEAU_BUFFER_STATUS_USER_MEMORY;
 729
 730    util_range_init(&buffer->valid_buffer_range);
 731    util_range_add(&buffer->valid_buffer_range, 0, bytes);
 732
 733    return &buffer->base;
 734 }
 735
 736 static inline bool
 737 nouveau_buffer_data_fetch(struct nouveau_context *nv, struct nv04_resource *buf,
 738                           struct nouveau_bo *bo, unsigned offset, unsigned size)
 739 {
 740    if (!nouveau_buffer_malloc(buf))
 741       return false;
 742    if (nouveau_bo_map(bo, NOUVEAU_BO_RD, nv->client))
 743       return false;
 744    memcpy(buf->data, (uint8_t *)bo->map + offset, size);
 745    return true;
 746 }
 747
 748 /* Migrate a linear buffer (vertex, index, constants) USER -> GART -> VRAM. */
 749 bool
 750 nouveau_buffer_migrate(struct nouveau_context *nv,
 751                        struct nv04_resource *buf, const unsigned new_domain)
 752 {
 753    struct nouveau_screen *screen = nv->screen;
 754    struct nouveau_bo *bo;
 755    const unsigned old_domain = buf->domain;
 756    unsigned size = buf->base.width0;
 757    unsigned offset;
 758    int ret;
 759
 760    assert(new_domain != old_domain);
 761
 762    if (new_domain == NOUVEAU_BO_GART && old_domain == 0) {
 763       if (!nouveau_buffer_allocate(screen, buf, new_domain))
 764          return false;
 765       ret = nouveau_bo_map(buf->bo, 0, nv->client);
 766       if (ret)
 767          return ret;
 768       memcpy((uint8_t *)buf->bo->map + buf->offset, buf->data, size);
 769       align_free(buf->data);
 770    } else
 771    if (old_domain != 0 && new_domain != 0) {
 772       struct nouveau_mm_allocation *mm = buf->mm;
 773
 774       if (new_domain == NOUVEAU_BO_VRAM) {
 775          /* keep a system memory copy of our data in case we hit a fallback */
 776          if (!nouveau_buffer_data_fetch(nv, buf, buf->bo, buf->offset, size))
 777             return false;
 778          if (nouveau_mesa_debug)
 779             debug_printf("migrating %u KiB to VRAM\n", size / 1024);
 780       }
 781
 782       offset = buf->offset;
 783       bo = buf->bo;
 784       buf->bo = NULL;
 785       buf->mm = NULL;
 786       nouveau_buffer_allocate(screen, buf, new_domain);
 787
 788       nv->copy_data(nv, buf->bo, buf->offset, new_domain,
 789                     bo, offset, old_domain, buf->base.width0);
 790
 791       nouveau_fence_work(screen->fence.current, nouveau_fence_unref_bo, bo);
 792       if (mm)
 793          release_allocation(&mm, screen->fence.current);
 794    } else
 795    if (new_domain == NOUVEAU_BO_VRAM && old_domain == 0) {
 796       struct nouveau_transfer tx;
 797       if (!nouveau_buffer_allocate(screen, buf, NOUVEAU_BO_VRAM))
 798          return false;
 799       tx.base.resource = &buf->base;
 800       tx.base.box.x = 0;
 801       tx.base.box.width = buf->base.width0;
 802       tx.bo = NULL;
 803       tx.map = NULL;
 804       if (!nouveau_transfer_staging(nv, &tx, false))
 805          return false;
 806       nouveau_transfer_write(nv, &tx, 0, tx.base.box.width);
 807       nouveau_buffer_transfer_del(nv, &tx);
 808    } else
 809       return false;
 810
 811    assert(buf->domain == new_domain);
 812    return true;
 813 }
 814
 815 /* Migrate data from glVertexAttribPointer(non-VBO) user buffers to GART.
 816  * We'd like to only allocate @size bytes here, but then we'd have to rebase
 817  * the vertex indices ...
 818  */
 819 bool
 820 nouveau_user_buffer_upload(struct nouveau_context *nv,
 821                            struct nv04_resource *buf,
 822                            unsigned base, unsigned size)
 823 {
 824    struct nouveau_screen *screen = nouveau_screen(buf->base.screen);
 825    int ret;
 826
 827    assert(buf->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY);
 828
 829    buf->base.width0 = base + size;
 830    if (!nouveau_buffer_reallocate(screen, buf, NOUVEAU_BO_GART))
 831       return false;
 832
 833    ret = nouveau_bo_map(buf->bo, 0, nv->client);
 834    if (ret)
 835       return false;
 836    memcpy((uint8_t *)buf->bo->map + buf->offset + base, buf->data + base, size);
 837
 838    return true;
 839 }
 840
 841
 842 /* Scratch data allocation. */
 843
 844 static inline int
 845 nouveau_scratch_bo_alloc(struct nouveau_context *nv, struct nouveau_bo **pbo,
 846                          unsigned size)
 847 {
 848    return nouveau_bo_new(nv->screen->device, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
 849                          4096, size, NULL, pbo);
 850 }
 851
 852 static void
 853 nouveau_scratch_unref_bos(void *d)
 854 {
 855    struct runout *b = d;
 856    int i;
 857
 858    for (i = 0; i < b->nr; ++i)
 859       nouveau_bo_ref(NULL, &b->bo[i]);
 860
 861    FREE(b);
 862 }
 863
 864 void
 865 nouveau_scratch_runout_release(struct nouveau_context *nv)
 866 {
 867    if (!nv->scratch.runout)
 868       return;
 869
 870    if (!nouveau_fence_work(nv->screen->fence.current, nouveau_scratch_unref_bos,
 871          nv->scratch.runout))
 872       return;
 873
 874    nv->scratch.end = 0;
 875    nv->scratch.runout = NULL;
 876 }
 877
 878 /* Allocate an extra bo if we can't fit everything we need simultaneously.
 879  * (Could happen for very large user arrays.)
 880  */
 881 static inline bool
 882 nouveau_scratch_runout(struct nouveau_context *nv, unsigned size)
 883 {
 884    int ret;
 885    unsigned n;
 886
 887    if (nv->scratch.runout)
 888       n = nv->scratch.runout->nr;
 889    else
 890       n = 0;
 891    nv->scratch.runout = REALLOC(nv->scratch.runout, n == 0 ? 0 :
 892                                 (sizeof(*nv->scratch.runout) + (n + 0) * sizeof(void *)),
 893                                  sizeof(*nv->scratch.runout) + (n + 1) * sizeof(void *));
 894    nv->scratch.runout->nr = n + 1;
 895    nv->scratch.runout->bo[n] = NULL;
 896
 897    ret = nouveau_scratch_bo_alloc(nv, &nv->scratch.runout->bo[n], size);
 898    if (!ret) {
 899       ret = nouveau_bo_map(nv->scratch.runout->bo[n], 0, NULL);
 900       if (ret)
 901          nouveau_bo_ref(NULL, &nv->scratch.runout->bo[--nv->scratch.runout->nr]);
 902    }
 903    if (!ret) {
 904       nv->scratch.current = nv->scratch.runout->bo[n];
 905       nv->scratch.offset = 0;
 906       nv->scratch.end = size;
 907       nv->scratch.map = nv->scratch.current->map;
 908    }
 909    return !ret;
 910 }
 911
 912 /* Continue to next scratch buffer, if available (no wrapping, large enough).
 913  * Allocate it if it has not yet been created.
 914  */
 915 static inline bool
 916 nouveau_scratch_next(struct nouveau_context *nv, unsigned size)
 917 {
 918    struct nouveau_bo *bo;
 919    int ret;
 920    const unsigned i = (nv->scratch.id + 1) % NOUVEAU_MAX_SCRATCH_BUFS;
 921
 922    if ((size > nv->scratch.bo_size) || (i == nv->scratch.wrap))
 923       return false;
 924    nv->scratch.id = i;
 925
 926    bo = nv->scratch.bo[i];
 927    if (!bo) {
 928       ret = nouveau_scratch_bo_alloc(nv, &bo, nv->scratch.bo_size);
 929       if (ret)
 930          return false;
 931       nv->scratch.bo[i] = bo;
 932    }
 933    nv->scratch.current = bo;
 934    nv->scratch.offset = 0;
 935    nv->scratch.end = nv->scratch.bo_size;
 936
 937    ret = nouveau_bo_map(bo, NOUVEAU_BO_WR, nv->client);
 938    if (!ret)
 939       nv->scratch.map = bo->map;
 940    return !ret;
 941 }
 942
 943 static bool
 944 nouveau_scratch_more(struct nouveau_context *nv, unsigned min_size)
 945 {
 946    bool ret;
 947
 948    ret = nouveau_scratch_next(nv, min_size);
 949    if (!ret)
 950       ret = nouveau_scratch_runout(nv, min_size);
 951    return ret;
 952 }
 953
 954
 955 /* Copy data to a scratch buffer and return address & bo the data resides in. */
 956 uint64_t
 957 nouveau_scratch_data(struct nouveau_context *nv,
 958                      const void *data, unsigned base, unsigned size,
 959                      struct nouveau_bo **bo)
 960 {
 961    unsigned bgn = MAX2(base, nv->scratch.offset);
 962    unsigned end = bgn + size;
 963
 964    if (end >= nv->scratch.end) {
 965       end = base + size;
 966       if (!nouveau_scratch_more(nv, end))
 967          return 0;
 968       bgn = base;
 969    }
 970    nv->scratch.offset = align(end, 4);
 971
 972    memcpy(nv->scratch.map + bgn, (const uint8_t *)data + base, size);
 973
 974    *bo = nv->scratch.current;
 975    return (*bo)->offset + (bgn - base);
 976 }
 977
 978 void *
 979 nouveau_scratch_get(struct nouveau_context *nv,
 980                     unsigned size, uint64_t *gpu_addr, struct nouveau_bo **pbo)
 981 {
 982    unsigned bgn = nv->scratch.offset;
 983    unsigned end = nv->scratch.offset + size;
 984
 985    if (end >= nv->scratch.end) {
 986       end = size;
 987       if (!nouveau_scratch_more(nv, end))
 988          return NULL;
 989       bgn = 0;
 990    }
 991    nv->scratch.offset = align(end, 4);
 992
 993    *pbo = nv->scratch.current;
 994    *gpu_addr = nv->scratch.current->offset + bgn;
 995    return nv->scratch.map + bgn;
 996 }