src/gallium/drivers/nouveau/nouveau_buffer.c

   1
   2 #include "util/u_inlines.h"
   3 #include "util/u_memory.h"
   4 #include "util/u_math.h"
   5 #include "util/u_surface.h"
   6
   7 #include "nouveau_screen.h"
   8 #include "nouveau_context.h"
   9 #include "nouveau_winsys.h"
  10 #include "nouveau_fence.h"
  11 #include "nouveau_buffer.h"
  12 #include "nouveau_mm.h"
  13
  14 #define NOUVEAU_TRANSFER_PUSHBUF_THRESHOLD 192
  15
  16 struct nouveau_transfer {
  17    struct pipe_transfer base;
  18
  19    uint8_t *map;
  20    struct nouveau_bo *bo;
  21    struct nouveau_mm_allocation *mm;
  22    uint32_t offset;
  23 };
  24
  25 static INLINE struct nouveau_transfer *
  26 nouveau_transfer(struct pipe_transfer *transfer)
  27 {
  28    return (struct nouveau_transfer *)transfer;
  29 }
  30
  31 static INLINE boolean
  32 nouveau_buffer_malloc(struct nv04_resource *buf)
  33 {
  34    if (!buf->data)
  35       buf->data = align_malloc(buf->base.width0, NOUVEAU_MIN_BUFFER_MAP_ALIGN);
  36    return !!buf->data;
  37 }
  38
  39 static INLINE boolean
  40 nouveau_buffer_allocate(struct nouveau_screen *screen,
  41                         struct nv04_resource *buf, unsigned domain)
  42 {
  43    uint32_t size = buf->base.width0;
  44
  45    if (buf->base.bind & (PIPE_BIND_CONSTANT_BUFFER |
  46                          PIPE_BIND_COMPUTE_RESOURCE |
  47                          PIPE_BIND_SHADER_RESOURCE))
  48       size = align(size, 0x100);
  49
  50    if (domain == NOUVEAU_BO_VRAM) {
  51       buf->mm = nouveau_mm_allocate(screen->mm_VRAM, size,
  52                                     &buf->bo, &buf->offset);
  53       if (!buf->bo)
  54          return nouveau_buffer_allocate(screen, buf, NOUVEAU_BO_GART);
  55       NOUVEAU_DRV_STAT(screen, buf_obj_current_bytes_vid, buf->base.width0);
  56    } else
  57    if (domain == NOUVEAU_BO_GART) {
  58       buf->mm = nouveau_mm_allocate(screen->mm_GART, size,
  59                                     &buf->bo, &buf->offset);
  60       if (!buf->bo)
  61          return FALSE;
  62       NOUVEAU_DRV_STAT(screen, buf_obj_current_bytes_sys, buf->base.width0);
  63    } else {
  64       assert(domain == 0);
  65       if (!nouveau_buffer_malloc(buf))
  66          return FALSE;
  67    }
  68    buf->domain = domain;
  69    if (buf->bo)
  70       buf->address = buf->bo->offset + buf->offset;
  71
  72    util_range_set_empty(&buf->valid_buffer_range);
  73
  74    return TRUE;
  75 }
  76
  77 static INLINE void
  78 release_allocation(struct nouveau_mm_allocation **mm,
  79                    struct nouveau_fence *fence)
  80 {
  81    nouveau_fence_work(fence, nouveau_mm_free_work, *mm);
  82    (*mm) = NULL;
  83 }
  84
  85 INLINE void
  86 nouveau_buffer_release_gpu_storage(struct nv04_resource *buf)
  87 {
  88    nouveau_bo_ref(NULL, &buf->bo);
  89
  90    if (buf->mm)
  91       release_allocation(&buf->mm, buf->fence);
  92
  93    if (buf->domain == NOUVEAU_BO_VRAM)
  94       NOUVEAU_DRV_STAT_RES(buf, buf_obj_current_bytes_vid, -(uint64_t)buf->base.width0);
  95    if (buf->domain == NOUVEAU_BO_GART)
  96       NOUVEAU_DRV_STAT_RES(buf, buf_obj_current_bytes_sys, -(uint64_t)buf->base.width0);
  97
  98    buf->domain = 0;
  99 }
 100
 101 static INLINE boolean
 102 nouveau_buffer_reallocate(struct nouveau_screen *screen,
 103                           struct nv04_resource *buf, unsigned domain)
 104 {
 105    nouveau_buffer_release_gpu_storage(buf);
 106
 107    nouveau_fence_ref(NULL, &buf->fence);
 108    nouveau_fence_ref(NULL, &buf->fence_wr);
 109
 110    buf->status &= NOUVEAU_BUFFER_STATUS_REALLOC_MASK;
 111
 112    return nouveau_buffer_allocate(screen, buf, domain);
 113 }
 114
 115 static void
 116 nouveau_buffer_destroy(struct pipe_screen *pscreen,
 117                        struct pipe_resource *presource)
 118 {
 119    struct nv04_resource *res = nv04_resource(presource);
 120
 121    nouveau_buffer_release_gpu_storage(res);
 122
 123    if (res->data && !(res->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY))
 124       align_free(res->data);
 125
 126    nouveau_fence_ref(NULL, &res->fence);
 127    nouveau_fence_ref(NULL, &res->fence_wr);
 128
 129    util_range_destroy(&res->valid_buffer_range);
 130
 131    FREE(res);
 132
 133    NOUVEAU_DRV_STAT(nouveau_screen(pscreen), buf_obj_current_count, -1);
 134 }
 135
 136 /* Set up a staging area for the transfer. This is either done in "regular"
 137  * system memory if the driver supports push_data (nv50+) and the data is
 138  * small enough (and permit_pb == true), or in GART memory.
 139  */
 140 static uint8_t *
 141 nouveau_transfer_staging(struct nouveau_context *nv,
 142                          struct nouveau_transfer *tx, boolean permit_pb)
 143 {
 144    const unsigned adj = tx->base.box.x & NOUVEAU_MIN_BUFFER_MAP_ALIGN_MASK;
 145    const unsigned size = align(tx->base.box.width, 4) + adj;
 146
 147    if (!nv->push_data)
 148       permit_pb = FALSE;
 149
 150    if ((size <= NOUVEAU_TRANSFER_PUSHBUF_THRESHOLD) && permit_pb) {
 151       tx->map = align_malloc(size, NOUVEAU_MIN_BUFFER_MAP_ALIGN);
 152       if (tx->map)
 153          tx->map += adj;
 154    } else {
 155       tx->mm =
 156          nouveau_mm_allocate(nv->screen->mm_GART, size, &tx->bo, &tx->offset);
 157       if (tx->bo) {
 158          tx->offset += adj;
 159          if (!nouveau_bo_map(tx->bo, 0, NULL))
 160             tx->map = (uint8_t *)tx->bo->map + tx->offset;
 161       }
 162    }
 163    return tx->map;
 164 }
 165
 166 /* Copies data from the resource into the the transfer's temporary GART
 167  * buffer. Also updates buf->data if present.
 168  *
 169  * Maybe just migrate to GART right away if we actually need to do this. */
 170 static boolean
 171 nouveau_transfer_read(struct nouveau_context *nv, struct nouveau_transfer *tx)
 172 {
 173    struct nv04_resource *buf = nv04_resource(tx->base.resource);
 174    const unsigned base = tx->base.box.x;
 175    const unsigned size = tx->base.box.width;
 176
 177    NOUVEAU_DRV_STAT(nv->screen, buf_read_bytes_staging_vid, size);
 178
 179    nv->copy_data(nv, tx->bo, tx->offset, NOUVEAU_BO_GART,
 180                  buf->bo, buf->offset + base, buf->domain, size);
 181
 182    if (nouveau_bo_wait(tx->bo, NOUVEAU_BO_RD, nv->client))
 183       return FALSE;
 184
 185    if (buf->data)
 186       memcpy(buf->data + base, tx->map, size);
 187
 188    return TRUE;
 189 }
 190
 191 static void
 192 nouveau_transfer_write(struct nouveau_context *nv, struct nouveau_transfer *tx,
 193                        unsigned offset, unsigned size)
 194 {
 195    struct nv04_resource *buf = nv04_resource(tx->base.resource);
 196    uint8_t *data = tx->map + offset;
 197    const unsigned base = tx->base.box.x + offset;
 198    const boolean can_cb = !((base | size) & 3);
 199
 200    if (buf->data)
 201       memcpy(data, buf->data + base, size);
 202    else
 203       buf->status |= NOUVEAU_BUFFER_STATUS_DIRTY;
 204
 205    if (buf->domain == NOUVEAU_BO_VRAM)
 206       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_staging_vid, size);
 207    if (buf->domain == NOUVEAU_BO_GART)
 208       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_staging_sys, size);
 209
 210    if (tx->bo)
 211       nv->copy_data(nv, buf->bo, buf->offset + base, buf->domain,
 212                     tx->bo, tx->offset + offset, NOUVEAU_BO_GART, size);
 213    else
 214    if ((buf->base.bind & PIPE_BIND_CONSTANT_BUFFER) && nv->push_cb && can_cb)
 215       nv->push_cb(nv, buf->bo, buf->domain, buf->offset, buf->base.width0,
 216                   base, size / 4, (const uint32_t *)data);
 217    else
 218       nv->push_data(nv, buf->bo, buf->offset + base, buf->domain, size, data);
 219
 220    nouveau_fence_ref(nv->screen->fence.current, &buf->fence);
 221    nouveau_fence_ref(nv->screen->fence.current, &buf->fence_wr);
 222 }
 223
 224 /* Does a CPU wait for the buffer's backing data to become reliably accessible
 225  * for write/read by waiting on the buffer's relevant fences.
 226  */
 227 static INLINE boolean
 228 nouveau_buffer_sync(struct nv04_resource *buf, unsigned rw)
 229 {
 230    if (rw == PIPE_TRANSFER_READ) {
 231       if (!buf->fence_wr)
 232          return TRUE;
 233       NOUVEAU_DRV_STAT_RES(buf, buf_non_kernel_fence_sync_count,
 234                            !nouveau_fence_signalled(buf->fence_wr));
 235       if (!nouveau_fence_wait(buf->fence_wr))
 236          return FALSE;
 237    } else {
 238       if (!buf->fence)
 239          return TRUE;
 240       NOUVEAU_DRV_STAT_RES(buf, buf_non_kernel_fence_sync_count,
 241                            !nouveau_fence_signalled(buf->fence));
 242       if (!nouveau_fence_wait(buf->fence))
 243          return FALSE;
 244
 245       nouveau_fence_ref(NULL, &buf->fence);
 246    }
 247    nouveau_fence_ref(NULL, &buf->fence_wr);
 248
 249    return TRUE;
 250 }
 251
 252 static INLINE boolean
 253 nouveau_buffer_busy(struct nv04_resource *buf, unsigned rw)
 254 {
 255    if (rw == PIPE_TRANSFER_READ)
 256       return (buf->fence_wr && !nouveau_fence_signalled(buf->fence_wr));
 257    else
 258       return (buf->fence && !nouveau_fence_signalled(buf->fence));
 259 }
 260
 261 static INLINE void
 262 nouveau_buffer_transfer_init(struct nouveau_transfer *tx,
 263                              struct pipe_resource *resource,
 264                              const struct pipe_box *box,
 265                              unsigned usage)
 266 {
 267    tx->base.resource = resource;
 268    tx->base.level = 0;
 269    tx->base.usage = usage;
 270    tx->base.box.x = box->x;
 271    tx->base.box.y = 0;
 272    tx->base.box.z = 0;
 273    tx->base.box.width = box->width;
 274    tx->base.box.height = 1;
 275    tx->base.box.depth = 1;
 276    tx->base.stride = 0;
 277    tx->base.layer_stride = 0;
 278
 279    tx->bo = NULL;
 280    tx->map = NULL;
 281 }
 282
 283 static INLINE void
 284 nouveau_buffer_transfer_del(struct nouveau_context *nv,
 285                             struct nouveau_transfer *tx)
 286 {
 287    if (tx->map) {
 288       if (likely(tx->bo)) {
 289          nouveau_bo_ref(NULL, &tx->bo);
 290          if (tx->mm)
 291             release_allocation(&tx->mm, nv->screen->fence.current);
 292       } else {
 293          align_free(tx->map -
 294                     (tx->base.box.x & NOUVEAU_MIN_BUFFER_MAP_ALIGN_MASK));
 295       }
 296    }
 297 }
 298
 299 /* Creates a cache in system memory of the buffer data. */
 300 static boolean
 301 nouveau_buffer_cache(struct nouveau_context *nv, struct nv04_resource *buf)
 302 {
 303    struct nouveau_transfer tx;
 304    boolean ret;
 305    tx.base.resource = &buf->base;
 306    tx.base.box.x = 0;
 307    tx.base.box.width = buf->base.width0;
 308    tx.bo = NULL;
 309    tx.map = NULL;
 310
 311    if (!buf->data)
 312       if (!nouveau_buffer_malloc(buf))
 313          return FALSE;
 314    if (!(buf->status & NOUVEAU_BUFFER_STATUS_DIRTY))
 315       return TRUE;
 316    nv->stats.buf_cache_count++;
 317
 318    if (!nouveau_transfer_staging(nv, &tx, FALSE))
 319       return FALSE;
 320
 321    ret = nouveau_transfer_read(nv, &tx);
 322    if (ret) {
 323       buf->status &= ~NOUVEAU_BUFFER_STATUS_DIRTY;
 324       memcpy(buf->data, tx.map, buf->base.width0);
 325    }
 326    nouveau_buffer_transfer_del(nv, &tx);
 327    return ret;
 328 }
 329
 330
 331 #define NOUVEAU_TRANSFER_DISCARD \
 332    (PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)
 333
 334 /* Checks whether it is possible to completely discard the memory backing this
 335  * resource. This can be useful if we would otherwise have to wait for a read
 336  * operation to complete on this data.
 337  */
 338 static INLINE boolean
 339 nouveau_buffer_should_discard(struct nv04_resource *buf, unsigned usage)
 340 {
 341    if (!(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE))
 342       return FALSE;
 343    if (unlikely(buf->base.bind & PIPE_BIND_SHARED))
 344       return FALSE;
 345    return buf->mm && nouveau_buffer_busy(buf, PIPE_TRANSFER_WRITE);
 346 }
 347
 348 /* Returns a pointer to a memory area representing a window into the
 349  * resource's data.
 350  *
 351  * This may or may not be the _actual_ memory area of the resource. However
 352  * when calling nouveau_buffer_transfer_unmap, if it wasn't the actual memory
 353  * area, the contents of the returned map are copied over to the resource.
 354  *
 355  * The usage indicates what the caller plans to do with the map:
 356  *
 357  *   WRITE means that the user plans to write to it
 358  *
 359  *   READ means that the user plans on reading from it
 360  *
 361  *   DISCARD_WHOLE_RESOURCE means that the whole resource is going to be
 362  *   potentially overwritten, and even if it isn't, the bits that aren't don't
 363  *   need to be maintained.
 364  *
 365  *   DISCARD_RANGE means that all the data in the specified range is going to
 366  *   be overwritten.
 367  *
 368  * The strategy for determining what kind of memory area to return is complex,
 369  * see comments inside of the function.
 370  */
 371 static void *
 372 nouveau_buffer_transfer_map(struct pipe_context *pipe,
 373                             struct pipe_resource *resource,
 374                             unsigned level, unsigned usage,
 375                             const struct pipe_box *box,
 376                             struct pipe_transfer **ptransfer)
 377 {
 378    struct nouveau_context *nv = nouveau_context(pipe);
 379    struct nv04_resource *buf = nv04_resource(resource);
 380    struct nouveau_transfer *tx = MALLOC_STRUCT(nouveau_transfer);
 381    uint8_t *map;
 382    int ret;
 383
 384    if (!tx)
 385       return NULL;
 386    nouveau_buffer_transfer_init(tx, resource, box, usage);
 387    *ptransfer = &tx->base;
 388
 389    if (usage & PIPE_TRANSFER_READ)
 390       NOUVEAU_DRV_STAT(nv->screen, buf_transfers_rd, 1);
 391    if (usage & PIPE_TRANSFER_WRITE)
 392       NOUVEAU_DRV_STAT(nv->screen, buf_transfers_wr, 1);
 393
 394    /* If we are trying to write to an uninitialized range, the user shouldn't
 395     * care what was there before. So we can treat the write as if the target
 396     * range were being discarded. Furthermore, since we know that even if this
 397     * buffer is busy due to GPU activity, because the contents were
 398     * uninitialized, the GPU can't care what was there, and so we can treat
 399     * the write as being unsynchronized.
 400     */
 401    if ((usage & PIPE_TRANSFER_WRITE) &&
 402        !util_ranges_intersect(&buf->valid_buffer_range, box->x, box->x + box->width))
 403       usage |= PIPE_TRANSFER_DISCARD_RANGE | PIPE_TRANSFER_UNSYNCHRONIZED;
 404
 405    if (buf->domain == NOUVEAU_BO_VRAM) {
 406       if (usage & NOUVEAU_TRANSFER_DISCARD) {
 407          /* Set up a staging area for the user to write to. It will be copied
 408           * back into VRAM on unmap. */
 409          if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)
 410             buf->status &= NOUVEAU_BUFFER_STATUS_REALLOC_MASK;
 411          nouveau_transfer_staging(nv, tx, TRUE);
 412       } else {
 413          if (buf->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
 414             /* The GPU is currently writing to this buffer. Copy its current
 415              * contents to a staging area in the GART. This is necessary since
 416              * not the whole area being mapped is being discarded.
 417              */
 418             if (buf->data) {
 419                align_free(buf->data);
 420                buf->data = NULL;
 421             }
 422             nouveau_transfer_staging(nv, tx, FALSE);
 423             nouveau_transfer_read(nv, tx);
 424          } else {
 425             /* The buffer is currently idle. Create a staging area for writes,
 426              * and make sure that the cached data is up-to-date. */
 427             if (usage & PIPE_TRANSFER_WRITE)
 428                nouveau_transfer_staging(nv, tx, TRUE);
 429             if (!buf->data)
 430                nouveau_buffer_cache(nv, buf);
 431          }
 432       }
 433       return buf->data ? (buf->data + box->x) : tx->map;
 434    } else
 435    if (unlikely(buf->domain == 0)) {
 436       return buf->data + box->x;
 437    }
 438
 439    /* At this point, buf->domain == GART */
 440
 441    if (nouveau_buffer_should_discard(buf, usage)) {
 442       int ref = buf->base.reference.count - 1;
 443       nouveau_buffer_reallocate(nv->screen, buf, buf->domain);
 444       if (ref > 0) /* any references inside context possible ? */
 445          nv->invalidate_resource_storage(nv, &buf->base, ref);
 446    }
 447
 448    /* Note that nouveau_bo_map ends up doing a nouveau_bo_wait with the
 449     * relevant flags. If buf->mm is set, that means this resource is part of a
 450     * larger slab bo that holds multiple resources. So in that case, don't
 451     * wait on the whole slab and instead use the logic below to return a
 452     * reasonable buffer for that case.
 453     */
 454    ret = nouveau_bo_map(buf->bo,
 455                         buf->mm ? 0 : nouveau_screen_transfer_flags(usage),
 456                         nv->client);
 457    if (ret) {
 458       FREE(tx);
 459       return NULL;
 460    }
 461    map = (uint8_t *)buf->bo->map + buf->offset + box->x;
 462
 463    /* using kernel fences only if !buf->mm */
 464    if ((usage & PIPE_TRANSFER_UNSYNCHRONIZED) || !buf->mm)
 465       return map;
 466
 467    /* If the GPU is currently reading/writing this buffer, we shouldn't
 468     * interfere with its progress. So instead we either wait for the GPU to
 469     * complete its operation, or set up a staging area to perform our work in.
 470     */
 471    if (nouveau_buffer_busy(buf, usage & PIPE_TRANSFER_READ_WRITE)) {
 472       if (unlikely(usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE)) {
 473          /* Discarding was not possible, must sync because
 474           * subsequent transfers might use UNSYNCHRONIZED. */
 475          nouveau_buffer_sync(buf, usage & PIPE_TRANSFER_READ_WRITE);
 476       } else
 477       if (usage & PIPE_TRANSFER_DISCARD_RANGE) {
 478          /* The whole range is being discarded, so it doesn't matter what was
 479           * there before. No need to copy anything over. */
 480          nouveau_transfer_staging(nv, tx, TRUE);
 481          map = tx->map;
 482       } else
 483       if (nouveau_buffer_busy(buf, PIPE_TRANSFER_READ)) {
 484          if (usage & PIPE_TRANSFER_DONTBLOCK)
 485             map = NULL;
 486          else
 487             nouveau_buffer_sync(buf, usage & PIPE_TRANSFER_READ_WRITE);
 488       } else {
 489          /* It is expected that the returned buffer be a representation of the
 490           * data in question, so we must copy it over from the buffer. */
 491          nouveau_transfer_staging(nv, tx, TRUE);
 492          if (tx->map)
 493             memcpy(tx->map, map, box->width);
 494          map = tx->map;
 495       }
 496    }
 497    if (!map)
 498       FREE(tx);
 499    return map;
 500 }
 501
 502
 503
 504 static void
 505 nouveau_buffer_transfer_flush_region(struct pipe_context *pipe,
 506                                      struct pipe_transfer *transfer,
 507                                      const struct pipe_box *box)
 508 {
 509    struct nouveau_transfer *tx = nouveau_transfer(transfer);
 510    struct nv04_resource *buf = nv04_resource(transfer->resource);
 511
 512    if (tx->map)
 513       nouveau_transfer_write(nouveau_context(pipe), tx, box->x, box->width);
 514
 515    util_range_add(&buf->valid_buffer_range,
 516                   tx->base.box.x + box->x,
 517                   tx->base.box.x + box->x + box->width);
 518 }
 519
 520 /* Unmap stage of the transfer. If it was a WRITE transfer and the map that
 521  * was returned was not the real resource's data, this needs to transfer the
 522  * data back to the resource.
 523  *
 524  * Also marks vbo/cb dirty if the buffer's binding
 525  */
 526 static void
 527 nouveau_buffer_transfer_unmap(struct pipe_context *pipe,
 528                               struct pipe_transfer *transfer)
 529 {
 530    struct nouveau_context *nv = nouveau_context(pipe);
 531    struct nouveau_transfer *tx = nouveau_transfer(transfer);
 532    struct nv04_resource *buf = nv04_resource(transfer->resource);
 533
 534    if (tx->base.usage & PIPE_TRANSFER_WRITE) {
 535       if (!(tx->base.usage & PIPE_TRANSFER_FLUSH_EXPLICIT) && tx->map)
 536          nouveau_transfer_write(nv, tx, 0, tx->base.box.width);
 537
 538       if (likely(buf->domain)) {
 539          const uint8_t bind = buf->base.bind;
 540          /* make sure we invalidate dedicated caches */
 541          if (bind & (PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER))
 542             nv->vbo_dirty = TRUE;
 543          if (bind & (PIPE_BIND_CONSTANT_BUFFER))
 544             nv->cb_dirty = TRUE;
 545       }
 546
 547       util_range_add(&buf->valid_buffer_range,
 548                      tx->base.box.x, tx->base.box.x + tx->base.box.width);
 549    }
 550
 551    if (!tx->bo && (tx->base.usage & PIPE_TRANSFER_WRITE))
 552       NOUVEAU_DRV_STAT(nv->screen, buf_write_bytes_direct, tx->base.box.width);
 553
 554    nouveau_buffer_transfer_del(nv, tx);
 555    FREE(tx);
 556 }
 557
 558
 559 void
 560 nouveau_copy_buffer(struct nouveau_context *nv,
 561                     struct nv04_resource *dst, unsigned dstx,
 562                     struct nv04_resource *src, unsigned srcx, unsigned size)
 563 {
 564    assert(dst->base.target == PIPE_BUFFER && src->base.target == PIPE_BUFFER);
 565
 566    if (likely(dst->domain) && likely(src->domain)) {
 567       nv->copy_data(nv,
 568                     dst->bo, dst->offset + dstx, dst->domain,
 569                     src->bo, src->offset + srcx, src->domain, size);
 570
 571       dst->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
 572       nouveau_fence_ref(nv->screen->fence.current, &dst->fence);
 573       nouveau_fence_ref(nv->screen->fence.current, &dst->fence_wr);
 574
 575       src->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
 576       nouveau_fence_ref(nv->screen->fence.current, &src->fence);
 577    } else {
 578       struct pipe_box src_box;
 579       src_box.x = srcx;
 580       src_box.y = 0;
 581       src_box.z = 0;
 582       src_box.width = size;
 583       src_box.height = 1;
 584       src_box.depth = 1;
 585       util_resource_copy_region(&nv->pipe,
 586                                 &dst->base, 0, dstx, 0, 0,
 587                                 &src->base, 0, &src_box);
 588    }
 589
 590    util_range_add(&dst->valid_buffer_range, dstx, dstx + size);
 591 }
 592
 593
 594 void *
 595 nouveau_resource_map_offset(struct nouveau_context *nv,
 596                             struct nv04_resource *res, uint32_t offset,
 597                             uint32_t flags)
 598 {
 599    if (unlikely(res->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY))
 600       return res->data + offset;
 601
 602    if (res->domain == NOUVEAU_BO_VRAM) {
 603       if (!res->data || (res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING))
 604          nouveau_buffer_cache(nv, res);
 605    }
 606    if (res->domain != NOUVEAU_BO_GART)
 607       return res->data + offset;
 608
 609    if (res->mm) {
 610       unsigned rw;
 611       rw = (flags & NOUVEAU_BO_WR) ? PIPE_TRANSFER_WRITE : PIPE_TRANSFER_READ;
 612       nouveau_buffer_sync(res, rw);
 613       if (nouveau_bo_map(res->bo, 0, NULL))
 614          return NULL;
 615    } else {
 616       if (nouveau_bo_map(res->bo, flags, nv->client))
 617          return NULL;
 618    }
 619    return (uint8_t *)res->bo->map + res->offset + offset;
 620 }
 621
 622
 623 const struct u_resource_vtbl nouveau_buffer_vtbl =
 624 {
 625    u_default_resource_get_handle,     /* get_handle */
 626    nouveau_buffer_destroy,               /* resource_destroy */
 627    nouveau_buffer_transfer_map,          /* transfer_map */
 628    nouveau_buffer_transfer_flush_region, /* transfer_flush_region */
 629    nouveau_buffer_transfer_unmap,        /* transfer_unmap */
 630    u_default_transfer_inline_write    /* transfer_inline_write */
 631 };
 632
 633 struct pipe_resource *
 634 nouveau_buffer_create(struct pipe_screen *pscreen,
 635                       const struct pipe_resource *templ)
 636 {
 637    struct nouveau_screen *screen = nouveau_screen(pscreen);
 638    struct nv04_resource *buffer;
 639    boolean ret;
 640
 641    buffer = CALLOC_STRUCT(nv04_resource);
 642    if (!buffer)
 643       return NULL;
 644
 645    buffer->base = *templ;
 646    buffer->vtbl = &nouveau_buffer_vtbl;
 647    pipe_reference_init(&buffer->base.reference, 1);
 648    buffer->base.screen = pscreen;
 649
 650    if (buffer->base.bind &
 651        (screen->vidmem_bindings & screen->sysmem_bindings)) {
 652       switch (buffer->base.usage) {
 653       case PIPE_USAGE_DEFAULT:
 654       case PIPE_USAGE_IMMUTABLE:
 655          buffer->domain = NOUVEAU_BO_VRAM;
 656          break;
 657       case PIPE_USAGE_DYNAMIC:
 658          /* For most apps, we'd have to do staging transfers to avoid sync
 659           * with this usage, and GART -> GART copies would be suboptimal.
 660           */
 661          buffer->domain = NOUVEAU_BO_VRAM;
 662          break;
 663       case PIPE_USAGE_STAGING:
 664       case PIPE_USAGE_STREAM:
 665          buffer->domain = NOUVEAU_BO_GART;
 666          break;
 667       default:
 668          assert(0);
 669          break;
 670       }
 671    } else {
 672       if (buffer->base.bind & screen->vidmem_bindings)
 673          buffer->domain = NOUVEAU_BO_VRAM;
 674       else
 675       if (buffer->base.bind & screen->sysmem_bindings)
 676          buffer->domain = NOUVEAU_BO_GART;
 677    }
 678    ret = nouveau_buffer_allocate(screen, buffer, buffer->domain);
 679
 680    if (ret == FALSE)
 681       goto fail;
 682
 683    if (buffer->domain == NOUVEAU_BO_VRAM && screen->hint_buf_keep_sysmem_copy)
 684       nouveau_buffer_cache(NULL, buffer);
 685
 686    NOUVEAU_DRV_STAT(screen, buf_obj_current_count, 1);
 687
 688    util_range_init(&buffer->valid_buffer_range);
 689
 690    return &buffer->base;
 691
 692 fail:
 693    FREE(buffer);
 694    return NULL;
 695 }
 696
 697
 698 struct pipe_resource *
 699 nouveau_user_buffer_create(struct pipe_screen *pscreen, void *ptr,
 700                            unsigned bytes, unsigned bind)
 701 {
 702    struct nv04_resource *buffer;
 703
 704    buffer = CALLOC_STRUCT(nv04_resource);
 705    if (!buffer)
 706       return NULL;
 707
 708    pipe_reference_init(&buffer->base.reference, 1);
 709    buffer->vtbl = &nouveau_buffer_vtbl;
 710    buffer->base.screen = pscreen;
 711    buffer->base.format = PIPE_FORMAT_R8_UNORM;
 712    buffer->base.usage = PIPE_USAGE_IMMUTABLE;
 713    buffer->base.bind = bind;
 714    buffer->base.width0 = bytes;
 715    buffer->base.height0 = 1;
 716    buffer->base.depth0 = 1;
 717
 718    buffer->data = ptr;
 719    buffer->status = NOUVEAU_BUFFER_STATUS_USER_MEMORY;
 720
 721    util_range_init(&buffer->valid_buffer_range);
 722    util_range_add(&buffer->valid_buffer_range, 0, bytes);
 723
 724    return &buffer->base;
 725 }
 726
 727 static INLINE boolean
 728 nouveau_buffer_data_fetch(struct nouveau_context *nv, struct nv04_resource *buf,
 729                           struct nouveau_bo *bo, unsigned offset, unsigned size)
 730 {
 731    if (!nouveau_buffer_malloc(buf))
 732       return FALSE;
 733    if (nouveau_bo_map(bo, NOUVEAU_BO_RD, nv->client))
 734       return FALSE;
 735    memcpy(buf->data, (uint8_t *)bo->map + offset, size);
 736    return TRUE;
 737 }
 738
 739 /* Migrate a linear buffer (vertex, index, constants) USER -> GART -> VRAM. */
 740 boolean
 741 nouveau_buffer_migrate(struct nouveau_context *nv,
 742                        struct nv04_resource *buf, const unsigned new_domain)
 743 {
 744    struct nouveau_screen *screen = nv->screen;
 745    struct nouveau_bo *bo;
 746    const unsigned old_domain = buf->domain;
 747    unsigned size = buf->base.width0;
 748    unsigned offset;
 749    int ret;
 750
 751    assert(new_domain != old_domain);
 752
 753    if (new_domain == NOUVEAU_BO_GART && old_domain == 0) {
 754       if (!nouveau_buffer_allocate(screen, buf, new_domain))
 755          return FALSE;
 756       ret = nouveau_bo_map(buf->bo, 0, nv->client);
 757       if (ret)
 758          return ret;
 759       memcpy((uint8_t *)buf->bo->map + buf->offset, buf->data, size);
 760       align_free(buf->data);
 761    } else
 762    if (old_domain != 0 && new_domain != 0) {
 763       struct nouveau_mm_allocation *mm = buf->mm;
 764
 765       if (new_domain == NOUVEAU_BO_VRAM) {
 766          /* keep a system memory copy of our data in case we hit a fallback */
 767          if (!nouveau_buffer_data_fetch(nv, buf, buf->bo, buf->offset, size))
 768             return FALSE;
 769          if (nouveau_mesa_debug)
 770             debug_printf("migrating %u KiB to VRAM\n", size / 1024);
 771       }
 772
 773       offset = buf->offset;
 774       bo = buf->bo;
 775       buf->bo = NULL;
 776       buf->mm = NULL;
 777       nouveau_buffer_allocate(screen, buf, new_domain);
 778
 779       nv->copy_data(nv, buf->bo, buf->offset, new_domain,
 780                     bo, offset, old_domain, buf->base.width0);
 781
 782       nouveau_bo_ref(NULL, &bo);
 783       if (mm)
 784          release_allocation(&mm, screen->fence.current);
 785    } else
 786    if (new_domain == NOUVEAU_BO_VRAM && old_domain == 0) {
 787       struct nouveau_transfer tx;
 788       if (!nouveau_buffer_allocate(screen, buf, NOUVEAU_BO_VRAM))
 789          return FALSE;
 790       tx.base.resource = &buf->base;
 791       tx.base.box.x = 0;
 792       tx.base.box.width = buf->base.width0;
 793       tx.bo = NULL;
 794       tx.map = NULL;
 795       if (!nouveau_transfer_staging(nv, &tx, FALSE))
 796          return FALSE;
 797       nouveau_transfer_write(nv, &tx, 0, tx.base.box.width);
 798       nouveau_buffer_transfer_del(nv, &tx);
 799    } else
 800       return FALSE;
 801
 802    assert(buf->domain == new_domain);
 803    return TRUE;
 804 }
 805
 806 /* Migrate data from glVertexAttribPointer(non-VBO) user buffers to GART.
 807  * We'd like to only allocate @size bytes here, but then we'd have to rebase
 808  * the vertex indices ...
 809  */
 810 boolean
 811 nouveau_user_buffer_upload(struct nouveau_context *nv,
 812                            struct nv04_resource *buf,
 813                            unsigned base, unsigned size)
 814 {
 815    struct nouveau_screen *screen = nouveau_screen(buf->base.screen);
 816    int ret;
 817
 818    assert(buf->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY);
 819
 820    buf->base.width0 = base + size;
 821    if (!nouveau_buffer_reallocate(screen, buf, NOUVEAU_BO_GART))
 822       return FALSE;
 823
 824    ret = nouveau_bo_map(buf->bo, 0, nv->client);
 825    if (ret)
 826       return FALSE;
 827    memcpy((uint8_t *)buf->bo->map + buf->offset + base, buf->data + base, size);
 828
 829    return TRUE;
 830 }
 831
 832
 833 /* Scratch data allocation. */
 834
 835 static INLINE int
 836 nouveau_scratch_bo_alloc(struct nouveau_context *nv, struct nouveau_bo **pbo,
 837                          unsigned size)
 838 {
 839    return nouveau_bo_new(nv->screen->device, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
 840                          4096, size, NULL, pbo);
 841 }
 842
 843 void
 844 nouveau_scratch_runout_release(struct nouveau_context *nv)
 845 {
 846    if (!nv->scratch.nr_runout)
 847       return;
 848    do {
 849       --nv->scratch.nr_runout;
 850       nouveau_bo_ref(NULL, &nv->scratch.runout[nv->scratch.nr_runout]);
 851    } while (nv->scratch.nr_runout);
 852
 853    FREE(nv->scratch.runout);
 854    nv->scratch.end = 0;
 855    nv->scratch.runout = NULL;
 856 }
 857
 858 /* Allocate an extra bo if we can't fit everything we need simultaneously.
 859  * (Could happen for very large user arrays.)
 860  */
 861 static INLINE boolean
 862 nouveau_scratch_runout(struct nouveau_context *nv, unsigned size)
 863 {
 864    int ret;
 865    const unsigned n = nv->scratch.nr_runout++;
 866
 867    nv->scratch.runout = REALLOC(nv->scratch.runout,
 868                                 (n + 0) * sizeof(*nv->scratch.runout),
 869                                 (n + 1) * sizeof(*nv->scratch.runout));
 870    nv->scratch.runout[n] = NULL;
 871
 872    ret = nouveau_scratch_bo_alloc(nv, &nv->scratch.runout[n], size);
 873    if (!ret) {
 874       ret = nouveau_bo_map(nv->scratch.runout[n], 0, NULL);
 875       if (ret)
 876          nouveau_bo_ref(NULL, &nv->scratch.runout[--nv->scratch.nr_runout]);
 877    }
 878    if (!ret) {
 879       nv->scratch.current = nv->scratch.runout[n];
 880       nv->scratch.offset = 0;
 881       nv->scratch.end = size;
 882       nv->scratch.map = nv->scratch.current->map;
 883    }
 884    return !ret;
 885 }
 886
 887 /* Continue to next scratch buffer, if available (no wrapping, large enough).
 888  * Allocate it if it has not yet been created.
 889  */
 890 static INLINE boolean
 891 nouveau_scratch_next(struct nouveau_context *nv, unsigned size)
 892 {
 893    struct nouveau_bo *bo;
 894    int ret;
 895    const unsigned i = (nv->scratch.id + 1) % NOUVEAU_MAX_SCRATCH_BUFS;
 896
 897    if ((size > nv->scratch.bo_size) || (i == nv->scratch.wrap))
 898       return FALSE;
 899    nv->scratch.id = i;
 900
 901    bo = nv->scratch.bo[i];
 902    if (!bo) {
 903       ret = nouveau_scratch_bo_alloc(nv, &bo, nv->scratch.bo_size);
 904       if (ret)
 905          return FALSE;
 906       nv->scratch.bo[i] = bo;
 907    }
 908    nv->scratch.current = bo;
 909    nv->scratch.offset = 0;
 910    nv->scratch.end = nv->scratch.bo_size;
 911
 912    ret = nouveau_bo_map(bo, NOUVEAU_BO_WR, nv->client);
 913    if (!ret)
 914       nv->scratch.map = bo->map;
 915    return !ret;
 916 }
 917
 918 static boolean
 919 nouveau_scratch_more(struct nouveau_context *nv, unsigned min_size)
 920 {
 921    boolean ret;
 922
 923    ret = nouveau_scratch_next(nv, min_size);
 924    if (!ret)
 925       ret = nouveau_scratch_runout(nv, min_size);
 926    return ret;
 927 }
 928
 929
 930 /* Copy data to a scratch buffer and return address & bo the data resides in. */
 931 uint64_t
 932 nouveau_scratch_data(struct nouveau_context *nv,
 933                      const void *data, unsigned base, unsigned size,
 934                      struct nouveau_bo **bo)
 935 {
 936    unsigned bgn = MAX2(base, nv->scratch.offset);
 937    unsigned end = bgn + size;
 938
 939    if (end >= nv->scratch.end) {
 940       end = base + size;
 941       if (!nouveau_scratch_more(nv, end))
 942          return 0;
 943       bgn = base;
 944    }
 945    nv->scratch.offset = align(end, 4);
 946
 947    memcpy(nv->scratch.map + bgn, (const uint8_t *)data + base, size);
 948
 949    *bo = nv->scratch.current;
 950    return (*bo)->offset + (bgn - base);
 951 }
 952
 953 void *
 954 nouveau_scratch_get(struct nouveau_context *nv,
 955                     unsigned size, uint64_t *gpu_addr, struct nouveau_bo **pbo)
 956 {
 957    unsigned bgn = nv->scratch.offset;
 958    unsigned end = nv->scratch.offset + size;
 959
 960    if (end >= nv->scratch.end) {
 961       end = size;
 962       if (!nouveau_scratch_more(nv, end))
 963          return NULL;
 964       bgn = 0;
 965    }
 966    nv->scratch.offset = align(end, 4);
 967
 968    *pbo = nv->scratch.current;
 969    *gpu_addr = nv->scratch.current->offset + bgn;
 970    return nv->scratch.map + bgn;
 971 }