src/gallium/drivers/nouveau/nv30/nv30_vbo.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  *
  24  */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_inlines.h"
  28 #include "translate/translate.h"
  29
  30 #include "nouveau_fence.h"
  31 #include "nv_object.xml.h"
  32 #include "nv30/nv30-40_3d.xml.h"
  33 #include "nv30/nv30_context.h"
  34 #include "nv30/nv30_format.h"
  35
  36 static void
  37 nv30_emit_vtxattr(struct nv30_context *nv30, struct pipe_vertex_buffer *vb,
  38                   struct pipe_vertex_element *ve, unsigned attr)
  39 {
  40    const unsigned nc = util_format_get_nr_components(ve->src_format);
  41    struct nouveau_pushbuf *push = nv30->base.pushbuf;
  42    struct nv04_resource *res = nv04_resource(vb->buffer);
  43    const struct util_format_description *desc =
  44       util_format_description(ve->src_format);
  45    const void *data;
  46    float v[4];
  47
  48    data = nouveau_resource_map_offset(&nv30->base, res, vb->buffer_offset +
  49                                       ve->src_offset, NOUVEAU_BO_RD);
  50
  51    desc->unpack_rgba_float(v, 0, data, 0, 1, 1);
  52
  53    switch (nc) {
  54    case 4:
  55       BEGIN_NV04(push, NV30_3D(VTX_ATTR_4F(attr)), 4);
  56       PUSH_DATAf(push, v[0]);
  57       PUSH_DATAf(push, v[1]);
  58       PUSH_DATAf(push, v[2]);
  59       PUSH_DATAf(push, v[3]);
  60       break;
  61    case 3:
  62       BEGIN_NV04(push, NV30_3D(VTX_ATTR_3F(attr)), 3);
  63       PUSH_DATAf(push, v[0]);
  64       PUSH_DATAf(push, v[1]);
  65       PUSH_DATAf(push, v[2]);
  66       break;
  67    case 2:
  68       BEGIN_NV04(push, NV30_3D(VTX_ATTR_2F(attr)), 2);
  69       PUSH_DATAf(push, v[0]);
  70       PUSH_DATAf(push, v[1]);
  71       break;
  72    case 1:
  73       BEGIN_NV04(push, NV30_3D(VTX_ATTR_1F(attr)), 1);
  74       PUSH_DATAf(push, v[0]);
  75       break;
  76    default:
  77       assert(0);
  78       break;
  79    }
  80 }
  81
  82 static INLINE void
  83 nv30_vbuf_range(struct nv30_context *nv30, int vbi,
  84                 uint32_t *base, uint32_t *size)
  85 {
  86    assert(nv30->vbo_max_index != ~0);
  87    *base = nv30->vbo_min_index * nv30->vtxbuf[vbi].stride;
  88    *size = (nv30->vbo_max_index -
  89             nv30->vbo_min_index + 1) * nv30->vtxbuf[vbi].stride;
  90 }
  91
  92 static void
  93 nv30_prevalidate_vbufs(struct nv30_context *nv30)
  94 {
  95    struct pipe_vertex_buffer *vb;
  96    struct nv04_resource *buf;
  97    int i;
  98    uint32_t base, size;
  99
 100    nv30->vbo_fifo = nv30->vbo_user = 0;
 101
 102    for (i = 0; i < nv30->num_vtxbufs; i++) {
 103       vb = &nv30->vtxbuf[i];
 104       if (!vb->stride || !vb->buffer) /* NOTE: user_buffer not implemented */
 105          continue;
 106       buf = nv04_resource(vb->buffer);
 107
 108       /* NOTE: user buffers with temporary storage count as mapped by GPU */
 109       if (!nouveau_resource_mapped_by_gpu(vb->buffer)) {
 110          if (nv30->vbo_push_hint) {
 111             nv30->vbo_fifo = ~0;
 112             continue;
 113          } else {
 114             if (buf->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY) {
 115                nv30->vbo_user |= 1 << i;
 116                assert(vb->stride > vb->buffer_offset);
 117                nv30_vbuf_range(nv30, i, &base, &size);
 118                nouveau_user_buffer_upload(&nv30->base, buf, base, size);
 119             } else {
 120                nouveau_buffer_migrate(&nv30->base, buf, NOUVEAU_BO_GART);
 121             }
 122             nv30->base.vbo_dirty = true;
 123          }
 124       }
 125    }
 126 }
 127
 128 static void
 129 nv30_update_user_vbufs(struct nv30_context *nv30)
 130 {
 131    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 132    uint32_t base, offset, size;
 133    int i;
 134    uint32_t written = 0;
 135
 136    for (i = 0; i < nv30->vertex->num_elements; i++) {
 137       struct pipe_vertex_element *ve = &nv30->vertex->pipe[i];
 138       const int b = ve->vertex_buffer_index;
 139       struct pipe_vertex_buffer *vb = &nv30->vtxbuf[b];
 140       struct nv04_resource *buf = nv04_resource(vb->buffer);
 141
 142       if (!(nv30->vbo_user & (1 << b)))
 143          continue;
 144
 145       if (!vb->stride) {
 146          nv30_emit_vtxattr(nv30, vb, ve, i);
 147          continue;
 148       }
 149       nv30_vbuf_range(nv30, b, &base, &size);
 150
 151       if (!(written & (1 << b))) {
 152          written |= 1 << b;
 153          nouveau_user_buffer_upload(&nv30->base, buf, base, size);
 154       }
 155
 156       offset = vb->buffer_offset + ve->src_offset;
 157
 158       BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
 159       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP, buf, offset,
 160                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
 161                        0, NV30_3D_VTXBUF_DMA1);
 162    }
 163    nv30->base.vbo_dirty = true;
 164 }
 165
 166 static INLINE void
 167 nv30_release_user_vbufs(struct nv30_context *nv30)
 168 {
 169    uint32_t vbo_user = nv30->vbo_user;
 170
 171    while (vbo_user) {
 172       int i = ffs(vbo_user) - 1;
 173       vbo_user &= ~(1 << i);
 174
 175       nouveau_buffer_release_gpu_storage(nv04_resource(nv30->vtxbuf[i].buffer));
 176    }
 177
 178    nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXTMP);
 179 }
 180
 181 void
 182 nv30_vbo_validate(struct nv30_context *nv30)
 183 {
 184    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 185    struct nv30_vertex_stateobj *vertex = nv30->vertex;
 186    struct pipe_vertex_element *ve;
 187    struct pipe_vertex_buffer *vb;
 188    unsigned i, redefine;
 189
 190    nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXBUF);
 191    if (!nv30->vertex || nv30->draw_flags)
 192       return;
 193
 194    if (unlikely(vertex->need_conversion)) {
 195       nv30->vbo_fifo = ~0;
 196       nv30->vbo_user = 0;
 197    } else {
 198       nv30_prevalidate_vbufs(nv30);
 199    }
 200
 201    if (!PUSH_SPACE(push, 128))
 202       return;
 203
 204    redefine = MAX2(vertex->num_elements, nv30->state.num_vtxelts);
 205    if (redefine == 0)
 206       return;
 207
 208    BEGIN_NV04(push, NV30_3D(VTXFMT(0)), redefine);
 209
 210    for (i = 0; i < vertex->num_elements; i++) {
 211       ve = &vertex->pipe[i];
 212       vb = &nv30->vtxbuf[ve->vertex_buffer_index];
 213
 214       if (likely(vb->stride) || nv30->vbo_fifo)
 215          PUSH_DATA (push, (vb->stride << 8) | vertex->element[i].state);
 216       else
 217          PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
 218    }
 219
 220    for (; i < nv30->state.num_vtxelts; i++) {
 221       PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
 222    }
 223
 224    for (i = 0; i < vertex->num_elements; i++) {
 225       struct nv04_resource *res;
 226       unsigned offset;
 227       bool user;
 228
 229       ve = &vertex->pipe[i];
 230       vb = &nv30->vtxbuf[ve->vertex_buffer_index];
 231       user = (nv30->vbo_user & (1 << ve->vertex_buffer_index));
 232
 233       res = nv04_resource(vb->buffer);
 234
 235       if (nv30->vbo_fifo || unlikely(vb->stride == 0)) {
 236          if (!nv30->vbo_fifo)
 237             nv30_emit_vtxattr(nv30, vb, ve, i);
 238          continue;
 239       }
 240
 241       offset = ve->src_offset + vb->buffer_offset;
 242
 243       BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
 244       PUSH_RESRC(push, NV30_3D(VTXBUF(i)), user ? BUFCTX_VTXTMP : BUFCTX_VTXBUF,
 245                        res, offset, NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
 246                        0, NV30_3D_VTXBUF_DMA1);
 247    }
 248
 249    nv30->state.num_vtxelts = vertex->num_elements;
 250 }
 251
 252 static void *
 253 nv30_vertex_state_create(struct pipe_context *pipe, unsigned num_elements,
 254                          const struct pipe_vertex_element *elements)
 255 {
 256     struct nv30_vertex_stateobj *so;
 257     struct translate_key transkey;
 258     unsigned i;
 259
 260     so = MALLOC(sizeof(*so) + sizeof(*so->element) * num_elements);
 261     if (!so)
 262         return NULL;
 263     memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
 264     so->num_elements = num_elements;
 265     so->need_conversion = false;
 266
 267     transkey.nr_elements = 0;
 268     transkey.output_stride = 0;
 269
 270     for (i = 0; i < num_elements; i++) {
 271         const struct pipe_vertex_element *ve = &elements[i];
 272         const unsigned vbi = ve->vertex_buffer_index;
 273         enum pipe_format fmt = ve->src_format;
 274
 275         so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
 276         if (!so->element[i].state) {
 277             switch (util_format_get_nr_components(fmt)) {
 278             case 1: fmt = PIPE_FORMAT_R32_FLOAT; break;
 279             case 2: fmt = PIPE_FORMAT_R32G32_FLOAT; break;
 280             case 3: fmt = PIPE_FORMAT_R32G32B32_FLOAT; break;
 281             case 4: fmt = PIPE_FORMAT_R32G32B32A32_FLOAT; break;
 282             default:
 283                 assert(0);
 284                 FREE(so);
 285                 return NULL;
 286             }
 287             so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
 288             so->need_conversion = true;
 289         }
 290
 291         if (1) {
 292             unsigned j = transkey.nr_elements++;
 293
 294             transkey.element[j].type = TRANSLATE_ELEMENT_NORMAL;
 295             transkey.element[j].input_format = ve->src_format;
 296             transkey.element[j].input_buffer = vbi;
 297             transkey.element[j].input_offset = ve->src_offset;
 298             transkey.element[j].instance_divisor = ve->instance_divisor;
 299
 300             transkey.element[j].output_format = fmt;
 301             transkey.element[j].output_offset = transkey.output_stride;
 302             transkey.output_stride += (util_format_get_stride(fmt, 1) + 3) & ~3;
 303         }
 304     }
 305
 306     so->translate = translate_create(&transkey);
 307     so->vtx_size = transkey.output_stride / 4;
 308     so->vtx_per_packet_max = NV04_PFIFO_MAX_PACKET_LEN / MAX2(so->vtx_size, 1);
 309     return so;
 310 }
 311
 312 static void
 313 nv30_vertex_state_delete(struct pipe_context *pipe, void *hwcso)
 314 {
 315    struct nv30_vertex_stateobj *so = hwcso;
 316
 317    if (so->translate)
 318       so->translate->release(so->translate);
 319    FREE(hwcso);
 320 }
 321
 322 static void
 323 nv30_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
 324 {
 325    struct nv30_context *nv30 = nv30_context(pipe);
 326
 327    nv30->vertex = hwcso;
 328    nv30->dirty |= NV30_NEW_VERTEX;
 329 }
 330
 331 static void
 332 nv30_draw_arrays(struct nv30_context *nv30,
 333                  unsigned mode, unsigned start, unsigned count,
 334                  unsigned instance_count)
 335 {
 336    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 337    unsigned prim;
 338
 339    prim = nv30_prim_gl(mode);
 340
 341    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 342    PUSH_DATA (push, prim);
 343    while (count) {
 344       const unsigned mpush = 2047 * 256;
 345       unsigned npush  = (count > mpush) ? mpush : count;
 346       unsigned wpush  = ((npush + 255) & ~255) >> 8;
 347
 348       count -= npush;
 349
 350       BEGIN_NI04(push, NV30_3D(VB_VERTEX_BATCH), wpush);
 351       while (npush >= 256) {
 352          PUSH_DATA (push, 0xff000000 | start);
 353          start += 256;
 354          npush -= 256;
 355       }
 356
 357       if (npush)
 358          PUSH_DATA (push, ((npush - 1) << 24) | start);
 359    }
 360    BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 361    PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 362 }
 363
 364 static void
 365 nv30_draw_elements_inline_u08(struct nouveau_pushbuf *push, const uint8_t *map,
 366                               unsigned start, unsigned count)
 367 {
 368    map += start;
 369
 370    if (count & 1) {
 371       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 372       PUSH_DATA (push, *map++);
 373    }
 374
 375    count >>= 1;
 376    while (count) {
 377       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 378       count -= npush;
 379
 380       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 381       while (npush--) {
 382          PUSH_DATA (push, (map[1] << 16) | map[0]);
 383          map += 2;
 384       }
 385    }
 386
 387 }
 388
 389 static void
 390 nv30_draw_elements_inline_u16(struct nouveau_pushbuf *push, const uint16_t *map,
 391                               unsigned start, unsigned count)
 392 {
 393    map += start;
 394
 395    if (count & 1) {
 396       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 397       PUSH_DATA (push, *map++);
 398    }
 399
 400    count >>= 1;
 401    while (count) {
 402       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 403       count -= npush;
 404
 405       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 406       while (npush--) {
 407          PUSH_DATA (push, (map[1] << 16) | map[0]);
 408          map += 2;
 409       }
 410    }
 411 }
 412
 413 static void
 414 nv30_draw_elements_inline_u32(struct nouveau_pushbuf *push, const uint32_t *map,
 415                               unsigned start, unsigned count)
 416 {
 417    map += start;
 418
 419    while (count) {
 420       const unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
 421
 422       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U32), nr);
 423       PUSH_DATAp(push, map, nr);
 424
 425       map += nr;
 426       count -= nr;
 427    }
 428 }
 429
 430 static void
 431 nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf *push,
 432                                     const uint32_t *map,
 433                                     unsigned start, unsigned count)
 434 {
 435    map += start;
 436
 437    if (count & 1) {
 438       BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
 439       PUSH_DATA (push, *map++);
 440    }
 441
 442    count >>= 1;
 443    while (count) {
 444       unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);;
 445       count -= npush;
 446
 447       BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
 448       while (npush--) {
 449          PUSH_DATA (push, (map[1] << 16) | map[0]);
 450          map += 2;
 451       }
 452    }
 453 }
 454
 455 static void
 456 nv30_draw_elements(struct nv30_context *nv30, bool shorten,
 457                    unsigned mode, unsigned start, unsigned count,
 458                    unsigned instance_count, int32_t index_bias)
 459 {
 460    const unsigned index_size = nv30->idxbuf.index_size;
 461    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 462    struct nouveau_object *eng3d = nv30->screen->eng3d;
 463    unsigned prim = nv30_prim_gl(mode);
 464
 465    if (eng3d->oclass >= NV40_3D_CLASS && index_bias != nv30->state.index_bias) {
 466       BEGIN_NV04(push, NV40_3D(VB_ELEMENT_BASE), 1);
 467       PUSH_DATA (push, index_bias);
 468       nv30->state.index_bias = index_bias;
 469    }
 470
 471    if (eng3d->oclass == NV40_3D_CLASS && index_size > 1 &&
 472        nv30->idxbuf.buffer) {
 473       struct nv04_resource *res = nv04_resource(nv30->idxbuf.buffer);
 474       unsigned offset = nv30->idxbuf.offset;
 475
 476       assert(nouveau_resource_mapped_by_gpu(&res->base));
 477
 478       BEGIN_NV04(push, NV30_3D(IDXBUF_OFFSET), 2);
 479       PUSH_RESRC(push, NV30_3D(IDXBUF_OFFSET), BUFCTX_IDXBUF, res, offset,
 480                        NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, 0);
 481       PUSH_MTHD (push, NV30_3D(IDXBUF_FORMAT), BUFCTX_IDXBUF, res->bo,
 482                        (index_size == 2) ? 0x00000010 : 0x00000000,
 483                        res->domain | NOUVEAU_BO_RD,
 484                        0, NV30_3D_IDXBUF_FORMAT_DMA1);
 485       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 486       PUSH_DATA (push, prim);
 487       while (count) {
 488          const unsigned mpush = 2047 * 256;
 489          unsigned npush  = (count > mpush) ? mpush : count;
 490          unsigned wpush  = ((npush + 255) & ~255) >> 8;
 491
 492          count -= npush;
 493
 494          BEGIN_NI04(push, NV30_3D(VB_INDEX_BATCH), wpush);
 495          while (npush >= 256) {
 496             PUSH_DATA (push, 0xff000000 | start);
 497             start += 256;
 498             npush -= 256;
 499          }
 500
 501          if (npush)
 502             PUSH_DATA (push, ((npush - 1) << 24) | start);
 503       }
 504       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 505       PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 506       PUSH_RESET(push, BUFCTX_IDXBUF);
 507    } else {
 508       const void *data;
 509       if (nv30->idxbuf.buffer)
 510          data = nouveau_resource_map_offset(&nv30->base,
 511                                             nv04_resource(nv30->idxbuf.buffer),
 512                                             nv30->idxbuf.offset, NOUVEAU_BO_RD);
 513       else
 514          data = nv30->idxbuf.user_buffer;
 515       if (!data)
 516          return;
 517
 518       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 519       PUSH_DATA (push, prim);
 520       switch (index_size) {
 521       case 1:
 522          nv30_draw_elements_inline_u08(push, data, start, count);
 523          break;
 524       case 2:
 525          nv30_draw_elements_inline_u16(push, data, start, count);
 526          break;
 527       case 4:
 528          if (shorten)
 529             nv30_draw_elements_inline_u32_short(push, data, start, count);
 530          else
 531             nv30_draw_elements_inline_u32(push, data, start, count);
 532          break;
 533       default:
 534          assert(0);
 535          return;
 536       }
 537       BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
 538       PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
 539    }
 540 }
 541
 542 static void
 543 nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
 544 {
 545    struct nv30_context *nv30 = nv30_context(pipe);
 546    struct nouveau_pushbuf *push = nv30->base.pushbuf;
 547    int i;
 548
 549    /* For picking only a few vertices from a large user buffer, push is better,
 550     * if index count is larger and we expect repeated vertices, suggest upload.
 551     */
 552    nv30->vbo_push_hint = /* the 64 is heuristic */
 553       !(info->indexed &&
 554         ((info->max_index - info->min_index + 64) < info->count));
 555
 556    nv30->vbo_min_index = info->min_index;
 557    nv30->vbo_max_index = info->max_index;
 558
 559    if (nv30->vbo_push_hint != !!nv30->vbo_fifo)
 560       nv30->dirty |= NV30_NEW_ARRAYS;
 561
 562    push->user_priv = &nv30->bufctx;
 563    if (nv30->vbo_user && !(nv30->dirty & (NV30_NEW_VERTEX | NV30_NEW_ARRAYS)))
 564       nv30_update_user_vbufs(nv30);
 565
 566    nv30_state_validate(nv30, ~0, true);
 567    if (nv30->draw_flags) {
 568       nv30_render_vbo(pipe, info);
 569       return;
 570    } else
 571    if (nv30->vbo_fifo) {
 572       nv30_push_vbo(nv30, info);
 573       return;
 574    }
 575
 576    for (i = 0; i < nv30->num_vtxbufs && !nv30->base.vbo_dirty; ++i) {
 577       if (!nv30->vtxbuf[i].buffer)
 578          continue;
 579       if (nv30->vtxbuf[i].buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
 580          nv30->base.vbo_dirty = true;
 581    }
 582
 583    if (!nv30->base.vbo_dirty && nv30->idxbuf.buffer &&
 584        nv30->idxbuf.buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
 585       nv30->base.vbo_dirty = true;
 586
 587    if (nv30->base.vbo_dirty) {
 588       BEGIN_NV04(push, NV30_3D(VTX_CACHE_INVALIDATE_1710), 1);
 589       PUSH_DATA (push, 0);
 590       nv30->base.vbo_dirty = false;
 591    }
 592
 593    if (!info->indexed) {
 594       nv30_draw_arrays(nv30,
 595                        info->mode, info->start, info->count,
 596                        info->instance_count);
 597    } else {
 598       bool shorten = info->max_index <= 65535;
 599
 600       if (info->primitive_restart != nv30->state.prim_restart) {
 601          if (info->primitive_restart) {
 602             BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 2);
 603             PUSH_DATA (push, 1);
 604             PUSH_DATA (push, info->restart_index);
 605
 606             if (info->restart_index > 65535)
 607                shorten = false;
 608          } else {
 609             BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 1);
 610             PUSH_DATA (push, 0);
 611          }
 612          nv30->state.prim_restart = info->primitive_restart;
 613       } else
 614       if (info->primitive_restart) {
 615          BEGIN_NV04(push, NV40_3D(PRIM_RESTART_INDEX), 1);
 616          PUSH_DATA (push, info->restart_index);
 617
 618          if (info->restart_index > 65535)
 619             shorten = false;
 620       }
 621
 622       nv30_draw_elements(nv30, shorten,
 623                          info->mode, info->start, info->count,
 624                          info->instance_count, info->index_bias);
 625    }
 626
 627    nv30_state_release(nv30);
 628    nv30_release_user_vbufs(nv30);
 629 }
 630
 631 void
 632 nv30_vbo_init(struct pipe_context *pipe)
 633 {
 634    pipe->create_vertex_elements_state = nv30_vertex_state_create;
 635    pipe->delete_vertex_elements_state = nv30_vertex_state_delete;
 636    pipe->bind_vertex_elements_state = nv30_vertex_state_bind;
 637    pipe->draw_vbo = nv30_draw_vbo;
 638 }