src/gallium/drivers/nouveau/nv50/nv50_blit.h

   1
   2 #ifndef __NV50_BLIT_H__
   3 #define __NV50_BLIT_H__
   4
   5 #include "util/u_inlines.h"
   6 #include "util/u_format.h"
   7
   8 void *
   9 nv50_blitter_make_fp(struct pipe_context *,
  10                      unsigned mode,
  11                      enum pipe_texture_target);
  12
  13 unsigned
  14 nv50_blit_select_mode(const struct pipe_blit_info *);
  15
  16 /* Converted to a pipe->blit. */
  17 void
  18 nv50_resource_resolve(struct pipe_context *, const struct pipe_resolve_info *);
  19
  20 #define NV50_BLIT_MODE_PASS  0 /* pass through TEX $t0/$s0 output */
  21 #define NV50_BLIT_MODE_Z24S8 1 /* encode ZS values for RGBA unorm8 */
  22 #define NV50_BLIT_MODE_S8Z24 2
  23 #define NV50_BLIT_MODE_X24S8 3
  24 #define NV50_BLIT_MODE_S8X24 4
  25 #define NV50_BLIT_MODE_Z24X8 5
  26 #define NV50_BLIT_MODE_X8Z24 6
  27 #define NV50_BLIT_MODE_ZS    7 /* put $t0/$s0 into R, $t1/$s1 into G */
  28 #define NV50_BLIT_MODE_XS    8 /* put $t1/$s1 into G */
  29 #define NV50_BLIT_MODES      9
  30
  31 /* CUBE and RECT textures are reinterpreted as 2D(_ARRAY) */
  32 #define NV50_BLIT_TEXTURE_BUFFER    0
  33 #define NV50_BLIT_TEXTURE_1D        1
  34 #define NV50_BLIT_TEXTURE_2D        2
  35 #define NV50_BLIT_TEXTURE_3D        3
  36 #define NV50_BLIT_TEXTURE_1D_ARRAY  4
  37 #define NV50_BLIT_TEXTURE_2D_ARRAY  5
  38 #define NV50_BLIT_MAX_TEXTURE_TYPES 6
  39
  40 static inline unsigned
  41 nv50_blit_texture_type(enum pipe_texture_target target)
  42 {
  43    switch (target) {
  44    case PIPE_TEXTURE_1D: return NV50_BLIT_TEXTURE_1D;
  45    case PIPE_TEXTURE_2D: return NV50_BLIT_TEXTURE_2D;
  46    case PIPE_TEXTURE_3D: return NV50_BLIT_TEXTURE_3D;
  47    case PIPE_TEXTURE_1D_ARRAY: return NV50_BLIT_TEXTURE_1D_ARRAY;
  48    case PIPE_TEXTURE_2D_ARRAY: return NV50_BLIT_TEXTURE_2D_ARRAY;
  49    default:
  50       assert(target == PIPE_BUFFER);
  51       return NV50_BLIT_TEXTURE_BUFFER;
  52    }
  53 }
  54
  55 static inline unsigned
  56 nv50_blit_get_tgsi_texture_target(enum pipe_texture_target target)
  57 {
  58    switch (target) {
  59    case PIPE_TEXTURE_1D: return TGSI_TEXTURE_1D;
  60    case PIPE_TEXTURE_2D: return TGSI_TEXTURE_2D;
  61    case PIPE_TEXTURE_3D: return TGSI_TEXTURE_3D;
  62    case PIPE_TEXTURE_1D_ARRAY: return TGSI_TEXTURE_1D_ARRAY;
  63    case PIPE_TEXTURE_2D_ARRAY: return TGSI_TEXTURE_2D_ARRAY;
  64    default:
  65       assert(target == PIPE_BUFFER);
  66       return TGSI_TEXTURE_BUFFER;
  67    }
  68 }
  69
  70 static inline enum pipe_texture_target
  71 nv50_blit_reinterpret_pipe_texture_target(enum pipe_texture_target target)
  72 {
  73    switch (target) {
  74    case PIPE_TEXTURE_CUBE:
  75    case PIPE_TEXTURE_CUBE_ARRAY:
  76       return PIPE_TEXTURE_2D_ARRAY;
  77    case PIPE_TEXTURE_RECT:
  78       return PIPE_TEXTURE_2D;
  79    default:
  80       return target;
  81    }
  82 }
  83
  84 static inline unsigned
  85 nv50_blit_get_filter(const struct pipe_blit_info *info)
  86 {
  87    if (info->dst.resource->nr_samples < info->src.resource->nr_samples)
  88       return (util_format_is_depth_or_stencil(info->src.format) ||
  89               util_format_is_pure_integer(info->src.format)) ? 0 : 1;
  90
  91    if (info->filter != PIPE_TEX_FILTER_LINEAR)
  92       return 0;
  93
  94    if ((info->dst.box.width ==  info->src.box.width ||
  95         info->dst.box.width == -info->src.box.width) &&
  96        (info->dst.box.height ==  info->src.box.height ||
  97         info->dst.box.height == -info->src.box.height))
  98       return 0;
  99
 100    return 1;
 101 }
 102
 103 /* Since shaders cannot export stencil, we cannot copy stencil values when
 104  * rendering to ZETA, so we attach the ZS surface to a colour render target.
 105  */
 106 static inline enum pipe_format
 107 nv50_blit_zeta_to_colour_format(enum pipe_format format)
 108 {
 109    switch (format) {
 110    case PIPE_FORMAT_Z16_UNORM:
 111       return PIPE_FORMAT_R16_UNORM;
 112    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 113    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 114    case PIPE_FORMAT_Z24X8_UNORM:
 115    case PIPE_FORMAT_X8Z24_UNORM:
 116    case PIPE_FORMAT_X24S8_UINT:
 117    case PIPE_FORMAT_S8X24_UINT:
 118       return PIPE_FORMAT_R8G8B8A8_UNORM;
 119    case PIPE_FORMAT_Z32_FLOAT:
 120       return PIPE_FORMAT_R32_FLOAT;
 121    case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 122    case PIPE_FORMAT_X32_S8X24_UINT:
 123       return PIPE_FORMAT_R32G32_FLOAT;
 124    default:
 125       assert(0);
 126       return PIPE_FORMAT_NONE;
 127    }
 128 }
 129
 130
 131 static inline uint16_t
 132 nv50_blit_derive_color_mask(const struct pipe_blit_info *info)
 133 {
 134    const unsigned mask = info->mask;
 135
 136    uint16_t color_mask = 0;
 137
 138    switch (info->dst.format) {
 139    case PIPE_FORMAT_Z24X8_UNORM:
 140    case PIPE_FORMAT_X24S8_UINT:
 141    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 142       if (mask & PIPE_MASK_S)
 143          color_mask |= 0x1000;
 144       if (mask & PIPE_MASK_Z)
 145          color_mask |= 0x0111;
 146       break;
 147    case PIPE_FORMAT_X8Z24_UNORM:
 148    case PIPE_FORMAT_S8X24_UINT:
 149    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 150       if (mask & PIPE_MASK_S)
 151          color_mask |= 0x0001;
 152       if (mask & PIPE_MASK_Z)
 153          color_mask |= 0x1110;
 154       break;
 155    default:
 156       if (mask & (PIPE_MASK_R | PIPE_MASK_Z)) color_mask |= 0x0001;
 157       if (mask & (PIPE_MASK_G | PIPE_MASK_S)) color_mask |= 0x0010;
 158       if (mask & PIPE_MASK_B) color_mask |= 0x0100;
 159       if (mask & PIPE_MASK_A) color_mask |= 0x1000;
 160       break;
 161    }
 162
 163    return color_mask;
 164 }
 165
 166 static inline uint32_t
 167 nv50_blit_eng2d_get_mask(const struct pipe_blit_info *info)
 168 {
 169    uint32_t mask = 0;
 170
 171    switch (info->dst.format) {
 172    case PIPE_FORMAT_Z24X8_UNORM:
 173    case PIPE_FORMAT_X24S8_UINT:
 174    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 175       if (info->mask & PIPE_MASK_Z) mask |= 0x00ffffff;
 176       if (info->mask & PIPE_MASK_S) mask |= 0xff000000;
 177       break;
 178    case PIPE_FORMAT_X8Z24_UNORM:
 179    case PIPE_FORMAT_S8X24_UINT:
 180    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 181       if (info->mask & PIPE_MASK_Z) mask |= 0xffffff00;
 182       if (info->mask & PIPE_MASK_S) mask |= 0x000000ff;
 183       break;
 184    default:
 185       mask = 0xffffffff;
 186       break;
 187    }
 188    return mask;
 189 }
 190
 191 #if NOUVEAU_DRIVER == 0xc0
 192 # define nv50_format_table nvc0_format_table
 193 #endif
 194
 195 /* return true for formats that can be converted among each other by NVC0_2D */
 196 static inline bool
 197 nv50_2d_dst_format_faithful(enum pipe_format format)
 198 {
 199    const uint64_t mask =
 200        NV50_ENG2D_SUPPORTED_FORMATS &
 201       ~NV50_ENG2D_NOCONVERT_FORMATS;
 202    uint8_t id = nv50_format_table[format].rt;
 203    return (id >= 0xc0) && (mask & (1ULL << (id - 0xc0)));
 204 }
 205 static inline bool
 206 nv50_2d_src_format_faithful(enum pipe_format format)
 207 {
 208    const uint64_t mask =
 209       NV50_ENG2D_SUPPORTED_FORMATS &
 210     ~(NV50_ENG2D_LUMINANCE_FORMATS | NV50_ENG2D_INTENSITY_FORMATS);
 211    uint8_t id = nv50_format_table[format].rt;
 212    return (id >= 0xc0) && (mask & (1ULL << (id - 0xc0)));
 213 }
 214
 215 static inline bool
 216 nv50_2d_format_supported(enum pipe_format format)
 217 {
 218    uint8_t id = nv50_format_table[format].rt;
 219    return (id >= 0xc0) &&
 220       (NV50_ENG2D_SUPPORTED_FORMATS & (1ULL << (id - 0xc0)));
 221 }
 222
 223 static inline bool
 224 nv50_2d_dst_format_ops_supported(enum pipe_format format)
 225 {
 226    uint8_t id = nv50_format_table[format].rt;
 227    return (id >= 0xc0) &&
 228       (NV50_ENG2D_OPERATION_FORMATS & (1ULL << (id - 0xc0)));
 229 }
 230
 231 #endif /* __NV50_BLIT_H__ */