nv50,nvc0: support sending string markers down into the command stream
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_screen.h
1 #ifndef __NV50_SCREEN_H__
2 #define __NV50_SCREEN_H__
3
4 #include "nouveau_screen.h"
5 #include "nouveau_fence.h"
6 #include "nouveau_mm.h"
7 #include "nouveau_heap.h"
8
9 #include "nv50/nv50_winsys.h"
10 #include "nv50/nv50_stateobj.h"
11
12 #define NV50_TIC_MAX_ENTRIES 2048
13 #define NV50_TSC_MAX_ENTRIES 2048
14
15 /* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
16 #define NV50_MAX_PIPE_CONSTBUFS 14
17
18 struct nv50_context;
19
20 #define NV50_CODE_BO_SIZE_LOG2 19
21
22 #define NV50_SCREEN_RESIDENT_BO_COUNT 5
23
24 #define NV50_MAX_VIEWPORTS 16
25
26 #define NV50_MAX_GLOBALS 16
27
28 #define ONE_TEMP_SIZE (4/*vector*/ * sizeof(float))
29
30 struct nv50_blitter;
31
32 struct nv50_graph_state {
33 uint32_t instance_elts; /* bitmask of per-instance elements */
34 uint32_t instance_base;
35 uint32_t interpolant_ctrl;
36 uint32_t semantic_color;
37 uint32_t semantic_psize;
38 int32_t index_bias;
39 bool uniform_buffer_bound[3];
40 bool prim_restart;
41 bool point_sprite;
42 bool rt_serialize;
43 bool flushed;
44 bool rasterizer_discard;
45 uint8_t tls_required;
46 bool new_tls_space;
47 uint8_t num_vtxbufs;
48 uint8_t num_vtxelts;
49 uint8_t num_textures[3];
50 uint8_t num_samplers[3];
51 uint8_t prim_size;
52 uint16_t scissor;
53 bool seamless_cube_map;
54 };
55
56 struct nv50_screen {
57 struct nouveau_screen base;
58
59 struct nv50_context *cur_ctx;
60 struct nv50_graph_state save_state;
61
62 int num_occlusion_queries_active;
63
64 struct nouveau_bo *code;
65 struct nouveau_bo *uniforms;
66 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
67 struct nouveau_bo *stack_bo;
68 struct nouveau_bo *tls_bo;
69
70 unsigned TPs;
71 unsigned MPsInTP;
72 unsigned max_tls_space;
73 unsigned cur_tls_space;
74 unsigned mp_count;
75
76 struct nouveau_heap *vp_code_heap;
77 struct nouveau_heap *gp_code_heap;
78 struct nouveau_heap *fp_code_heap;
79
80 struct nv50_blitter *blitter;
81
82 struct {
83 void **entries;
84 int next;
85 uint32_t lock[NV50_TIC_MAX_ENTRIES / 32];
86 } tic;
87
88 struct {
89 void **entries;
90 int next;
91 uint32_t lock[NV50_TSC_MAX_ENTRIES / 32];
92 } tsc;
93
94 struct {
95 uint32_t *map;
96 struct nouveau_bo *bo;
97 } fence;
98
99 struct {
100 struct nv50_program *prog; /* compute state object to read MP counters */
101 struct nv50_hw_sm_query *mp_counter[4]; /* counter to query allocation */
102 uint8_t num_hw_sm_active;
103 } pm;
104
105 struct nouveau_object *sync;
106
107 struct nouveau_object *tesla;
108 struct nouveau_object *compute;
109 struct nouveau_object *eng2d;
110 struct nouveau_object *m2mf;
111 };
112
113 static inline struct nv50_screen *
114 nv50_screen(struct pipe_screen *screen)
115 {
116 return (struct nv50_screen *)screen;
117 }
118
119 int nv50_screen_get_driver_query_info(struct pipe_screen *, unsigned,
120 struct pipe_driver_query_info *);
121 int nv50_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
122 struct pipe_driver_query_group_info *);
123
124 bool nv50_blitter_create(struct nv50_screen *);
125 void nv50_blitter_destroy(struct nv50_screen *);
126
127 int nv50_screen_tic_alloc(struct nv50_screen *, void *);
128 int nv50_screen_tsc_alloc(struct nv50_screen *, void *);
129
130 int nv50_screen_compute_setup(struct nv50_screen *, struct nouveau_pushbuf *);
131
132 static inline void
133 nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
134 {
135 struct nv50_screen *screen = nv50_screen(res->base.screen);
136
137 if (res->mm) {
138 nouveau_fence_ref(screen->base.fence.current, &res->fence);
139 if (flags & NOUVEAU_BO_WR)
140 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
141 }
142 }
143
144 static inline void
145 nv50_resource_validate(struct nv04_resource *res, uint32_t flags)
146 {
147 if (likely(res->bo)) {
148 if (flags & NOUVEAU_BO_WR)
149 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
150 NOUVEAU_BUFFER_STATUS_DIRTY;
151 if (flags & NOUVEAU_BO_RD)
152 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
153
154 nv50_resource_fence(res, flags);
155 }
156 }
157
158 struct nv50_format {
159 uint32_t rt;
160 struct {
161 unsigned format:6;
162 unsigned type_r:3;
163 unsigned type_g:3;
164 unsigned type_b:3;
165 unsigned type_a:3;
166 unsigned src_x:3;
167 unsigned src_y:3;
168 unsigned src_z:3;
169 unsigned src_w:3;
170 } tic;
171 uint32_t usage;
172 };
173
174 struct nv50_vertex_format {
175 uint32_t vtx;
176 uint32_t usage;
177 };
178
179 extern const struct nv50_format nv50_format_table[];
180 extern const struct nv50_vertex_format nv50_vertex_format[];
181
182 static inline void
183 nv50_screen_tic_unlock(struct nv50_screen *screen, struct nv50_tic_entry *tic)
184 {
185 if (tic->id >= 0)
186 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
187 }
188
189 static inline void
190 nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
191 {
192 if (tsc->id >= 0)
193 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
194 }
195
196 static inline void
197 nv50_screen_tic_free(struct nv50_screen *screen, struct nv50_tic_entry *tic)
198 {
199 if (tic->id >= 0) {
200 screen->tic.entries[tic->id] = NULL;
201 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
202 }
203 }
204
205 static inline void
206 nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
207 {
208 if (tsc->id >= 0) {
209 screen->tsc.entries[tsc->id] = NULL;
210 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
211 }
212 }
213
214 extern int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space);
215
216 #endif