nv50-: split tic format specification
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_screen.h
1 #ifndef __NV50_SCREEN_H__
2 #define __NV50_SCREEN_H__
3
4 #include "nouveau_screen.h"
5 #include "nouveau_fence.h"
6 #include "nouveau_mm.h"
7 #include "nouveau_heap.h"
8
9 #include "nv50/nv50_winsys.h"
10 #include "nv50/nv50_stateobj.h"
11
12 #define NV50_TIC_MAX_ENTRIES 2048
13 #define NV50_TSC_MAX_ENTRIES 2048
14
15 /* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
16 #define NV50_MAX_PIPE_CONSTBUFS 14
17
18 struct nv50_context;
19
20 #define NV50_CODE_BO_SIZE_LOG2 19
21
22 #define NV50_SCREEN_RESIDENT_BO_COUNT 5
23
24 #define NV50_MAX_VIEWPORTS 16
25
26 #define NV50_MAX_GLOBALS 16
27
28 #define ONE_TEMP_SIZE (4/*vector*/ * sizeof(float))
29
30 struct nv50_blitter;
31
32 struct nv50_graph_state {
33 uint32_t instance_elts; /* bitmask of per-instance elements */
34 uint32_t instance_base;
35 uint32_t interpolant_ctrl;
36 uint32_t semantic_color;
37 uint32_t semantic_psize;
38 int32_t index_bias;
39 bool uniform_buffer_bound[3];
40 bool prim_restart;
41 bool point_sprite;
42 bool rt_serialize;
43 bool flushed;
44 bool rasterizer_discard;
45 uint8_t tls_required;
46 bool new_tls_space;
47 uint8_t num_vtxbufs;
48 uint8_t num_vtxelts;
49 uint8_t num_textures[3];
50 uint8_t num_samplers[3];
51 uint8_t prim_size;
52 uint16_t scissor;
53 };
54
55 struct nv50_screen {
56 struct nouveau_screen base;
57
58 struct nv50_context *cur_ctx;
59 struct nv50_graph_state save_state;
60
61 int num_occlusion_queries_active;
62
63 struct nouveau_bo *code;
64 struct nouveau_bo *uniforms;
65 struct nouveau_bo *txc; /* TIC (offset 0) and TSC (65536) */
66 struct nouveau_bo *stack_bo;
67 struct nouveau_bo *tls_bo;
68
69 unsigned TPs;
70 unsigned MPsInTP;
71 unsigned max_tls_space;
72 unsigned cur_tls_space;
73 unsigned mp_count;
74
75 struct nouveau_heap *vp_code_heap;
76 struct nouveau_heap *gp_code_heap;
77 struct nouveau_heap *fp_code_heap;
78
79 struct nv50_blitter *blitter;
80
81 struct {
82 void **entries;
83 int next;
84 uint32_t lock[NV50_TIC_MAX_ENTRIES / 32];
85 } tic;
86
87 struct {
88 void **entries;
89 int next;
90 uint32_t lock[NV50_TSC_MAX_ENTRIES / 32];
91 } tsc;
92
93 struct {
94 uint32_t *map;
95 struct nouveau_bo *bo;
96 } fence;
97
98 struct {
99 struct nv50_program *prog; /* compute state object to read MP counters */
100 struct nv50_hw_sm_query *mp_counter[4]; /* counter to query allocation */
101 uint8_t num_hw_sm_active;
102 } pm;
103
104 struct nouveau_object *sync;
105
106 struct nouveau_object *tesla;
107 struct nouveau_object *compute;
108 struct nouveau_object *eng2d;
109 struct nouveau_object *m2mf;
110 };
111
112 static inline struct nv50_screen *
113 nv50_screen(struct pipe_screen *screen)
114 {
115 return (struct nv50_screen *)screen;
116 }
117
118 int nv50_screen_get_driver_query_info(struct pipe_screen *, unsigned,
119 struct pipe_driver_query_info *);
120 int nv50_screen_get_driver_query_group_info(struct pipe_screen *, unsigned,
121 struct pipe_driver_query_group_info *);
122
123 bool nv50_blitter_create(struct nv50_screen *);
124 void nv50_blitter_destroy(struct nv50_screen *);
125
126 int nv50_screen_tic_alloc(struct nv50_screen *, void *);
127 int nv50_screen_tsc_alloc(struct nv50_screen *, void *);
128
129 int nv50_screen_compute_setup(struct nv50_screen *, struct nouveau_pushbuf *);
130
131 static inline void
132 nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
133 {
134 struct nv50_screen *screen = nv50_screen(res->base.screen);
135
136 if (res->mm) {
137 nouveau_fence_ref(screen->base.fence.current, &res->fence);
138 if (flags & NOUVEAU_BO_WR)
139 nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
140 }
141 }
142
143 static inline void
144 nv50_resource_validate(struct nv04_resource *res, uint32_t flags)
145 {
146 if (likely(res->bo)) {
147 if (flags & NOUVEAU_BO_WR)
148 res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
149 NOUVEAU_BUFFER_STATUS_DIRTY;
150 if (flags & NOUVEAU_BO_RD)
151 res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
152
153 nv50_resource_fence(res, flags);
154 }
155 }
156
157 struct nv50_format {
158 uint32_t rt;
159 struct {
160 unsigned format:6;
161 unsigned type_r:3;
162 unsigned type_g:3;
163 unsigned type_b:3;
164 unsigned type_a:3;
165 unsigned src_x:3;
166 unsigned src_y:3;
167 unsigned src_z:3;
168 unsigned src_w:3;
169 } tic;
170 uint32_t usage;
171 };
172
173 struct nv50_vertex_format {
174 uint32_t vtx;
175 uint32_t usage;
176 };
177
178 extern const struct nv50_format nv50_format_table[];
179 extern const struct nv50_vertex_format nv50_vertex_format[];
180
181 static inline void
182 nv50_screen_tic_unlock(struct nv50_screen *screen, struct nv50_tic_entry *tic)
183 {
184 if (tic->id >= 0)
185 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
186 }
187
188 static inline void
189 nv50_screen_tsc_unlock(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
190 {
191 if (tsc->id >= 0)
192 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
193 }
194
195 static inline void
196 nv50_screen_tic_free(struct nv50_screen *screen, struct nv50_tic_entry *tic)
197 {
198 if (tic->id >= 0) {
199 screen->tic.entries[tic->id] = NULL;
200 screen->tic.lock[tic->id / 32] &= ~(1 << (tic->id % 32));
201 }
202 }
203
204 static inline void
205 nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
206 {
207 if (tsc->id >= 0) {
208 screen->tsc.entries[tsc->id] = NULL;
209 screen->tsc.lock[tsc->id / 32] &= ~(1 << (tsc->id % 32));
210 }
211 }
212
213 extern int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space);
214
215 #endif