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nv50: add depth bounds test support
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
27 #include "util/format_srgb.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "nv50/nv50_stateobj.h"
32 #include "nv50/nv50_context.h"
33
34 #include "nv50/nv50_3d.xml.h"
35 #include "nv50/nv50_texture.xml.h"
36
37 #include "nouveau_gldefs.h"
38
39 /* Caveats:
40 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
41 * use non-normalized coordinates, everything else won't
42 * (The relevant bit is in the TIC entry and not the TSC entry.)
43 *
44 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
45 * always activated on NVA0 +
46 * (Give me the global bit, otherwise it's not worth the CPU work.)
47 *
48 * ! pipe_sampler_state.border_color is not swizzled according to the texture
49 * swizzle in pipe_sampler_view
50 * (This will be ugly with indirect independent texture/sampler access,
51 * we'd have to emulate the logic in the shader. GL doesn't have that,
52 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
53 * good.)
54 *
55 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
56 *
57 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
58 * (There's a GL query for that, forcing an exception is just ridiculous.)
59 *
60 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
61 * (The hardware only has 8 slots meant for TexCoord and we have to assign
62 * in advance to maintain elegant separate shader objects.)
63 */
64
65 static inline uint32_t
66 nv50_colormask(unsigned mask)
67 {
68 uint32_t ret = 0;
69
70 if (mask & PIPE_MASK_R)
71 ret |= 0x0001;
72 if (mask & PIPE_MASK_G)
73 ret |= 0x0010;
74 if (mask & PIPE_MASK_B)
75 ret |= 0x0100;
76 if (mask & PIPE_MASK_A)
77 ret |= 0x1000;
78
79 return ret;
80 }
81
82 #define NV50_BLEND_FACTOR_CASE(a, b) \
83 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b
84
85 static inline uint32_t
86 nv50_blend_fac(unsigned factor)
87 {
88 switch (factor) {
89 NV50_BLEND_FACTOR_CASE(ONE, ONE);
90 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
91 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
92 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
93 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
94 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
95 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
96 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
97 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
98 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
99 NV50_BLEND_FACTOR_CASE(ZERO, ZERO);
100 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
101 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
102 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
103 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
104 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
105 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
106 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
107 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
108 default:
109 return NV50_BLEND_FACTOR_ZERO;
110 }
111 }
112
113 static void *
114 nv50_blend_state_create(struct pipe_context *pipe,
115 const struct pipe_blend_state *cso)
116 {
117 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj);
118 int i;
119 bool emit_common_func = cso->rt[0].blend_enable;
120 uint32_t ms;
121
122 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
123 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
124 SB_DATA (so, cso->independent_blend_enable);
125 }
126
127 so->pipe = *cso;
128
129 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1);
130 SB_DATA (so, !cso->independent_blend_enable);
131
132 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1);
133 SB_DATA (so, !cso->independent_blend_enable);
134
135 if (cso->independent_blend_enable) {
136 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8);
137 for (i = 0; i < 8; ++i) {
138 SB_DATA(so, cso->rt[i].blend_enable);
139 if (cso->rt[i].blend_enable)
140 emit_common_func = true;
141 }
142
143 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
144 emit_common_func = false;
145
146 for (i = 0; i < 8; ++i) {
147 if (!cso->rt[i].blend_enable)
148 continue;
149 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6);
150 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
151 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor));
152 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor));
153 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
154 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor));
155 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor));
156 }
157 }
158 } else {
159 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1);
160 SB_DATA (so, cso->rt[0].blend_enable);
161 }
162
163 if (emit_common_func) {
164 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
165 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
166 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor));
167 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor));
168 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
169 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor));
170 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
171 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor));
172 }
173
174 if (cso->logicop_enable) {
175 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
176 SB_DATA (so, 1);
177 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
178 } else {
179 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1);
180 SB_DATA (so, 0);
181 }
182
183 if (cso->independent_blend_enable) {
184 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
185 for (i = 0; i < 8; ++i)
186 SB_DATA(so, nv50_colormask(cso->rt[i].colormask));
187 } else {
188 SB_BEGIN_3D(so, COLOR_MASK(0), 1);
189 SB_DATA (so, nv50_colormask(cso->rt[0].colormask));
190 }
191
192 ms = 0;
193 if (cso->alpha_to_coverage)
194 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE;
195 if (cso->alpha_to_one)
196 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE;
197
198 SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1);
199 SB_DATA (so, ms);
200
201 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
202 return so;
203 }
204
205 static void
206 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso)
207 {
208 struct nv50_context *nv50 = nv50_context(pipe);
209
210 nv50->blend = hwcso;
211 nv50->dirty |= NV50_NEW_BLEND;
212 }
213
214 static void
215 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
216 {
217 FREE(hwcso);
218 }
219
220 /* NOTE: ignoring line_last_pixel */
221 static void *
222 nv50_rasterizer_state_create(struct pipe_context *pipe,
223 const struct pipe_rasterizer_state *cso)
224 {
225 struct nv50_rasterizer_stateobj *so;
226 uint32_t reg;
227
228 so = CALLOC_STRUCT(nv50_rasterizer_stateobj);
229 if (!so)
230 return NULL;
231 so->pipe = *cso;
232
233 #ifndef NV50_SCISSORS_CLIPPING
234 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) {
235 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1);
236 SB_DATA (so, cso->scissor);
237 }
238 #endif
239
240 SB_BEGIN_3D(so, SHADE_MODEL, 1);
241 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT :
242 NV50_3D_SHADE_MODEL_SMOOTH);
243 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1);
244 SB_DATA (so, !cso->flatshade_first);
245 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1);
246 SB_DATA (so, cso->light_twoside);
247
248 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
249 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
250
251 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1);
252 SB_DATA (so, cso->multisample);
253
254 SB_BEGIN_3D(so, LINE_WIDTH, 1);
255 SB_DATA (so, fui(cso->line_width));
256 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1);
257 SB_DATA (so, cso->line_smooth);
258
259 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
260 if (cso->line_stipple_enable) {
261 SB_DATA (so, 1);
262 SB_BEGIN_3D(so, LINE_STIPPLE, 1);
263 SB_DATA (so, (cso->line_stipple_pattern << 8) |
264 cso->line_stipple_factor);
265 } else {
266 SB_DATA (so, 0);
267 }
268
269 if (!cso->point_size_per_vertex) {
270 SB_BEGIN_3D(so, POINT_SIZE, 1);
271 SB_DATA (so, fui(cso->point_size));
272 }
273 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1);
274 SB_DATA (so, cso->point_quad_rasterization);
275 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1);
276 SB_DATA (so, cso->point_smooth);
277
278 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3);
279 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
280 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
281 SB_DATA (so, cso->poly_smooth);
282
283 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
284 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
285 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW :
286 NV50_3D_FRONT_FACE_CW);
287 switch (cso->cull_face) {
288 case PIPE_FACE_FRONT_AND_BACK:
289 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK);
290 break;
291 case PIPE_FACE_FRONT:
292 SB_DATA(so, NV50_3D_CULL_FACE_FRONT);
293 break;
294 case PIPE_FACE_BACK:
295 default:
296 SB_DATA(so, NV50_3D_CULL_FACE_BACK);
297 break;
298 }
299
300 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1);
301 SB_DATA (so, cso->poly_stipple_enable);
302 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
303 SB_DATA (so, cso->offset_point);
304 SB_DATA (so, cso->offset_line);
305 SB_DATA (so, cso->offset_tri);
306
307 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
308 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
309 SB_DATA (so, fui(cso->offset_scale));
310 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
311 SB_DATA (so, fui(cso->offset_units * 2.0f));
312 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
313 SB_DATA (so, fui(cso->offset_clamp));
314 }
315
316 if (cso->depth_clip) {
317 reg = 0;
318 } else {
319 reg =
320 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
321 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
322 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
323 }
324 #ifndef NV50_SCISSORS_CLIPPING
325 reg |=
326 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 |
327 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
328 #endif
329 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
330 SB_DATA (so, reg);
331
332 SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1);
333 SB_DATA (so, cso->clip_halfz);
334
335 SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1);
336 SB_DATA (so, !cso->half_pixel_center);
337
338 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
339 return (void *)so;
340 }
341
342 static void
343 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
344 {
345 struct nv50_context *nv50 = nv50_context(pipe);
346
347 nv50->rast = hwcso;
348 nv50->dirty |= NV50_NEW_RASTERIZER;
349 }
350
351 static void
352 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
353 {
354 FREE(hwcso);
355 }
356
357 static void *
358 nv50_zsa_state_create(struct pipe_context *pipe,
359 const struct pipe_depth_stencil_alpha_state *cso)
360 {
361 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj);
362
363 so->pipe = *cso;
364
365 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1);
366 SB_DATA (so, cso->depth.writemask);
367 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
368 if (cso->depth.enabled) {
369 SB_DATA (so, 1);
370 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
371 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
372 } else {
373 SB_DATA (so, 0);
374 }
375
376 SB_BEGIN_3D(so, DEPTH_BOUNDS_EN, 1);
377 if (cso->depth.bounds_test) {
378 SB_DATA (so, 1);
379 SB_BEGIN_3D(so, DEPTH_BOUNDS(0), 2);
380 SB_DATA (so, fui(cso->depth.bounds_min));
381 SB_DATA (so, fui(cso->depth.bounds_max));
382 } else {
383 SB_DATA (so, 0);
384 }
385
386 if (cso->stencil[0].enabled) {
387 SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
388 SB_DATA (so, 1);
389 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
390 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
391 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
392 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
393 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
394 SB_DATA (so, cso->stencil[0].writemask);
395 SB_DATA (so, cso->stencil[0].valuemask);
396 } else {
397 SB_BEGIN_3D(so, STENCIL_ENABLE, 1);
398 SB_DATA (so, 0);
399 }
400
401 if (cso->stencil[1].enabled) {
402 assert(cso->stencil[0].enabled);
403 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
404 SB_DATA (so, 1);
405 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
406 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
407 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
408 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
409 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
410 SB_DATA (so, cso->stencil[1].writemask);
411 SB_DATA (so, cso->stencil[1].valuemask);
412 } else {
413 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1);
414 SB_DATA (so, 0);
415 }
416
417 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
418 if (cso->alpha.enabled) {
419 SB_DATA (so, 1);
420 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
421 SB_DATA (so, fui(cso->alpha.ref_value));
422 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
423 } else {
424 SB_DATA (so, 0);
425 }
426
427 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
428 return (void *)so;
429 }
430
431 static void
432 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
433 {
434 struct nv50_context *nv50 = nv50_context(pipe);
435
436 nv50->zsa = hwcso;
437 nv50->dirty |= NV50_NEW_ZSA;
438 }
439
440 static void
441 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
442 {
443 FREE(hwcso);
444 }
445
446 /* ====================== SAMPLERS AND TEXTURES ================================
447 */
448
449 #define NV50_TSC_WRAP_CASE(n) \
450 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
451
452 static inline unsigned
453 nv50_tsc_wrap_mode(unsigned wrap)
454 {
455 switch (wrap) {
456 NV50_TSC_WRAP_CASE(REPEAT);
457 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
458 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
459 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
460 NV50_TSC_WRAP_CASE(CLAMP);
461 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
462 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
463 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
464 default:
465 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
466 return NV50_TSC_WRAP_REPEAT;
467 }
468 }
469
470 void *
471 nv50_sampler_state_create(struct pipe_context *pipe,
472 const struct pipe_sampler_state *cso)
473 {
474 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry);
475 float f[2];
476
477 so->id = -1;
478
479 so->tsc[0] = (0x00026000 |
480 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
481 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
482 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
483
484 switch (cso->mag_img_filter) {
485 case PIPE_TEX_FILTER_LINEAR:
486 so->tsc[1] = NV50_TSC_1_MAGF_LINEAR;
487 break;
488 case PIPE_TEX_FILTER_NEAREST:
489 default:
490 so->tsc[1] = NV50_TSC_1_MAGF_NEAREST;
491 break;
492 }
493
494 switch (cso->min_img_filter) {
495 case PIPE_TEX_FILTER_LINEAR:
496 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
497 break;
498 case PIPE_TEX_FILTER_NEAREST:
499 default:
500 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
501 break;
502 }
503
504 switch (cso->min_mip_filter) {
505 case PIPE_TEX_MIPFILTER_LINEAR:
506 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
507 break;
508 case PIPE_TEX_MIPFILTER_NEAREST:
509 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
510 break;
511 case PIPE_TEX_MIPFILTER_NONE:
512 default:
513 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
514 break;
515 }
516
517 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
518 if (cso->seamless_cube_map)
519 so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
520 if (!cso->normalized_coords)
521 so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
522 }
523
524 if (cso->max_anisotropy >= 16)
525 so->tsc[0] |= (7 << 20);
526 else
527 if (cso->max_anisotropy >= 12)
528 so->tsc[0] |= (6 << 20);
529 else {
530 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
531
532 if (cso->max_anisotropy >= 4)
533 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
534 else
535 if (cso->max_anisotropy >= 2)
536 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
537 }
538
539 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
540 /* NOTE: must be deactivated for non-shadow textures */
541 so->tsc[0] |= (1 << 9);
542 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
543 }
544
545 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
546 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
547
548 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
549 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
550 so->tsc[2] =
551 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
552
553 so->tsc[2] |=
554 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24;
555 so->tsc[3] =
556 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12;
557 so->tsc[3] |=
558 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20;
559
560 so->tsc[4] = fui(cso->border_color.f[0]);
561 so->tsc[5] = fui(cso->border_color.f[1]);
562 so->tsc[6] = fui(cso->border_color.f[2]);
563 so->tsc[7] = fui(cso->border_color.f[3]);
564
565 return (void *)so;
566 }
567
568 static void
569 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
570 {
571 unsigned s, i;
572
573 for (s = 0; s < 3; ++s) {
574 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS);
575 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i)
576 if (nv50_context(pipe)->samplers[s][i] == hwcso)
577 nv50_context(pipe)->samplers[s][i] = NULL;
578 }
579
580 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso));
581
582 FREE(hwcso);
583 }
584
585 static inline void
586 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
587 unsigned nr, void **hwcso)
588 {
589 unsigned i;
590
591 assert(nr <= PIPE_MAX_SAMPLERS);
592 for (i = 0; i < nr; ++i) {
593 struct nv50_tsc_entry *old = nv50->samplers[s][i];
594
595 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
596 if (old)
597 nv50_screen_tsc_unlock(nv50->screen, old);
598 }
599 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
600 for (; i < nv50->num_samplers[s]; ++i) {
601 if (nv50->samplers[s][i]) {
602 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
603 nv50->samplers[s][i] = NULL;
604 }
605 }
606
607 nv50->num_samplers[s] = nr;
608
609 nv50->dirty |= NV50_NEW_SAMPLERS;
610 }
611
612 static void
613 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
614 {
615 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s);
616 }
617
618 static void
619 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
620 {
621 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s);
622 }
623
624 static void
625 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
626 {
627 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s);
628 }
629
630 static void
631 nv50_bind_sampler_states(struct pipe_context *pipe,
632 unsigned shader, unsigned start,
633 unsigned num_samplers, void **samplers)
634 {
635 assert(start == 0);
636 switch (shader) {
637 case PIPE_SHADER_VERTEX:
638 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers);
639 break;
640 case PIPE_SHADER_GEOMETRY:
641 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers);
642 break;
643 case PIPE_SHADER_FRAGMENT:
644 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers);
645 break;
646 }
647 }
648
649
650
651 /* NOTE: only called when not referenced anywhere, won't be bound */
652 static void
653 nv50_sampler_view_destroy(struct pipe_context *pipe,
654 struct pipe_sampler_view *view)
655 {
656 pipe_resource_reference(&view->texture, NULL);
657
658 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view));
659
660 FREE(nv50_tic_entry(view));
661 }
662
663 static inline void
664 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s,
665 unsigned nr,
666 struct pipe_sampler_view **views)
667 {
668 unsigned i;
669
670 assert(nr <= PIPE_MAX_SAMPLERS);
671 for (i = 0; i < nr; ++i) {
672 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
673 if (old)
674 nv50_screen_tic_unlock(nv50->screen, old);
675
676 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]);
677 }
678
679 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
680 for (i = nr; i < nv50->num_textures[s]; ++i) {
681 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
682 if (!old)
683 continue;
684 nv50_screen_tic_unlock(nv50->screen, old);
685
686 pipe_sampler_view_reference(&nv50->textures[s][i], NULL);
687 }
688
689 nv50->num_textures[s] = nr;
690
691 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_TEXTURES);
692
693 nv50->dirty |= NV50_NEW_TEXTURES;
694 }
695
696 static void
697 nv50_set_sampler_views(struct pipe_context *pipe, unsigned shader,
698 unsigned start, unsigned nr,
699 struct pipe_sampler_view **views)
700 {
701 assert(start == 0);
702 switch (shader) {
703 case PIPE_SHADER_VERTEX:
704 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views);
705 break;
706 case PIPE_SHADER_GEOMETRY:
707 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views);
708 break;
709 case PIPE_SHADER_FRAGMENT:
710 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views);
711 break;
712 default:
713 ;
714 }
715 }
716
717
718
719 /* ============================= SHADERS =======================================
720 */
721
722 static void *
723 nv50_sp_state_create(struct pipe_context *pipe,
724 const struct pipe_shader_state *cso, unsigned type)
725 {
726 struct nv50_program *prog;
727
728 prog = CALLOC_STRUCT(nv50_program);
729 if (!prog)
730 return NULL;
731
732 prog->type = type;
733 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
734
735 if (cso->stream_output.num_outputs)
736 prog->pipe.stream_output = cso->stream_output;
737
738 return (void *)prog;
739 }
740
741 static void
742 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso)
743 {
744 struct nv50_program *prog = (struct nv50_program *)hwcso;
745
746 nv50_program_destroy(nv50_context(pipe), prog);
747
748 FREE((void *)prog->pipe.tokens);
749 FREE(prog);
750 }
751
752 static void *
753 nv50_vp_state_create(struct pipe_context *pipe,
754 const struct pipe_shader_state *cso)
755 {
756 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
757 }
758
759 static void
760 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso)
761 {
762 struct nv50_context *nv50 = nv50_context(pipe);
763
764 nv50->vertprog = hwcso;
765 nv50->dirty |= NV50_NEW_VERTPROG;
766 }
767
768 static void *
769 nv50_fp_state_create(struct pipe_context *pipe,
770 const struct pipe_shader_state *cso)
771 {
772 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
773 }
774
775 static void
776 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso)
777 {
778 struct nv50_context *nv50 = nv50_context(pipe);
779
780 nv50->fragprog = hwcso;
781 nv50->dirty |= NV50_NEW_FRAGPROG;
782 }
783
784 static void *
785 nv50_gp_state_create(struct pipe_context *pipe,
786 const struct pipe_shader_state *cso)
787 {
788 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
789 }
790
791 static void
792 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso)
793 {
794 struct nv50_context *nv50 = nv50_context(pipe);
795
796 nv50->gmtyprog = hwcso;
797 nv50->dirty |= NV50_NEW_GMTYPROG;
798 }
799
800 static void
801 nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
802 struct pipe_constant_buffer *cb)
803 {
804 struct nv50_context *nv50 = nv50_context(pipe);
805 struct pipe_resource *res = cb ? cb->buffer : NULL;
806 const unsigned s = nv50_context_shader_stage(shader);
807 const unsigned i = index;
808
809 if (shader == PIPE_SHADER_COMPUTE)
810 return;
811
812 assert(i < NV50_MAX_PIPE_CONSTBUFS);
813 if (nv50->constbuf[s][i].user)
814 nv50->constbuf[s][i].u.buf = NULL;
815 else
816 if (nv50->constbuf[s][i].u.buf)
817 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_CB(s, i));
818
819 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res);
820
821 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false;
822 if (nv50->constbuf[s][i].user) {
823 nv50->constbuf[s][i].u.data = cb->user_buffer;
824 nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
825 nv50->constbuf_valid[s] |= 1 << i;
826 } else
827 if (res) {
828 nv50->constbuf[s][i].offset = cb->buffer_offset;
829 nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
830 nv50->constbuf_valid[s] |= 1 << i;
831 } else {
832 nv50->constbuf_valid[s] &= ~(1 << i);
833 }
834 nv50->constbuf_dirty[s] |= 1 << i;
835
836 nv50->dirty |= NV50_NEW_CONSTBUF;
837 }
838
839 /* =============================================================================
840 */
841
842 static void
843 nv50_set_blend_color(struct pipe_context *pipe,
844 const struct pipe_blend_color *bcol)
845 {
846 struct nv50_context *nv50 = nv50_context(pipe);
847
848 nv50->blend_colour = *bcol;
849 nv50->dirty |= NV50_NEW_BLEND_COLOUR;
850 }
851
852 static void
853 nv50_set_stencil_ref(struct pipe_context *pipe,
854 const struct pipe_stencil_ref *sr)
855 {
856 struct nv50_context *nv50 = nv50_context(pipe);
857
858 nv50->stencil_ref = *sr;
859 nv50->dirty |= NV50_NEW_STENCIL_REF;
860 }
861
862 static void
863 nv50_set_clip_state(struct pipe_context *pipe,
864 const struct pipe_clip_state *clip)
865 {
866 struct nv50_context *nv50 = nv50_context(pipe);
867
868 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp));
869
870 nv50->dirty |= NV50_NEW_CLIP;
871 }
872
873 static void
874 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
875 {
876 struct nv50_context *nv50 = nv50_context(pipe);
877
878 nv50->sample_mask = sample_mask;
879 nv50->dirty |= NV50_NEW_SAMPLE_MASK;
880 }
881
882 static void
883 nv50_set_min_samples(struct pipe_context *pipe, unsigned min_samples)
884 {
885 struct nv50_context *nv50 = nv50_context(pipe);
886
887 if (nv50->min_samples != min_samples) {
888 nv50->min_samples = min_samples;
889 nv50->dirty |= NV50_NEW_MIN_SAMPLES;
890 }
891 }
892
893 static void
894 nv50_set_framebuffer_state(struct pipe_context *pipe,
895 const struct pipe_framebuffer_state *fb)
896 {
897 struct nv50_context *nv50 = nv50_context(pipe);
898 unsigned i;
899
900 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
901
902 for (i = 0; i < fb->nr_cbufs; ++i)
903 pipe_surface_reference(&nv50->framebuffer.cbufs[i], fb->cbufs[i]);
904 for (; i < nv50->framebuffer.nr_cbufs; ++i)
905 pipe_surface_reference(&nv50->framebuffer.cbufs[i], NULL);
906
907 nv50->framebuffer.nr_cbufs = fb->nr_cbufs;
908
909 nv50->framebuffer.width = fb->width;
910 nv50->framebuffer.height = fb->height;
911
912 pipe_surface_reference(&nv50->framebuffer.zsbuf, fb->zsbuf);
913
914 nv50->dirty |= NV50_NEW_FRAMEBUFFER;
915 }
916
917 static void
918 nv50_set_polygon_stipple(struct pipe_context *pipe,
919 const struct pipe_poly_stipple *stipple)
920 {
921 struct nv50_context *nv50 = nv50_context(pipe);
922
923 nv50->stipple = *stipple;
924 nv50->dirty |= NV50_NEW_STIPPLE;
925 }
926
927 static void
928 nv50_set_scissor_states(struct pipe_context *pipe,
929 unsigned start_slot,
930 unsigned num_scissors,
931 const struct pipe_scissor_state *scissor)
932 {
933 struct nv50_context *nv50 = nv50_context(pipe);
934 int i;
935
936 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS);
937 for (i = 0; i < num_scissors; i++) {
938 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor)))
939 continue;
940 nv50->scissors[start_slot + i] = scissor[i];
941 nv50->scissors_dirty |= 1 << (start_slot + i);
942 nv50->dirty |= NV50_NEW_SCISSOR;
943 }
944 }
945
946 static void
947 nv50_set_viewport_states(struct pipe_context *pipe,
948 unsigned start_slot,
949 unsigned num_viewports,
950 const struct pipe_viewport_state *vpt)
951 {
952 struct nv50_context *nv50 = nv50_context(pipe);
953 int i;
954
955 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS);
956 for (i = 0; i < num_viewports; i++) {
957 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt)))
958 continue;
959 nv50->viewports[start_slot + i] = vpt[i];
960 nv50->viewports_dirty |= 1 << (start_slot + i);
961 nv50->dirty |= NV50_NEW_VIEWPORT;
962 }
963 }
964
965 static void
966 nv50_set_vertex_buffers(struct pipe_context *pipe,
967 unsigned start_slot, unsigned count,
968 const struct pipe_vertex_buffer *vb)
969 {
970 struct nv50_context *nv50 = nv50_context(pipe);
971 unsigned i;
972
973 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb,
974 start_slot, count);
975
976 if (!vb) {
977 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot);
978 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot);
979 return;
980 }
981
982 for (i = 0; i < count; ++i) {
983 unsigned dst_index = start_slot + i;
984
985 if (!vb[i].buffer && vb[i].user_buffer) {
986 nv50->vbo_user |= 1 << dst_index;
987 if (!vb[i].stride)
988 nv50->vbo_constant |= 1 << dst_index;
989 else
990 nv50->vbo_constant &= ~(1 << dst_index);
991 } else {
992 nv50->vbo_user &= ~(1 << dst_index);
993 nv50->vbo_constant &= ~(1 << dst_index);
994 }
995 }
996
997 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_VERTEX);
998
999 nv50->dirty |= NV50_NEW_ARRAYS;
1000 }
1001
1002 static void
1003 nv50_set_index_buffer(struct pipe_context *pipe,
1004 const struct pipe_index_buffer *ib)
1005 {
1006 struct nv50_context *nv50 = nv50_context(pipe);
1007
1008 if (nv50->idxbuf.buffer)
1009 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_INDEX);
1010
1011 if (ib) {
1012 pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer);
1013 nv50->idxbuf.index_size = ib->index_size;
1014 if (ib->buffer) {
1015 nv50->idxbuf.offset = ib->offset;
1016 BCTX_REFN(nv50->bufctx_3d, INDEX, nv04_resource(ib->buffer), RD);
1017 } else {
1018 nv50->idxbuf.user_buffer = ib->user_buffer;
1019 }
1020 } else {
1021 pipe_resource_reference(&nv50->idxbuf.buffer, NULL);
1022 }
1023 }
1024
1025 static void
1026 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
1027 {
1028 struct nv50_context *nv50 = nv50_context(pipe);
1029
1030 nv50->vertex = hwcso;
1031 nv50->dirty |= NV50_NEW_VERTEX;
1032 }
1033
1034 static struct pipe_stream_output_target *
1035 nv50_so_target_create(struct pipe_context *pipe,
1036 struct pipe_resource *res,
1037 unsigned offset, unsigned size)
1038 {
1039 struct nv04_resource *buf = (struct nv04_resource *)res;
1040 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target);
1041 if (!targ)
1042 return NULL;
1043
1044 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) {
1045 targ->pq = pipe->create_query(pipe,
1046 NVA0_QUERY_STREAM_OUTPUT_BUFFER_OFFSET, 0);
1047 if (!targ->pq) {
1048 FREE(targ);
1049 return NULL;
1050 }
1051 } else {
1052 targ->pq = NULL;
1053 }
1054 targ->clean = true;
1055
1056 targ->pipe.buffer_size = size;
1057 targ->pipe.buffer_offset = offset;
1058 targ->pipe.context = pipe;
1059 targ->pipe.buffer = NULL;
1060 pipe_resource_reference(&targ->pipe.buffer, res);
1061 pipe_reference_init(&targ->pipe.reference, 1);
1062
1063 assert(buf->base.target == PIPE_BUFFER);
1064 util_range_add(&buf->valid_buffer_range, offset, offset + size);
1065
1066 return &targ->pipe;
1067 }
1068
1069 static void
1070 nv50_so_target_destroy(struct pipe_context *pipe,
1071 struct pipe_stream_output_target *ptarg)
1072 {
1073 struct nv50_so_target *targ = nv50_so_target(ptarg);
1074 if (targ->pq)
1075 pipe->destroy_query(pipe, targ->pq);
1076 pipe_resource_reference(&targ->pipe.buffer, NULL);
1077 FREE(targ);
1078 }
1079
1080 static void
1081 nv50_set_stream_output_targets(struct pipe_context *pipe,
1082 unsigned num_targets,
1083 struct pipe_stream_output_target **targets,
1084 const unsigned *offsets)
1085 {
1086 struct nv50_context *nv50 = nv50_context(pipe);
1087 unsigned i;
1088 bool serialize = true;
1089 const bool can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS;
1090
1091 assert(num_targets <= 4);
1092
1093 for (i = 0; i < num_targets; ++i) {
1094 const bool changed = nv50->so_target[i] != targets[i];
1095 const bool append = (offsets[i] == (unsigned)-1);
1096 if (!changed && append)
1097 continue;
1098 nv50->so_targets_dirty |= 1 << i;
1099
1100 if (can_resume && changed && nv50->so_target[i]) {
1101 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1102 serialize = false;
1103 }
1104
1105 if (targets[i] && !append)
1106 nv50_so_target(targets[i])->clean = true;
1107
1108 pipe_so_target_reference(&nv50->so_target[i], targets[i]);
1109 }
1110 for (; i < nv50->num_so_targets; ++i) {
1111 if (can_resume && nv50->so_target[i]) {
1112 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1113 serialize = false;
1114 }
1115 pipe_so_target_reference(&nv50->so_target[i], NULL);
1116 nv50->so_targets_dirty |= 1 << i;
1117 }
1118 nv50->num_so_targets = num_targets;
1119
1120 if (nv50->so_targets_dirty)
1121 nv50->dirty |= NV50_NEW_STRMOUT;
1122 }
1123
1124 void
1125 nv50_init_state_functions(struct nv50_context *nv50)
1126 {
1127 struct pipe_context *pipe = &nv50->base.pipe;
1128
1129 pipe->create_blend_state = nv50_blend_state_create;
1130 pipe->bind_blend_state = nv50_blend_state_bind;
1131 pipe->delete_blend_state = nv50_blend_state_delete;
1132
1133 pipe->create_rasterizer_state = nv50_rasterizer_state_create;
1134 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind;
1135 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete;
1136
1137 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create;
1138 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind;
1139 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete;
1140
1141 pipe->create_sampler_state = nv50_sampler_state_create;
1142 pipe->delete_sampler_state = nv50_sampler_state_delete;
1143 pipe->bind_sampler_states = nv50_bind_sampler_states;
1144
1145 pipe->create_sampler_view = nv50_create_sampler_view;
1146 pipe->sampler_view_destroy = nv50_sampler_view_destroy;
1147 pipe->set_sampler_views = nv50_set_sampler_views;
1148
1149 pipe->create_vs_state = nv50_vp_state_create;
1150 pipe->create_fs_state = nv50_fp_state_create;
1151 pipe->create_gs_state = nv50_gp_state_create;
1152 pipe->bind_vs_state = nv50_vp_state_bind;
1153 pipe->bind_fs_state = nv50_fp_state_bind;
1154 pipe->bind_gs_state = nv50_gp_state_bind;
1155 pipe->delete_vs_state = nv50_sp_state_delete;
1156 pipe->delete_fs_state = nv50_sp_state_delete;
1157 pipe->delete_gs_state = nv50_sp_state_delete;
1158
1159 pipe->set_blend_color = nv50_set_blend_color;
1160 pipe->set_stencil_ref = nv50_set_stencil_ref;
1161 pipe->set_clip_state = nv50_set_clip_state;
1162 pipe->set_sample_mask = nv50_set_sample_mask;
1163 pipe->set_min_samples = nv50_set_min_samples;
1164 pipe->set_constant_buffer = nv50_set_constant_buffer;
1165 pipe->set_framebuffer_state = nv50_set_framebuffer_state;
1166 pipe->set_polygon_stipple = nv50_set_polygon_stipple;
1167 pipe->set_scissor_states = nv50_set_scissor_states;
1168 pipe->set_viewport_states = nv50_set_viewport_states;
1169
1170 pipe->create_vertex_elements_state = nv50_vertex_state_create;
1171 pipe->delete_vertex_elements_state = nv50_vertex_state_delete;
1172 pipe->bind_vertex_elements_state = nv50_vertex_state_bind;
1173
1174 pipe->set_vertex_buffers = nv50_set_vertex_buffers;
1175 pipe->set_index_buffer = nv50_set_index_buffer;
1176
1177 pipe->create_stream_output_target = nv50_so_target_create;
1178 pipe->stream_output_target_destroy = nv50_so_target_destroy;
1179 pipe->set_stream_output_targets = nv50_set_stream_output_targets;
1180
1181 nv50->sample_mask = ~0;
1182 nv50->min_samples = 1;
1183 }