2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
27 #include "util/u_format_srgb.h"
29 #include "tgsi/tgsi_parse.h"
31 #include "nv50/nv50_stateobj.h"
32 #include "nv50/nv50_context.h"
34 #include "nv50/nv50_3d.xml.h"
35 #include "nv50/nv50_texture.xml.h"
37 #include "nouveau_gldefs.h"
40 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
41 * use non-normalized coordinates, everything else won't
42 * (The relevant bit is in the TIC entry and not the TSC entry.)
44 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
45 * always activated on NVA0 +
46 * (Give me the global bit, otherwise it's not worth the CPU work.)
48 * ! pipe_sampler_state.border_color is not swizzled according to the texture
49 * swizzle in pipe_sampler_view
50 * (This will be ugly with indirect independent texture/sampler access,
51 * we'd have to emulate the logic in the shader. GL doesn't have that,
52 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
55 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
57 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
58 * (There's a GL query for that, forcing an exception is just ridiculous.)
60 * ! pipe_rasterizer_state.half_pixel_center is ignored - pixel centers
61 * are always at half integer coordinates and the top-left rule applies
62 * (There does not seem to be a hardware switch for this.)
64 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
65 * (The hardware only has 8 slots meant for TexCoord and we have to assign
66 * in advance to maintain elegant separate shader objects.)
69 static INLINE
uint32_t
70 nv50_colormask(unsigned mask
)
74 if (mask
& PIPE_MASK_R
)
76 if (mask
& PIPE_MASK_G
)
78 if (mask
& PIPE_MASK_B
)
80 if (mask
& PIPE_MASK_A
)
86 #define NV50_BLEND_FACTOR_CASE(a, b) \
87 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
89 static INLINE
uint32_t
90 nv50_blend_fac(unsigned factor
)
93 NV50_BLEND_FACTOR_CASE(ONE
, ONE
);
94 NV50_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
95 NV50_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
96 NV50_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
97 NV50_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
98 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
99 NV50_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
100 NV50_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
101 NV50_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
102 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
103 NV50_BLEND_FACTOR_CASE(ZERO
, ZERO
);
104 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
105 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
106 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
107 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
108 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
109 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
110 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
111 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
113 return NV50_3D_BLEND_FACTOR_ZERO
;
118 nv50_blend_state_create(struct pipe_context
*pipe
,
119 const struct pipe_blend_state
*cso
)
121 struct nv50_blend_stateobj
*so
= CALLOC_STRUCT(nv50_blend_stateobj
);
123 boolean emit_common_func
= cso
->rt
[0].blend_enable
;
126 if (nv50_context(pipe
)->screen
->tesla
->oclass
>= NVA3_3D_CLASS
) {
127 SB_BEGIN_3D(so
, BLEND_INDEPENDENT
, 1);
128 SB_DATA (so
, cso
->independent_blend_enable
);
133 SB_BEGIN_3D(so
, COLOR_MASK_COMMON
, 1);
134 SB_DATA (so
, !cso
->independent_blend_enable
);
136 SB_BEGIN_3D(so
, BLEND_ENABLE_COMMON
, 1);
137 SB_DATA (so
, !cso
->independent_blend_enable
);
139 if (cso
->independent_blend_enable
) {
140 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 8);
141 for (i
= 0; i
< 8; ++i
) {
142 SB_DATA(so
, cso
->rt
[i
].blend_enable
);
143 if (cso
->rt
[i
].blend_enable
)
144 emit_common_func
= TRUE
;
147 if (nv50_context(pipe
)->screen
->tesla
->oclass
>= NVA3_3D_CLASS
) {
148 emit_common_func
= FALSE
;
150 for (i
= 0; i
< 8; ++i
) {
151 if (!cso
->rt
[i
].blend_enable
)
153 SB_BEGIN_3D_(so
, NVA3_3D_IBLEND_EQUATION_RGB(i
), 6);
154 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
155 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_src_factor
));
156 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
157 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
158 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_src_factor
));
159 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
163 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 1);
164 SB_DATA (so
, cso
->rt
[0].blend_enable
);
167 if (emit_common_func
) {
168 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
169 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
170 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_src_factor
));
171 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_dst_factor
));
172 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
));
173 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_src_factor
));
174 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
175 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_dst_factor
));
178 if (cso
->logicop_enable
) {
179 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
181 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
183 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 1);
187 if (cso
->independent_blend_enable
) {
188 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
189 for (i
= 0; i
< 8; ++i
)
190 SB_DATA(so
, nv50_colormask(cso
->rt
[i
].colormask
));
192 SB_BEGIN_3D(so
, COLOR_MASK(0), 1);
193 SB_DATA (so
, nv50_colormask(cso
->rt
[0].colormask
));
197 if (cso
->alpha_to_coverage
)
198 ms
|= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE
;
199 if (cso
->alpha_to_one
)
200 ms
|= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE
;
202 SB_BEGIN_3D(so
, MULTISAMPLE_CTRL
, 1);
205 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
210 nv50_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
212 struct nv50_context
*nv50
= nv50_context(pipe
);
215 nv50
->dirty
|= NV50_NEW_BLEND
;
219 nv50_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
224 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
226 nv50_rasterizer_state_create(struct pipe_context
*pipe
,
227 const struct pipe_rasterizer_state
*cso
)
229 struct nv50_rasterizer_stateobj
*so
;
232 so
= CALLOC_STRUCT(nv50_rasterizer_stateobj
);
237 #ifndef NV50_SCISSORS_CLIPPING
238 for (int i
= 0; i
< NV50_MAX_VIEWPORTS
; i
++) {
239 SB_BEGIN_3D(so
, SCISSOR_ENABLE(i
), 1);
240 SB_DATA (so
, cso
->scissor
);
244 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
245 SB_DATA (so
, cso
->flatshade
? NV50_3D_SHADE_MODEL_FLAT
:
246 NV50_3D_SHADE_MODEL_SMOOTH
);
247 SB_BEGIN_3D(so
, PROVOKING_VERTEX_LAST
, 1);
248 SB_DATA (so
, !cso
->flatshade_first
);
249 SB_BEGIN_3D(so
, VERTEX_TWO_SIDE_ENABLE
, 1);
250 SB_DATA (so
, cso
->light_twoside
);
252 SB_BEGIN_3D(so
, FRAG_COLOR_CLAMP_EN
, 1);
253 SB_DATA (so
, cso
->clamp_fragment_color
? 0x11111111 : 0x00000000);
255 SB_BEGIN_3D(so
, MULTISAMPLE_ENABLE
, 1);
256 SB_DATA (so
, cso
->multisample
);
258 SB_BEGIN_3D(so
, LINE_WIDTH
, 1);
259 SB_DATA (so
, fui(cso
->line_width
));
260 SB_BEGIN_3D(so
, LINE_SMOOTH_ENABLE
, 1);
261 SB_DATA (so
, cso
->line_smooth
);
263 SB_BEGIN_3D(so
, LINE_STIPPLE_ENABLE
, 1);
264 if (cso
->line_stipple_enable
) {
266 SB_BEGIN_3D(so
, LINE_STIPPLE
, 1);
267 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
268 cso
->line_stipple_factor
);
273 if (!cso
->point_size_per_vertex
) {
274 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
275 SB_DATA (so
, fui(cso
->point_size
));
277 SB_BEGIN_3D(so
, POINT_SPRITE_ENABLE
, 1);
278 SB_DATA (so
, cso
->point_quad_rasterization
);
279 SB_BEGIN_3D(so
, POINT_SMOOTH_ENABLE
, 1);
280 SB_DATA (so
, cso
->point_smooth
);
282 SB_BEGIN_3D(so
, POLYGON_MODE_FRONT
, 3);
283 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
284 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
285 SB_DATA (so
, cso
->poly_smooth
);
287 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
288 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
289 SB_DATA (so
, cso
->front_ccw
? NV50_3D_FRONT_FACE_CCW
:
290 NV50_3D_FRONT_FACE_CW
);
291 switch (cso
->cull_face
) {
292 case PIPE_FACE_FRONT_AND_BACK
:
293 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT_AND_BACK
);
295 case PIPE_FACE_FRONT
:
296 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT
);
300 SB_DATA(so
, NV50_3D_CULL_FACE_BACK
);
304 SB_BEGIN_3D(so
, POLYGON_STIPPLE_ENABLE
, 1);
305 SB_DATA (so
, cso
->poly_stipple_enable
);
306 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
307 SB_DATA (so
, cso
->offset_point
);
308 SB_DATA (so
, cso
->offset_line
);
309 SB_DATA (so
, cso
->offset_tri
);
311 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
312 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
313 SB_DATA (so
, fui(cso
->offset_scale
));
314 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
315 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
316 SB_BEGIN_3D(so
, POLYGON_OFFSET_CLAMP
, 1);
317 SB_DATA (so
, fui(cso
->offset_clamp
));
320 if (cso
->depth_clip
) {
324 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR
|
325 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR
|
326 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1
;
328 #ifndef NV50_SCISSORS_CLIPPING
330 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7
|
331 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1
;
333 SB_BEGIN_3D(so
, VIEW_VOLUME_CLIP_CTRL
, 1);
336 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
341 nv50_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
343 struct nv50_context
*nv50
= nv50_context(pipe
);
346 nv50
->dirty
|= NV50_NEW_RASTERIZER
;
350 nv50_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
356 nv50_zsa_state_create(struct pipe_context
*pipe
,
357 const struct pipe_depth_stencil_alpha_state
*cso
)
359 struct nv50_zsa_stateobj
*so
= CALLOC_STRUCT(nv50_zsa_stateobj
);
363 SB_BEGIN_3D(so
, DEPTH_WRITE_ENABLE
, 1);
364 SB_DATA (so
, cso
->depth
.writemask
);
365 SB_BEGIN_3D(so
, DEPTH_TEST_ENABLE
, 1);
366 if (cso
->depth
.enabled
) {
368 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
369 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
374 if (cso
->stencil
[0].enabled
) {
375 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
377 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
378 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
379 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
380 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
381 SB_BEGIN_3D(so
, STENCIL_FRONT_MASK
, 2);
382 SB_DATA (so
, cso
->stencil
[0].writemask
);
383 SB_DATA (so
, cso
->stencil
[0].valuemask
);
385 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 1);
389 if (cso
->stencil
[1].enabled
) {
390 assert(cso
->stencil
[0].enabled
);
391 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
393 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
394 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
395 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
396 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
397 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
398 SB_DATA (so
, cso
->stencil
[1].writemask
);
399 SB_DATA (so
, cso
->stencil
[1].valuemask
);
401 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 1);
405 SB_BEGIN_3D(so
, ALPHA_TEST_ENABLE
, 1);
406 if (cso
->alpha
.enabled
) {
408 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
409 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
410 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
415 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
420 nv50_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
422 struct nv50_context
*nv50
= nv50_context(pipe
);
425 nv50
->dirty
|= NV50_NEW_ZSA
;
429 nv50_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
434 /* ====================== SAMPLERS AND TEXTURES ================================
437 #define NV50_TSC_WRAP_CASE(n) \
438 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
440 static INLINE
unsigned
441 nv50_tsc_wrap_mode(unsigned wrap
)
444 NV50_TSC_WRAP_CASE(REPEAT
);
445 NV50_TSC_WRAP_CASE(MIRROR_REPEAT
);
446 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE
);
447 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER
);
448 NV50_TSC_WRAP_CASE(CLAMP
);
449 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE
);
450 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER
);
451 NV50_TSC_WRAP_CASE(MIRROR_CLAMP
);
453 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
454 return NV50_TSC_WRAP_REPEAT
;
459 nv50_sampler_state_create(struct pipe_context
*pipe
,
460 const struct pipe_sampler_state
*cso
)
462 struct nv50_tsc_entry
*so
= MALLOC_STRUCT(nv50_tsc_entry
);
467 so
->tsc
[0] = (0x00026000 |
468 (nv50_tsc_wrap_mode(cso
->wrap_s
) << 0) |
469 (nv50_tsc_wrap_mode(cso
->wrap_t
) << 3) |
470 (nv50_tsc_wrap_mode(cso
->wrap_r
) << 6));
472 switch (cso
->mag_img_filter
) {
473 case PIPE_TEX_FILTER_LINEAR
:
474 so
->tsc
[1] = NV50_TSC_1_MAGF_LINEAR
;
476 case PIPE_TEX_FILTER_NEAREST
:
478 so
->tsc
[1] = NV50_TSC_1_MAGF_NEAREST
;
482 switch (cso
->min_img_filter
) {
483 case PIPE_TEX_FILTER_LINEAR
:
484 so
->tsc
[1] |= NV50_TSC_1_MINF_LINEAR
;
486 case PIPE_TEX_FILTER_NEAREST
:
488 so
->tsc
[1] |= NV50_TSC_1_MINF_NEAREST
;
492 switch (cso
->min_mip_filter
) {
493 case PIPE_TEX_MIPFILTER_LINEAR
:
494 so
->tsc
[1] |= NV50_TSC_1_MIPF_LINEAR
;
496 case PIPE_TEX_MIPFILTER_NEAREST
:
497 so
->tsc
[1] |= NV50_TSC_1_MIPF_NEAREST
;
499 case PIPE_TEX_MIPFILTER_NONE
:
501 so
->tsc
[1] |= NV50_TSC_1_MIPF_NONE
;
505 if (nouveau_screen(pipe
->screen
)->class_3d
>= NVE4_3D_CLASS
) {
506 if (cso
->seamless_cube_map
)
507 so
->tsc
[1] |= NVE4_TSC_1_CUBE_SEAMLESS
;
508 if (!cso
->normalized_coords
)
509 so
->tsc
[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS
;
512 if (cso
->max_anisotropy
>= 16)
513 so
->tsc
[0] |= (7 << 20);
515 if (cso
->max_anisotropy
>= 12)
516 so
->tsc
[0] |= (6 << 20);
518 so
->tsc
[0] |= (cso
->max_anisotropy
>> 1) << 20;
520 if (cso
->max_anisotropy
>= 4)
521 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_35
;
523 if (cso
->max_anisotropy
>= 2)
524 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_15
;
527 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
528 /* NOTE: must be deactivated for non-shadow textures */
529 so
->tsc
[0] |= (1 << 9);
530 so
->tsc
[0] |= (nvgl_comparison_op(cso
->compare_func
) & 0x7) << 10;
533 f
[0] = CLAMP(cso
->lod_bias
, -16.0f
, 15.0f
);
534 so
->tsc
[1] |= ((int)(f
[0] * 256.0f
) & 0x1fff) << 12;
536 f
[0] = CLAMP(cso
->min_lod
, 0.0f
, 15.0f
);
537 f
[1] = CLAMP(cso
->max_lod
, 0.0f
, 15.0f
);
539 (((int)(f
[1] * 256.0f
) & 0xfff) << 12) | ((int)(f
[0] * 256.0f
) & 0xfff);
542 util_format_linear_float_to_srgb_8unorm(cso
->border_color
.f
[0]) << 24;
544 util_format_linear_float_to_srgb_8unorm(cso
->border_color
.f
[1]) << 12;
546 util_format_linear_float_to_srgb_8unorm(cso
->border_color
.f
[2]) << 20;
548 so
->tsc
[4] = fui(cso
->border_color
.f
[0]);
549 so
->tsc
[5] = fui(cso
->border_color
.f
[1]);
550 so
->tsc
[6] = fui(cso
->border_color
.f
[2]);
551 so
->tsc
[7] = fui(cso
->border_color
.f
[3]);
557 nv50_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
561 for (s
= 0; s
< 3; ++s
)
562 assert(nv50_context(pipe
)->num_samplers
[s
] <= PIPE_MAX_SAMPLERS
);
563 for (i
= 0; i
< nv50_context(pipe
)->num_samplers
[s
]; ++i
)
564 if (nv50_context(pipe
)->samplers
[s
][i
] == hwcso
)
565 nv50_context(pipe
)->samplers
[s
][i
] = NULL
;
567 nv50_screen_tsc_free(nv50_context(pipe
)->screen
, nv50_tsc_entry(hwcso
));
573 nv50_stage_sampler_states_bind(struct nv50_context
*nv50
, int s
,
574 unsigned nr
, void **hwcso
)
578 assert(nr
<= PIPE_MAX_SAMPLERS
);
579 for (i
= 0; i
< nr
; ++i
) {
580 struct nv50_tsc_entry
*old
= nv50
->samplers
[s
][i
];
582 nv50
->samplers
[s
][i
] = nv50_tsc_entry(hwcso
[i
]);
584 nv50_screen_tsc_unlock(nv50
->screen
, old
);
586 assert(nv50
->num_samplers
[s
] <= PIPE_MAX_SAMPLERS
);
587 for (; i
< nv50
->num_samplers
[s
]; ++i
)
588 if (nv50
->samplers
[s
][i
])
589 nv50_screen_tsc_unlock(nv50
->screen
, nv50
->samplers
[s
][i
]);
591 nv50
->num_samplers
[s
] = nr
;
593 nv50
->dirty
|= NV50_NEW_SAMPLERS
;
597 nv50_vp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
599 nv50_stage_sampler_states_bind(nv50_context(pipe
), 0, nr
, s
);
603 nv50_fp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
605 nv50_stage_sampler_states_bind(nv50_context(pipe
), 2, nr
, s
);
609 nv50_gp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
611 nv50_stage_sampler_states_bind(nv50_context(pipe
), 1, nr
, s
);
615 nv50_bind_sampler_states(struct pipe_context
*pipe
,
616 unsigned shader
, unsigned start
,
617 unsigned num_samplers
, void **samplers
)
621 case PIPE_SHADER_VERTEX
:
622 nv50_vp_sampler_states_bind(pipe
, num_samplers
, samplers
);
624 case PIPE_SHADER_GEOMETRY
:
625 nv50_gp_sampler_states_bind(pipe
, num_samplers
, samplers
);
627 case PIPE_SHADER_FRAGMENT
:
628 nv50_fp_sampler_states_bind(pipe
, num_samplers
, samplers
);
635 /* NOTE: only called when not referenced anywhere, won't be bound */
637 nv50_sampler_view_destroy(struct pipe_context
*pipe
,
638 struct pipe_sampler_view
*view
)
640 pipe_resource_reference(&view
->texture
, NULL
);
642 nv50_screen_tic_free(nv50_context(pipe
)->screen
, nv50_tic_entry(view
));
644 FREE(nv50_tic_entry(view
));
648 nv50_stage_set_sampler_views(struct nv50_context
*nv50
, int s
,
650 struct pipe_sampler_view
**views
)
654 assert(nr
<= PIPE_MAX_SAMPLERS
);
655 for (i
= 0; i
< nr
; ++i
) {
656 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
658 nv50_screen_tic_unlock(nv50
->screen
, old
);
660 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], views
[i
]);
663 assert(nv50
->num_textures
[s
] <= PIPE_MAX_SAMPLERS
);
664 for (i
= nr
; i
< nv50
->num_textures
[s
]; ++i
) {
665 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
668 nv50_screen_tic_unlock(nv50
->screen
, old
);
670 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], NULL
);
673 nv50
->num_textures
[s
] = nr
;
675 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_TEXTURES
);
677 nv50
->dirty
|= NV50_NEW_TEXTURES
;
681 nv50_set_sampler_views(struct pipe_context
*pipe
, unsigned shader
,
682 unsigned start
, unsigned nr
,
683 struct pipe_sampler_view
**views
)
687 case PIPE_SHADER_VERTEX
:
688 nv50_stage_set_sampler_views(nv50_context(pipe
), 0, nr
, views
);
690 case PIPE_SHADER_GEOMETRY
:
691 nv50_stage_set_sampler_views(nv50_context(pipe
), 1, nr
, views
);
693 case PIPE_SHADER_FRAGMENT
:
694 nv50_stage_set_sampler_views(nv50_context(pipe
), 2, nr
, views
);
703 /* ============================= SHADERS =======================================
707 nv50_sp_state_create(struct pipe_context
*pipe
,
708 const struct pipe_shader_state
*cso
, unsigned type
)
710 struct nv50_program
*prog
;
712 prog
= CALLOC_STRUCT(nv50_program
);
717 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
719 if (cso
->stream_output
.num_outputs
)
720 prog
->pipe
.stream_output
= cso
->stream_output
;
726 nv50_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
728 struct nv50_program
*prog
= (struct nv50_program
*)hwcso
;
730 nv50_program_destroy(nv50_context(pipe
), prog
);
732 FREE((void *)prog
->pipe
.tokens
);
737 nv50_vp_state_create(struct pipe_context
*pipe
,
738 const struct pipe_shader_state
*cso
)
740 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
744 nv50_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
746 struct nv50_context
*nv50
= nv50_context(pipe
);
748 nv50
->vertprog
= hwcso
;
749 nv50
->dirty
|= NV50_NEW_VERTPROG
;
753 nv50_fp_state_create(struct pipe_context
*pipe
,
754 const struct pipe_shader_state
*cso
)
756 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
760 nv50_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
762 struct nv50_context
*nv50
= nv50_context(pipe
);
764 nv50
->fragprog
= hwcso
;
765 nv50
->dirty
|= NV50_NEW_FRAGPROG
;
769 nv50_gp_state_create(struct pipe_context
*pipe
,
770 const struct pipe_shader_state
*cso
)
772 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
776 nv50_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
778 struct nv50_context
*nv50
= nv50_context(pipe
);
780 nv50
->gmtyprog
= hwcso
;
781 nv50
->dirty
|= NV50_NEW_GMTYPROG
;
785 nv50_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
786 struct pipe_constant_buffer
*cb
)
788 struct nv50_context
*nv50
= nv50_context(pipe
);
789 struct pipe_resource
*res
= cb
? cb
->buffer
: NULL
;
790 const unsigned s
= nv50_context_shader_stage(shader
);
791 const unsigned i
= index
;
793 if (shader
== PIPE_SHADER_COMPUTE
)
796 assert(i
< NV50_MAX_PIPE_CONSTBUFS
);
797 if (nv50
->constbuf
[s
][i
].user
)
798 nv50
->constbuf
[s
][i
].u
.buf
= NULL
;
800 if (nv50
->constbuf
[s
][i
].u
.buf
)
801 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_CB(s
, i
));
803 pipe_resource_reference(&nv50
->constbuf
[s
][i
].u
.buf
, res
);
805 nv50
->constbuf
[s
][i
].user
= (cb
&& cb
->user_buffer
) ? TRUE
: FALSE
;
806 if (nv50
->constbuf
[s
][i
].user
) {
807 nv50
->constbuf
[s
][i
].u
.data
= cb
->user_buffer
;
808 nv50
->constbuf
[s
][i
].size
= cb
->buffer_size
;
809 nv50
->constbuf_valid
[s
] |= 1 << i
;
812 nv50
->constbuf
[s
][i
].offset
= cb
->buffer_offset
;
813 nv50
->constbuf
[s
][i
].size
= align(cb
->buffer_size
, 0x100);
814 nv50
->constbuf_valid
[s
] |= 1 << i
;
816 nv50
->constbuf_valid
[s
] &= ~(1 << i
);
818 nv50
->constbuf_dirty
[s
] |= 1 << i
;
820 nv50
->dirty
|= NV50_NEW_CONSTBUF
;
823 /* =============================================================================
827 nv50_set_blend_color(struct pipe_context
*pipe
,
828 const struct pipe_blend_color
*bcol
)
830 struct nv50_context
*nv50
= nv50_context(pipe
);
832 nv50
->blend_colour
= *bcol
;
833 nv50
->dirty
|= NV50_NEW_BLEND_COLOUR
;
837 nv50_set_stencil_ref(struct pipe_context
*pipe
,
838 const struct pipe_stencil_ref
*sr
)
840 struct nv50_context
*nv50
= nv50_context(pipe
);
842 nv50
->stencil_ref
= *sr
;
843 nv50
->dirty
|= NV50_NEW_STENCIL_REF
;
847 nv50_set_clip_state(struct pipe_context
*pipe
,
848 const struct pipe_clip_state
*clip
)
850 struct nv50_context
*nv50
= nv50_context(pipe
);
852 memcpy(nv50
->clip
.ucp
, clip
->ucp
, sizeof(clip
->ucp
));
854 nv50
->dirty
|= NV50_NEW_CLIP
;
858 nv50_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
860 struct nv50_context
*nv50
= nv50_context(pipe
);
862 nv50
->sample_mask
= sample_mask
;
863 nv50
->dirty
|= NV50_NEW_SAMPLE_MASK
;
868 nv50_set_framebuffer_state(struct pipe_context
*pipe
,
869 const struct pipe_framebuffer_state
*fb
)
871 struct nv50_context
*nv50
= nv50_context(pipe
);
874 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_FB
);
876 for (i
= 0; i
< fb
->nr_cbufs
; ++i
)
877 pipe_surface_reference(&nv50
->framebuffer
.cbufs
[i
], fb
->cbufs
[i
]);
878 for (; i
< nv50
->framebuffer
.nr_cbufs
; ++i
)
879 pipe_surface_reference(&nv50
->framebuffer
.cbufs
[i
], NULL
);
881 nv50
->framebuffer
.nr_cbufs
= fb
->nr_cbufs
;
883 nv50
->framebuffer
.width
= fb
->width
;
884 nv50
->framebuffer
.height
= fb
->height
;
886 pipe_surface_reference(&nv50
->framebuffer
.zsbuf
, fb
->zsbuf
);
888 nv50
->dirty
|= NV50_NEW_FRAMEBUFFER
;
892 nv50_set_polygon_stipple(struct pipe_context
*pipe
,
893 const struct pipe_poly_stipple
*stipple
)
895 struct nv50_context
*nv50
= nv50_context(pipe
);
897 nv50
->stipple
= *stipple
;
898 nv50
->dirty
|= NV50_NEW_STIPPLE
;
902 nv50_set_scissor_states(struct pipe_context
*pipe
,
904 unsigned num_scissors
,
905 const struct pipe_scissor_state
*scissor
)
907 struct nv50_context
*nv50
= nv50_context(pipe
);
910 assert(start_slot
+ num_scissors
<= NV50_MAX_VIEWPORTS
);
911 for (i
= 0; i
< num_scissors
; i
++) {
912 if (!memcmp(&nv50
->scissors
[start_slot
+ i
], &scissor
[i
], sizeof(*scissor
)))
914 nv50
->scissors
[start_slot
+ i
] = scissor
[i
];
915 nv50
->scissors_dirty
|= 1 << (start_slot
+ i
);
916 nv50
->dirty
|= NV50_NEW_SCISSOR
;
921 nv50_set_viewport_states(struct pipe_context
*pipe
,
923 unsigned num_viewports
,
924 const struct pipe_viewport_state
*vpt
)
926 struct nv50_context
*nv50
= nv50_context(pipe
);
929 assert(start_slot
+ num_viewports
<= NV50_MAX_VIEWPORTS
);
930 for (i
= 0; i
< num_viewports
; i
++) {
931 if (!memcmp(&nv50
->viewports
[start_slot
+ i
], &vpt
[i
], sizeof(*vpt
)))
933 nv50
->viewports
[start_slot
+ i
] = vpt
[i
];
934 nv50
->viewports_dirty
|= 1 << (start_slot
+ i
);
935 nv50
->dirty
|= NV50_NEW_VIEWPORT
;
940 nv50_set_vertex_buffers(struct pipe_context
*pipe
,
941 unsigned start_slot
, unsigned count
,
942 const struct pipe_vertex_buffer
*vb
)
944 struct nv50_context
*nv50
= nv50_context(pipe
);
947 util_set_vertex_buffers_count(nv50
->vtxbuf
, &nv50
->num_vtxbufs
, vb
,
951 nv50
->vbo_user
&= ~(((1ull << count
) - 1) << start_slot
);
952 nv50
->vbo_constant
&= ~(((1ull << count
) - 1) << start_slot
);
956 for (i
= 0; i
< count
; ++i
) {
957 unsigned dst_index
= start_slot
+ i
;
959 if (!vb
[i
].buffer
&& vb
[i
].user_buffer
) {
960 nv50
->vbo_user
|= 1 << dst_index
;
962 nv50
->vbo_constant
|= 1 << dst_index
;
964 nv50
->vbo_constant
&= ~(1 << dst_index
);
966 nv50
->vbo_user
&= ~(1 << dst_index
);
967 nv50
->vbo_constant
&= ~(1 << dst_index
);
971 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_VERTEX
);
973 nv50
->dirty
|= NV50_NEW_ARRAYS
;
977 nv50_set_index_buffer(struct pipe_context
*pipe
,
978 const struct pipe_index_buffer
*ib
)
980 struct nv50_context
*nv50
= nv50_context(pipe
);
982 if (nv50
->idxbuf
.buffer
)
983 nouveau_bufctx_reset(nv50
->bufctx_3d
, NV50_BIND_INDEX
);
986 pipe_resource_reference(&nv50
->idxbuf
.buffer
, ib
->buffer
);
987 nv50
->idxbuf
.index_size
= ib
->index_size
;
989 nv50
->idxbuf
.offset
= ib
->offset
;
990 BCTX_REFN(nv50
->bufctx_3d
, INDEX
, nv04_resource(ib
->buffer
), RD
);
992 nv50
->idxbuf
.user_buffer
= ib
->user_buffer
;
995 pipe_resource_reference(&nv50
->idxbuf
.buffer
, NULL
);
1000 nv50_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
1002 struct nv50_context
*nv50
= nv50_context(pipe
);
1004 nv50
->vertex
= hwcso
;
1005 nv50
->dirty
|= NV50_NEW_VERTEX
;
1008 static struct pipe_stream_output_target
*
1009 nv50_so_target_create(struct pipe_context
*pipe
,
1010 struct pipe_resource
*res
,
1011 unsigned offset
, unsigned size
)
1013 struct nv50_so_target
*targ
= MALLOC_STRUCT(nv50_so_target
);
1017 if (nouveau_context(pipe
)->screen
->class_3d
>= NVA0_3D_CLASS
) {
1018 targ
->pq
= pipe
->create_query(pipe
,
1019 NVA0_QUERY_STREAM_OUTPUT_BUFFER_OFFSET
);
1029 targ
->pipe
.buffer_size
= size
;
1030 targ
->pipe
.buffer_offset
= offset
;
1031 targ
->pipe
.context
= pipe
;
1032 targ
->pipe
.buffer
= NULL
;
1033 pipe_resource_reference(&targ
->pipe
.buffer
, res
);
1034 pipe_reference_init(&targ
->pipe
.reference
, 1);
1040 nv50_so_target_destroy(struct pipe_context
*pipe
,
1041 struct pipe_stream_output_target
*ptarg
)
1043 struct nv50_so_target
*targ
= nv50_so_target(ptarg
);
1045 pipe
->destroy_query(pipe
, targ
->pq
);
1046 pipe_resource_reference(&targ
->pipe
.buffer
, NULL
);
1051 nv50_set_stream_output_targets(struct pipe_context
*pipe
,
1052 unsigned num_targets
,
1053 struct pipe_stream_output_target
**targets
,
1054 unsigned append_mask
)
1056 struct nv50_context
*nv50
= nv50_context(pipe
);
1058 boolean serialize
= TRUE
;
1059 const boolean can_resume
= nv50
->screen
->base
.class_3d
>= NVA0_3D_CLASS
;
1061 assert(num_targets
<= 4);
1063 for (i
= 0; i
< num_targets
; ++i
) {
1064 const boolean changed
= nv50
->so_target
[i
] != targets
[i
];
1065 if (!changed
&& (append_mask
& (1 << i
)))
1067 nv50
->so_targets_dirty
|= 1 << i
;
1069 if (can_resume
&& changed
&& nv50
->so_target
[i
]) {
1070 nva0_so_target_save_offset(pipe
, nv50
->so_target
[i
], i
, serialize
);
1074 if (targets
[i
] && !(append_mask
& (1 << i
)))
1075 nv50_so_target(targets
[i
])->clean
= TRUE
;
1077 pipe_so_target_reference(&nv50
->so_target
[i
], targets
[i
]);
1079 for (; i
< nv50
->num_so_targets
; ++i
) {
1080 if (can_resume
&& nv50
->so_target
[i
]) {
1081 nva0_so_target_save_offset(pipe
, nv50
->so_target
[i
], i
, serialize
);
1084 pipe_so_target_reference(&nv50
->so_target
[i
], NULL
);
1085 nv50
->so_targets_dirty
|= 1 << i
;
1087 nv50
->num_so_targets
= num_targets
;
1089 if (nv50
->so_targets_dirty
)
1090 nv50
->dirty
|= NV50_NEW_STRMOUT
;
1094 nv50_init_state_functions(struct nv50_context
*nv50
)
1096 struct pipe_context
*pipe
= &nv50
->base
.pipe
;
1098 pipe
->create_blend_state
= nv50_blend_state_create
;
1099 pipe
->bind_blend_state
= nv50_blend_state_bind
;
1100 pipe
->delete_blend_state
= nv50_blend_state_delete
;
1102 pipe
->create_rasterizer_state
= nv50_rasterizer_state_create
;
1103 pipe
->bind_rasterizer_state
= nv50_rasterizer_state_bind
;
1104 pipe
->delete_rasterizer_state
= nv50_rasterizer_state_delete
;
1106 pipe
->create_depth_stencil_alpha_state
= nv50_zsa_state_create
;
1107 pipe
->bind_depth_stencil_alpha_state
= nv50_zsa_state_bind
;
1108 pipe
->delete_depth_stencil_alpha_state
= nv50_zsa_state_delete
;
1110 pipe
->create_sampler_state
= nv50_sampler_state_create
;
1111 pipe
->delete_sampler_state
= nv50_sampler_state_delete
;
1112 pipe
->bind_sampler_states
= nv50_bind_sampler_states
;
1114 pipe
->create_sampler_view
= nv50_create_sampler_view
;
1115 pipe
->sampler_view_destroy
= nv50_sampler_view_destroy
;
1116 pipe
->set_sampler_views
= nv50_set_sampler_views
;
1118 pipe
->create_vs_state
= nv50_vp_state_create
;
1119 pipe
->create_fs_state
= nv50_fp_state_create
;
1120 pipe
->create_gs_state
= nv50_gp_state_create
;
1121 pipe
->bind_vs_state
= nv50_vp_state_bind
;
1122 pipe
->bind_fs_state
= nv50_fp_state_bind
;
1123 pipe
->bind_gs_state
= nv50_gp_state_bind
;
1124 pipe
->delete_vs_state
= nv50_sp_state_delete
;
1125 pipe
->delete_fs_state
= nv50_sp_state_delete
;
1126 pipe
->delete_gs_state
= nv50_sp_state_delete
;
1128 pipe
->set_blend_color
= nv50_set_blend_color
;
1129 pipe
->set_stencil_ref
= nv50_set_stencil_ref
;
1130 pipe
->set_clip_state
= nv50_set_clip_state
;
1131 pipe
->set_sample_mask
= nv50_set_sample_mask
;
1132 pipe
->set_constant_buffer
= nv50_set_constant_buffer
;
1133 pipe
->set_framebuffer_state
= nv50_set_framebuffer_state
;
1134 pipe
->set_polygon_stipple
= nv50_set_polygon_stipple
;
1135 pipe
->set_scissor_states
= nv50_set_scissor_states
;
1136 pipe
->set_viewport_states
= nv50_set_viewport_states
;
1138 pipe
->create_vertex_elements_state
= nv50_vertex_state_create
;
1139 pipe
->delete_vertex_elements_state
= nv50_vertex_state_delete
;
1140 pipe
->bind_vertex_elements_state
= nv50_vertex_state_bind
;
1142 pipe
->set_vertex_buffers
= nv50_set_vertex_buffers
;
1143 pipe
->set_index_buffer
= nv50_set_index_buffer
;
1145 pipe
->create_stream_output_target
= nv50_so_target_create
;
1146 pipe
->stream_output_target_destroy
= nv50_so_target_destroy
;
1147 pipe
->set_stream_output_targets
= nv50_set_stream_output_targets
;
1149 nv50
->sample_mask
= ~0;