projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
gallium: Use enum pipe_shader_type in set_sampler_views()
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_framebuffer.h"
25 #include "util/u_helpers.h"
26 #include "util/u_inlines.h"
27 #include "util/u_transfer.h"
28 #include "util/format_srgb.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "nv50/nv50_stateobj.h"
33 #include "nv50/nv50_context.h"
34 #include "nv50/nv50_query_hw.h"
35
36 #include "nv50/nv50_3d.xml.h"
37 #include "nv50/g80_texture.xml.h"
38
39 #include "nouveau_gldefs.h"
40
41 /* Caveats:
42 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
43 * use non-normalized coordinates, everything else won't
44 * (The relevant bit is in the TIC entry and not the TSC entry.)
45 *
46 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
47 * always activated on NVA0 +
48 * (Give me the global bit, otherwise it's not worth the CPU work.)
49 *
50 * ! pipe_sampler_state.border_color is not swizzled according to the texture
51 * swizzle in pipe_sampler_view
52 * (This will be ugly with indirect independent texture/sampler access,
53 * we'd have to emulate the logic in the shader. GL doesn't have that,
54 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
55 * good.)
56 *
57 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
58 *
59 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
60 * (There's a GL query for that, forcing an exception is just ridiculous.)
61 *
62 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
63 * (The hardware only has 8 slots meant for TexCoord and we have to assign
64 * in advance to maintain elegant separate shader objects.)
65 */
66
67 static inline uint32_t
68 nv50_colormask(unsigned mask)
69 {
70 uint32_t ret = 0;
71
72 if (mask & PIPE_MASK_R)
73 ret |= 0x0001;
74 if (mask & PIPE_MASK_G)
75 ret |= 0x0010;
76 if (mask & PIPE_MASK_B)
77 ret |= 0x0100;
78 if (mask & PIPE_MASK_A)
79 ret |= 0x1000;
80
81 return ret;
82 }
83
84 #define NV50_BLEND_FACTOR_CASE(a, b) \
85 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b
86
87 static inline uint32_t
88 nv50_blend_fac(unsigned factor)
89 {
90 switch (factor) {
91 NV50_BLEND_FACTOR_CASE(ONE, ONE);
92 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
93 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
94 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
95 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
96 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
97 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
98 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
99 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
100 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
101 NV50_BLEND_FACTOR_CASE(ZERO, ZERO);
102 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
103 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
104 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
105 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
106 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
107 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
108 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
109 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
110 default:
111 return NV50_BLEND_FACTOR_ZERO;
112 }
113 }
114
115 static void *
116 nv50_blend_state_create(struct pipe_context *pipe,
117 const struct pipe_blend_state *cso)
118 {
119 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj);
120 int i;
121 bool emit_common_func = cso->rt[0].blend_enable;
122
123 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
124 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
125 SB_DATA (so, cso->independent_blend_enable);
126 }
127
128 so->pipe = *cso;
129
130 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1);
131 SB_DATA (so, !cso->independent_blend_enable);
132
133 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1);
134 SB_DATA (so, !cso->independent_blend_enable);
135
136 if (cso->independent_blend_enable) {
137 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8);
138 for (i = 0; i < 8; ++i) {
139 SB_DATA(so, cso->rt[i].blend_enable);
140 if (cso->rt[i].blend_enable)
141 emit_common_func = true;
142 }
143
144 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
145 emit_common_func = false;
146
147 for (i = 0; i < 8; ++i) {
148 if (!cso->rt[i].blend_enable)
149 continue;
150 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6);
151 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
152 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor));
153 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor));
154 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
155 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor));
156 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor));
157 }
158 }
159 } else {
160 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1);
161 SB_DATA (so, cso->rt[0].blend_enable);
162 }
163
164 if (emit_common_func) {
165 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
166 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
167 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor));
168 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor));
169 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
170 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor));
171 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
172 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor));
173 }
174
175 if (cso->logicop_enable) {
176 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
177 SB_DATA (so, 1);
178 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
179 } else {
180 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1);
181 SB_DATA (so, 0);
182 }
183
184 if (cso->independent_blend_enable) {
185 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
186 for (i = 0; i < 8; ++i)
187 SB_DATA(so, nv50_colormask(cso->rt[i].colormask));
188 } else {
189 SB_BEGIN_3D(so, COLOR_MASK(0), 1);
190 SB_DATA (so, nv50_colormask(cso->rt[0].colormask));
191 }
192
193 assert(so->size <= ARRAY_SIZE(so->state));
194 return so;
195 }
196
197 static void
198 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso)
199 {
200 struct nv50_context *nv50 = nv50_context(pipe);
201
202 nv50->blend = hwcso;
203 nv50->dirty_3d |= NV50_NEW_3D_BLEND;
204 }
205
206 static void
207 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
208 {
209 FREE(hwcso);
210 }
211
212 /* NOTE: ignoring line_last_pixel */
213 static void *
214 nv50_rasterizer_state_create(struct pipe_context *pipe,
215 const struct pipe_rasterizer_state *cso)
216 {
217 struct nv50_rasterizer_stateobj *so;
218 uint32_t reg;
219
220 so = CALLOC_STRUCT(nv50_rasterizer_stateobj);
221 if (!so)
222 return NULL;
223 so->pipe = *cso;
224
225 #ifndef NV50_SCISSORS_CLIPPING
226 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) {
227 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1);
228 SB_DATA (so, cso->scissor);
229 }
230 #endif
231
232 SB_BEGIN_3D(so, SHADE_MODEL, 1);
233 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT :
234 NV50_3D_SHADE_MODEL_SMOOTH);
235 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1);
236 SB_DATA (so, !cso->flatshade_first);
237 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1);
238 SB_DATA (so, cso->light_twoside);
239
240 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
241 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
242
243 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1);
244 SB_DATA (so, cso->multisample);
245
246 SB_BEGIN_3D(so, LINE_WIDTH, 1);
247 SB_DATA (so, fui(cso->line_width));
248 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1);
249 SB_DATA (so, cso->line_smooth);
250
251 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
252 if (cso->line_stipple_enable) {
253 SB_DATA (so, 1);
254 SB_BEGIN_3D(so, LINE_STIPPLE, 1);
255 SB_DATA (so, (cso->line_stipple_pattern << 8) |
256 cso->line_stipple_factor);
257 } else {
258 SB_DATA (so, 0);
259 }
260
261 if (!cso->point_size_per_vertex) {
262 SB_BEGIN_3D(so, POINT_SIZE, 1);
263 SB_DATA (so, fui(cso->point_size));
264 }
265 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1);
266 SB_DATA (so, cso->point_quad_rasterization);
267 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1);
268 SB_DATA (so, cso->point_smooth);
269
270 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3);
271 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
272 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
273 SB_DATA (so, cso->poly_smooth);
274
275 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
276 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
277 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW :
278 NV50_3D_FRONT_FACE_CW);
279 switch (cso->cull_face) {
280 case PIPE_FACE_FRONT_AND_BACK:
281 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK);
282 break;
283 case PIPE_FACE_FRONT:
284 SB_DATA(so, NV50_3D_CULL_FACE_FRONT);
285 break;
286 case PIPE_FACE_BACK:
287 default:
288 SB_DATA(so, NV50_3D_CULL_FACE_BACK);
289 break;
290 }
291
292 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1);
293 SB_DATA (so, cso->poly_stipple_enable);
294 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
295 SB_DATA (so, cso->offset_point);
296 SB_DATA (so, cso->offset_line);
297 SB_DATA (so, cso->offset_tri);
298
299 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
300 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
301 SB_DATA (so, fui(cso->offset_scale));
302 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
303 SB_DATA (so, fui(cso->offset_units * 2.0f));
304 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
305 SB_DATA (so, fui(cso->offset_clamp));
306 }
307
308 if (cso->depth_clip) {
309 reg = 0;
310 } else {
311 reg =
312 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
313 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
314 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
315 }
316 #ifndef NV50_SCISSORS_CLIPPING
317 reg |=
318 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 |
319 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
320 #endif
321 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
322 SB_DATA (so, reg);
323
324 SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1);
325 SB_DATA (so, cso->clip_halfz);
326
327 SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1);
328 SB_DATA (so, !cso->half_pixel_center);
329
330 assert(so->size <= ARRAY_SIZE(so->state));
331 return (void *)so;
332 }
333
334 static void
335 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
336 {
337 struct nv50_context *nv50 = nv50_context(pipe);
338
339 nv50->rast = hwcso;
340 nv50->dirty_3d |= NV50_NEW_3D_RASTERIZER;
341 }
342
343 static void
344 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
345 {
346 FREE(hwcso);
347 }
348
349 static void *
350 nv50_zsa_state_create(struct pipe_context *pipe,
351 const struct pipe_depth_stencil_alpha_state *cso)
352 {
353 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj);
354
355 so->pipe = *cso;
356
357 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1);
358 SB_DATA (so, cso->depth.writemask);
359 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
360 if (cso->depth.enabled) {
361 SB_DATA (so, 1);
362 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
363 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
364 } else {
365 SB_DATA (so, 0);
366 }
367
368 SB_BEGIN_3D(so, DEPTH_BOUNDS_EN, 1);
369 if (cso->depth.bounds_test) {
370 SB_DATA (so, 1);
371 SB_BEGIN_3D(so, DEPTH_BOUNDS(0), 2);
372 SB_DATA (so, fui(cso->depth.bounds_min));
373 SB_DATA (so, fui(cso->depth.bounds_max));
374 } else {
375 SB_DATA (so, 0);
376 }
377
378 if (cso->stencil[0].enabled) {
379 SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
380 SB_DATA (so, 1);
381 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
382 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
383 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
384 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
385 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
386 SB_DATA (so, cso->stencil[0].writemask);
387 SB_DATA (so, cso->stencil[0].valuemask);
388 } else {
389 SB_BEGIN_3D(so, STENCIL_ENABLE, 1);
390 SB_DATA (so, 0);
391 }
392
393 if (cso->stencil[1].enabled) {
394 assert(cso->stencil[0].enabled);
395 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
396 SB_DATA (so, 1);
397 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
398 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
399 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
400 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
401 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
402 SB_DATA (so, cso->stencil[1].writemask);
403 SB_DATA (so, cso->stencil[1].valuemask);
404 } else {
405 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1);
406 SB_DATA (so, 0);
407 }
408
409 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
410 if (cso->alpha.enabled) {
411 SB_DATA (so, 1);
412 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
413 SB_DATA (so, fui(cso->alpha.ref_value));
414 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
415 } else {
416 SB_DATA (so, 0);
417 }
418
419 SB_BEGIN_3D(so, CB_ADDR, 1);
420 SB_DATA (so, NV50_CB_AUX_ALPHATEST_OFFSET << (8 - 2) | NV50_CB_AUX);
421 SB_BEGIN_3D(so, CB_DATA(0), 1);
422 SB_DATA (so, fui(cso->alpha.ref_value));
423
424 assert(so->size <= ARRAY_SIZE(so->state));
425 return (void *)so;
426 }
427
428 static void
429 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
430 {
431 struct nv50_context *nv50 = nv50_context(pipe);
432
433 nv50->zsa = hwcso;
434 nv50->dirty_3d |= NV50_NEW_3D_ZSA;
435 }
436
437 static void
438 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
439 {
440 FREE(hwcso);
441 }
442
443 /* ====================== SAMPLERS AND TEXTURES ================================
444 */
445
446 static inline unsigned
447 nv50_tsc_wrap_mode(unsigned wrap)
448 {
449 switch (wrap) {
450 case PIPE_TEX_WRAP_REPEAT:
451 return G80_TSC_WRAP_WRAP;
452 case PIPE_TEX_WRAP_MIRROR_REPEAT:
453 return G80_TSC_WRAP_MIRROR;
454 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
455 return G80_TSC_WRAP_CLAMP_TO_EDGE;
456 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
457 return G80_TSC_WRAP_BORDER;
458 case PIPE_TEX_WRAP_CLAMP:
459 return G80_TSC_WRAP_CLAMP_OGL;
460 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
461 return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_TO_EDGE;
462 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
463 return G80_TSC_WRAP_MIRROR_ONCE_BORDER;
464 case PIPE_TEX_WRAP_MIRROR_CLAMP:
465 return G80_TSC_WRAP_MIRROR_ONCE_CLAMP_OGL;
466 default:
467 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
468 return G80_TSC_WRAP_WRAP;
469 }
470 }
471
472 void *
473 nv50_sampler_state_create(struct pipe_context *pipe,
474 const struct pipe_sampler_state *cso)
475 {
476 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry);
477 float f[2];
478
479 so->id = -1;
480
481 so->tsc[0] = (0x00026000 |
482 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
483 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
484 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
485
486 switch (cso->mag_img_filter) {
487 case PIPE_TEX_FILTER_LINEAR:
488 so->tsc[1] = G80_TSC_1_MAG_FILTER_LINEAR;
489 break;
490 case PIPE_TEX_FILTER_NEAREST:
491 default:
492 so->tsc[1] = G80_TSC_1_MAG_FILTER_NEAREST;
493 break;
494 }
495
496 switch (cso->min_img_filter) {
497 case PIPE_TEX_FILTER_LINEAR:
498 so->tsc[1] |= G80_TSC_1_MIN_FILTER_LINEAR;
499 break;
500 case PIPE_TEX_FILTER_NEAREST:
501 default:
502 so->tsc[1] |= G80_TSC_1_MIN_FILTER_NEAREST;
503 break;
504 }
505
506 switch (cso->min_mip_filter) {
507 case PIPE_TEX_MIPFILTER_LINEAR:
508 so->tsc[1] |= G80_TSC_1_MIP_FILTER_LINEAR;
509 break;
510 case PIPE_TEX_MIPFILTER_NEAREST:
511 so->tsc[1] |= G80_TSC_1_MIP_FILTER_NEAREST;
512 break;
513 case PIPE_TEX_MIPFILTER_NONE:
514 default:
515 so->tsc[1] |= G80_TSC_1_MIP_FILTER_NONE;
516 break;
517 }
518
519 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
520 if (cso->seamless_cube_map)
521 so->tsc[1] |= GK104_TSC_1_CUBEMAP_INTERFACE_FILTERING;
522 if (!cso->normalized_coords)
523 so->tsc[1] |= GK104_TSC_1_FLOAT_COORD_NORMALIZATION_FORCE_UNNORMALIZED_COORDS;
524 } else {
525 so->seamless_cube_map = cso->seamless_cube_map;
526 }
527
528 if (cso->max_anisotropy >= 16)
529 so->tsc[0] |= (7 << 20);
530 else
531 if (cso->max_anisotropy >= 12)
532 so->tsc[0] |= (6 << 20);
533 else {
534 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
535
536 if (cso->max_anisotropy >= 4)
537 so->tsc[1] |= 6 << G80_TSC_1_TRILIN_OPT__SHIFT;
538 else
539 if (cso->max_anisotropy >= 2)
540 so->tsc[1] |= 4 << G80_TSC_1_TRILIN_OPT__SHIFT;
541 }
542
543 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
544 /* NOTE: must be deactivated for non-shadow textures */
545 so->tsc[0] |= (1 << 9);
546 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
547 }
548
549 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
550 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
551
552 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
553 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
554 so->tsc[2] =
555 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
556
557 so->tsc[2] |=
558 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24;
559 so->tsc[3] =
560 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12;
561 so->tsc[3] |=
562 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20;
563
564 so->tsc[4] = fui(cso->border_color.f[0]);
565 so->tsc[5] = fui(cso->border_color.f[1]);
566 so->tsc[6] = fui(cso->border_color.f[2]);
567 so->tsc[7] = fui(cso->border_color.f[3]);
568
569 return (void *)so;
570 }
571
572 static void
573 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
574 {
575 unsigned s, i;
576
577 for (s = 0; s < 3; ++s) {
578 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS);
579 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i)
580 if (nv50_context(pipe)->samplers[s][i] == hwcso)
581 nv50_context(pipe)->samplers[s][i] = NULL;
582 }
583
584 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso));
585
586 FREE(hwcso);
587 }
588
589 static inline void
590 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
591 unsigned nr, void **hwcso)
592 {
593 unsigned i;
594
595 assert(nr <= PIPE_MAX_SAMPLERS);
596 for (i = 0; i < nr; ++i) {
597 struct nv50_tsc_entry *old = nv50->samplers[s][i];
598
599 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
600 if (old)
601 nv50_screen_tsc_unlock(nv50->screen, old);
602 }
603 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
604 for (; i < nv50->num_samplers[s]; ++i) {
605 if (nv50->samplers[s][i]) {
606 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
607 nv50->samplers[s][i] = NULL;
608 }
609 }
610
611 nv50->num_samplers[s] = nr;
612
613 nv50->dirty_3d |= NV50_NEW_3D_SAMPLERS;
614 }
615
616 static void
617 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
618 {
619 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s);
620 }
621
622 static void
623 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
624 {
625 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s);
626 }
627
628 static void
629 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
630 {
631 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s);
632 }
633
634 static void
635 nv50_bind_sampler_states(struct pipe_context *pipe,
636 enum pipe_shader_type shader, unsigned start,
637 unsigned num_samplers, void **samplers)
638 {
639 assert(start == 0);
640 switch (shader) {
641 case PIPE_SHADER_VERTEX:
642 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers);
643 break;
644 case PIPE_SHADER_GEOMETRY:
645 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers);
646 break;
647 case PIPE_SHADER_FRAGMENT:
648 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers);
649 break;
650 default:
651 assert(!"unexpected shader type");
652 break;
653 }
654 }
655
656
657
658 /* NOTE: only called when not referenced anywhere, won't be bound */
659 static void
660 nv50_sampler_view_destroy(struct pipe_context *pipe,
661 struct pipe_sampler_view *view)
662 {
663 pipe_resource_reference(&view->texture, NULL);
664
665 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view));
666
667 FREE(nv50_tic_entry(view));
668 }
669
670 static inline void
671 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s,
672 unsigned nr,
673 struct pipe_sampler_view **views)
674 {
675 unsigned i;
676
677 assert(nr <= PIPE_MAX_SAMPLERS);
678 for (i = 0; i < nr; ++i) {
679 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
680 if (old)
681 nv50_screen_tic_unlock(nv50->screen, old);
682
683 if (views[i] && views[i]->texture) {
684 struct pipe_resource *res = views[i]->texture;
685 if (res->target == PIPE_BUFFER &&
686 (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT))
687 nv50->textures_coherent[s] |= 1 << i;
688 else
689 nv50->textures_coherent[s] &= ~(1 << i);
690 } else {
691 nv50->textures_coherent[s] &= ~(1 << i);
692 }
693
694 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]);
695 }
696
697 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
698 for (i = nr; i < nv50->num_textures[s]; ++i) {
699 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
700 if (!old)
701 continue;
702 nv50_screen_tic_unlock(nv50->screen, old);
703
704 pipe_sampler_view_reference(&nv50->textures[s][i], NULL);
705 }
706
707 nv50->num_textures[s] = nr;
708
709 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_TEXTURES);
710
711 nv50->dirty_3d |= NV50_NEW_3D_TEXTURES;
712 }
713
714 static void
715 nv50_set_sampler_views(struct pipe_context *pipe, enum pipe_shader_type shader,
716 unsigned start, unsigned nr,
717 struct pipe_sampler_view **views)
718 {
719 assert(start == 0);
720 switch (shader) {
721 case PIPE_SHADER_VERTEX:
722 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views);
723 break;
724 case PIPE_SHADER_GEOMETRY:
725 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views);
726 break;
727 case PIPE_SHADER_FRAGMENT:
728 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views);
729 break;
730 default:
731 ;
732 }
733 }
734
735
736
737 /* ============================= SHADERS =======================================
738 */
739
740 static void *
741 nv50_sp_state_create(struct pipe_context *pipe,
742 const struct pipe_shader_state *cso, unsigned type)
743 {
744 struct nv50_program *prog;
745
746 prog = CALLOC_STRUCT(nv50_program);
747 if (!prog)
748 return NULL;
749
750 prog->type = type;
751 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
752
753 if (cso->stream_output.num_outputs)
754 prog->pipe.stream_output = cso->stream_output;
755
756 prog->translated = nv50_program_translate(
757 prog, nv50_context(pipe)->screen->base.device->chipset,
758 &nouveau_context(pipe)->debug);
759
760 return (void *)prog;
761 }
762
763 static void
764 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso)
765 {
766 struct nv50_program *prog = (struct nv50_program *)hwcso;
767
768 nv50_program_destroy(nv50_context(pipe), prog);
769
770 FREE((void *)prog->pipe.tokens);
771 FREE(prog);
772 }
773
774 static void *
775 nv50_vp_state_create(struct pipe_context *pipe,
776 const struct pipe_shader_state *cso)
777 {
778 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
779 }
780
781 static void
782 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso)
783 {
784 struct nv50_context *nv50 = nv50_context(pipe);
785
786 nv50->vertprog = hwcso;
787 nv50->dirty_3d |= NV50_NEW_3D_VERTPROG;
788 }
789
790 static void *
791 nv50_fp_state_create(struct pipe_context *pipe,
792 const struct pipe_shader_state *cso)
793 {
794 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
795 }
796
797 static void
798 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso)
799 {
800 struct nv50_context *nv50 = nv50_context(pipe);
801
802 nv50->fragprog = hwcso;
803 nv50->dirty_3d |= NV50_NEW_3D_FRAGPROG;
804 }
805
806 static void *
807 nv50_gp_state_create(struct pipe_context *pipe,
808 const struct pipe_shader_state *cso)
809 {
810 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
811 }
812
813 static void
814 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso)
815 {
816 struct nv50_context *nv50 = nv50_context(pipe);
817
818 nv50->gmtyprog = hwcso;
819 nv50->dirty_3d |= NV50_NEW_3D_GMTYPROG;
820 }
821
822 static void *
823 nv50_cp_state_create(struct pipe_context *pipe,
824 const struct pipe_compute_state *cso)
825 {
826 struct nv50_program *prog;
827
828 prog = CALLOC_STRUCT(nv50_program);
829 if (!prog)
830 return NULL;
831 prog->type = PIPE_SHADER_COMPUTE;
832
833 prog->cp.smem_size = cso->req_local_mem;
834 prog->cp.lmem_size = cso->req_private_mem;
835 prog->parm_size = cso->req_input_mem;
836
837 prog->pipe.tokens = tgsi_dup_tokens((const struct tgsi_token *)cso->prog);
838
839 return (void *)prog;
840 }
841
842 static void
843 nv50_cp_state_bind(struct pipe_context *pipe, void *hwcso)
844 {
845 struct nv50_context *nv50 = nv50_context(pipe);
846
847 nv50->compprog = hwcso;
848 nv50->dirty_cp |= NV50_NEW_CP_PROGRAM;
849 }
850
851 static void
852 nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
853 const struct pipe_constant_buffer *cb)
854 {
855 struct nv50_context *nv50 = nv50_context(pipe);
856 struct pipe_resource *res = cb ? cb->buffer : NULL;
857 const unsigned s = nv50_context_shader_stage(shader);
858 const unsigned i = index;
859
860 if (shader == PIPE_SHADER_COMPUTE)
861 return;
862
863 assert(i < NV50_MAX_PIPE_CONSTBUFS);
864 if (nv50->constbuf[s][i].user)
865 nv50->constbuf[s][i].u.buf = NULL;
866 else
867 if (nv50->constbuf[s][i].u.buf) {
868 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_CB(s, i));
869 nv04_resource(nv50->constbuf[s][i].u.buf)->cb_bindings[s] &= ~(1 << i);
870 }
871 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res);
872
873 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false;
874 if (nv50->constbuf[s][i].user) {
875 nv50->constbuf[s][i].u.data = cb->user_buffer;
876 nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
877 nv50->constbuf_valid[s] |= 1 << i;
878 nv50->constbuf_coherent[s] &= ~(1 << i);
879 } else
880 if (res) {
881 nv50->constbuf[s][i].offset = cb->buffer_offset;
882 nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
883 nv50->constbuf_valid[s] |= 1 << i;
884 if (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
885 nv50->constbuf_coherent[s] |= 1 << i;
886 else
887 nv50->constbuf_coherent[s] &= ~(1 << i);
888 } else {
889 nv50->constbuf_valid[s] &= ~(1 << i);
890 nv50->constbuf_coherent[s] &= ~(1 << i);
891 }
892 nv50->constbuf_dirty[s] |= 1 << i;
893
894 nv50->dirty_3d |= NV50_NEW_3D_CONSTBUF;
895 }
896
897 /* =============================================================================
898 */
899
900 static void
901 nv50_set_blend_color(struct pipe_context *pipe,
902 const struct pipe_blend_color *bcol)
903 {
904 struct nv50_context *nv50 = nv50_context(pipe);
905
906 nv50->blend_colour = *bcol;
907 nv50->dirty_3d |= NV50_NEW_3D_BLEND_COLOUR;
908 }
909
910 static void
911 nv50_set_stencil_ref(struct pipe_context *pipe,
912 const struct pipe_stencil_ref *sr)
913 {
914 struct nv50_context *nv50 = nv50_context(pipe);
915
916 nv50->stencil_ref = *sr;
917 nv50->dirty_3d |= NV50_NEW_3D_STENCIL_REF;
918 }
919
920 static void
921 nv50_set_clip_state(struct pipe_context *pipe,
922 const struct pipe_clip_state *clip)
923 {
924 struct nv50_context *nv50 = nv50_context(pipe);
925
926 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp));
927
928 nv50->dirty_3d |= NV50_NEW_3D_CLIP;
929 }
930
931 static void
932 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
933 {
934 struct nv50_context *nv50 = nv50_context(pipe);
935
936 nv50->sample_mask = sample_mask;
937 nv50->dirty_3d |= NV50_NEW_3D_SAMPLE_MASK;
938 }
939
940 static void
941 nv50_set_min_samples(struct pipe_context *pipe, unsigned min_samples)
942 {
943 struct nv50_context *nv50 = nv50_context(pipe);
944
945 if (nv50->min_samples != min_samples) {
946 nv50->min_samples = min_samples;
947 nv50->dirty_3d |= NV50_NEW_3D_MIN_SAMPLES;
948 }
949 }
950
951 static void
952 nv50_set_framebuffer_state(struct pipe_context *pipe,
953 const struct pipe_framebuffer_state *fb)
954 {
955 struct nv50_context *nv50 = nv50_context(pipe);
956
957 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_FB);
958
959 util_copy_framebuffer_state(&nv50->framebuffer, fb);
960
961 nv50->dirty_3d |= NV50_NEW_3D_FRAMEBUFFER;
962 }
963
964 static void
965 nv50_set_polygon_stipple(struct pipe_context *pipe,
966 const struct pipe_poly_stipple *stipple)
967 {
968 struct nv50_context *nv50 = nv50_context(pipe);
969
970 nv50->stipple = *stipple;
971 nv50->dirty_3d |= NV50_NEW_3D_STIPPLE;
972 }
973
974 static void
975 nv50_set_scissor_states(struct pipe_context *pipe,
976 unsigned start_slot,
977 unsigned num_scissors,
978 const struct pipe_scissor_state *scissor)
979 {
980 struct nv50_context *nv50 = nv50_context(pipe);
981 int i;
982
983 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS);
984 for (i = 0; i < num_scissors; i++) {
985 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor)))
986 continue;
987 nv50->scissors[start_slot + i] = scissor[i];
988 nv50->scissors_dirty |= 1 << (start_slot + i);
989 nv50->dirty_3d |= NV50_NEW_3D_SCISSOR;
990 }
991 }
992
993 static void
994 nv50_set_viewport_states(struct pipe_context *pipe,
995 unsigned start_slot,
996 unsigned num_viewports,
997 const struct pipe_viewport_state *vpt)
998 {
999 struct nv50_context *nv50 = nv50_context(pipe);
1000 int i;
1001
1002 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS);
1003 for (i = 0; i < num_viewports; i++) {
1004 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt)))
1005 continue;
1006 nv50->viewports[start_slot + i] = vpt[i];
1007 nv50->viewports_dirty |= 1 << (start_slot + i);
1008 nv50->dirty_3d |= NV50_NEW_3D_VIEWPORT;
1009 }
1010 }
1011
1012 static void
1013 nv50_set_window_rectangles(struct pipe_context *pipe,
1014 boolean include,
1015 unsigned num_rectangles,
1016 const struct pipe_scissor_state *rectangles)
1017 {
1018 struct nv50_context *nv50 = nv50_context(pipe);
1019
1020 nv50->window_rect.inclusive = include;
1021 nv50->window_rect.rects = MIN2(num_rectangles, NV50_MAX_WINDOW_RECTANGLES);
1022 memcpy(nv50->window_rect.rect, rectangles,
1023 sizeof(struct pipe_scissor_state) * nv50->window_rect.rects);
1024
1025 nv50->dirty_3d |= NV50_NEW_3D_WINDOW_RECTS;
1026 }
1027
1028 static void
1029 nv50_set_vertex_buffers(struct pipe_context *pipe,
1030 unsigned start_slot, unsigned count,
1031 const struct pipe_vertex_buffer *vb)
1032 {
1033 struct nv50_context *nv50 = nv50_context(pipe);
1034 unsigned i;
1035
1036 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_VERTEX);
1037 nv50->dirty_3d |= NV50_NEW_3D_ARRAYS;
1038
1039 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb,
1040 start_slot, count);
1041
1042 if (!vb) {
1043 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot);
1044 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot);
1045 nv50->vtxbufs_coherent &= ~(((1ull << count) - 1) << start_slot);
1046 return;
1047 }
1048
1049 for (i = 0; i < count; ++i) {
1050 unsigned dst_index = start_slot + i;
1051
1052 if (!vb[i].buffer && vb[i].user_buffer) {
1053 nv50->vbo_user |= 1 << dst_index;
1054 if (!vb[i].stride)
1055 nv50->vbo_constant |= 1 << dst_index;
1056 else
1057 nv50->vbo_constant &= ~(1 << dst_index);
1058 nv50->vtxbufs_coherent &= ~(1 << dst_index);
1059 } else {
1060 nv50->vbo_user &= ~(1 << dst_index);
1061 nv50->vbo_constant &= ~(1 << dst_index);
1062
1063 if (vb[i].buffer &&
1064 vb[i].buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
1065 nv50->vtxbufs_coherent |= (1 << dst_index);
1066 else
1067 nv50->vtxbufs_coherent &= ~(1 << dst_index);
1068 }
1069 }
1070 }
1071
1072 static void
1073 nv50_set_index_buffer(struct pipe_context *pipe,
1074 const struct pipe_index_buffer *ib)
1075 {
1076 struct nv50_context *nv50 = nv50_context(pipe);
1077
1078 if (nv50->idxbuf.buffer)
1079 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_INDEX);
1080
1081 if (ib) {
1082 pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer);
1083 nv50->idxbuf.index_size = ib->index_size;
1084 if (ib->buffer) {
1085 nv50->idxbuf.offset = ib->offset;
1086 BCTX_REFN(nv50->bufctx_3d, 3D_INDEX, nv04_resource(ib->buffer), RD);
1087 } else {
1088 nv50->idxbuf.user_buffer = ib->user_buffer;
1089 }
1090 } else {
1091 pipe_resource_reference(&nv50->idxbuf.buffer, NULL);
1092 }
1093 }
1094
1095 static void
1096 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
1097 {
1098 struct nv50_context *nv50 = nv50_context(pipe);
1099
1100 nv50->vertex = hwcso;
1101 nv50->dirty_3d |= NV50_NEW_3D_VERTEX;
1102 }
1103
1104 static struct pipe_stream_output_target *
1105 nv50_so_target_create(struct pipe_context *pipe,
1106 struct pipe_resource *res,
1107 unsigned offset, unsigned size)
1108 {
1109 struct nv04_resource *buf = (struct nv04_resource *)res;
1110 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target);
1111 if (!targ)
1112 return NULL;
1113
1114 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) {
1115 targ->pq = pipe->create_query(pipe,
1116 NVA0_HW_QUERY_STREAM_OUTPUT_BUFFER_OFFSET, 0);
1117 if (!targ->pq) {
1118 FREE(targ);
1119 return NULL;
1120 }
1121 } else {
1122 targ->pq = NULL;
1123 }
1124 targ->clean = true;
1125
1126 targ->pipe.buffer_size = size;
1127 targ->pipe.buffer_offset = offset;
1128 targ->pipe.context = pipe;
1129 targ->pipe.buffer = NULL;
1130 pipe_resource_reference(&targ->pipe.buffer, res);
1131 pipe_reference_init(&targ->pipe.reference, 1);
1132
1133 assert(buf->base.target == PIPE_BUFFER);
1134 util_range_add(&buf->valid_buffer_range, offset, offset + size);
1135
1136 return &targ->pipe;
1137 }
1138
1139 static void
1140 nva0_so_target_save_offset(struct pipe_context *pipe,
1141 struct pipe_stream_output_target *ptarg,
1142 unsigned index, bool serialize)
1143 {
1144 struct nv50_so_target *targ = nv50_so_target(ptarg);
1145
1146 if (serialize) {
1147 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf;
1148 PUSH_SPACE(push, 2);
1149 BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1);
1150 PUSH_DATA (push, 0);
1151 }
1152
1153 nv50_query(targ->pq)->index = index;
1154 pipe->end_query(pipe, targ->pq);
1155 }
1156
1157 static void
1158 nv50_so_target_destroy(struct pipe_context *pipe,
1159 struct pipe_stream_output_target *ptarg)
1160 {
1161 struct nv50_so_target *targ = nv50_so_target(ptarg);
1162 if (targ->pq)
1163 pipe->destroy_query(pipe, targ->pq);
1164 pipe_resource_reference(&targ->pipe.buffer, NULL);
1165 FREE(targ);
1166 }
1167
1168 static void
1169 nv50_set_stream_output_targets(struct pipe_context *pipe,
1170 unsigned num_targets,
1171 struct pipe_stream_output_target **targets,
1172 const unsigned *offsets)
1173 {
1174 struct nv50_context *nv50 = nv50_context(pipe);
1175 unsigned i;
1176 bool serialize = true;
1177 const bool can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS;
1178
1179 assert(num_targets <= 4);
1180
1181 for (i = 0; i < num_targets; ++i) {
1182 const bool changed = nv50->so_target[i] != targets[i];
1183 const bool append = (offsets[i] == (unsigned)-1);
1184 if (!changed && append)
1185 continue;
1186 nv50->so_targets_dirty |= 1 << i;
1187
1188 if (can_resume && changed && nv50->so_target[i]) {
1189 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1190 serialize = false;
1191 }
1192
1193 if (targets[i] && !append)
1194 nv50_so_target(targets[i])->clean = true;
1195
1196 pipe_so_target_reference(&nv50->so_target[i], targets[i]);
1197 }
1198 for (; i < nv50->num_so_targets; ++i) {
1199 if (can_resume && nv50->so_target[i]) {
1200 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1201 serialize = false;
1202 }
1203 pipe_so_target_reference(&nv50->so_target[i], NULL);
1204 nv50->so_targets_dirty |= 1 << i;
1205 }
1206 nv50->num_so_targets = num_targets;
1207
1208 if (nv50->so_targets_dirty) {
1209 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_3D_SO);
1210 nv50->dirty_3d |= NV50_NEW_3D_STRMOUT;
1211 }
1212 }
1213
1214 static void
1215 nv50_set_compute_resources(struct pipe_context *pipe,
1216 unsigned start, unsigned nr,
1217 struct pipe_surface **resources)
1218 {
1219 /* TODO: bind surfaces */
1220 }
1221
1222 static inline void
1223 nv50_set_global_handle(uint32_t *phandle, struct pipe_resource *res)
1224 {
1225 struct nv04_resource *buf = nv04_resource(res);
1226 if (buf) {
1227 uint64_t limit = (buf->address + buf->base.width0) - 1;
1228 if (limit < (1ULL << 32)) {
1229 *phandle = (uint32_t)buf->address;
1230 } else {
1231 NOUVEAU_ERR("Cannot map into TGSI_RESOURCE_GLOBAL: "
1232 "resource not contained within 32-bit address space !\n");
1233 *phandle = 0;
1234 }
1235 } else {
1236 *phandle = 0;
1237 }
1238 }
1239
1240 static void
1241 nv50_set_global_bindings(struct pipe_context *pipe,
1242 unsigned start, unsigned nr,
1243 struct pipe_resource **resources,
1244 uint32_t **handles)
1245 {
1246 struct nv50_context *nv50 = nv50_context(pipe);
1247 struct pipe_resource **ptr;
1248 unsigned i;
1249 const unsigned end = start + nr;
1250
1251 if (nv50->global_residents.size <= (end * sizeof(struct pipe_resource *))) {
1252 const unsigned old_size = nv50->global_residents.size;
1253 const unsigned req_size = end * sizeof(struct pipe_resource *);
1254 util_dynarray_resize(&nv50->global_residents, req_size);
1255 memset((uint8_t *)nv50->global_residents.data + old_size, 0,
1256 req_size - old_size);
1257 }
1258
1259 if (resources) {
1260 ptr = util_dynarray_element(
1261 &nv50->global_residents, struct pipe_resource *, start);
1262 for (i = 0; i < nr; ++i) {
1263 pipe_resource_reference(&ptr[i], resources[i]);
1264 nv50_set_global_handle(handles[i], resources[i]);
1265 }
1266 } else {
1267 ptr = util_dynarray_element(
1268 &nv50->global_residents, struct pipe_resource *, start);
1269 for (i = 0; i < nr; ++i)
1270 pipe_resource_reference(&ptr[i], NULL);
1271 }
1272
1273 nouveau_bufctx_reset(nv50->bufctx_cp, NV50_BIND_CP_GLOBAL);
1274
1275 nv50->dirty_cp |= NV50_NEW_CP_GLOBALS;
1276 }
1277
1278 void
1279 nv50_init_state_functions(struct nv50_context *nv50)
1280 {
1281 struct pipe_context *pipe = &nv50->base.pipe;
1282
1283 pipe->create_blend_state = nv50_blend_state_create;
1284 pipe->bind_blend_state = nv50_blend_state_bind;
1285 pipe->delete_blend_state = nv50_blend_state_delete;
1286
1287 pipe->create_rasterizer_state = nv50_rasterizer_state_create;
1288 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind;
1289 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete;
1290
1291 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create;
1292 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind;
1293 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete;
1294
1295 pipe->create_sampler_state = nv50_sampler_state_create;
1296 pipe->delete_sampler_state = nv50_sampler_state_delete;
1297 pipe->bind_sampler_states = nv50_bind_sampler_states;
1298
1299 pipe->create_sampler_view = nv50_create_sampler_view;
1300 pipe->sampler_view_destroy = nv50_sampler_view_destroy;
1301 pipe->set_sampler_views = nv50_set_sampler_views;
1302
1303 pipe->create_vs_state = nv50_vp_state_create;
1304 pipe->create_fs_state = nv50_fp_state_create;
1305 pipe->create_gs_state = nv50_gp_state_create;
1306 pipe->create_compute_state = nv50_cp_state_create;
1307 pipe->bind_vs_state = nv50_vp_state_bind;
1308 pipe->bind_fs_state = nv50_fp_state_bind;
1309 pipe->bind_gs_state = nv50_gp_state_bind;
1310 pipe->bind_compute_state = nv50_cp_state_bind;
1311 pipe->delete_vs_state = nv50_sp_state_delete;
1312 pipe->delete_fs_state = nv50_sp_state_delete;
1313 pipe->delete_gs_state = nv50_sp_state_delete;
1314 pipe->delete_compute_state = nv50_sp_state_delete;
1315
1316 pipe->set_blend_color = nv50_set_blend_color;
1317 pipe->set_stencil_ref = nv50_set_stencil_ref;
1318 pipe->set_clip_state = nv50_set_clip_state;
1319 pipe->set_sample_mask = nv50_set_sample_mask;
1320 pipe->set_min_samples = nv50_set_min_samples;
1321 pipe->set_constant_buffer = nv50_set_constant_buffer;
1322 pipe->set_framebuffer_state = nv50_set_framebuffer_state;
1323 pipe->set_polygon_stipple = nv50_set_polygon_stipple;
1324 pipe->set_scissor_states = nv50_set_scissor_states;
1325 pipe->set_viewport_states = nv50_set_viewport_states;
1326 pipe->set_window_rectangles = nv50_set_window_rectangles;
1327
1328 pipe->create_vertex_elements_state = nv50_vertex_state_create;
1329 pipe->delete_vertex_elements_state = nv50_vertex_state_delete;
1330 pipe->bind_vertex_elements_state = nv50_vertex_state_bind;
1331
1332 pipe->set_vertex_buffers = nv50_set_vertex_buffers;
1333 pipe->set_index_buffer = nv50_set_index_buffer;
1334
1335 pipe->create_stream_output_target = nv50_so_target_create;
1336 pipe->stream_output_target_destroy = nv50_so_target_destroy;
1337 pipe->set_stream_output_targets = nv50_set_stream_output_targets;
1338
1339 pipe->set_global_binding = nv50_set_global_bindings;
1340 pipe->set_compute_resources = nv50_set_compute_resources;
1341
1342 nv50->sample_mask = ~0;
1343 nv50->min_samples = 1;
1344 }