projects / mesa.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
history | raw | HEAD
nouveau: add valid range tracking to nouveau_buffer
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
27 #include "util/u_format_srgb.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "nv50/nv50_stateobj.h"
32 #include "nv50/nv50_context.h"
33
34 #include "nv50/nv50_3d.xml.h"
35 #include "nv50/nv50_texture.xml.h"
36
37 #include "nouveau_gldefs.h"
38
39 /* Caveats:
40 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
41 * use non-normalized coordinates, everything else won't
42 * (The relevant bit is in the TIC entry and not the TSC entry.)
43 *
44 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
45 * always activated on NVA0 +
46 * (Give me the global bit, otherwise it's not worth the CPU work.)
47 *
48 * ! pipe_sampler_state.border_color is not swizzled according to the texture
49 * swizzle in pipe_sampler_view
50 * (This will be ugly with indirect independent texture/sampler access,
51 * we'd have to emulate the logic in the shader. GL doesn't have that,
52 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
53 * good.)
54 *
55 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
56 *
57 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
58 * (There's a GL query for that, forcing an exception is just ridiculous.)
59 *
60 * ! pipe_rasterizer_state.half_pixel_center is ignored - pixel centers
61 * are always at half integer coordinates and the top-left rule applies
62 * (There does not seem to be a hardware switch for this.)
63 *
64 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
65 * (The hardware only has 8 slots meant for TexCoord and we have to assign
66 * in advance to maintain elegant separate shader objects.)
67 */
68
69 static INLINE uint32_t
70 nv50_colormask(unsigned mask)
71 {
72 uint32_t ret = 0;
73
74 if (mask & PIPE_MASK_R)
75 ret |= 0x0001;
76 if (mask & PIPE_MASK_G)
77 ret |= 0x0010;
78 if (mask & PIPE_MASK_B)
79 ret |= 0x0100;
80 if (mask & PIPE_MASK_A)
81 ret |= 0x1000;
82
83 return ret;
84 }
85
86 #define NV50_BLEND_FACTOR_CASE(a, b) \
87 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
88
89 static INLINE uint32_t
90 nv50_blend_fac(unsigned factor)
91 {
92 switch (factor) {
93 NV50_BLEND_FACTOR_CASE(ONE, ONE);
94 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
95 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
96 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
97 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
98 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
99 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
100 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
101 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
102 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
103 NV50_BLEND_FACTOR_CASE(ZERO, ZERO);
104 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
105 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
106 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
107 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
108 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
109 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
110 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
111 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
112 default:
113 return NV50_3D_BLEND_FACTOR_ZERO;
114 }
115 }
116
117 static void *
118 nv50_blend_state_create(struct pipe_context *pipe,
119 const struct pipe_blend_state *cso)
120 {
121 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj);
122 int i;
123 boolean emit_common_func = cso->rt[0].blend_enable;
124 uint32_t ms;
125
126 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
127 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
128 SB_DATA (so, cso->independent_blend_enable);
129 }
130
131 so->pipe = *cso;
132
133 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1);
134 SB_DATA (so, !cso->independent_blend_enable);
135
136 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1);
137 SB_DATA (so, !cso->independent_blend_enable);
138
139 if (cso->independent_blend_enable) {
140 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8);
141 for (i = 0; i < 8; ++i) {
142 SB_DATA(so, cso->rt[i].blend_enable);
143 if (cso->rt[i].blend_enable)
144 emit_common_func = TRUE;
145 }
146
147 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
148 emit_common_func = FALSE;
149
150 for (i = 0; i < 8; ++i) {
151 if (!cso->rt[i].blend_enable)
152 continue;
153 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6);
154 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
155 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor));
156 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor));
157 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
158 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor));
159 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor));
160 }
161 }
162 } else {
163 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1);
164 SB_DATA (so, cso->rt[0].blend_enable);
165 }
166
167 if (emit_common_func) {
168 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
169 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
170 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor));
171 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor));
172 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
173 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor));
174 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
175 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor));
176 }
177
178 if (cso->logicop_enable) {
179 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
180 SB_DATA (so, 1);
181 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
182 } else {
183 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1);
184 SB_DATA (so, 0);
185 }
186
187 if (cso->independent_blend_enable) {
188 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
189 for (i = 0; i < 8; ++i)
190 SB_DATA(so, nv50_colormask(cso->rt[i].colormask));
191 } else {
192 SB_BEGIN_3D(so, COLOR_MASK(0), 1);
193 SB_DATA (so, nv50_colormask(cso->rt[0].colormask));
194 }
195
196 ms = 0;
197 if (cso->alpha_to_coverage)
198 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_COVERAGE;
199 if (cso->alpha_to_one)
200 ms |= NV50_3D_MULTISAMPLE_CTRL_ALPHA_TO_ONE;
201
202 SB_BEGIN_3D(so, MULTISAMPLE_CTRL, 1);
203 SB_DATA (so, ms);
204
205 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
206 return so;
207 }
208
209 static void
210 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso)
211 {
212 struct nv50_context *nv50 = nv50_context(pipe);
213
214 nv50->blend = hwcso;
215 nv50->dirty |= NV50_NEW_BLEND;
216 }
217
218 static void
219 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
220 {
221 FREE(hwcso);
222 }
223
224 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
225 static void *
226 nv50_rasterizer_state_create(struct pipe_context *pipe,
227 const struct pipe_rasterizer_state *cso)
228 {
229 struct nv50_rasterizer_stateobj *so;
230 uint32_t reg;
231
232 so = CALLOC_STRUCT(nv50_rasterizer_stateobj);
233 if (!so)
234 return NULL;
235 so->pipe = *cso;
236
237 #ifndef NV50_SCISSORS_CLIPPING
238 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) {
239 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1);
240 SB_DATA (so, cso->scissor);
241 }
242 #endif
243
244 SB_BEGIN_3D(so, SHADE_MODEL, 1);
245 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT :
246 NV50_3D_SHADE_MODEL_SMOOTH);
247 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1);
248 SB_DATA (so, !cso->flatshade_first);
249 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1);
250 SB_DATA (so, cso->light_twoside);
251
252 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
253 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
254
255 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1);
256 SB_DATA (so, cso->multisample);
257
258 SB_BEGIN_3D(so, LINE_WIDTH, 1);
259 SB_DATA (so, fui(cso->line_width));
260 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1);
261 SB_DATA (so, cso->line_smooth);
262
263 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
264 if (cso->line_stipple_enable) {
265 SB_DATA (so, 1);
266 SB_BEGIN_3D(so, LINE_STIPPLE, 1);
267 SB_DATA (so, (cso->line_stipple_pattern << 8) |
268 cso->line_stipple_factor);
269 } else {
270 SB_DATA (so, 0);
271 }
272
273 if (!cso->point_size_per_vertex) {
274 SB_BEGIN_3D(so, POINT_SIZE, 1);
275 SB_DATA (so, fui(cso->point_size));
276 }
277 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1);
278 SB_DATA (so, cso->point_quad_rasterization);
279 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1);
280 SB_DATA (so, cso->point_smooth);
281
282 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3);
283 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
284 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
285 SB_DATA (so, cso->poly_smooth);
286
287 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
288 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
289 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW :
290 NV50_3D_FRONT_FACE_CW);
291 switch (cso->cull_face) {
292 case PIPE_FACE_FRONT_AND_BACK:
293 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK);
294 break;
295 case PIPE_FACE_FRONT:
296 SB_DATA(so, NV50_3D_CULL_FACE_FRONT);
297 break;
298 case PIPE_FACE_BACK:
299 default:
300 SB_DATA(so, NV50_3D_CULL_FACE_BACK);
301 break;
302 }
303
304 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1);
305 SB_DATA (so, cso->poly_stipple_enable);
306 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
307 SB_DATA (so, cso->offset_point);
308 SB_DATA (so, cso->offset_line);
309 SB_DATA (so, cso->offset_tri);
310
311 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
312 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
313 SB_DATA (so, fui(cso->offset_scale));
314 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
315 SB_DATA (so, fui(cso->offset_units * 2.0f));
316 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
317 SB_DATA (so, fui(cso->offset_clamp));
318 }
319
320 if (cso->depth_clip) {
321 reg = 0;
322 } else {
323 reg =
324 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
325 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
326 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
327 }
328 #ifndef NV50_SCISSORS_CLIPPING
329 reg |=
330 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 |
331 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
332 #endif
333 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
334 SB_DATA (so, reg);
335
336 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
337 return (void *)so;
338 }
339
340 static void
341 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
342 {
343 struct nv50_context *nv50 = nv50_context(pipe);
344
345 nv50->rast = hwcso;
346 nv50->dirty |= NV50_NEW_RASTERIZER;
347 }
348
349 static void
350 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
351 {
352 FREE(hwcso);
353 }
354
355 static void *
356 nv50_zsa_state_create(struct pipe_context *pipe,
357 const struct pipe_depth_stencil_alpha_state *cso)
358 {
359 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj);
360
361 so->pipe = *cso;
362
363 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1);
364 SB_DATA (so, cso->depth.writemask);
365 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
366 if (cso->depth.enabled) {
367 SB_DATA (so, 1);
368 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
369 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
370 } else {
371 SB_DATA (so, 0);
372 }
373
374 if (cso->stencil[0].enabled) {
375 SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
376 SB_DATA (so, 1);
377 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
378 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
379 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
380 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
381 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
382 SB_DATA (so, cso->stencil[0].writemask);
383 SB_DATA (so, cso->stencil[0].valuemask);
384 } else {
385 SB_BEGIN_3D(so, STENCIL_ENABLE, 1);
386 SB_DATA (so, 0);
387 }
388
389 if (cso->stencil[1].enabled) {
390 assert(cso->stencil[0].enabled);
391 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
392 SB_DATA (so, 1);
393 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
394 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
395 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
396 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
397 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
398 SB_DATA (so, cso->stencil[1].writemask);
399 SB_DATA (so, cso->stencil[1].valuemask);
400 } else {
401 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1);
402 SB_DATA (so, 0);
403 }
404
405 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
406 if (cso->alpha.enabled) {
407 SB_DATA (so, 1);
408 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
409 SB_DATA (so, fui(cso->alpha.ref_value));
410 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
411 } else {
412 SB_DATA (so, 0);
413 }
414
415 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
416 return (void *)so;
417 }
418
419 static void
420 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
421 {
422 struct nv50_context *nv50 = nv50_context(pipe);
423
424 nv50->zsa = hwcso;
425 nv50->dirty |= NV50_NEW_ZSA;
426 }
427
428 static void
429 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
430 {
431 FREE(hwcso);
432 }
433
434 /* ====================== SAMPLERS AND TEXTURES ================================
435 */
436
437 #define NV50_TSC_WRAP_CASE(n) \
438 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
439
440 static INLINE unsigned
441 nv50_tsc_wrap_mode(unsigned wrap)
442 {
443 switch (wrap) {
444 NV50_TSC_WRAP_CASE(REPEAT);
445 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
446 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
447 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
448 NV50_TSC_WRAP_CASE(CLAMP);
449 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
450 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
451 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
452 default:
453 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
454 return NV50_TSC_WRAP_REPEAT;
455 }
456 }
457
458 void *
459 nv50_sampler_state_create(struct pipe_context *pipe,
460 const struct pipe_sampler_state *cso)
461 {
462 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry);
463 float f[2];
464
465 so->id = -1;
466
467 so->tsc[0] = (0x00026000 |
468 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
469 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
470 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
471
472 switch (cso->mag_img_filter) {
473 case PIPE_TEX_FILTER_LINEAR:
474 so->tsc[1] = NV50_TSC_1_MAGF_LINEAR;
475 break;
476 case PIPE_TEX_FILTER_NEAREST:
477 default:
478 so->tsc[1] = NV50_TSC_1_MAGF_NEAREST;
479 break;
480 }
481
482 switch (cso->min_img_filter) {
483 case PIPE_TEX_FILTER_LINEAR:
484 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
485 break;
486 case PIPE_TEX_FILTER_NEAREST:
487 default:
488 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
489 break;
490 }
491
492 switch (cso->min_mip_filter) {
493 case PIPE_TEX_MIPFILTER_LINEAR:
494 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
495 break;
496 case PIPE_TEX_MIPFILTER_NEAREST:
497 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
498 break;
499 case PIPE_TEX_MIPFILTER_NONE:
500 default:
501 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
502 break;
503 }
504
505 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
506 if (cso->seamless_cube_map)
507 so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
508 if (!cso->normalized_coords)
509 so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
510 }
511
512 if (cso->max_anisotropy >= 16)
513 so->tsc[0] |= (7 << 20);
514 else
515 if (cso->max_anisotropy >= 12)
516 so->tsc[0] |= (6 << 20);
517 else {
518 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
519
520 if (cso->max_anisotropy >= 4)
521 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
522 else
523 if (cso->max_anisotropy >= 2)
524 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
525 }
526
527 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
528 /* NOTE: must be deactivated for non-shadow textures */
529 so->tsc[0] |= (1 << 9);
530 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
531 }
532
533 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
534 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
535
536 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
537 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
538 so->tsc[2] =
539 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
540
541 so->tsc[2] |=
542 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24;
543 so->tsc[3] =
544 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12;
545 so->tsc[3] |=
546 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20;
547
548 so->tsc[4] = fui(cso->border_color.f[0]);
549 so->tsc[5] = fui(cso->border_color.f[1]);
550 so->tsc[6] = fui(cso->border_color.f[2]);
551 so->tsc[7] = fui(cso->border_color.f[3]);
552
553 return (void *)so;
554 }
555
556 static void
557 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
558 {
559 unsigned s, i;
560
561 for (s = 0; s < 3; ++s)
562 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS);
563 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i)
564 if (nv50_context(pipe)->samplers[s][i] == hwcso)
565 nv50_context(pipe)->samplers[s][i] = NULL;
566
567 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso));
568
569 FREE(hwcso);
570 }
571
572 static INLINE void
573 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
574 unsigned nr, void **hwcso)
575 {
576 unsigned i;
577
578 assert(nr <= PIPE_MAX_SAMPLERS);
579 for (i = 0; i < nr; ++i) {
580 struct nv50_tsc_entry *old = nv50->samplers[s][i];
581
582 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
583 if (old)
584 nv50_screen_tsc_unlock(nv50->screen, old);
585 }
586 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
587 for (; i < nv50->num_samplers[s]; ++i)
588 if (nv50->samplers[s][i])
589 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
590
591 nv50->num_samplers[s] = nr;
592
593 nv50->dirty |= NV50_NEW_SAMPLERS;
594 }
595
596 static void
597 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
598 {
599 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s);
600 }
601
602 static void
603 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
604 {
605 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s);
606 }
607
608 static void
609 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
610 {
611 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s);
612 }
613
614 static void
615 nv50_bind_sampler_states(struct pipe_context *pipe,
616 unsigned shader, unsigned start,
617 unsigned num_samplers, void **samplers)
618 {
619 assert(start == 0);
620 switch (shader) {
621 case PIPE_SHADER_VERTEX:
622 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers);
623 break;
624 case PIPE_SHADER_GEOMETRY:
625 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers);
626 break;
627 case PIPE_SHADER_FRAGMENT:
628 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers);
629 break;
630 }
631 }
632
633
634
635 /* NOTE: only called when not referenced anywhere, won't be bound */
636 static void
637 nv50_sampler_view_destroy(struct pipe_context *pipe,
638 struct pipe_sampler_view *view)
639 {
640 pipe_resource_reference(&view->texture, NULL);
641
642 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view));
643
644 FREE(nv50_tic_entry(view));
645 }
646
647 static INLINE void
648 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s,
649 unsigned nr,
650 struct pipe_sampler_view **views)
651 {
652 unsigned i;
653
654 assert(nr <= PIPE_MAX_SAMPLERS);
655 for (i = 0; i < nr; ++i) {
656 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
657 if (old)
658 nv50_screen_tic_unlock(nv50->screen, old);
659
660 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]);
661 }
662
663 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
664 for (i = nr; i < nv50->num_textures[s]; ++i) {
665 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
666 if (!old)
667 continue;
668 nv50_screen_tic_unlock(nv50->screen, old);
669
670 pipe_sampler_view_reference(&nv50->textures[s][i], NULL);
671 }
672
673 nv50->num_textures[s] = nr;
674
675 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_TEXTURES);
676
677 nv50->dirty |= NV50_NEW_TEXTURES;
678 }
679
680 static void
681 nv50_set_sampler_views(struct pipe_context *pipe, unsigned shader,
682 unsigned start, unsigned nr,
683 struct pipe_sampler_view **views)
684 {
685 assert(start == 0);
686 switch (shader) {
687 case PIPE_SHADER_VERTEX:
688 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views);
689 break;
690 case PIPE_SHADER_GEOMETRY:
691 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views);
692 break;
693 case PIPE_SHADER_FRAGMENT:
694 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views);
695 break;
696 default:
697 ;
698 }
699 }
700
701
702
703 /* ============================= SHADERS =======================================
704 */
705
706 static void *
707 nv50_sp_state_create(struct pipe_context *pipe,
708 const struct pipe_shader_state *cso, unsigned type)
709 {
710 struct nv50_program *prog;
711
712 prog = CALLOC_STRUCT(nv50_program);
713 if (!prog)
714 return NULL;
715
716 prog->type = type;
717 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
718
719 if (cso->stream_output.num_outputs)
720 prog->pipe.stream_output = cso->stream_output;
721
722 return (void *)prog;
723 }
724
725 static void
726 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso)
727 {
728 struct nv50_program *prog = (struct nv50_program *)hwcso;
729
730 nv50_program_destroy(nv50_context(pipe), prog);
731
732 FREE((void *)prog->pipe.tokens);
733 FREE(prog);
734 }
735
736 static void *
737 nv50_vp_state_create(struct pipe_context *pipe,
738 const struct pipe_shader_state *cso)
739 {
740 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
741 }
742
743 static void
744 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso)
745 {
746 struct nv50_context *nv50 = nv50_context(pipe);
747
748 nv50->vertprog = hwcso;
749 nv50->dirty |= NV50_NEW_VERTPROG;
750 }
751
752 static void *
753 nv50_fp_state_create(struct pipe_context *pipe,
754 const struct pipe_shader_state *cso)
755 {
756 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
757 }
758
759 static void
760 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso)
761 {
762 struct nv50_context *nv50 = nv50_context(pipe);
763
764 nv50->fragprog = hwcso;
765 nv50->dirty |= NV50_NEW_FRAGPROG;
766 }
767
768 static void *
769 nv50_gp_state_create(struct pipe_context *pipe,
770 const struct pipe_shader_state *cso)
771 {
772 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
773 }
774
775 static void
776 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso)
777 {
778 struct nv50_context *nv50 = nv50_context(pipe);
779
780 nv50->gmtyprog = hwcso;
781 nv50->dirty |= NV50_NEW_GMTYPROG;
782 }
783
784 static void
785 nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
786 struct pipe_constant_buffer *cb)
787 {
788 struct nv50_context *nv50 = nv50_context(pipe);
789 struct pipe_resource *res = cb ? cb->buffer : NULL;
790 const unsigned s = nv50_context_shader_stage(shader);
791 const unsigned i = index;
792
793 if (shader == PIPE_SHADER_COMPUTE)
794 return;
795
796 assert(i < NV50_MAX_PIPE_CONSTBUFS);
797 if (nv50->constbuf[s][i].user)
798 nv50->constbuf[s][i].u.buf = NULL;
799 else
800 if (nv50->constbuf[s][i].u.buf)
801 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_CB(s, i));
802
803 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res);
804
805 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? TRUE : FALSE;
806 if (nv50->constbuf[s][i].user) {
807 nv50->constbuf[s][i].u.data = cb->user_buffer;
808 nv50->constbuf[s][i].size = cb->buffer_size;
809 nv50->constbuf_valid[s] |= 1 << i;
810 } else
811 if (res) {
812 nv50->constbuf[s][i].offset = cb->buffer_offset;
813 nv50->constbuf[s][i].size = align(cb->buffer_size, 0x100);
814 nv50->constbuf_valid[s] |= 1 << i;
815 } else {
816 nv50->constbuf_valid[s] &= ~(1 << i);
817 }
818 nv50->constbuf_dirty[s] |= 1 << i;
819
820 nv50->dirty |= NV50_NEW_CONSTBUF;
821 }
822
823 /* =============================================================================
824 */
825
826 static void
827 nv50_set_blend_color(struct pipe_context *pipe,
828 const struct pipe_blend_color *bcol)
829 {
830 struct nv50_context *nv50 = nv50_context(pipe);
831
832 nv50->blend_colour = *bcol;
833 nv50->dirty |= NV50_NEW_BLEND_COLOUR;
834 }
835
836 static void
837 nv50_set_stencil_ref(struct pipe_context *pipe,
838 const struct pipe_stencil_ref *sr)
839 {
840 struct nv50_context *nv50 = nv50_context(pipe);
841
842 nv50->stencil_ref = *sr;
843 nv50->dirty |= NV50_NEW_STENCIL_REF;
844 }
845
846 static void
847 nv50_set_clip_state(struct pipe_context *pipe,
848 const struct pipe_clip_state *clip)
849 {
850 struct nv50_context *nv50 = nv50_context(pipe);
851
852 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp));
853
854 nv50->dirty |= NV50_NEW_CLIP;
855 }
856
857 static void
858 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
859 {
860 struct nv50_context *nv50 = nv50_context(pipe);
861
862 nv50->sample_mask = sample_mask;
863 nv50->dirty |= NV50_NEW_SAMPLE_MASK;
864 }
865
866
867 static void
868 nv50_set_framebuffer_state(struct pipe_context *pipe,
869 const struct pipe_framebuffer_state *fb)
870 {
871 struct nv50_context *nv50 = nv50_context(pipe);
872 unsigned i;
873
874 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
875
876 for (i = 0; i < fb->nr_cbufs; ++i)
877 pipe_surface_reference(&nv50->framebuffer.cbufs[i], fb->cbufs[i]);
878 for (; i < nv50->framebuffer.nr_cbufs; ++i)
879 pipe_surface_reference(&nv50->framebuffer.cbufs[i], NULL);
880
881 nv50->framebuffer.nr_cbufs = fb->nr_cbufs;
882
883 nv50->framebuffer.width = fb->width;
884 nv50->framebuffer.height = fb->height;
885
886 pipe_surface_reference(&nv50->framebuffer.zsbuf, fb->zsbuf);
887
888 nv50->dirty |= NV50_NEW_FRAMEBUFFER;
889 }
890
891 static void
892 nv50_set_polygon_stipple(struct pipe_context *pipe,
893 const struct pipe_poly_stipple *stipple)
894 {
895 struct nv50_context *nv50 = nv50_context(pipe);
896
897 nv50->stipple = *stipple;
898 nv50->dirty |= NV50_NEW_STIPPLE;
899 }
900
901 static void
902 nv50_set_scissor_states(struct pipe_context *pipe,
903 unsigned start_slot,
904 unsigned num_scissors,
905 const struct pipe_scissor_state *scissor)
906 {
907 struct nv50_context *nv50 = nv50_context(pipe);
908 int i;
909
910 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS);
911 for (i = 0; i < num_scissors; i++) {
912 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor)))
913 continue;
914 nv50->scissors[start_slot + i] = scissor[i];
915 nv50->scissors_dirty |= 1 << (start_slot + i);
916 nv50->dirty |= NV50_NEW_SCISSOR;
917 }
918 }
919
920 static void
921 nv50_set_viewport_states(struct pipe_context *pipe,
922 unsigned start_slot,
923 unsigned num_viewports,
924 const struct pipe_viewport_state *vpt)
925 {
926 struct nv50_context *nv50 = nv50_context(pipe);
927 int i;
928
929 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS);
930 for (i = 0; i < num_viewports; i++) {
931 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt)))
932 continue;
933 nv50->viewports[start_slot + i] = vpt[i];
934 nv50->viewports_dirty |= 1 << (start_slot + i);
935 nv50->dirty |= NV50_NEW_VIEWPORT;
936 }
937 }
938
939 static void
940 nv50_set_vertex_buffers(struct pipe_context *pipe,
941 unsigned start_slot, unsigned count,
942 const struct pipe_vertex_buffer *vb)
943 {
944 struct nv50_context *nv50 = nv50_context(pipe);
945 unsigned i;
946
947 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb,
948 start_slot, count);
949
950 if (!vb) {
951 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot);
952 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot);
953 return;
954 }
955
956 for (i = 0; i < count; ++i) {
957 unsigned dst_index = start_slot + i;
958
959 if (!vb[i].buffer && vb[i].user_buffer) {
960 nv50->vbo_user |= 1 << dst_index;
961 if (!vb[i].stride)
962 nv50->vbo_constant |= 1 << dst_index;
963 else
964 nv50->vbo_constant &= ~(1 << dst_index);
965 } else {
966 nv50->vbo_user &= ~(1 << dst_index);
967 nv50->vbo_constant &= ~(1 << dst_index);
968 }
969 }
970
971 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_VERTEX);
972
973 nv50->dirty |= NV50_NEW_ARRAYS;
974 }
975
976 static void
977 nv50_set_index_buffer(struct pipe_context *pipe,
978 const struct pipe_index_buffer *ib)
979 {
980 struct nv50_context *nv50 = nv50_context(pipe);
981
982 if (nv50->idxbuf.buffer)
983 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_INDEX);
984
985 if (ib) {
986 pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer);
987 nv50->idxbuf.index_size = ib->index_size;
988 if (ib->buffer) {
989 nv50->idxbuf.offset = ib->offset;
990 BCTX_REFN(nv50->bufctx_3d, INDEX, nv04_resource(ib->buffer), RD);
991 } else {
992 nv50->idxbuf.user_buffer = ib->user_buffer;
993 }
994 } else {
995 pipe_resource_reference(&nv50->idxbuf.buffer, NULL);
996 }
997 }
998
999 static void
1000 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
1001 {
1002 struct nv50_context *nv50 = nv50_context(pipe);
1003
1004 nv50->vertex = hwcso;
1005 nv50->dirty |= NV50_NEW_VERTEX;
1006 }
1007
1008 static struct pipe_stream_output_target *
1009 nv50_so_target_create(struct pipe_context *pipe,
1010 struct pipe_resource *res,
1011 unsigned offset, unsigned size)
1012 {
1013 struct nv04_resource *buf = (struct nv04_resource *)res;
1014 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target);
1015 if (!targ)
1016 return NULL;
1017
1018 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) {
1019 targ->pq = pipe->create_query(pipe,
1020 NVA0_QUERY_STREAM_OUTPUT_BUFFER_OFFSET);
1021 if (!targ->pq) {
1022 FREE(targ);
1023 return NULL;
1024 }
1025 } else {
1026 targ->pq = NULL;
1027 }
1028 targ->clean = TRUE;
1029
1030 targ->pipe.buffer_size = size;
1031 targ->pipe.buffer_offset = offset;
1032 targ->pipe.context = pipe;
1033 targ->pipe.buffer = NULL;
1034 pipe_resource_reference(&targ->pipe.buffer, res);
1035 pipe_reference_init(&targ->pipe.reference, 1);
1036
1037 assert(buf->base.target == PIPE_BUFFER);
1038 util_range_add(&buf->valid_buffer_range, offset, offset + size);
1039
1040 return &targ->pipe;
1041 }
1042
1043 static void
1044 nv50_so_target_destroy(struct pipe_context *pipe,
1045 struct pipe_stream_output_target *ptarg)
1046 {
1047 struct nv50_so_target *targ = nv50_so_target(ptarg);
1048 if (targ->pq)
1049 pipe->destroy_query(pipe, targ->pq);
1050 pipe_resource_reference(&targ->pipe.buffer, NULL);
1051 FREE(targ);
1052 }
1053
1054 static void
1055 nv50_set_stream_output_targets(struct pipe_context *pipe,
1056 unsigned num_targets,
1057 struct pipe_stream_output_target **targets,
1058 unsigned append_mask)
1059 {
1060 struct nv50_context *nv50 = nv50_context(pipe);
1061 unsigned i;
1062 boolean serialize = TRUE;
1063 const boolean can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS;
1064
1065 assert(num_targets <= 4);
1066
1067 for (i = 0; i < num_targets; ++i) {
1068 const boolean changed = nv50->so_target[i] != targets[i];
1069 if (!changed && (append_mask & (1 << i)))
1070 continue;
1071 nv50->so_targets_dirty |= 1 << i;
1072
1073 if (can_resume && changed && nv50->so_target[i]) {
1074 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1075 serialize = FALSE;
1076 }
1077
1078 if (targets[i] && !(append_mask & (1 << i)))
1079 nv50_so_target(targets[i])->clean = TRUE;
1080
1081 pipe_so_target_reference(&nv50->so_target[i], targets[i]);
1082 }
1083 for (; i < nv50->num_so_targets; ++i) {
1084 if (can_resume && nv50->so_target[i]) {
1085 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1086 serialize = FALSE;
1087 }
1088 pipe_so_target_reference(&nv50->so_target[i], NULL);
1089 nv50->so_targets_dirty |= 1 << i;
1090 }
1091 nv50->num_so_targets = num_targets;
1092
1093 if (nv50->so_targets_dirty)
1094 nv50->dirty |= NV50_NEW_STRMOUT;
1095 }
1096
1097 void
1098 nv50_init_state_functions(struct nv50_context *nv50)
1099 {
1100 struct pipe_context *pipe = &nv50->base.pipe;
1101
1102 pipe->create_blend_state = nv50_blend_state_create;
1103 pipe->bind_blend_state = nv50_blend_state_bind;
1104 pipe->delete_blend_state = nv50_blend_state_delete;
1105
1106 pipe->create_rasterizer_state = nv50_rasterizer_state_create;
1107 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind;
1108 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete;
1109
1110 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create;
1111 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind;
1112 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete;
1113
1114 pipe->create_sampler_state = nv50_sampler_state_create;
1115 pipe->delete_sampler_state = nv50_sampler_state_delete;
1116 pipe->bind_sampler_states = nv50_bind_sampler_states;
1117
1118 pipe->create_sampler_view = nv50_create_sampler_view;
1119 pipe->sampler_view_destroy = nv50_sampler_view_destroy;
1120 pipe->set_sampler_views = nv50_set_sampler_views;
1121
1122 pipe->create_vs_state = nv50_vp_state_create;
1123 pipe->create_fs_state = nv50_fp_state_create;
1124 pipe->create_gs_state = nv50_gp_state_create;
1125 pipe->bind_vs_state = nv50_vp_state_bind;
1126 pipe->bind_fs_state = nv50_fp_state_bind;
1127 pipe->bind_gs_state = nv50_gp_state_bind;
1128 pipe->delete_vs_state = nv50_sp_state_delete;
1129 pipe->delete_fs_state = nv50_sp_state_delete;
1130 pipe->delete_gs_state = nv50_sp_state_delete;
1131
1132 pipe->set_blend_color = nv50_set_blend_color;
1133 pipe->set_stencil_ref = nv50_set_stencil_ref;
1134 pipe->set_clip_state = nv50_set_clip_state;
1135 pipe->set_sample_mask = nv50_set_sample_mask;
1136 pipe->set_constant_buffer = nv50_set_constant_buffer;
1137 pipe->set_framebuffer_state = nv50_set_framebuffer_state;
1138 pipe->set_polygon_stipple = nv50_set_polygon_stipple;
1139 pipe->set_scissor_states = nv50_set_scissor_states;
1140 pipe->set_viewport_states = nv50_set_viewport_states;
1141
1142 pipe->create_vertex_elements_state = nv50_vertex_state_create;
1143 pipe->delete_vertex_elements_state = nv50_vertex_state_delete;
1144 pipe->bind_vertex_elements_state = nv50_vertex_state_bind;
1145
1146 pipe->set_vertex_buffers = nv50_set_vertex_buffers;
1147 pipe->set_index_buffer = nv50_set_index_buffer;
1148
1149 pipe->create_stream_output_target = nv50_so_target_create;
1150 pipe->stream_output_target_destroy = nv50_so_target_destroy;
1151 pipe->set_stream_output_targets = nv50_set_stream_output_targets;
1152
1153 nv50->sample_mask = ~0;
1154 }