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Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_helpers.h"
25 #include "util/u_inlines.h"
26 #include "util/u_transfer.h"
27 #include "util/format_srgb.h"
28
29 #include "tgsi/tgsi_parse.h"
30
31 #include "nv50/nv50_stateobj.h"
32 #include "nv50/nv50_context.h"
33 #include "nv50/nv50_query_hw.h"
34
35 #include "nv50/nv50_3d.xml.h"
36 #include "nv50/nv50_texture.xml.h"
37
38 #include "nouveau_gldefs.h"
39
40 /* Caveats:
41 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
42 * use non-normalized coordinates, everything else won't
43 * (The relevant bit is in the TIC entry and not the TSC entry.)
44 *
45 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
46 * always activated on NVA0 +
47 * (Give me the global bit, otherwise it's not worth the CPU work.)
48 *
49 * ! pipe_sampler_state.border_color is not swizzled according to the texture
50 * swizzle in pipe_sampler_view
51 * (This will be ugly with indirect independent texture/sampler access,
52 * we'd have to emulate the logic in the shader. GL doesn't have that,
53 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
54 * good.)
55 *
56 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
57 *
58 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
59 * (There's a GL query for that, forcing an exception is just ridiculous.)
60 *
61 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
62 * (The hardware only has 8 slots meant for TexCoord and we have to assign
63 * in advance to maintain elegant separate shader objects.)
64 */
65
66 static inline uint32_t
67 nv50_colormask(unsigned mask)
68 {
69 uint32_t ret = 0;
70
71 if (mask & PIPE_MASK_R)
72 ret |= 0x0001;
73 if (mask & PIPE_MASK_G)
74 ret |= 0x0010;
75 if (mask & PIPE_MASK_B)
76 ret |= 0x0100;
77 if (mask & PIPE_MASK_A)
78 ret |= 0x1000;
79
80 return ret;
81 }
82
83 #define NV50_BLEND_FACTOR_CASE(a, b) \
84 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b
85
86 static inline uint32_t
87 nv50_blend_fac(unsigned factor)
88 {
89 switch (factor) {
90 NV50_BLEND_FACTOR_CASE(ONE, ONE);
91 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
92 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
93 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
94 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
95 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
96 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
97 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
98 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
99 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
100 NV50_BLEND_FACTOR_CASE(ZERO, ZERO);
101 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
102 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
103 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
104 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
105 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
106 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
107 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
108 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
109 default:
110 return NV50_BLEND_FACTOR_ZERO;
111 }
112 }
113
114 static void *
115 nv50_blend_state_create(struct pipe_context *pipe,
116 const struct pipe_blend_state *cso)
117 {
118 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj);
119 int i;
120 bool emit_common_func = cso->rt[0].blend_enable;
121
122 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
123 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
124 SB_DATA (so, cso->independent_blend_enable);
125 }
126
127 so->pipe = *cso;
128
129 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1);
130 SB_DATA (so, !cso->independent_blend_enable);
131
132 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1);
133 SB_DATA (so, !cso->independent_blend_enable);
134
135 if (cso->independent_blend_enable) {
136 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8);
137 for (i = 0; i < 8; ++i) {
138 SB_DATA(so, cso->rt[i].blend_enable);
139 if (cso->rt[i].blend_enable)
140 emit_common_func = true;
141 }
142
143 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
144 emit_common_func = false;
145
146 for (i = 0; i < 8; ++i) {
147 if (!cso->rt[i].blend_enable)
148 continue;
149 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6);
150 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
151 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor));
152 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor));
153 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
154 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor));
155 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor));
156 }
157 }
158 } else {
159 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1);
160 SB_DATA (so, cso->rt[0].blend_enable);
161 }
162
163 if (emit_common_func) {
164 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
165 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
166 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor));
167 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor));
168 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
169 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor));
170 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
171 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor));
172 }
173
174 if (cso->logicop_enable) {
175 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
176 SB_DATA (so, 1);
177 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
178 } else {
179 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1);
180 SB_DATA (so, 0);
181 }
182
183 if (cso->independent_blend_enable) {
184 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
185 for (i = 0; i < 8; ++i)
186 SB_DATA(so, nv50_colormask(cso->rt[i].colormask));
187 } else {
188 SB_BEGIN_3D(so, COLOR_MASK(0), 1);
189 SB_DATA (so, nv50_colormask(cso->rt[0].colormask));
190 }
191
192 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
193 return so;
194 }
195
196 static void
197 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso)
198 {
199 struct nv50_context *nv50 = nv50_context(pipe);
200
201 nv50->blend = hwcso;
202 nv50->dirty |= NV50_NEW_BLEND;
203 }
204
205 static void
206 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
207 {
208 FREE(hwcso);
209 }
210
211 /* NOTE: ignoring line_last_pixel */
212 static void *
213 nv50_rasterizer_state_create(struct pipe_context *pipe,
214 const struct pipe_rasterizer_state *cso)
215 {
216 struct nv50_rasterizer_stateobj *so;
217 uint32_t reg;
218
219 so = CALLOC_STRUCT(nv50_rasterizer_stateobj);
220 if (!so)
221 return NULL;
222 so->pipe = *cso;
223
224 #ifndef NV50_SCISSORS_CLIPPING
225 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) {
226 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1);
227 SB_DATA (so, cso->scissor);
228 }
229 #endif
230
231 SB_BEGIN_3D(so, SHADE_MODEL, 1);
232 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT :
233 NV50_3D_SHADE_MODEL_SMOOTH);
234 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1);
235 SB_DATA (so, !cso->flatshade_first);
236 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1);
237 SB_DATA (so, cso->light_twoside);
238
239 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
240 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
241
242 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1);
243 SB_DATA (so, cso->multisample);
244
245 SB_BEGIN_3D(so, LINE_WIDTH, 1);
246 SB_DATA (so, fui(cso->line_width));
247 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1);
248 SB_DATA (so, cso->line_smooth);
249
250 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
251 if (cso->line_stipple_enable) {
252 SB_DATA (so, 1);
253 SB_BEGIN_3D(so, LINE_STIPPLE, 1);
254 SB_DATA (so, (cso->line_stipple_pattern << 8) |
255 cso->line_stipple_factor);
256 } else {
257 SB_DATA (so, 0);
258 }
259
260 if (!cso->point_size_per_vertex) {
261 SB_BEGIN_3D(so, POINT_SIZE, 1);
262 SB_DATA (so, fui(cso->point_size));
263 }
264 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1);
265 SB_DATA (so, cso->point_quad_rasterization);
266 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1);
267 SB_DATA (so, cso->point_smooth);
268
269 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3);
270 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
271 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
272 SB_DATA (so, cso->poly_smooth);
273
274 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
275 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
276 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW :
277 NV50_3D_FRONT_FACE_CW);
278 switch (cso->cull_face) {
279 case PIPE_FACE_FRONT_AND_BACK:
280 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK);
281 break;
282 case PIPE_FACE_FRONT:
283 SB_DATA(so, NV50_3D_CULL_FACE_FRONT);
284 break;
285 case PIPE_FACE_BACK:
286 default:
287 SB_DATA(so, NV50_3D_CULL_FACE_BACK);
288 break;
289 }
290
291 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1);
292 SB_DATA (so, cso->poly_stipple_enable);
293 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
294 SB_DATA (so, cso->offset_point);
295 SB_DATA (so, cso->offset_line);
296 SB_DATA (so, cso->offset_tri);
297
298 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
299 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
300 SB_DATA (so, fui(cso->offset_scale));
301 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
302 SB_DATA (so, fui(cso->offset_units * 2.0f));
303 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
304 SB_DATA (so, fui(cso->offset_clamp));
305 }
306
307 if (cso->depth_clip) {
308 reg = 0;
309 } else {
310 reg =
311 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
312 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
313 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
314 }
315 #ifndef NV50_SCISSORS_CLIPPING
316 reg |=
317 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 |
318 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
319 #endif
320 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
321 SB_DATA (so, reg);
322
323 SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1);
324 SB_DATA (so, cso->clip_halfz);
325
326 SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1);
327 SB_DATA (so, !cso->half_pixel_center);
328
329 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
330 return (void *)so;
331 }
332
333 static void
334 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
335 {
336 struct nv50_context *nv50 = nv50_context(pipe);
337
338 nv50->rast = hwcso;
339 nv50->dirty |= NV50_NEW_RASTERIZER;
340 }
341
342 static void
343 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
344 {
345 FREE(hwcso);
346 }
347
348 static void *
349 nv50_zsa_state_create(struct pipe_context *pipe,
350 const struct pipe_depth_stencil_alpha_state *cso)
351 {
352 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj);
353
354 so->pipe = *cso;
355
356 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1);
357 SB_DATA (so, cso->depth.writemask);
358 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
359 if (cso->depth.enabled) {
360 SB_DATA (so, 1);
361 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
362 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
363 } else {
364 SB_DATA (so, 0);
365 }
366
367 SB_BEGIN_3D(so, DEPTH_BOUNDS_EN, 1);
368 if (cso->depth.bounds_test) {
369 SB_DATA (so, 1);
370 SB_BEGIN_3D(so, DEPTH_BOUNDS(0), 2);
371 SB_DATA (so, fui(cso->depth.bounds_min));
372 SB_DATA (so, fui(cso->depth.bounds_max));
373 } else {
374 SB_DATA (so, 0);
375 }
376
377 if (cso->stencil[0].enabled) {
378 SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
379 SB_DATA (so, 1);
380 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
381 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
382 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
383 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
384 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
385 SB_DATA (so, cso->stencil[0].writemask);
386 SB_DATA (so, cso->stencil[0].valuemask);
387 } else {
388 SB_BEGIN_3D(so, STENCIL_ENABLE, 1);
389 SB_DATA (so, 0);
390 }
391
392 if (cso->stencil[1].enabled) {
393 assert(cso->stencil[0].enabled);
394 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
395 SB_DATA (so, 1);
396 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
397 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
398 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
399 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
400 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
401 SB_DATA (so, cso->stencil[1].writemask);
402 SB_DATA (so, cso->stencil[1].valuemask);
403 } else {
404 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1);
405 SB_DATA (so, 0);
406 }
407
408 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
409 if (cso->alpha.enabled) {
410 SB_DATA (so, 1);
411 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
412 SB_DATA (so, fui(cso->alpha.ref_value));
413 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
414 } else {
415 SB_DATA (so, 0);
416 }
417
418 assert(so->size <= (sizeof(so->state) / sizeof(so->state[0])));
419 return (void *)so;
420 }
421
422 static void
423 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
424 {
425 struct nv50_context *nv50 = nv50_context(pipe);
426
427 nv50->zsa = hwcso;
428 nv50->dirty |= NV50_NEW_ZSA;
429 }
430
431 static void
432 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
433 {
434 FREE(hwcso);
435 }
436
437 /* ====================== SAMPLERS AND TEXTURES ================================
438 */
439
440 #define NV50_TSC_WRAP_CASE(n) \
441 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
442
443 static inline unsigned
444 nv50_tsc_wrap_mode(unsigned wrap)
445 {
446 switch (wrap) {
447 NV50_TSC_WRAP_CASE(REPEAT);
448 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
449 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
450 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
451 NV50_TSC_WRAP_CASE(CLAMP);
452 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
453 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
454 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
455 default:
456 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
457 return NV50_TSC_WRAP_REPEAT;
458 }
459 }
460
461 void *
462 nv50_sampler_state_create(struct pipe_context *pipe,
463 const struct pipe_sampler_state *cso)
464 {
465 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry);
466 float f[2];
467
468 so->id = -1;
469
470 so->tsc[0] = (0x00026000 |
471 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
472 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
473 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
474
475 switch (cso->mag_img_filter) {
476 case PIPE_TEX_FILTER_LINEAR:
477 so->tsc[1] = NV50_TSC_1_MAGF_LINEAR;
478 break;
479 case PIPE_TEX_FILTER_NEAREST:
480 default:
481 so->tsc[1] = NV50_TSC_1_MAGF_NEAREST;
482 break;
483 }
484
485 switch (cso->min_img_filter) {
486 case PIPE_TEX_FILTER_LINEAR:
487 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
488 break;
489 case PIPE_TEX_FILTER_NEAREST:
490 default:
491 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
492 break;
493 }
494
495 switch (cso->min_mip_filter) {
496 case PIPE_TEX_MIPFILTER_LINEAR:
497 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
498 break;
499 case PIPE_TEX_MIPFILTER_NEAREST:
500 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
501 break;
502 case PIPE_TEX_MIPFILTER_NONE:
503 default:
504 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
505 break;
506 }
507
508 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
509 if (cso->seamless_cube_map)
510 so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
511 if (!cso->normalized_coords)
512 so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
513 }
514
515 if (cso->max_anisotropy >= 16)
516 so->tsc[0] |= (7 << 20);
517 else
518 if (cso->max_anisotropy >= 12)
519 so->tsc[0] |= (6 << 20);
520 else {
521 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
522
523 if (cso->max_anisotropy >= 4)
524 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
525 else
526 if (cso->max_anisotropy >= 2)
527 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
528 }
529
530 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
531 /* NOTE: must be deactivated for non-shadow textures */
532 so->tsc[0] |= (1 << 9);
533 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
534 }
535
536 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
537 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
538
539 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
540 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
541 so->tsc[2] =
542 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
543
544 so->tsc[2] |=
545 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24;
546 so->tsc[3] =
547 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12;
548 so->tsc[3] |=
549 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20;
550
551 so->tsc[4] = fui(cso->border_color.f[0]);
552 so->tsc[5] = fui(cso->border_color.f[1]);
553 so->tsc[6] = fui(cso->border_color.f[2]);
554 so->tsc[7] = fui(cso->border_color.f[3]);
555
556 return (void *)so;
557 }
558
559 static void
560 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
561 {
562 unsigned s, i;
563
564 for (s = 0; s < 3; ++s) {
565 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS);
566 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i)
567 if (nv50_context(pipe)->samplers[s][i] == hwcso)
568 nv50_context(pipe)->samplers[s][i] = NULL;
569 }
570
571 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso));
572
573 FREE(hwcso);
574 }
575
576 static inline void
577 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
578 unsigned nr, void **hwcso)
579 {
580 unsigned i;
581
582 assert(nr <= PIPE_MAX_SAMPLERS);
583 for (i = 0; i < nr; ++i) {
584 struct nv50_tsc_entry *old = nv50->samplers[s][i];
585
586 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
587 if (old)
588 nv50_screen_tsc_unlock(nv50->screen, old);
589 }
590 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
591 for (; i < nv50->num_samplers[s]; ++i) {
592 if (nv50->samplers[s][i]) {
593 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
594 nv50->samplers[s][i] = NULL;
595 }
596 }
597
598 nv50->num_samplers[s] = nr;
599
600 nv50->dirty |= NV50_NEW_SAMPLERS;
601 }
602
603 static void
604 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
605 {
606 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s);
607 }
608
609 static void
610 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
611 {
612 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s);
613 }
614
615 static void
616 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
617 {
618 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s);
619 }
620
621 static void
622 nv50_bind_sampler_states(struct pipe_context *pipe,
623 unsigned shader, unsigned start,
624 unsigned num_samplers, void **samplers)
625 {
626 assert(start == 0);
627 switch (shader) {
628 case PIPE_SHADER_VERTEX:
629 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers);
630 break;
631 case PIPE_SHADER_GEOMETRY:
632 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers);
633 break;
634 case PIPE_SHADER_FRAGMENT:
635 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers);
636 break;
637 }
638 }
639
640
641
642 /* NOTE: only called when not referenced anywhere, won't be bound */
643 static void
644 nv50_sampler_view_destroy(struct pipe_context *pipe,
645 struct pipe_sampler_view *view)
646 {
647 pipe_resource_reference(&view->texture, NULL);
648
649 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view));
650
651 FREE(nv50_tic_entry(view));
652 }
653
654 static inline void
655 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s,
656 unsigned nr,
657 struct pipe_sampler_view **views)
658 {
659 unsigned i;
660
661 assert(nr <= PIPE_MAX_SAMPLERS);
662 for (i = 0; i < nr; ++i) {
663 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
664 if (old)
665 nv50_screen_tic_unlock(nv50->screen, old);
666
667 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]);
668 }
669
670 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
671 for (i = nr; i < nv50->num_textures[s]; ++i) {
672 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
673 if (!old)
674 continue;
675 nv50_screen_tic_unlock(nv50->screen, old);
676
677 pipe_sampler_view_reference(&nv50->textures[s][i], NULL);
678 }
679
680 nv50->num_textures[s] = nr;
681
682 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_TEXTURES);
683
684 nv50->dirty |= NV50_NEW_TEXTURES;
685 }
686
687 static void
688 nv50_set_sampler_views(struct pipe_context *pipe, unsigned shader,
689 unsigned start, unsigned nr,
690 struct pipe_sampler_view **views)
691 {
692 assert(start == 0);
693 switch (shader) {
694 case PIPE_SHADER_VERTEX:
695 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views);
696 break;
697 case PIPE_SHADER_GEOMETRY:
698 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views);
699 break;
700 case PIPE_SHADER_FRAGMENT:
701 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views);
702 break;
703 default:
704 ;
705 }
706 }
707
708
709
710 /* ============================= SHADERS =======================================
711 */
712
713 static void *
714 nv50_sp_state_create(struct pipe_context *pipe,
715 const struct pipe_shader_state *cso, unsigned type)
716 {
717 struct nv50_program *prog;
718
719 prog = CALLOC_STRUCT(nv50_program);
720 if (!prog)
721 return NULL;
722
723 prog->type = type;
724 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
725
726 if (cso->stream_output.num_outputs)
727 prog->pipe.stream_output = cso->stream_output;
728
729 prog->translated = nv50_program_translate(
730 prog, nv50_context(pipe)->screen->base.device->chipset);
731
732 return (void *)prog;
733 }
734
735 static void
736 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso)
737 {
738 struct nv50_program *prog = (struct nv50_program *)hwcso;
739
740 nv50_program_destroy(nv50_context(pipe), prog);
741
742 FREE((void *)prog->pipe.tokens);
743 FREE(prog);
744 }
745
746 static void *
747 nv50_vp_state_create(struct pipe_context *pipe,
748 const struct pipe_shader_state *cso)
749 {
750 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
751 }
752
753 static void
754 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso)
755 {
756 struct nv50_context *nv50 = nv50_context(pipe);
757
758 nv50->vertprog = hwcso;
759 nv50->dirty |= NV50_NEW_VERTPROG;
760 }
761
762 static void *
763 nv50_fp_state_create(struct pipe_context *pipe,
764 const struct pipe_shader_state *cso)
765 {
766 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
767 }
768
769 static void
770 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso)
771 {
772 struct nv50_context *nv50 = nv50_context(pipe);
773
774 nv50->fragprog = hwcso;
775 nv50->dirty |= NV50_NEW_FRAGPROG;
776 }
777
778 static void *
779 nv50_gp_state_create(struct pipe_context *pipe,
780 const struct pipe_shader_state *cso)
781 {
782 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
783 }
784
785 static void
786 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso)
787 {
788 struct nv50_context *nv50 = nv50_context(pipe);
789
790 nv50->gmtyprog = hwcso;
791 nv50->dirty |= NV50_NEW_GMTYPROG;
792 }
793
794 static void
795 nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
796 struct pipe_constant_buffer *cb)
797 {
798 struct nv50_context *nv50 = nv50_context(pipe);
799 struct pipe_resource *res = cb ? cb->buffer : NULL;
800 const unsigned s = nv50_context_shader_stage(shader);
801 const unsigned i = index;
802
803 if (shader == PIPE_SHADER_COMPUTE)
804 return;
805
806 assert(i < NV50_MAX_PIPE_CONSTBUFS);
807 if (nv50->constbuf[s][i].user)
808 nv50->constbuf[s][i].u.buf = NULL;
809 else
810 if (nv50->constbuf[s][i].u.buf)
811 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_CB(s, i));
812
813 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res);
814
815 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false;
816 if (nv50->constbuf[s][i].user) {
817 nv50->constbuf[s][i].u.data = cb->user_buffer;
818 nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
819 nv50->constbuf_valid[s] |= 1 << i;
820 } else
821 if (res) {
822 nv50->constbuf[s][i].offset = cb->buffer_offset;
823 nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
824 nv50->constbuf_valid[s] |= 1 << i;
825 } else {
826 nv50->constbuf_valid[s] &= ~(1 << i);
827 }
828 nv50->constbuf_dirty[s] |= 1 << i;
829
830 nv50->dirty |= NV50_NEW_CONSTBUF;
831 }
832
833 /* =============================================================================
834 */
835
836 static void
837 nv50_set_blend_color(struct pipe_context *pipe,
838 const struct pipe_blend_color *bcol)
839 {
840 struct nv50_context *nv50 = nv50_context(pipe);
841
842 nv50->blend_colour = *bcol;
843 nv50->dirty |= NV50_NEW_BLEND_COLOUR;
844 }
845
846 static void
847 nv50_set_stencil_ref(struct pipe_context *pipe,
848 const struct pipe_stencil_ref *sr)
849 {
850 struct nv50_context *nv50 = nv50_context(pipe);
851
852 nv50->stencil_ref = *sr;
853 nv50->dirty |= NV50_NEW_STENCIL_REF;
854 }
855
856 static void
857 nv50_set_clip_state(struct pipe_context *pipe,
858 const struct pipe_clip_state *clip)
859 {
860 struct nv50_context *nv50 = nv50_context(pipe);
861
862 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp));
863
864 nv50->dirty |= NV50_NEW_CLIP;
865 }
866
867 static void
868 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
869 {
870 struct nv50_context *nv50 = nv50_context(pipe);
871
872 nv50->sample_mask = sample_mask;
873 nv50->dirty |= NV50_NEW_SAMPLE_MASK;
874 }
875
876 static void
877 nv50_set_min_samples(struct pipe_context *pipe, unsigned min_samples)
878 {
879 struct nv50_context *nv50 = nv50_context(pipe);
880
881 if (nv50->min_samples != min_samples) {
882 nv50->min_samples = min_samples;
883 nv50->dirty |= NV50_NEW_MIN_SAMPLES;
884 }
885 }
886
887 static void
888 nv50_set_framebuffer_state(struct pipe_context *pipe,
889 const struct pipe_framebuffer_state *fb)
890 {
891 struct nv50_context *nv50 = nv50_context(pipe);
892 unsigned i;
893
894 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
895
896 for (i = 0; i < fb->nr_cbufs; ++i)
897 pipe_surface_reference(&nv50->framebuffer.cbufs[i], fb->cbufs[i]);
898 for (; i < nv50->framebuffer.nr_cbufs; ++i)
899 pipe_surface_reference(&nv50->framebuffer.cbufs[i], NULL);
900
901 nv50->framebuffer.nr_cbufs = fb->nr_cbufs;
902
903 nv50->framebuffer.width = fb->width;
904 nv50->framebuffer.height = fb->height;
905
906 pipe_surface_reference(&nv50->framebuffer.zsbuf, fb->zsbuf);
907
908 nv50->dirty |= NV50_NEW_FRAMEBUFFER;
909 }
910
911 static void
912 nv50_set_polygon_stipple(struct pipe_context *pipe,
913 const struct pipe_poly_stipple *stipple)
914 {
915 struct nv50_context *nv50 = nv50_context(pipe);
916
917 nv50->stipple = *stipple;
918 nv50->dirty |= NV50_NEW_STIPPLE;
919 }
920
921 static void
922 nv50_set_scissor_states(struct pipe_context *pipe,
923 unsigned start_slot,
924 unsigned num_scissors,
925 const struct pipe_scissor_state *scissor)
926 {
927 struct nv50_context *nv50 = nv50_context(pipe);
928 int i;
929
930 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS);
931 for (i = 0; i < num_scissors; i++) {
932 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor)))
933 continue;
934 nv50->scissors[start_slot + i] = scissor[i];
935 nv50->scissors_dirty |= 1 << (start_slot + i);
936 nv50->dirty |= NV50_NEW_SCISSOR;
937 }
938 }
939
940 static void
941 nv50_set_viewport_states(struct pipe_context *pipe,
942 unsigned start_slot,
943 unsigned num_viewports,
944 const struct pipe_viewport_state *vpt)
945 {
946 struct nv50_context *nv50 = nv50_context(pipe);
947 int i;
948
949 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS);
950 for (i = 0; i < num_viewports; i++) {
951 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt)))
952 continue;
953 nv50->viewports[start_slot + i] = vpt[i];
954 nv50->viewports_dirty |= 1 << (start_slot + i);
955 nv50->dirty |= NV50_NEW_VIEWPORT;
956 }
957 }
958
959 static void
960 nv50_set_vertex_buffers(struct pipe_context *pipe,
961 unsigned start_slot, unsigned count,
962 const struct pipe_vertex_buffer *vb)
963 {
964 struct nv50_context *nv50 = nv50_context(pipe);
965 unsigned i;
966
967 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb,
968 start_slot, count);
969
970 if (!vb) {
971 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot);
972 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot);
973 return;
974 }
975
976 for (i = 0; i < count; ++i) {
977 unsigned dst_index = start_slot + i;
978
979 if (!vb[i].buffer && vb[i].user_buffer) {
980 nv50->vbo_user |= 1 << dst_index;
981 if (!vb[i].stride)
982 nv50->vbo_constant |= 1 << dst_index;
983 else
984 nv50->vbo_constant &= ~(1 << dst_index);
985 } else {
986 nv50->vbo_user &= ~(1 << dst_index);
987 nv50->vbo_constant &= ~(1 << dst_index);
988 }
989 }
990
991 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_VERTEX);
992
993 nv50->dirty |= NV50_NEW_ARRAYS;
994 }
995
996 static void
997 nv50_set_index_buffer(struct pipe_context *pipe,
998 const struct pipe_index_buffer *ib)
999 {
1000 struct nv50_context *nv50 = nv50_context(pipe);
1001
1002 if (nv50->idxbuf.buffer)
1003 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_INDEX);
1004
1005 if (ib) {
1006 pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer);
1007 nv50->idxbuf.index_size = ib->index_size;
1008 if (ib->buffer) {
1009 nv50->idxbuf.offset = ib->offset;
1010 BCTX_REFN(nv50->bufctx_3d, INDEX, nv04_resource(ib->buffer), RD);
1011 } else {
1012 nv50->idxbuf.user_buffer = ib->user_buffer;
1013 }
1014 } else {
1015 pipe_resource_reference(&nv50->idxbuf.buffer, NULL);
1016 }
1017 }
1018
1019 static void
1020 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
1021 {
1022 struct nv50_context *nv50 = nv50_context(pipe);
1023
1024 nv50->vertex = hwcso;
1025 nv50->dirty |= NV50_NEW_VERTEX;
1026 }
1027
1028 static struct pipe_stream_output_target *
1029 nv50_so_target_create(struct pipe_context *pipe,
1030 struct pipe_resource *res,
1031 unsigned offset, unsigned size)
1032 {
1033 struct nv04_resource *buf = (struct nv04_resource *)res;
1034 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target);
1035 if (!targ)
1036 return NULL;
1037
1038 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) {
1039 targ->pq = pipe->create_query(pipe,
1040 NVA0_HW_QUERY_STREAM_OUTPUT_BUFFER_OFFSET, 0);
1041 if (!targ->pq) {
1042 FREE(targ);
1043 return NULL;
1044 }
1045 } else {
1046 targ->pq = NULL;
1047 }
1048 targ->clean = true;
1049
1050 targ->pipe.buffer_size = size;
1051 targ->pipe.buffer_offset = offset;
1052 targ->pipe.context = pipe;
1053 targ->pipe.buffer = NULL;
1054 pipe_resource_reference(&targ->pipe.buffer, res);
1055 pipe_reference_init(&targ->pipe.reference, 1);
1056
1057 assert(buf->base.target == PIPE_BUFFER);
1058 util_range_add(&buf->valid_buffer_range, offset, offset + size);
1059
1060 return &targ->pipe;
1061 }
1062
1063 static void
1064 nva0_so_target_save_offset(struct pipe_context *pipe,
1065 struct pipe_stream_output_target *ptarg,
1066 unsigned index, bool serialize)
1067 {
1068 struct nv50_so_target *targ = nv50_so_target(ptarg);
1069
1070 if (serialize) {
1071 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf;
1072 PUSH_SPACE(push, 2);
1073 BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1);
1074 PUSH_DATA (push, 0);
1075 }
1076
1077 nv50_query(targ->pq)->index = index;
1078 pipe->end_query(pipe, targ->pq);
1079 }
1080
1081 static void
1082 nv50_so_target_destroy(struct pipe_context *pipe,
1083 struct pipe_stream_output_target *ptarg)
1084 {
1085 struct nv50_so_target *targ = nv50_so_target(ptarg);
1086 if (targ->pq)
1087 pipe->destroy_query(pipe, targ->pq);
1088 pipe_resource_reference(&targ->pipe.buffer, NULL);
1089 FREE(targ);
1090 }
1091
1092 static void
1093 nv50_set_stream_output_targets(struct pipe_context *pipe,
1094 unsigned num_targets,
1095 struct pipe_stream_output_target **targets,
1096 const unsigned *offsets)
1097 {
1098 struct nv50_context *nv50 = nv50_context(pipe);
1099 unsigned i;
1100 bool serialize = true;
1101 const bool can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS;
1102
1103 assert(num_targets <= 4);
1104
1105 for (i = 0; i < num_targets; ++i) {
1106 const bool changed = nv50->so_target[i] != targets[i];
1107 const bool append = (offsets[i] == (unsigned)-1);
1108 if (!changed && append)
1109 continue;
1110 nv50->so_targets_dirty |= 1 << i;
1111
1112 if (can_resume && changed && nv50->so_target[i]) {
1113 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1114 serialize = false;
1115 }
1116
1117 if (targets[i] && !append)
1118 nv50_so_target(targets[i])->clean = true;
1119
1120 pipe_so_target_reference(&nv50->so_target[i], targets[i]);
1121 }
1122 for (; i < nv50->num_so_targets; ++i) {
1123 if (can_resume && nv50->so_target[i]) {
1124 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1125 serialize = false;
1126 }
1127 pipe_so_target_reference(&nv50->so_target[i], NULL);
1128 nv50->so_targets_dirty |= 1 << i;
1129 }
1130 nv50->num_so_targets = num_targets;
1131
1132 if (nv50->so_targets_dirty)
1133 nv50->dirty |= NV50_NEW_STRMOUT;
1134 }
1135
1136 void
1137 nv50_init_state_functions(struct nv50_context *nv50)
1138 {
1139 struct pipe_context *pipe = &nv50->base.pipe;
1140
1141 pipe->create_blend_state = nv50_blend_state_create;
1142 pipe->bind_blend_state = nv50_blend_state_bind;
1143 pipe->delete_blend_state = nv50_blend_state_delete;
1144
1145 pipe->create_rasterizer_state = nv50_rasterizer_state_create;
1146 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind;
1147 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete;
1148
1149 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create;
1150 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind;
1151 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete;
1152
1153 pipe->create_sampler_state = nv50_sampler_state_create;
1154 pipe->delete_sampler_state = nv50_sampler_state_delete;
1155 pipe->bind_sampler_states = nv50_bind_sampler_states;
1156
1157 pipe->create_sampler_view = nv50_create_sampler_view;
1158 pipe->sampler_view_destroy = nv50_sampler_view_destroy;
1159 pipe->set_sampler_views = nv50_set_sampler_views;
1160
1161 pipe->create_vs_state = nv50_vp_state_create;
1162 pipe->create_fs_state = nv50_fp_state_create;
1163 pipe->create_gs_state = nv50_gp_state_create;
1164 pipe->bind_vs_state = nv50_vp_state_bind;
1165 pipe->bind_fs_state = nv50_fp_state_bind;
1166 pipe->bind_gs_state = nv50_gp_state_bind;
1167 pipe->delete_vs_state = nv50_sp_state_delete;
1168 pipe->delete_fs_state = nv50_sp_state_delete;
1169 pipe->delete_gs_state = nv50_sp_state_delete;
1170
1171 pipe->set_blend_color = nv50_set_blend_color;
1172 pipe->set_stencil_ref = nv50_set_stencil_ref;
1173 pipe->set_clip_state = nv50_set_clip_state;
1174 pipe->set_sample_mask = nv50_set_sample_mask;
1175 pipe->set_min_samples = nv50_set_min_samples;
1176 pipe->set_constant_buffer = nv50_set_constant_buffer;
1177 pipe->set_framebuffer_state = nv50_set_framebuffer_state;
1178 pipe->set_polygon_stipple = nv50_set_polygon_stipple;
1179 pipe->set_scissor_states = nv50_set_scissor_states;
1180 pipe->set_viewport_states = nv50_set_viewport_states;
1181
1182 pipe->create_vertex_elements_state = nv50_vertex_state_create;
1183 pipe->delete_vertex_elements_state = nv50_vertex_state_delete;
1184 pipe->bind_vertex_elements_state = nv50_vertex_state_bind;
1185
1186 pipe->set_vertex_buffers = nv50_set_vertex_buffers;
1187 pipe->set_index_buffer = nv50_set_index_buffer;
1188
1189 pipe->create_stream_output_target = nv50_so_target_create;
1190 pipe->stream_output_target_destroy = nv50_so_target_destroy;
1191 pipe->set_stream_output_targets = nv50_set_stream_output_targets;
1192
1193 nv50->sample_mask = ~0;
1194 nv50->min_samples = 1;
1195 }