gm107/ir: prevent WaW hazards in instruction scheduling
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_winsys.h
1
2 #ifndef __NV50_WINSYS_H__
3 #define __NV50_WINSYS_H__
4
5 #include <stdint.h>
6 #include <unistd.h>
7
8 #include "pipe/p_defines.h"
9
10 #include "nouveau_winsys.h"
11 #include "nouveau_buffer.h"
12
13
14 #ifndef NV04_PFIFO_MAX_PACKET_LEN
15 #define NV04_PFIFO_MAX_PACKET_LEN 2047
16 #endif
17
18
19 static inline void
20 nv50_add_bufctx_resident_bo(struct nouveau_bufctx *bufctx, int bin,
21 unsigned flags, struct nouveau_bo *bo)
22 {
23 nouveau_bufctx_refn(bufctx, bin, bo, flags)->priv = NULL;
24 }
25
26 static inline void
27 nv50_add_bufctx_resident(struct nouveau_bufctx *bufctx, int bin,
28 struct nv04_resource *res, unsigned flags)
29 {
30 struct nouveau_bufref *ref =
31 nouveau_bufctx_refn(bufctx, bin, res->bo, flags | res->domain);
32 ref->priv = res;
33 ref->priv_data = flags;
34 }
35
36 #define BCTX_REFN_bo(ctx, bin, fl, bo) \
37 nv50_add_bufctx_resident_bo(ctx, NV50_BIND_##bin, fl, bo);
38
39 #define BCTX_REFN(bctx, bin, res, acc) \
40 nv50_add_bufctx_resident(bctx, NV50_BIND_##bin, res, NOUVEAU_BO_##acc)
41
42 static inline void
43 PUSH_REFN(struct nouveau_pushbuf *push, struct nouveau_bo *bo, uint32_t flags)
44 {
45 struct nouveau_pushbuf_refn ref = { bo, flags };
46 nouveau_pushbuf_refn(push, &ref, 1);
47 }
48
49
50 #define SUBC_3D(m) 3, (m)
51 #define NV50_3D(n) SUBC_3D(NV50_3D_##n)
52 #define NV84_3D(n) SUBC_3D(NV84_3D_##n)
53 #define NVA0_3D(n) SUBC_3D(NVA0_3D_##n)
54
55 #define SUBC_2D(m) 4, (m)
56 #define NV50_2D(n) SUBC_2D(NV50_2D_##n)
57
58 #define SUBC_M2MF(m) 5, (m)
59 #define NV50_M2MF(n) SUBC_M2MF(NV50_M2MF_##n)
60
61 #define SUBC_CP(m) 6, (m)
62 #define NV50_CP(n) SUBC_CP(NV50_COMPUTE_##n)
63
64
65 static inline uint32_t
66 NV50_FIFO_PKHDR(int subc, int mthd, unsigned size)
67 {
68 return 0x00000000 | (size << 18) | (subc << 13) | mthd;
69 }
70
71 static inline uint32_t
72 NV50_FIFO_PKHDR_NI(int subc, int mthd, unsigned size)
73 {
74 return 0x40000000 | (size << 18) | (subc << 13) | mthd;
75 }
76
77 static inline uint32_t
78 NV50_FIFO_PKHDR_L(int subc, int mthd)
79 {
80 return 0x00030000 | (subc << 13) | mthd;
81 }
82
83
84 static inline uint32_t
85 nouveau_bo_memtype(const struct nouveau_bo *bo)
86 {
87 return bo->config.nv50.memtype;
88 }
89
90
91 static inline void
92 PUSH_DATAh(struct nouveau_pushbuf *push, uint64_t data)
93 {
94 *push->cur++ = (uint32_t)(data >> 32);
95 }
96
97 static inline void
98 BEGIN_NV04(struct nouveau_pushbuf *push, int subc, int mthd, unsigned size)
99 {
100 #ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING
101 PUSH_SPACE(push, size + 1);
102 #endif
103 PUSH_DATA (push, NV50_FIFO_PKHDR(subc, mthd, size));
104 }
105
106 static inline void
107 BEGIN_NI04(struct nouveau_pushbuf *push, int subc, int mthd, unsigned size)
108 {
109 #ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING
110 PUSH_SPACE(push, size + 1);
111 #endif
112 PUSH_DATA (push, NV50_FIFO_PKHDR_NI(subc, mthd, size));
113 }
114
115 /* long, non-incremental, nv50-only */
116 static inline void
117 BEGIN_NL50(struct nouveau_pushbuf *push, int subc, int mthd, uint32_t size)
118 {
119 #ifndef NV50_PUSH_EXPLICIT_SPACE_CHECKING
120 PUSH_SPACE(push, 2);
121 #endif
122 PUSH_DATA (push, NV50_FIFO_PKHDR_L(subc, mthd));
123 PUSH_DATA (push, size);
124 }
125
126 #endif /* __NV50_WINSYS_H__ */