2 * Copyright 2011-2013 Maarten Lankhorst, Ilia Mirkin
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "nv50/nv98_video.h"
25 #if NOUVEAU_VP3_DEBUG_FENCE
26 static void dump_comm_bsp(struct comm
*comm
)
28 unsigned idx
= comm
->bsp_cur_index
& 0xf;
29 debug_printf("Cur seq: %x, bsp byte ofs: %x\n", comm
->bsp_cur_index
, comm
->byte_ofs
);
30 debug_printf("Status: %08x, pos: %08x\n", comm
->status
[idx
], comm
->pos
[idx
]);
35 nv98_decoder_bsp(struct nouveau_vp3_decoder
*dec
, union pipe_desc desc
,
36 struct nouveau_vp3_video_buffer
*target
,
37 unsigned comm_seq
, unsigned num_buffers
,
38 const void *const *data
, const unsigned *num_bytes
,
39 unsigned *vp_caps
, unsigned *is_ref
,
40 struct nouveau_vp3_video_buffer
*refs
[16])
42 struct nouveau_pushbuf
*push
= dec
->pushbuf
[0];
43 enum pipe_video_format codec
= u_reduce_video_profile(dec
->base
.profile
);
44 uint32_t bsp_addr
, comm_addr
, inter_addr
;
45 uint32_t slice_size
, bucket_size
, ring_size
, bsp_size
;
48 struct nouveau_bo
*bsp_bo
= dec
->bsp_bo
[comm_seq
% NOUVEAU_VP3_VIDEO_QDEPTH
];
49 struct nouveau_bo
*inter_bo
= dec
->inter_bo
[comm_seq
& 1];
50 unsigned fence_extra
= 0;
51 struct nouveau_pushbuf_refn bo_refs
[] = {
52 { bsp_bo
, NOUVEAU_BO_RD
| NOUVEAU_BO_VRAM
},
53 { inter_bo
, NOUVEAU_BO_WR
| NOUVEAU_BO_VRAM
},
54 #if NOUVEAU_VP3_DEBUG_FENCE
55 { dec
->fence_bo
, NOUVEAU_BO_WR
| NOUVEAU_BO_GART
},
57 { dec
->bitplane_bo
, NOUVEAU_BO_RDWR
| NOUVEAU_BO_VRAM
},
59 int num_refs
= ARRAY_SIZE(bo_refs
);
61 if (!dec
->bitplane_bo
)
64 #if NOUVEAU_VP3_DEBUG_FENCE
68 bsp_size
= NOUVEAU_VP3_BSP_RESERVED_SIZE
;
69 for (i
= 0; i
< num_buffers
; i
++)
70 bsp_size
+= num_bytes
[i
];
71 bsp_size
+= 256; /* the 4 end markers */
73 if (!bsp_bo
|| bsp_size
> bsp_bo
->size
) {
74 struct nouveau_bo
*tmp_bo
= NULL
;
76 /* round up to the nearest mb */
77 bsp_size
+= (1 << 20) - 1;
78 bsp_size
&= ~((1 << 20) - 1);
80 ret
= nouveau_bo_new(dec
->client
->device
, NOUVEAU_BO_VRAM
, 0, bsp_size
, NULL
, &tmp_bo
);
82 debug_printf("reallocating bsp %u -> %u failed with %i\n",
83 bsp_bo
? (unsigned)bsp_bo
->size
: 0, bsp_size
, ret
);
86 nouveau_bo_ref(NULL
, &bsp_bo
);
87 bo_refs
[0].bo
= dec
->bsp_bo
[comm_seq
% NOUVEAU_VP3_VIDEO_QDEPTH
] = bsp_bo
= tmp_bo
;
90 if (!inter_bo
|| bsp_bo
->size
* 4 > inter_bo
->size
) {
91 struct nouveau_bo
*tmp_bo
= NULL
;
93 ret
= nouveau_bo_new(dec
->client
->device
, NOUVEAU_BO_VRAM
, 0, bsp_bo
->size
* 4, NULL
, &tmp_bo
);
95 debug_printf("reallocating inter %u -> %u failed with %i\n",
96 inter_bo
? (unsigned)inter_bo
->size
: 0, (unsigned)bsp_bo
->size
* 4, ret
);
99 nouveau_bo_ref(NULL
, &inter_bo
);
100 bo_refs
[1].bo
= dec
->inter_bo
[comm_seq
& 1] = inter_bo
= tmp_bo
;
103 ret
= nouveau_bo_map(bsp_bo
, NOUVEAU_BO_WR
, dec
->client
);
105 debug_printf("map failed: %i %s\n", ret
, strerror(-ret
));
109 nouveau_vp3_bsp_begin(dec
);
110 nouveau_vp3_bsp_next(dec
, num_buffers
, data
, num_bytes
);
111 caps
= nouveau_vp3_bsp_end(dec
, desc
);
113 nouveau_vp3_vp_caps(dec
, desc
, target
, comm_seq
, vp_caps
, is_ref
, refs
);
115 nouveau_pushbuf_space(push
, 6 + (codec
== PIPE_VIDEO_FORMAT_MPEG4_AVC
? 9 : 8) + fence_extra
+ 2, num_refs
, 0);
116 nouveau_pushbuf_refn(push
, bo_refs
, num_refs
);
118 bsp_addr
= bsp_bo
->offset
>> 8;
119 inter_addr
= inter_bo
->offset
>> 8;
121 #if NOUVEAU_VP3_DEBUG_FENCE
122 memset(dec
->comm
, 0, 0x200);
123 comm_addr
= (dec
->fence_bo
->offset
+ COMM_OFFSET
) >> 8;
125 comm_addr
= bsp_addr
+ (COMM_OFFSET
>>8);
128 BEGIN_NV04(push
, SUBC_BSP(0x700), 5);
129 PUSH_DATA (push
, caps
); // 700 cmd
130 PUSH_DATA (push
, bsp_addr
+ 1); // 704 strparm_bsp
131 PUSH_DATA (push
, bsp_addr
+ 7); // 708 str addr
132 PUSH_DATA (push
, comm_addr
); // 70c comm
133 PUSH_DATA (push
, comm_seq
); // 710 seq
135 if (codec
!= PIPE_VIDEO_FORMAT_MPEG4_AVC
) {
137 int mpeg12
= (codec
== PIPE_VIDEO_FORMAT_MPEG12
);
139 bitplane_addr
= dec
->bitplane_bo
->offset
>> 8;
141 nouveau_vp3_inter_sizes(dec
, 1, &slice_size
, &bucket_size
, &ring_size
);
142 BEGIN_NV04(push
, SUBC_BSP(0x400), mpeg12
? 5 : 7);
143 PUSH_DATA (push
, bsp_addr
); // 400 picparm addr
144 PUSH_DATA (push
, inter_addr
); // 404 interparm addr
145 PUSH_DATA (push
, inter_addr
+ slice_size
+ bucket_size
); // 408 interdata addr
146 PUSH_DATA (push
, ring_size
<< 8); // 40c interdata_size
148 PUSH_DATA (push
, bitplane_addr
); // 410 BITPLANE_DATA
149 PUSH_DATA (push
, 0x400); // 414 BITPLANE_DATA_SIZE
151 PUSH_DATA (push
, 0); // dma idx
153 nouveau_vp3_inter_sizes(dec
, desc
.h264
->slice_count
, &slice_size
, &bucket_size
, &ring_size
);
154 BEGIN_NV04(push
, SUBC_BSP(0x400), 8);
155 PUSH_DATA (push
, bsp_addr
); // 400 picparm addr
156 PUSH_DATA (push
, inter_addr
); // 404 interparm addr
157 PUSH_DATA (push
, slice_size
<< 8); // 408 interparm size?
158 PUSH_DATA (push
, inter_addr
+ slice_size
+ bucket_size
); // 40c interdata addr
159 PUSH_DATA (push
, ring_size
<< 8); // 410 interdata size
160 PUSH_DATA (push
, inter_addr
+ slice_size
); // 414 bucket?
161 PUSH_DATA (push
, bucket_size
<< 8); // 418 bucket size? unshifted..
162 PUSH_DATA (push
, 0); // 41c targets
163 // TODO: Double check 414 / 418 with nvidia trace
166 #if NOUVEAU_VP3_DEBUG_FENCE
167 BEGIN_NV04(push
, SUBC_BSP(0x240), 3);
168 PUSH_DATAh(push
, dec
->fence_bo
->offset
);
169 PUSH_DATA (push
, dec
->fence_bo
->offset
);
170 PUSH_DATA (push
, dec
->fence_seq
);
172 BEGIN_NV04(push
, SUBC_BSP(0x300), 1);
180 if ((spin
++ & 0xff) == 0xff) {
181 debug_printf("b%u: %u\n", dec
->fence_seq
, dec
->fence_map
[0]);
182 dump_comm_bsp(dec
->comm
);
184 } while (dec
->fence_seq
> dec
->fence_map
[0]);
187 dump_comm_bsp(dec
->comm
);
188 return dec
->comm
->status
[comm_seq
& 0xf];
190 BEGIN_NV04(push
, SUBC_BSP(0x300), 1);