src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  * Copyright 2015 Samuel Pitoiset
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #define NVC0_PUSH_EXPLICIT_SPACE_CHECKING
  25
  26 #include "nvc0/nvc0_context.h"
  27 #include "nvc0/nvc0_query_hw.h"
  28 #include "nvc0/nvc0_query_hw_metric.h"
  29 #include "nvc0/nvc0_query_hw_sm.h"
  30
  31 #define NVC0_HW_QUERY_ALLOC_SPACE 256
  32
  33 bool
  34 nvc0_hw_query_allocate(struct nvc0_context *nvc0, struct nvc0_query *q,
  35                        int size)
  36 {
  37    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  38    struct nvc0_screen *screen = nvc0->screen;
  39    int ret;
  40
  41    if (hq->bo) {
  42       nouveau_bo_ref(NULL, &hq->bo);
  43       if (hq->mm) {
  44          if (hq->state == NVC0_HW_QUERY_STATE_READY)
  45             nouveau_mm_free(hq->mm);
  46          else
  47             nouveau_fence_work(screen->base.fence.current,
  48                                nouveau_mm_free_work, hq->mm);
  49       }
  50    }
  51    if (size) {
  52       hq->mm = nouveau_mm_allocate(screen->base.mm_GART, size, &hq->bo,
  53                                    &hq->base_offset);
  54       if (!hq->bo)
  55          return false;
  56       hq->offset = hq->base_offset;
  57
  58       ret = nouveau_bo_map(hq->bo, 0, screen->base.client);
  59       if (ret) {
  60          nvc0_hw_query_allocate(nvc0, q, 0);
  61          return false;
  62       }
  63       hq->data = (uint32_t *)((uint8_t *)hq->bo->map + hq->base_offset);
  64    }
  65    return true;
  66 }
  67
  68 static void
  69 nvc0_hw_query_get(struct nouveau_pushbuf *push, struct nvc0_query *q,
  70                   unsigned offset, uint32_t get)
  71 {
  72    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  73
  74    offset += hq->offset;
  75
  76    PUSH_SPACE(push, 5);
  77    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_WR);
  78    BEGIN_NVC0(push, NVC0_3D(QUERY_ADDRESS_HIGH), 4);
  79    PUSH_DATAh(push, hq->bo->offset + offset);
  80    PUSH_DATA (push, hq->bo->offset + offset);
  81    PUSH_DATA (push, hq->sequence);
  82    PUSH_DATA (push, get);
  83 }
  84
  85 static void
  86 nvc0_hw_query_rotate(struct nvc0_context *nvc0, struct nvc0_query *q)
  87 {
  88    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  89
  90    hq->offset += hq->rotate;
  91    hq->data += hq->rotate / sizeof(*hq->data);
  92    if (hq->offset - hq->base_offset == NVC0_HW_QUERY_ALLOC_SPACE)
  93       nvc0_hw_query_allocate(nvc0, q, NVC0_HW_QUERY_ALLOC_SPACE);
  94 }
  95
  96 static inline void
  97 nvc0_hw_query_update(struct nouveau_client *cli, struct nvc0_query *q)
  98 {
  99    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 100
 101    if (hq->is64bit) {
 102       if (nouveau_fence_signalled(hq->fence))
 103          hq->state = NVC0_HW_QUERY_STATE_READY;
 104    } else {
 105       if (hq->data[0] == hq->sequence)
 106          hq->state = NVC0_HW_QUERY_STATE_READY;
 107    }
 108 }
 109
 110 static void
 111 nvc0_hw_destroy_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 112 {
 113    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 114
 115    if (hq->funcs && hq->funcs->destroy_query) {
 116       hq->funcs->destroy_query(nvc0, hq);
 117       return;
 118    }
 119
 120    nvc0_hw_query_allocate(nvc0, q, 0);
 121    nouveau_fence_ref(NULL, &hq->fence);
 122    FREE(hq);
 123 }
 124
 125 static boolean
 126 nvc0_hw_begin_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 127 {
 128    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 129    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 130    bool ret = true;
 131
 132    if (hq->funcs && hq->funcs->begin_query)
 133       return hq->funcs->begin_query(nvc0, hq);
 134
 135    /* For occlusion queries we have to change the storage, because a previous
 136     * query might set the initial render conition to false even *after* we re-
 137     * initialized it to true.
 138     */
 139    if (hq->rotate) {
 140       nvc0_hw_query_rotate(nvc0, q);
 141
 142       /* XXX: can we do this with the GPU, and sync with respect to a previous
 143        *  query ?
 144        */
 145       hq->data[0] = hq->sequence; /* initialize sequence */
 146       hq->data[1] = 1; /* initial render condition = true */
 147       hq->data[4] = hq->sequence + 1; /* for comparison COND_MODE */
 148       hq->data[5] = 0;
 149    }
 150    hq->sequence++;
 151
 152    switch (q->type) {
 153    case PIPE_QUERY_OCCLUSION_COUNTER:
 154    case PIPE_QUERY_OCCLUSION_PREDICATE:
 155    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 156       if (nvc0->screen->num_occlusion_queries_active++) {
 157          nvc0_hw_query_get(push, q, 0x10, 0x0100f002);
 158       } else {
 159          PUSH_SPACE(push, 3);
 160          BEGIN_NVC0(push, NVC0_3D(COUNTER_RESET), 1);
 161          PUSH_DATA (push, NVC0_3D_COUNTER_RESET_SAMPLECNT);
 162          IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 1);
 163          /* Given that the counter is reset, the contents at 0x10 are
 164           * equivalent to doing the query -- we would get hq->sequence as the
 165           * payload and 0 as the reported value. This is already set up above
 166           * as in the hq->rotate case.
 167           */
 168       }
 169       break;
 170    case PIPE_QUERY_PRIMITIVES_GENERATED:
 171       nvc0_hw_query_get(push, q, 0x10, 0x09005002 | (q->index << 5));
 172       break;
 173    case PIPE_QUERY_PRIMITIVES_EMITTED:
 174       nvc0_hw_query_get(push, q, 0x10, 0x05805002 | (q->index << 5));
 175       break;
 176    case PIPE_QUERY_SO_STATISTICS:
 177       nvc0_hw_query_get(push, q, 0x20, 0x05805002 | (q->index << 5));
 178       nvc0_hw_query_get(push, q, 0x30, 0x06805002 | (q->index << 5));
 179       break;
 180    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 181       nvc0_hw_query_get(push, q, 0x10, 0x03005002 | (q->index << 5));
 182       break;
 183    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 184       /* XXX: This get actually writes the number of overflowed streams */
 185       nvc0_hw_query_get(push, q, 0x10, 0x0f005002);
 186       break;
 187    case PIPE_QUERY_TIME_ELAPSED:
 188       nvc0_hw_query_get(push, q, 0x10, 0x00005002);
 189       break;
 190    case PIPE_QUERY_PIPELINE_STATISTICS:
 191       nvc0_hw_query_get(push, q, 0xc0 + 0x00, 0x00801002); /* VFETCH, VERTICES */
 192       nvc0_hw_query_get(push, q, 0xc0 + 0x10, 0x01801002); /* VFETCH, PRIMS */
 193       nvc0_hw_query_get(push, q, 0xc0 + 0x20, 0x02802002); /* VP, LAUNCHES */
 194       nvc0_hw_query_get(push, q, 0xc0 + 0x30, 0x03806002); /* GP, LAUNCHES */
 195       nvc0_hw_query_get(push, q, 0xc0 + 0x40, 0x04806002); /* GP, PRIMS_OUT */
 196       nvc0_hw_query_get(push, q, 0xc0 + 0x50, 0x07804002); /* RAST, PRIMS_IN */
 197       nvc0_hw_query_get(push, q, 0xc0 + 0x60, 0x08804002); /* RAST, PRIMS_OUT */
 198       nvc0_hw_query_get(push, q, 0xc0 + 0x70, 0x0980a002); /* ROP, PIXELS */
 199       nvc0_hw_query_get(push, q, 0xc0 + 0x80, 0x0d808002); /* TCP, LAUNCHES */
 200       nvc0_hw_query_get(push, q, 0xc0 + 0x90, 0x0e809002); /* TEP, LAUNCHES */
 201       break;
 202    default:
 203       break;
 204    }
 205    hq->state = NVC0_HW_QUERY_STATE_ACTIVE;
 206    return ret;
 207 }
 208
 209 static void
 210 nvc0_hw_end_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 211 {
 212    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 213    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 214
 215    if (hq->funcs && hq->funcs->end_query) {
 216       hq->funcs->end_query(nvc0, hq);
 217       return;
 218    }
 219
 220    if (hq->state != NVC0_HW_QUERY_STATE_ACTIVE) {
 221       /* some queries don't require 'begin' to be called (e.g. GPU_FINISHED) */
 222       if (hq->rotate)
 223          nvc0_hw_query_rotate(nvc0, q);
 224       hq->sequence++;
 225    }
 226    hq->state = NVC0_HW_QUERY_STATE_ENDED;
 227
 228    switch (q->type) {
 229    case PIPE_QUERY_OCCLUSION_COUNTER:
 230    case PIPE_QUERY_OCCLUSION_PREDICATE:
 231    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 232       nvc0_hw_query_get(push, q, 0, 0x0100f002);
 233       if (--nvc0->screen->num_occlusion_queries_active == 0) {
 234          PUSH_SPACE(push, 1);
 235          IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 0);
 236       }
 237       break;
 238    case PIPE_QUERY_PRIMITIVES_GENERATED:
 239       nvc0_hw_query_get(push, q, 0, 0x09005002 | (q->index << 5));
 240       break;
 241    case PIPE_QUERY_PRIMITIVES_EMITTED:
 242       nvc0_hw_query_get(push, q, 0, 0x05805002 | (q->index << 5));
 243       break;
 244    case PIPE_QUERY_SO_STATISTICS:
 245       nvc0_hw_query_get(push, q, 0x00, 0x05805002 | (q->index << 5));
 246       nvc0_hw_query_get(push, q, 0x10, 0x06805002 | (q->index << 5));
 247       break;
 248    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 249       nvc0_hw_query_get(push, q, 0x00, 0x03005002 | (q->index << 5));
 250       break;
 251    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 252       /* XXX: This get actually writes the number of overflowed streams */
 253       nvc0_hw_query_get(push, q, 0x00, 0x0f005002);
 254       break;
 255    case PIPE_QUERY_TIMESTAMP:
 256    case PIPE_QUERY_TIME_ELAPSED:
 257       nvc0_hw_query_get(push, q, 0, 0x00005002);
 258       break;
 259    case PIPE_QUERY_GPU_FINISHED:
 260       nvc0_hw_query_get(push, q, 0, 0x1000f010);
 261       break;
 262    case PIPE_QUERY_PIPELINE_STATISTICS:
 263       nvc0_hw_query_get(push, q, 0x00, 0x00801002); /* VFETCH, VERTICES */
 264       nvc0_hw_query_get(push, q, 0x10, 0x01801002); /* VFETCH, PRIMS */
 265       nvc0_hw_query_get(push, q, 0x20, 0x02802002); /* VP, LAUNCHES */
 266       nvc0_hw_query_get(push, q, 0x30, 0x03806002); /* GP, LAUNCHES */
 267       nvc0_hw_query_get(push, q, 0x40, 0x04806002); /* GP, PRIMS_OUT */
 268       nvc0_hw_query_get(push, q, 0x50, 0x07804002); /* RAST, PRIMS_IN */
 269       nvc0_hw_query_get(push, q, 0x60, 0x08804002); /* RAST, PRIMS_OUT */
 270       nvc0_hw_query_get(push, q, 0x70, 0x0980a002); /* ROP, PIXELS */
 271       nvc0_hw_query_get(push, q, 0x80, 0x0d808002); /* TCP, LAUNCHES */
 272       nvc0_hw_query_get(push, q, 0x90, 0x0e809002); /* TEP, LAUNCHES */
 273       break;
 274    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 275       /* This query is not issued on GPU because disjoint is forced to false */
 276       hq->state = NVC0_HW_QUERY_STATE_READY;
 277       break;
 278    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 279       /* indexed by TFB buffer instead of by vertex stream */
 280       nvc0_hw_query_get(push, q, 0x00, 0x0d005002 | (q->index << 5));
 281       break;
 282    default:
 283       break;
 284    }
 285    if (hq->is64bit)
 286       nouveau_fence_ref(nvc0->screen->base.fence.current, &hq->fence);
 287 }
 288
 289 static boolean
 290 nvc0_hw_get_query_result(struct nvc0_context *nvc0, struct nvc0_query *q,
 291                          boolean wait, union pipe_query_result *result)
 292 {
 293    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 294    uint64_t *res64 = (uint64_t*)result;
 295    uint32_t *res32 = (uint32_t*)result;
 296    uint8_t *res8 = (uint8_t*)result;
 297    uint64_t *data64 = (uint64_t *)hq->data;
 298    unsigned i;
 299
 300    if (hq->funcs && hq->funcs->get_query_result)
 301       return hq->funcs->get_query_result(nvc0, hq, wait, result);
 302
 303    if (hq->state != NVC0_HW_QUERY_STATE_READY)
 304       nvc0_hw_query_update(nvc0->screen->base.client, q);
 305
 306    if (hq->state != NVC0_HW_QUERY_STATE_READY) {
 307       if (!wait) {
 308          if (hq->state != NVC0_HW_QUERY_STATE_FLUSHED) {
 309             hq->state = NVC0_HW_QUERY_STATE_FLUSHED;
 310             /* flush for silly apps that spin on GL_QUERY_RESULT_AVAILABLE */
 311             PUSH_KICK(nvc0->base.pushbuf);
 312          }
 313          return false;
 314       }
 315       if (nouveau_bo_wait(hq->bo, NOUVEAU_BO_RD, nvc0->screen->base.client))
 316          return false;
 317       NOUVEAU_DRV_STAT(&nvc0->screen->base, query_sync_count, 1);
 318    }
 319    hq->state = NVC0_HW_QUERY_STATE_READY;
 320
 321    switch (q->type) {
 322    case PIPE_QUERY_GPU_FINISHED:
 323       res8[0] = true;
 324       break;
 325    case PIPE_QUERY_OCCLUSION_COUNTER: /* u32 sequence, u32 count, u64 time */
 326       res64[0] = hq->data[1] - hq->data[5];
 327       break;
 328    case PIPE_QUERY_OCCLUSION_PREDICATE:
 329    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 330       res8[0] = hq->data[1] != hq->data[5];
 331       break;
 332    case PIPE_QUERY_PRIMITIVES_GENERATED: /* u64 count, u64 time */
 333    case PIPE_QUERY_PRIMITIVES_EMITTED: /* u64 count, u64 time */
 334       res64[0] = data64[0] - data64[2];
 335       break;
 336    case PIPE_QUERY_SO_STATISTICS:
 337       res64[0] = data64[0] - data64[4];
 338       res64[1] = data64[2] - data64[6];
 339       break;
 340    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 341    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 342       res8[0] = data64[0] != data64[2];
 343       break;
 344    case PIPE_QUERY_TIMESTAMP:
 345       res64[0] = data64[1];
 346       break;
 347    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 348       res64[0] = 1000000000;
 349       res8[8] = false;
 350       break;
 351    case PIPE_QUERY_TIME_ELAPSED:
 352       res64[0] = data64[1] - data64[3];
 353       break;
 354    case PIPE_QUERY_PIPELINE_STATISTICS:
 355       for (i = 0; i < 10; ++i)
 356          res64[i] = data64[i * 2] - data64[24 + i * 2];
 357       result->pipeline_statistics.cs_invocations = 0;
 358       break;
 359    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 360       res32[0] = hq->data[1];
 361       break;
 362    default:
 363       assert(0); /* can't happen, we don't create queries with invalid type */
 364       return false;
 365    }
 366
 367    return true;
 368 }
 369
 370 static void
 371 nvc0_hw_get_query_result_resource(struct nvc0_context *nvc0,
 372                                   struct nvc0_query *q,
 373                                   boolean wait,
 374                                   enum pipe_query_value_type result_type,
 375                                   int index,
 376                                   struct pipe_resource *resource,
 377                                   unsigned offset)
 378 {
 379    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 380    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 381    struct nv04_resource *buf = nv04_resource(resource);
 382    unsigned qoffset = 0, stride;
 383
 384    assert(!hq->funcs || !hq->funcs->get_query_result);
 385
 386    if (index == -1) {
 387       /* TODO: Use a macro to write the availability of the query */
 388       if (hq->state != NVC0_HW_QUERY_STATE_READY)
 389          nvc0_hw_query_update(nvc0->screen->base.client, q);
 390       uint32_t ready[2] = {hq->state == NVC0_HW_QUERY_STATE_READY};
 391       nvc0->base.push_cb(&nvc0->base, buf, offset,
 392                          result_type >= PIPE_QUERY_TYPE_I64 ? 2 : 1,
 393                          ready);
 394
 395       util_range_add(&buf->valid_buffer_range, offset,
 396                      offset + (result_type >= PIPE_QUERY_TYPE_I64 ? 8 : 4));
 397
 398       nvc0_resource_validate(buf, NOUVEAU_BO_WR);
 399
 400       return;
 401    }
 402
 403    /* If the fence guarding this query has not been emitted, that makes a lot
 404     * of the following logic more complicated.
 405     */
 406    if (hq->is64bit && hq->fence->state < NOUVEAU_FENCE_STATE_EMITTED)
 407       nouveau_fence_emit(hq->fence);
 408
 409    /* We either need to compute a 32- or 64-bit difference between 2 values,
 410     * and then store the result as either a 32- or 64-bit value. As such let's
 411     * treat all inputs as 64-bit (and just push an extra 0 for the 32-bit
 412     * ones), and have one macro that clamps result to i32, u32, or just
 413     * outputs the difference (no need to worry about 64-bit clamping).
 414     */
 415    if (hq->state != NVC0_HW_QUERY_STATE_READY)
 416       nvc0_hw_query_update(nvc0->screen->base.client, q);
 417
 418    if (wait && hq->state != NVC0_HW_QUERY_STATE_READY)
 419       nvc0_hw_query_fifo_wait(nvc0, q);
 420
 421    nouveau_pushbuf_space(push, 32, 2, 0);
 422    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 423    PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
 424    BEGIN_1IC0(push, NVC0_3D(MACRO_QUERY_BUFFER_WRITE), 9);
 425    switch (q->type) {
 426    case PIPE_QUERY_OCCLUSION_PREDICATE:
 427    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: /* XXX what if 64-bit? */
 428    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 429    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 430       PUSH_DATA(push, 0x00000001);
 431       break;
 432    default:
 433       if (result_type == PIPE_QUERY_TYPE_I32)
 434          PUSH_DATA(push, 0x7fffffff);
 435       else if (result_type == PIPE_QUERY_TYPE_U32)
 436          PUSH_DATA(push, 0xffffffff);
 437       else
 438          PUSH_DATA(push, 0x00000000);
 439       break;
 440    }
 441
 442    switch (q->type) {
 443    case PIPE_QUERY_SO_STATISTICS:
 444       stride = 2;
 445       break;
 446    case PIPE_QUERY_PIPELINE_STATISTICS:
 447       stride = 12;
 448       break;
 449    case PIPE_QUERY_TIME_ELAPSED:
 450    case PIPE_QUERY_TIMESTAMP:
 451       qoffset = 8;
 452       /* fallthrough */
 453    default:
 454       assert(index == 0);
 455       stride = 1;
 456       break;
 457    }
 458
 459    if (hq->is64bit || qoffset) {
 460       nouveau_pushbuf_data(push, hq->bo, hq->offset + qoffset + 16 * index,
 461                            8 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 462       if (q->type == PIPE_QUERY_TIMESTAMP) {
 463          PUSH_DATA(push, 0);
 464          PUSH_DATA(push, 0);
 465       } else {
 466          nouveau_pushbuf_data(push, hq->bo, hq->offset + qoffset +
 467                               16 * (index + stride),
 468                               8 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 469       }
 470    } else {
 471       nouveau_pushbuf_data(push, hq->bo, hq->offset + 4,
 472                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 473       PUSH_DATA(push, 0);
 474       nouveau_pushbuf_data(push, hq->bo, hq->offset + 16 + 4,
 475                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 476       PUSH_DATA(push, 0);
 477    }
 478
 479    if (wait || hq->state == NVC0_HW_QUERY_STATE_READY) {
 480       PUSH_DATA(push, 0);
 481       PUSH_DATA(push, 0);
 482    } else if (hq->is64bit) {
 483       PUSH_DATA(push, hq->fence->sequence);
 484       nouveau_pushbuf_data(push, nvc0->screen->fence.bo, 0,
 485                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 486    } else {
 487       PUSH_DATA(push, hq->sequence);
 488       nouveau_pushbuf_data(push, hq->bo, hq->offset,
 489                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 490    }
 491    PUSH_DATAh(push, buf->address + offset);
 492    PUSH_DATA (push, buf->address + offset);
 493
 494    util_range_add(&buf->valid_buffer_range, offset,
 495                   offset + (result_type >= PIPE_QUERY_TYPE_I64 ? 8 : 4));
 496
 497    nvc0_resource_validate(buf, NOUVEAU_BO_WR);
 498 }
 499
 500 static const struct nvc0_query_funcs hw_query_funcs = {
 501    .destroy_query = nvc0_hw_destroy_query,
 502    .begin_query = nvc0_hw_begin_query,
 503    .end_query = nvc0_hw_end_query,
 504    .get_query_result = nvc0_hw_get_query_result,
 505    .get_query_result_resource = nvc0_hw_get_query_result_resource,
 506 };
 507
 508 struct nvc0_query *
 509 nvc0_hw_create_query(struct nvc0_context *nvc0, unsigned type, unsigned index)
 510 {
 511    struct nvc0_hw_query *hq;
 512    struct nvc0_query *q;
 513    unsigned space = NVC0_HW_QUERY_ALLOC_SPACE;
 514
 515    hq = nvc0_hw_sm_create_query(nvc0, type);
 516    if (hq) {
 517       hq->base.funcs = &hw_query_funcs;
 518       return (struct nvc0_query *)hq;
 519    }
 520
 521    hq = nvc0_hw_metric_create_query(nvc0, type);
 522    if (hq) {
 523       hq->base.funcs = &hw_query_funcs;
 524       return (struct nvc0_query *)hq;
 525    }
 526
 527    hq = CALLOC_STRUCT(nvc0_hw_query);
 528    if (!hq)
 529       return NULL;
 530
 531    q = &hq->base;
 532    q->funcs = &hw_query_funcs;
 533    q->type = type;
 534    q->index = index;
 535
 536    switch (q->type) {
 537    case PIPE_QUERY_OCCLUSION_COUNTER:
 538    case PIPE_QUERY_OCCLUSION_PREDICATE:
 539    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 540       hq->rotate = 32;
 541       space = NVC0_HW_QUERY_ALLOC_SPACE;
 542       break;
 543    case PIPE_QUERY_PIPELINE_STATISTICS:
 544       hq->is64bit = true;
 545       space = 512;
 546       break;
 547    case PIPE_QUERY_SO_STATISTICS:
 548       hq->is64bit = true;
 549       space = 64;
 550       break;
 551    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 552    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 553    case PIPE_QUERY_PRIMITIVES_GENERATED:
 554    case PIPE_QUERY_PRIMITIVES_EMITTED:
 555       hq->is64bit = true;
 556       space = 32;
 557       break;
 558    case PIPE_QUERY_TIME_ELAPSED:
 559    case PIPE_QUERY_TIMESTAMP:
 560    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 561    case PIPE_QUERY_GPU_FINISHED:
 562       space = 32;
 563       break;
 564    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 565       space = 16;
 566       break;
 567    default:
 568       debug_printf("invalid query type: %u\n", type);
 569       FREE(q);
 570       return NULL;
 571    }
 572
 573    if (!nvc0_hw_query_allocate(nvc0, q, space)) {
 574       FREE(hq);
 575       return NULL;
 576    }
 577
 578    if (hq->rotate) {
 579       /* we advance before query_begin ! */
 580       hq->offset -= hq->rotate;
 581       hq->data -= hq->rotate / sizeof(*hq->data);
 582    } else
 583    if (!hq->is64bit)
 584       hq->data[0] = 0; /* initialize sequence */
 585
 586    return q;
 587 }
 588
 589 int
 590 nvc0_hw_get_driver_query_info(struct nvc0_screen *screen, unsigned id,
 591                               struct pipe_driver_query_info *info)
 592 {
 593    int num_hw_sm_queries = 0, num_hw_metric_queries = 0;
 594
 595    num_hw_sm_queries = nvc0_hw_sm_get_driver_query_info(screen, 0, NULL);
 596    num_hw_metric_queries =
 597       nvc0_hw_metric_get_driver_query_info(screen, 0, NULL);
 598
 599    if (!info)
 600       return num_hw_sm_queries + num_hw_metric_queries;
 601
 602    if (id < num_hw_sm_queries)
 603       return nvc0_hw_sm_get_driver_query_info(screen, id, info);
 604
 605    return nvc0_hw_metric_get_driver_query_info(screen,
 606                                                id - num_hw_sm_queries, info);
 607 }
 608
 609 void
 610 nvc0_hw_query_pushbuf_submit(struct nouveau_pushbuf *push,
 611                              struct nvc0_query *q, unsigned result_offset)
 612 {
 613    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 614
 615    PUSH_REFN(push, hq->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
 616    nouveau_pushbuf_data(push, hq->bo, hq->offset + result_offset, 4 |
 617                         NVC0_IB_ENTRY_1_NO_PREFETCH);
 618 }
 619
 620 void
 621 nvc0_hw_query_fifo_wait(struct nvc0_context *nvc0, struct nvc0_query *q)
 622 {
 623    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 624    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 625    unsigned offset = hq->offset;
 626
 627    /* ensure the query's fence has been emitted */
 628    if (hq->is64bit && hq->fence->state < NOUVEAU_FENCE_STATE_EMITTED)
 629       nouveau_fence_emit(hq->fence);
 630
 631    PUSH_SPACE(push, 5);
 632    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 633    BEGIN_NVC0(push, SUBC_3D(NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH), 4);
 634    if (hq->is64bit) {
 635       PUSH_DATAh(push, nvc0->screen->fence.bo->offset);
 636       PUSH_DATA (push, nvc0->screen->fence.bo->offset);
 637       PUSH_DATA (push, hq->fence->sequence);
 638    } else {
 639       PUSH_DATAh(push, hq->bo->offset + offset);
 640       PUSH_DATA (push, hq->bo->offset + offset);
 641       PUSH_DATA (push, hq->sequence);
 642    }
 643    PUSH_DATA (push, (1 << 12) |
 644               NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL);
 645 }