src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.c

   1 /*
   2  * Copyright 2011 Christoph Bumiller
   3  * Copyright 2015 Samuel Pitoiset
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice shall be included in
  13  * all copies or substantial portions of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  19  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  20  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  21  * OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23
  24 #define NVC0_PUSH_EXPLICIT_SPACE_CHECKING
  25
  26 #include "nvc0/nvc0_context.h"
  27 #include "nvc0/nvc0_query_hw.h"
  28 #include "nvc0/nvc0_query_hw_metric.h"
  29 #include "nvc0/nvc0_query_hw_sm.h"
  30
  31 #define NVC0_HW_QUERY_ALLOC_SPACE 256
  32
  33 bool
  34 nvc0_hw_query_allocate(struct nvc0_context *nvc0, struct nvc0_query *q,
  35                        int size)
  36 {
  37    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  38    struct nvc0_screen *screen = nvc0->screen;
  39    int ret;
  40
  41    if (hq->bo) {
  42       nouveau_bo_ref(NULL, &hq->bo);
  43       if (hq->mm) {
  44          if (hq->state == NVC0_HW_QUERY_STATE_READY)
  45             nouveau_mm_free(hq->mm);
  46          else
  47             nouveau_fence_work(screen->base.fence.current,
  48                                nouveau_mm_free_work, hq->mm);
  49       }
  50    }
  51    if (size) {
  52       hq->mm = nouveau_mm_allocate(screen->base.mm_GART, size, &hq->bo,
  53                                    &hq->base_offset);
  54       if (!hq->bo)
  55          return false;
  56       hq->offset = hq->base_offset;
  57
  58       ret = nouveau_bo_map(hq->bo, 0, screen->base.client);
  59       if (ret) {
  60          nvc0_hw_query_allocate(nvc0, q, 0);
  61          return false;
  62       }
  63       hq->data = (uint32_t *)((uint8_t *)hq->bo->map + hq->base_offset);
  64    }
  65    return true;
  66 }
  67
  68 static void
  69 nvc0_hw_query_get(struct nouveau_pushbuf *push, struct nvc0_query *q,
  70                   unsigned offset, uint32_t get)
  71 {
  72    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  73
  74    offset += hq->offset;
  75
  76    PUSH_SPACE(push, 5);
  77    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_WR);
  78    BEGIN_NVC0(push, NVC0_3D(QUERY_ADDRESS_HIGH), 4);
  79    PUSH_DATAh(push, hq->bo->offset + offset);
  80    PUSH_DATA (push, hq->bo->offset + offset);
  81    PUSH_DATA (push, hq->sequence);
  82    PUSH_DATA (push, get);
  83 }
  84
  85 static void
  86 nvc0_hw_query_rotate(struct nvc0_context *nvc0, struct nvc0_query *q)
  87 {
  88    struct nvc0_hw_query *hq = nvc0_hw_query(q);
  89
  90    hq->offset += hq->rotate;
  91    hq->data += hq->rotate / sizeof(*hq->data);
  92    if (hq->offset - hq->base_offset == NVC0_HW_QUERY_ALLOC_SPACE)
  93       nvc0_hw_query_allocate(nvc0, q, NVC0_HW_QUERY_ALLOC_SPACE);
  94 }
  95
  96 static inline void
  97 nvc0_hw_query_update(struct nouveau_client *cli, struct nvc0_query *q)
  98 {
  99    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 100
 101    if (hq->is64bit) {
 102       if (nouveau_fence_signalled(hq->fence))
 103          hq->state = NVC0_HW_QUERY_STATE_READY;
 104    } else {
 105       if (hq->data[0] == hq->sequence)
 106          hq->state = NVC0_HW_QUERY_STATE_READY;
 107    }
 108 }
 109
 110 static void
 111 nvc0_hw_destroy_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 112 {
 113    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 114
 115    if (hq->funcs && hq->funcs->destroy_query) {
 116       hq->funcs->destroy_query(nvc0, hq);
 117       return;
 118    }
 119
 120    nvc0_hw_query_allocate(nvc0, q, 0);
 121    nouveau_fence_ref(NULL, &hq->fence);
 122    FREE(hq);
 123 }
 124
 125 static boolean
 126 nvc0_hw_begin_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 127 {
 128    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 129    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 130    bool ret = true;
 131
 132    if (hq->funcs && hq->funcs->begin_query)
 133       return hq->funcs->begin_query(nvc0, hq);
 134
 135    /* For occlusion queries we have to change the storage, because a previous
 136     * query might set the initial render conition to false even *after* we re-
 137     * initialized it to true.
 138     */
 139    if (hq->rotate) {
 140       nvc0_hw_query_rotate(nvc0, q);
 141
 142       /* XXX: can we do this with the GPU, and sync with respect to a previous
 143        *  query ?
 144        */
 145       hq->data[0] = hq->sequence; /* initialize sequence */
 146       hq->data[1] = 1; /* initial render condition = true */
 147       hq->data[4] = hq->sequence + 1; /* for comparison COND_MODE */
 148       hq->data[5] = 0;
 149    }
 150    hq->sequence++;
 151
 152    switch (q->type) {
 153    case PIPE_QUERY_OCCLUSION_COUNTER:
 154    case PIPE_QUERY_OCCLUSION_PREDICATE:
 155    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 156       if (nvc0->screen->num_occlusion_queries_active++) {
 157          nvc0_hw_query_get(push, q, 0x10, 0x0100f002);
 158       } else {
 159          PUSH_SPACE(push, 3);
 160          BEGIN_NVC0(push, NVC0_3D(COUNTER_RESET), 1);
 161          PUSH_DATA (push, NVC0_3D_COUNTER_RESET_SAMPLECNT);
 162          IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 1);
 163          /* Given that the counter is reset, the contents at 0x10 are
 164           * equivalent to doing the query -- we would get hq->sequence as the
 165           * payload and 0 as the reported value. This is already set up above
 166           * as in the hq->rotate case.
 167           */
 168       }
 169       break;
 170    case PIPE_QUERY_PRIMITIVES_GENERATED:
 171       nvc0_hw_query_get(push, q, 0x10, 0x09005002 | (q->index << 5));
 172       break;
 173    case PIPE_QUERY_PRIMITIVES_EMITTED:
 174       nvc0_hw_query_get(push, q, 0x10, 0x05805002 | (q->index << 5));
 175       break;
 176    case PIPE_QUERY_SO_STATISTICS:
 177       nvc0_hw_query_get(push, q, 0x20, 0x05805002 | (q->index << 5));
 178       nvc0_hw_query_get(push, q, 0x30, 0x06805002 | (q->index << 5));
 179       break;
 180    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 181       nvc0_hw_query_get(push, q, 0x10, 0x03005002 | (q->index << 5));
 182       break;
 183    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 184       /* XXX: This get actually writes the number of overflowed streams */
 185       nvc0_hw_query_get(push, q, 0x10, 0x0f005002);
 186       break;
 187    case PIPE_QUERY_TIME_ELAPSED:
 188       nvc0_hw_query_get(push, q, 0x10, 0x00005002);
 189       break;
 190    case PIPE_QUERY_PIPELINE_STATISTICS:
 191       nvc0_hw_query_get(push, q, 0xc0 + 0x00, 0x00801002); /* VFETCH, VERTICES */
 192       nvc0_hw_query_get(push, q, 0xc0 + 0x10, 0x01801002); /* VFETCH, PRIMS */
 193       nvc0_hw_query_get(push, q, 0xc0 + 0x20, 0x02802002); /* VP, LAUNCHES */
 194       nvc0_hw_query_get(push, q, 0xc0 + 0x30, 0x03806002); /* GP, LAUNCHES */
 195       nvc0_hw_query_get(push, q, 0xc0 + 0x40, 0x04806002); /* GP, PRIMS_OUT */
 196       nvc0_hw_query_get(push, q, 0xc0 + 0x50, 0x07804002); /* RAST, PRIMS_IN */
 197       nvc0_hw_query_get(push, q, 0xc0 + 0x60, 0x08804002); /* RAST, PRIMS_OUT */
 198       nvc0_hw_query_get(push, q, 0xc0 + 0x70, 0x0980a002); /* ROP, PIXELS */
 199       nvc0_hw_query_get(push, q, 0xc0 + 0x80, 0x0d808002); /* TCP, LAUNCHES */
 200       nvc0_hw_query_get(push, q, 0xc0 + 0x90, 0x0e809002); /* TEP, LAUNCHES */
 201       ((uint64_t *)hq->data)[(12 + 10) * 2] = 0;
 202       break;
 203    default:
 204       break;
 205    }
 206    hq->state = NVC0_HW_QUERY_STATE_ACTIVE;
 207    return ret;
 208 }
 209
 210 static void
 211 nvc0_hw_end_query(struct nvc0_context *nvc0, struct nvc0_query *q)
 212 {
 213    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 214    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 215
 216    if (hq->funcs && hq->funcs->end_query) {
 217       hq->funcs->end_query(nvc0, hq);
 218       return;
 219    }
 220
 221    if (hq->state != NVC0_HW_QUERY_STATE_ACTIVE) {
 222       /* some queries don't require 'begin' to be called (e.g. GPU_FINISHED) */
 223       if (hq->rotate)
 224          nvc0_hw_query_rotate(nvc0, q);
 225       hq->sequence++;
 226    }
 227    hq->state = NVC0_HW_QUERY_STATE_ENDED;
 228
 229    switch (q->type) {
 230    case PIPE_QUERY_OCCLUSION_COUNTER:
 231    case PIPE_QUERY_OCCLUSION_PREDICATE:
 232    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 233       nvc0_hw_query_get(push, q, 0, 0x0100f002);
 234       if (--nvc0->screen->num_occlusion_queries_active == 0) {
 235          PUSH_SPACE(push, 1);
 236          IMMED_NVC0(push, NVC0_3D(SAMPLECNT_ENABLE), 0);
 237       }
 238       break;
 239    case PIPE_QUERY_PRIMITIVES_GENERATED:
 240       nvc0_hw_query_get(push, q, 0, 0x09005002 | (q->index << 5));
 241       break;
 242    case PIPE_QUERY_PRIMITIVES_EMITTED:
 243       nvc0_hw_query_get(push, q, 0, 0x05805002 | (q->index << 5));
 244       break;
 245    case PIPE_QUERY_SO_STATISTICS:
 246       nvc0_hw_query_get(push, q, 0x00, 0x05805002 | (q->index << 5));
 247       nvc0_hw_query_get(push, q, 0x10, 0x06805002 | (q->index << 5));
 248       break;
 249    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 250       nvc0_hw_query_get(push, q, 0x00, 0x03005002 | (q->index << 5));
 251       break;
 252    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 253       /* XXX: This get actually writes the number of overflowed streams */
 254       nvc0_hw_query_get(push, q, 0x00, 0x0f005002);
 255       break;
 256    case PIPE_QUERY_TIMESTAMP:
 257    case PIPE_QUERY_TIME_ELAPSED:
 258       nvc0_hw_query_get(push, q, 0, 0x00005002);
 259       break;
 260    case PIPE_QUERY_GPU_FINISHED:
 261       nvc0_hw_query_get(push, q, 0, 0x1000f010);
 262       break;
 263    case PIPE_QUERY_PIPELINE_STATISTICS:
 264       nvc0_hw_query_get(push, q, 0x00, 0x00801002); /* VFETCH, VERTICES */
 265       nvc0_hw_query_get(push, q, 0x10, 0x01801002); /* VFETCH, PRIMS */
 266       nvc0_hw_query_get(push, q, 0x20, 0x02802002); /* VP, LAUNCHES */
 267       nvc0_hw_query_get(push, q, 0x30, 0x03806002); /* GP, LAUNCHES */
 268       nvc0_hw_query_get(push, q, 0x40, 0x04806002); /* GP, PRIMS_OUT */
 269       nvc0_hw_query_get(push, q, 0x50, 0x07804002); /* RAST, PRIMS_IN */
 270       nvc0_hw_query_get(push, q, 0x60, 0x08804002); /* RAST, PRIMS_OUT */
 271       nvc0_hw_query_get(push, q, 0x70, 0x0980a002); /* ROP, PIXELS */
 272       nvc0_hw_query_get(push, q, 0x80, 0x0d808002); /* TCP, LAUNCHES */
 273       nvc0_hw_query_get(push, q, 0x90, 0x0e809002); /* TEP, LAUNCHES */
 274       ((uint64_t *)hq->data)[10 * 2] = 0;
 275       break;
 276    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 277       /* This query is not issued on GPU because disjoint is forced to false */
 278       hq->state = NVC0_HW_QUERY_STATE_READY;
 279       break;
 280    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 281       /* indexed by TFB buffer instead of by vertex stream */
 282       nvc0_hw_query_get(push, q, 0x00, 0x0d005002 | (q->index << 5));
 283       break;
 284    default:
 285       break;
 286    }
 287    if (hq->is64bit)
 288       nouveau_fence_ref(nvc0->screen->base.fence.current, &hq->fence);
 289 }
 290
 291 static boolean
 292 nvc0_hw_get_query_result(struct nvc0_context *nvc0, struct nvc0_query *q,
 293                          boolean wait, union pipe_query_result *result)
 294 {
 295    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 296    uint64_t *res64 = (uint64_t*)result;
 297    uint32_t *res32 = (uint32_t*)result;
 298    uint8_t *res8 = (uint8_t*)result;
 299    uint64_t *data64 = (uint64_t *)hq->data;
 300    unsigned i;
 301
 302    if (hq->funcs && hq->funcs->get_query_result)
 303       return hq->funcs->get_query_result(nvc0, hq, wait, result);
 304
 305    if (hq->state != NVC0_HW_QUERY_STATE_READY)
 306       nvc0_hw_query_update(nvc0->screen->base.client, q);
 307
 308    if (hq->state != NVC0_HW_QUERY_STATE_READY) {
 309       if (!wait) {
 310          if (hq->state != NVC0_HW_QUERY_STATE_FLUSHED) {
 311             hq->state = NVC0_HW_QUERY_STATE_FLUSHED;
 312             /* flush for silly apps that spin on GL_QUERY_RESULT_AVAILABLE */
 313             PUSH_KICK(nvc0->base.pushbuf);
 314          }
 315          return false;
 316       }
 317       if (nouveau_bo_wait(hq->bo, NOUVEAU_BO_RD, nvc0->screen->base.client))
 318          return false;
 319       NOUVEAU_DRV_STAT(&nvc0->screen->base, query_sync_count, 1);
 320    }
 321    hq->state = NVC0_HW_QUERY_STATE_READY;
 322
 323    switch (q->type) {
 324    case PIPE_QUERY_GPU_FINISHED:
 325       res8[0] = true;
 326       break;
 327    case PIPE_QUERY_OCCLUSION_COUNTER: /* u32 sequence, u32 count, u64 time */
 328       res64[0] = hq->data[1] - hq->data[5];
 329       break;
 330    case PIPE_QUERY_OCCLUSION_PREDICATE:
 331    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 332       res8[0] = hq->data[1] != hq->data[5];
 333       break;
 334    case PIPE_QUERY_PRIMITIVES_GENERATED: /* u64 count, u64 time */
 335    case PIPE_QUERY_PRIMITIVES_EMITTED: /* u64 count, u64 time */
 336       res64[0] = data64[0] - data64[2];
 337       break;
 338    case PIPE_QUERY_SO_STATISTICS:
 339       res64[0] = data64[0] - data64[4];
 340       res64[1] = data64[2] - data64[6];
 341       break;
 342    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 343    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 344       res8[0] = data64[0] != data64[2];
 345       break;
 346    case PIPE_QUERY_TIMESTAMP:
 347       res64[0] = data64[1];
 348       break;
 349    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 350       res64[0] = 1000000000;
 351       res8[8] = false;
 352       break;
 353    case PIPE_QUERY_TIME_ELAPSED:
 354       res64[0] = data64[1] - data64[3];
 355       break;
 356    case PIPE_QUERY_PIPELINE_STATISTICS:
 357       for (i = 0; i < 10; ++i)
 358          res64[i] = data64[i * 2] - data64[24 + i * 2];
 359       result->pipeline_statistics.cs_invocations = 0;
 360       break;
 361    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 362       res32[0] = hq->data[1];
 363       break;
 364    default:
 365       assert(0); /* can't happen, we don't create queries with invalid type */
 366       return false;
 367    }
 368
 369    return true;
 370 }
 371
 372 static void
 373 nvc0_hw_get_query_result_resource(struct nvc0_context *nvc0,
 374                                   struct nvc0_query *q,
 375                                   boolean wait,
 376                                   enum pipe_query_value_type result_type,
 377                                   int index,
 378                                   struct pipe_resource *resource,
 379                                   unsigned offset)
 380 {
 381    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 382    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 383    struct nv04_resource *buf = nv04_resource(resource);
 384    unsigned qoffset = 0, stride;
 385
 386    assert(!hq->funcs || !hq->funcs->get_query_result);
 387
 388    if (index == -1) {
 389       /* TODO: Use a macro to write the availability of the query */
 390       if (hq->state != NVC0_HW_QUERY_STATE_READY)
 391          nvc0_hw_query_update(nvc0->screen->base.client, q);
 392       uint32_t ready[2] = {hq->state == NVC0_HW_QUERY_STATE_READY};
 393       nvc0->base.push_cb(&nvc0->base, buf, offset,
 394                          result_type >= PIPE_QUERY_TYPE_I64 ? 2 : 1,
 395                          ready);
 396
 397       util_range_add(&buf->valid_buffer_range, offset,
 398                      offset + (result_type >= PIPE_QUERY_TYPE_I64 ? 8 : 4));
 399
 400       nvc0_resource_validate(buf, NOUVEAU_BO_WR);
 401
 402       return;
 403    }
 404
 405    /* If the fence guarding this query has not been emitted, that makes a lot
 406     * of the following logic more complicated.
 407     */
 408    if (hq->is64bit && hq->fence->state < NOUVEAU_FENCE_STATE_EMITTED)
 409       nouveau_fence_emit(hq->fence);
 410
 411    /* We either need to compute a 32- or 64-bit difference between 2 values,
 412     * and then store the result as either a 32- or 64-bit value. As such let's
 413     * treat all inputs as 64-bit (and just push an extra 0 for the 32-bit
 414     * ones), and have one macro that clamps result to i32, u32, or just
 415     * outputs the difference (no need to worry about 64-bit clamping).
 416     */
 417    if (hq->state != NVC0_HW_QUERY_STATE_READY)
 418       nvc0_hw_query_update(nvc0->screen->base.client, q);
 419
 420    if (wait && hq->state != NVC0_HW_QUERY_STATE_READY)
 421       nvc0_hw_query_fifo_wait(nvc0, q);
 422
 423    nouveau_pushbuf_space(push, 32, 2, 0);
 424    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 425    PUSH_REFN (push, buf->bo, buf->domain | NOUVEAU_BO_WR);
 426    BEGIN_1IC0(push, NVC0_3D(MACRO_QUERY_BUFFER_WRITE), 9);
 427    switch (q->type) {
 428    case PIPE_QUERY_OCCLUSION_PREDICATE:
 429    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE: /* XXX what if 64-bit? */
 430    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 431    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 432       PUSH_DATA(push, 0x00000001);
 433       break;
 434    default:
 435       if (result_type == PIPE_QUERY_TYPE_I32)
 436          PUSH_DATA(push, 0x7fffffff);
 437       else if (result_type == PIPE_QUERY_TYPE_U32)
 438          PUSH_DATA(push, 0xffffffff);
 439       else
 440          PUSH_DATA(push, 0x00000000);
 441       break;
 442    }
 443
 444    switch (q->type) {
 445    case PIPE_QUERY_SO_STATISTICS:
 446       stride = 2;
 447       break;
 448    case PIPE_QUERY_PIPELINE_STATISTICS:
 449       stride = 12;
 450       break;
 451    case PIPE_QUERY_TIME_ELAPSED:
 452    case PIPE_QUERY_TIMESTAMP:
 453       qoffset = 8;
 454       /* fallthrough */
 455    default:
 456       assert(index == 0);
 457       stride = 1;
 458       break;
 459    }
 460
 461    if (hq->is64bit || qoffset) {
 462       nouveau_pushbuf_data(push, hq->bo, hq->offset + qoffset + 16 * index,
 463                            8 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 464       if (q->type == PIPE_QUERY_TIMESTAMP) {
 465          PUSH_DATA(push, 0);
 466          PUSH_DATA(push, 0);
 467       } else {
 468          nouveau_pushbuf_data(push, hq->bo, hq->offset + qoffset +
 469                               16 * (index + stride),
 470                               8 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 471       }
 472    } else {
 473       nouveau_pushbuf_data(push, hq->bo, hq->offset + 4,
 474                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 475       PUSH_DATA(push, 0);
 476       nouveau_pushbuf_data(push, hq->bo, hq->offset + 16 + 4,
 477                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 478       PUSH_DATA(push, 0);
 479    }
 480
 481    if (wait || hq->state == NVC0_HW_QUERY_STATE_READY) {
 482       PUSH_DATA(push, 0);
 483       PUSH_DATA(push, 0);
 484    } else if (hq->is64bit) {
 485       PUSH_DATA(push, hq->fence->sequence);
 486       nouveau_pushbuf_data(push, nvc0->screen->fence.bo, 0,
 487                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 488    } else {
 489       PUSH_DATA(push, hq->sequence);
 490       nouveau_pushbuf_data(push, hq->bo, hq->offset,
 491                            4 | NVC0_IB_ENTRY_1_NO_PREFETCH);
 492    }
 493    PUSH_DATAh(push, buf->address + offset);
 494    PUSH_DATA (push, buf->address + offset);
 495
 496    util_range_add(&buf->valid_buffer_range, offset,
 497                   offset + (result_type >= PIPE_QUERY_TYPE_I64 ? 8 : 4));
 498
 499    nvc0_resource_validate(buf, NOUVEAU_BO_WR);
 500 }
 501
 502 static const struct nvc0_query_funcs hw_query_funcs = {
 503    .destroy_query = nvc0_hw_destroy_query,
 504    .begin_query = nvc0_hw_begin_query,
 505    .end_query = nvc0_hw_end_query,
 506    .get_query_result = nvc0_hw_get_query_result,
 507    .get_query_result_resource = nvc0_hw_get_query_result_resource,
 508 };
 509
 510 struct nvc0_query *
 511 nvc0_hw_create_query(struct nvc0_context *nvc0, unsigned type, unsigned index)
 512 {
 513    struct nvc0_hw_query *hq;
 514    struct nvc0_query *q;
 515    unsigned space = NVC0_HW_QUERY_ALLOC_SPACE;
 516
 517    hq = nvc0_hw_sm_create_query(nvc0, type);
 518    if (hq) {
 519       hq->base.funcs = &hw_query_funcs;
 520       return (struct nvc0_query *)hq;
 521    }
 522
 523    hq = nvc0_hw_metric_create_query(nvc0, type);
 524    if (hq) {
 525       hq->base.funcs = &hw_query_funcs;
 526       return (struct nvc0_query *)hq;
 527    }
 528
 529    hq = CALLOC_STRUCT(nvc0_hw_query);
 530    if (!hq)
 531       return NULL;
 532
 533    q = &hq->base;
 534    q->funcs = &hw_query_funcs;
 535    q->type = type;
 536    q->index = index;
 537
 538    switch (q->type) {
 539    case PIPE_QUERY_OCCLUSION_COUNTER:
 540    case PIPE_QUERY_OCCLUSION_PREDICATE:
 541    case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
 542       hq->rotate = 32;
 543       space = NVC0_HW_QUERY_ALLOC_SPACE;
 544       break;
 545    case PIPE_QUERY_PIPELINE_STATISTICS:
 546       hq->is64bit = true;
 547       space = 512;
 548       break;
 549    case PIPE_QUERY_SO_STATISTICS:
 550       hq->is64bit = true;
 551       space = 64;
 552       break;
 553    case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
 554    case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
 555    case PIPE_QUERY_PRIMITIVES_GENERATED:
 556    case PIPE_QUERY_PRIMITIVES_EMITTED:
 557       hq->is64bit = true;
 558       space = 32;
 559       break;
 560    case PIPE_QUERY_TIME_ELAPSED:
 561    case PIPE_QUERY_TIMESTAMP:
 562    case PIPE_QUERY_TIMESTAMP_DISJOINT:
 563    case PIPE_QUERY_GPU_FINISHED:
 564       space = 32;
 565       break;
 566    case NVC0_HW_QUERY_TFB_BUFFER_OFFSET:
 567       space = 16;
 568       break;
 569    default:
 570       debug_printf("invalid query type: %u\n", type);
 571       FREE(q);
 572       return NULL;
 573    }
 574
 575    if (!nvc0_hw_query_allocate(nvc0, q, space)) {
 576       FREE(hq);
 577       return NULL;
 578    }
 579
 580    if (hq->rotate) {
 581       /* we advance before query_begin ! */
 582       hq->offset -= hq->rotate;
 583       hq->data -= hq->rotate / sizeof(*hq->data);
 584    } else
 585    if (!hq->is64bit)
 586       hq->data[0] = 0; /* initialize sequence */
 587
 588    return q;
 589 }
 590
 591 int
 592 nvc0_hw_get_driver_query_info(struct nvc0_screen *screen, unsigned id,
 593                               struct pipe_driver_query_info *info)
 594 {
 595    int num_hw_sm_queries = 0, num_hw_metric_queries = 0;
 596
 597    num_hw_sm_queries = nvc0_hw_sm_get_driver_query_info(screen, 0, NULL);
 598    num_hw_metric_queries =
 599       nvc0_hw_metric_get_driver_query_info(screen, 0, NULL);
 600
 601    if (!info)
 602       return num_hw_sm_queries + num_hw_metric_queries;
 603
 604    if (id < num_hw_sm_queries)
 605       return nvc0_hw_sm_get_driver_query_info(screen, id, info);
 606
 607    return nvc0_hw_metric_get_driver_query_info(screen,
 608                                                id - num_hw_sm_queries, info);
 609 }
 610
 611 void
 612 nvc0_hw_query_pushbuf_submit(struct nouveau_pushbuf *push,
 613                              struct nvc0_query *q, unsigned result_offset)
 614 {
 615    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 616
 617    PUSH_REFN(push, hq->bo, NOUVEAU_BO_RD | NOUVEAU_BO_GART);
 618    nouveau_pushbuf_data(push, hq->bo, hq->offset + result_offset, 4 |
 619                         NVC0_IB_ENTRY_1_NO_PREFETCH);
 620 }
 621
 622 void
 623 nvc0_hw_query_fifo_wait(struct nvc0_context *nvc0, struct nvc0_query *q)
 624 {
 625    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
 626    struct nvc0_hw_query *hq = nvc0_hw_query(q);
 627    unsigned offset = hq->offset;
 628
 629    /* ensure the query's fence has been emitted */
 630    if (hq->is64bit && hq->fence->state < NOUVEAU_FENCE_STATE_EMITTED)
 631       nouveau_fence_emit(hq->fence);
 632
 633    PUSH_SPACE(push, 5);
 634    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
 635    BEGIN_NVC0(push, SUBC_3D(NV84_SUBCHAN_SEMAPHORE_ADDRESS_HIGH), 4);
 636    if (hq->is64bit) {
 637       PUSH_DATAh(push, nvc0->screen->fence.bo->offset);
 638       PUSH_DATA (push, nvc0->screen->fence.bo->offset);
 639       PUSH_DATA (push, hq->fence->sequence);
 640    } else {
 641       PUSH_DATAh(push, hq->bo->offset + offset);
 642       PUSH_DATA (push, hq->bo->offset + offset);
 643       PUSH_DATA (push, hq->sequence);
 644    }
 645    PUSH_DATA (push, (1 << 12) |
 646               NV84_SUBCHAN_SEMAPHORE_TRIGGER_ACQUIRE_GEQUAL);
 647 }