src/gallium/drivers/nouveau/nvc0/nvc0_query_hw.h

   1 #ifndef __NVC0_QUERY_HW_H__
   2 #define __NVC0_QUERY_HW_H__
   3
   4 #include "nouveau_fence.h"
   5 #include "nouveau_mm.h"
   6
   7 #include "nvc0_query.h"
   8
   9 #define NVC0_HW_QUERY_TFB_BUFFER_OFFSET (PIPE_QUERY_TYPES + 0)
  10
  11 struct nvc0_hw_query {
  12    struct nvc0_query base;
  13    uint32_t *data;
  14    int8_t ctr[4];
  15    uint32_t sequence;
  16    struct nouveau_bo *bo;
  17    uint32_t base_offset;
  18    uint32_t offset; /* base_offset + i * rotate */
  19    uint8_t state;
  20    boolean is64bit;
  21    uint8_t rotate;
  22    int nesting; /* only used for occlusion queries */
  23    struct nouveau_mm_allocation *mm;
  24    struct nouveau_fence *fence;
  25 };
  26
  27 static inline struct nvc0_hw_query *
  28 nvc0_hw_query(struct nvc0_query *q)
  29 {
  30    return (struct nvc0_hw_query *)q;
  31 }
  32
  33 /*
  34  * Performance counter queries:
  35  */
  36 #define NVE4_HW_SM_QUERY(i)    (PIPE_QUERY_DRIVER_SPECIFIC + (i))
  37 #define NVE4_HW_SM_QUERY_LAST   NVE4_HW_SM_QUERY(NVE4_HW_SM_QUERY_COUNT - 1)
  38 enum nve4_pm_queries
  39 {
  40    NVE4_HW_SM_QUERY_ACTIVE_CYCLES = 0,
  41    NVE4_HW_SM_QUERY_ACTIVE_WARPS,
  42    NVE4_HW_SM_QUERY_ATOM_COUNT,
  43    NVE4_HW_SM_QUERY_BRANCH,
  44    NVE4_HW_SM_QUERY_DIVERGENT_BRANCH,
  45    NVE4_HW_SM_QUERY_GLD_REQUEST,
  46    NVE4_HW_SM_QUERY_GLD_MEM_DIV_REPLAY,
  47    NVE4_HW_SM_QUERY_GST_TRANSACTIONS,
  48    NVE4_HW_SM_QUERY_GST_MEM_DIV_REPLAY,
  49    NVE4_HW_SM_QUERY_GRED_COUNT,
  50    NVE4_HW_SM_QUERY_GST_REQUEST,
  51    NVE4_HW_SM_QUERY_INST_EXECUTED,
  52    NVE4_HW_SM_QUERY_INST_ISSUED,
  53    NVE4_HW_SM_QUERY_INST_ISSUED1,
  54    NVE4_HW_SM_QUERY_INST_ISSUED2,
  55    NVE4_HW_SM_QUERY_L1_GLD_HIT,
  56    NVE4_HW_SM_QUERY_L1_GLD_MISS,
  57    NVE4_HW_SM_QUERY_L1_LOCAL_LD_HIT,
  58    NVE4_HW_SM_QUERY_L1_LOCAL_LD_MISS,
  59    NVE4_HW_SM_QUERY_L1_LOCAL_ST_HIT,
  60    NVE4_HW_SM_QUERY_L1_LOCAL_ST_MISS,
  61    NVE4_HW_SM_QUERY_L1_SHARED_LD_TRANSACTIONS,
  62    NVE4_HW_SM_QUERY_L1_SHARED_ST_TRANSACTIONS,
  63    NVE4_HW_SM_QUERY_LOCAL_LD,
  64    NVE4_HW_SM_QUERY_LOCAL_LD_TRANSACTIONS,
  65    NVE4_HW_SM_QUERY_LOCAL_ST,
  66    NVE4_HW_SM_QUERY_LOCAL_ST_TRANSACTIONS,
  67    NVE4_HW_SM_QUERY_PROF_TRIGGER_0,
  68    NVE4_HW_SM_QUERY_PROF_TRIGGER_1,
  69    NVE4_HW_SM_QUERY_PROF_TRIGGER_2,
  70    NVE4_HW_SM_QUERY_PROF_TRIGGER_3,
  71    NVE4_HW_SM_QUERY_PROF_TRIGGER_4,
  72    NVE4_HW_SM_QUERY_PROF_TRIGGER_5,
  73    NVE4_HW_SM_QUERY_PROF_TRIGGER_6,
  74    NVE4_HW_SM_QUERY_PROF_TRIGGER_7,
  75    NVE4_HW_SM_QUERY_SHARED_LD,
  76    NVE4_HW_SM_QUERY_SHARED_LD_REPLAY,
  77    NVE4_HW_SM_QUERY_SHARED_ST,
  78    NVE4_HW_SM_QUERY_SHARED_ST_REPLAY,
  79    NVE4_HW_SM_QUERY_SM_CTA_LAUNCHED,
  80    NVE4_HW_SM_QUERY_THREADS_LAUNCHED,
  81    NVE4_HW_SM_QUERY_UNCACHED_GLD_TRANSACTIONS,
  82    NVE4_HW_SM_QUERY_WARPS_LAUNCHED,
  83    NVE4_HW_SM_QUERY_METRIC_IPC,
  84    NVE4_HW_SM_QUERY_METRIC_IPAC,
  85    NVE4_HW_SM_QUERY_METRIC_IPEC,
  86    NVE4_HW_SM_QUERY_METRIC_MP_OCCUPANCY,
  87    NVE4_HW_SM_QUERY_METRIC_MP_EFFICIENCY,
  88    NVE4_HW_SM_QUERY_METRIC_INST_REPLAY_OHEAD,
  89    NVE4_HW_SM_QUERY_COUNT
  90 };
  91
  92 #define NVC0_HW_SM_QUERY(i)    (PIPE_QUERY_DRIVER_SPECIFIC + 2048 + (i))
  93 #define NVC0_HW_SM_QUERY_LAST   NVC0_HW_SM_QUERY(NVC0_HW_SM_QUERY_COUNT - 1)
  94 enum nvc0_pm_queries
  95 {
  96    NVC0_HW_SM_QUERY_ACTIVE_CYCLES = 0,
  97    NVC0_HW_SM_QUERY_ACTIVE_WARPS,
  98    NVC0_HW_SM_QUERY_ATOM_COUNT,
  99    NVC0_HW_SM_QUERY_BRANCH,
 100    NVC0_HW_SM_QUERY_DIVERGENT_BRANCH,
 101    NVC0_HW_SM_QUERY_GLD_REQUEST,
 102    NVC0_HW_SM_QUERY_GRED_COUNT,
 103    NVC0_HW_SM_QUERY_GST_REQUEST,
 104    NVC0_HW_SM_QUERY_INST_EXECUTED,
 105    NVC0_HW_SM_QUERY_INST_ISSUED1_0,
 106    NVC0_HW_SM_QUERY_INST_ISSUED1_1,
 107    NVC0_HW_SM_QUERY_INST_ISSUED2_0,
 108    NVC0_HW_SM_QUERY_INST_ISSUED2_1,
 109    NVC0_HW_SM_QUERY_LOCAL_LD,
 110    NVC0_HW_SM_QUERY_LOCAL_ST,
 111    NVC0_HW_SM_QUERY_PROF_TRIGGER_0,
 112    NVC0_HW_SM_QUERY_PROF_TRIGGER_1,
 113    NVC0_HW_SM_QUERY_PROF_TRIGGER_2,
 114    NVC0_HW_SM_QUERY_PROF_TRIGGER_3,
 115    NVC0_HW_SM_QUERY_PROF_TRIGGER_4,
 116    NVC0_HW_SM_QUERY_PROF_TRIGGER_5,
 117    NVC0_HW_SM_QUERY_PROF_TRIGGER_6,
 118    NVC0_HW_SM_QUERY_PROF_TRIGGER_7,
 119    NVC0_HW_SM_QUERY_SHARED_LD,
 120    NVC0_HW_SM_QUERY_SHARED_ST,
 121    NVC0_HW_SM_QUERY_THREADS_LAUNCHED,
 122    NVC0_HW_SM_QUERY_TH_INST_EXECUTED_0,
 123    NVC0_HW_SM_QUERY_TH_INST_EXECUTED_1,
 124    NVC0_HW_SM_QUERY_TH_INST_EXECUTED_2,
 125    NVC0_HW_SM_QUERY_TH_INST_EXECUTED_3,
 126    NVC0_HW_SM_QUERY_WARPS_LAUNCHED,
 127    NVC0_HW_SM_QUERY_COUNT
 128 };
 129
 130 struct nvc0_query *
 131 nvc0_hw_create_query(struct nvc0_context *, unsigned, unsigned);
 132 void
 133 nvc0_hw_query_pushbuf_submit(struct nouveau_pushbuf *, struct nvc0_query *,
 134                              unsigned);
 135 void
 136 nvc0_hw_query_fifo_wait(struct nouveau_pushbuf *, struct nvc0_query *);
 137
 138 #endif