2 * Copyright 2015 Samuel Pitoiset
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #include "nvc0/nvc0_context.h"
24 #include "nvc0/nvc0_query_hw_metric.h"
25 #include "nvc0/nvc0_query_hw_sm.h"
27 #define _Q(i,n,t,d) { NVC0_HW_METRIC_QUERY_##i, n, PIPE_DRIVER_QUERY_TYPE_##t, d }
28 static const struct nvc0_hw_metric_cfg
{
31 enum pipe_driver_query_type type
;
33 } nvc0_hw_metric_queries
[] = {
34 _Q(ACHIEVED_OCCUPANCY
,
35 "metric-achieved_occupancy",
37 "Ratio of the average active warps per active cycle to the maximum "
38 "number of warps supported on a multiprocessor"),
41 "metric-branch_efficiency",
43 "Ratio of non-divergent branches to total branches"),
48 "The number of instructions issued"),
51 "metric-inst_per_wrap",
53 "Average number of instructions executed by each warp"),
55 _Q(INST_REPLAY_OVERHEAD
,
56 "metric-inst_replay_overhead",
58 "Average number of replays for each instruction executed"),
63 "Instructions issued per cycle"),
68 "The number of issue slots used"),
70 _Q(ISSUE_SLOT_UTILIZATION
,
71 "metric-issue_slot_utilization",
73 "Percentage of issue slots that issued at least one instruction, "
74 "averaged across all cycles"),
79 "Instructions executed per cycle"),
81 _Q(SHARED_REPLAY_OVERHEAD
,
82 "metric-shared_replay_overhead",
84 "Average number of replays due to shared memory conflicts for each "
85 "instruction executed"),
90 static inline const struct nvc0_hw_metric_cfg
*
91 nvc0_hw_metric_get_cfg(unsigned metric_id
)
95 for (i
= 0; i
< ARRAY_SIZE(nvc0_hw_metric_queries
); i
++) {
96 if (nvc0_hw_metric_queries
[i
].id
== metric_id
)
97 return &nvc0_hw_metric_queries
[i
];
103 struct nvc0_hw_metric_query_cfg
{
106 uint32_t num_queries
;
109 #define _SM(n) NVC0_HW_SM_QUERY(NVC0_HW_SM_QUERY_ ##n)
111 /* ==== Compute capability 2.0 (GF100/GF110) ==== */
112 static const struct nvc0_hw_metric_query_cfg
113 sm20_achieved_occupancy
=
115 .type
= NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY
,
116 .queries
[0] = _SM(ACTIVE_WARPS
),
117 .queries
[1] = _SM(ACTIVE_CYCLES
),
121 static const struct nvc0_hw_metric_query_cfg
122 sm20_branch_efficiency
=
124 .type
= NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY
,
125 .queries
[0] = _SM(BRANCH
),
126 .queries
[1] = _SM(DIVERGENT_BRANCH
),
130 static const struct nvc0_hw_metric_query_cfg
133 .type
= NVC0_HW_METRIC_QUERY_INST_PER_WRAP
,
134 .queries
[0] = _SM(INST_EXECUTED
),
135 .queries
[1] = _SM(WARPS_LAUNCHED
),
139 static const struct nvc0_hw_metric_query_cfg
140 sm20_inst_replay_overhead
=
142 .type
= NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
,
143 .queries
[0] = _SM(INST_ISSUED
),
144 .queries
[1] = _SM(INST_EXECUTED
),
148 static const struct nvc0_hw_metric_query_cfg
151 .type
= NVC0_HW_METRIC_QUERY_ISSUED_IPC
,
152 .queries
[0] = _SM(INST_ISSUED
),
153 .queries
[1] = _SM(ACTIVE_CYCLES
),
157 static const struct nvc0_hw_metric_query_cfg
158 sm20_issue_slot_utilization
=
160 .type
= NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
,
161 .queries
[0] = _SM(INST_ISSUED
),
162 .queries
[1] = _SM(ACTIVE_CYCLES
),
166 static const struct nvc0_hw_metric_query_cfg
169 .type
= NVC0_HW_METRIC_QUERY_IPC
,
170 .queries
[0] = _SM(INST_EXECUTED
),
171 .queries
[1] = _SM(ACTIVE_CYCLES
),
175 static const struct nvc0_hw_metric_query_cfg
*sm20_hw_metric_queries
[] =
177 &sm20_achieved_occupancy
,
178 &sm20_branch_efficiency
,
180 &sm20_inst_replay_overhead
,
183 &sm20_issue_slot_utilization
,
186 /* ==== Compute capability 2.1 (GF108+ except GF110) ==== */
187 static const struct nvc0_hw_metric_query_cfg
190 .type
= NVC0_HW_METRIC_QUERY_INST_ISSUED
,
191 .queries
[0] = _SM(INST_ISSUED1_0
),
192 .queries
[1] = _SM(INST_ISSUED1_1
),
193 .queries
[2] = _SM(INST_ISSUED2_0
),
194 .queries
[3] = _SM(INST_ISSUED2_1
),
198 static const struct nvc0_hw_metric_query_cfg
199 sm21_inst_replay_overhead
=
201 .type
= NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
,
202 .queries
[0] = _SM(INST_ISSUED1_0
),
203 .queries
[1] = _SM(INST_ISSUED1_1
),
204 .queries
[2] = _SM(INST_ISSUED2_0
),
205 .queries
[3] = _SM(INST_ISSUED2_1
),
206 .queries
[4] = _SM(INST_EXECUTED
),
210 static const struct nvc0_hw_metric_query_cfg
213 .type
= NVC0_HW_METRIC_QUERY_ISSUED_IPC
,
214 .queries
[0] = _SM(INST_ISSUED1_0
),
215 .queries
[1] = _SM(INST_ISSUED1_1
),
216 .queries
[2] = _SM(INST_ISSUED2_0
),
217 .queries
[3] = _SM(INST_ISSUED2_1
),
218 .queries
[4] = _SM(ACTIVE_CYCLES
),
222 static const struct nvc0_hw_metric_query_cfg
225 .type
= NVC0_HW_METRIC_QUERY_ISSUE_SLOTS
,
226 .queries
[0] = _SM(INST_ISSUED1_0
),
227 .queries
[1] = _SM(INST_ISSUED1_1
),
228 .queries
[2] = _SM(INST_ISSUED2_0
),
229 .queries
[3] = _SM(INST_ISSUED2_1
),
233 static const struct nvc0_hw_metric_query_cfg
234 sm21_issue_slot_utilization
=
236 .type
= NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
,
237 .queries
[0] = _SM(INST_ISSUED1_0
),
238 .queries
[1] = _SM(INST_ISSUED1_1
),
239 .queries
[2] = _SM(INST_ISSUED2_0
),
240 .queries
[3] = _SM(INST_ISSUED2_1
),
241 .queries
[4] = _SM(ACTIVE_CYCLES
),
245 static const struct nvc0_hw_metric_query_cfg
*sm21_hw_metric_queries
[] =
247 &sm20_achieved_occupancy
,
248 &sm20_branch_efficiency
,
251 &sm21_inst_replay_overhead
,
255 &sm21_issue_slot_utilization
,
258 /* ==== Compute capability 3.0 (GK104/GK106/GK107) ==== */
259 static const struct nvc0_hw_metric_query_cfg
262 .type
= NVC0_HW_METRIC_QUERY_INST_ISSUED
,
263 .queries
[0] = _SM(INST_ISSUED1
),
264 .queries
[1] = _SM(INST_ISSUED2
),
268 static const struct nvc0_hw_metric_query_cfg
269 sm30_inst_replay_overhead
=
271 .type
= NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
,
272 .queries
[0] = _SM(INST_ISSUED1
),
273 .queries
[1] = _SM(INST_ISSUED2
),
274 .queries
[2] = _SM(INST_EXECUTED
),
278 static const struct nvc0_hw_metric_query_cfg
281 .type
= NVC0_HW_METRIC_QUERY_ISSUED_IPC
,
282 .queries
[0] = _SM(INST_ISSUED1
),
283 .queries
[1] = _SM(INST_ISSUED2
),
284 .queries
[2] = _SM(ACTIVE_CYCLES
),
288 static const struct nvc0_hw_metric_query_cfg
291 .type
= NVC0_HW_METRIC_QUERY_ISSUE_SLOTS
,
292 .queries
[0] = _SM(INST_ISSUED1
),
293 .queries
[1] = _SM(INST_ISSUED2
),
297 static const struct nvc0_hw_metric_query_cfg
298 sm30_issue_slot_utilization
=
300 .type
= NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
,
301 .queries
[0] = _SM(INST_ISSUED1
),
302 .queries
[1] = _SM(INST_ISSUED2
),
303 .queries
[2] = _SM(ACTIVE_CYCLES
),
307 static const struct nvc0_hw_metric_query_cfg
308 sm30_shared_replay_overhead
=
310 .type
= NVC0_HW_METRIC_QUERY_SHARED_REPLAY_OVERHEAD
,
311 .queries
[0] = _SM(SHARED_LD_REPLAY
),
312 .queries
[1] = _SM(SHARED_ST_REPLAY
),
313 .queries
[2] = _SM(INST_EXECUTED
),
317 static const struct nvc0_hw_metric_query_cfg
*sm30_hw_metric_queries
[] =
319 &sm20_achieved_occupancy
,
320 &sm20_branch_efficiency
,
323 &sm30_inst_replay_overhead
,
327 &sm30_issue_slot_utilization
,
328 &sm30_shared_replay_overhead
,
331 /* ==== Compute capability 3.5 (GK110) ==== */
332 static const struct nvc0_hw_metric_query_cfg
*sm35_hw_metric_queries
[] =
334 &sm20_achieved_occupancy
,
337 &sm30_inst_replay_overhead
,
341 &sm30_issue_slot_utilization
,
342 &sm30_shared_replay_overhead
,
347 static inline const struct nvc0_hw_metric_query_cfg
**
348 nvc0_hw_metric_get_queries(struct nvc0_screen
*screen
)
350 struct nouveau_device
*dev
= screen
->base
.device
;
352 switch (screen
->base
.class_3d
) {
354 return sm35_hw_metric_queries
;
356 return sm30_hw_metric_queries
;
358 if (dev
->chipset
== 0xc0 || dev
->chipset
== 0xc8)
359 return sm20_hw_metric_queries
;
360 return sm21_hw_metric_queries
;
367 nvc0_hw_metric_get_num_queries(struct nvc0_screen
*screen
)
369 struct nouveau_device
*dev
= screen
->base
.device
;
371 switch (screen
->base
.class_3d
) {
373 return ARRAY_SIZE(sm35_hw_metric_queries
);
375 return ARRAY_SIZE(sm30_hw_metric_queries
);
377 if (dev
->chipset
== 0xc0 || dev
->chipset
== 0xc8)
378 return ARRAY_SIZE(sm20_hw_metric_queries
);
379 return ARRAY_SIZE(sm21_hw_metric_queries
);
384 static const struct nvc0_hw_metric_query_cfg
*
385 nvc0_hw_metric_query_get_cfg(struct nvc0_context
*nvc0
, struct nvc0_hw_query
*hq
)
387 const struct nvc0_hw_metric_query_cfg
**queries
;
388 struct nvc0_screen
*screen
= nvc0
->screen
;
389 struct nvc0_query
*q
= &hq
->base
;
390 unsigned num_queries
;
393 num_queries
= nvc0_hw_metric_get_num_queries(screen
);
394 queries
= nvc0_hw_metric_get_queries(screen
);
396 for (i
= 0; i
< num_queries
; i
++) {
397 if (NVC0_HW_METRIC_QUERY(queries
[i
]->type
) == q
->type
)
405 nvc0_hw_metric_destroy_query(struct nvc0_context
*nvc0
,
406 struct nvc0_hw_query
*hq
)
408 struct nvc0_hw_metric_query
*hmq
= nvc0_hw_metric_query(hq
);
411 for (i
= 0; i
< hmq
->num_queries
; i
++)
412 if (hmq
->queries
[i
]->funcs
->destroy_query
)
413 hmq
->queries
[i
]->funcs
->destroy_query(nvc0
, hmq
->queries
[i
]);
418 nvc0_hw_metric_begin_query(struct nvc0_context
*nvc0
, struct nvc0_hw_query
*hq
)
420 struct nvc0_hw_metric_query
*hmq
= nvc0_hw_metric_query(hq
);
424 for (i
= 0; i
< hmq
->num_queries
; i
++) {
425 ret
= hmq
->queries
[i
]->funcs
->begin_query(nvc0
, hmq
->queries
[i
]);
433 nvc0_hw_metric_end_query(struct nvc0_context
*nvc0
, struct nvc0_hw_query
*hq
)
435 struct nvc0_hw_metric_query
*hmq
= nvc0_hw_metric_query(hq
);
438 for (i
= 0; i
< hmq
->num_queries
; i
++)
439 hmq
->queries
[i
]->funcs
->end_query(nvc0
, hmq
->queries
[i
]);
443 sm20_hw_metric_calc_result(struct nvc0_hw_query
*hq
, uint64_t res64
[8])
445 switch (hq
->base
.type
- NVC0_HW_METRIC_QUERY(0)) {
446 case NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY
:
447 /* ((active_warps / active_cycles) / max. number of warps on a MP) * 100 */
449 return ((res64
[0] / (double)res64
[1]) / 48) * 100;
451 case NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY
:
452 /* (branch / (branch + divergent_branch)) * 100 */
453 if (res64
[0] + res64
[1])
454 return (res64
[0] / (double)(res64
[0] + res64
[1])) * 100;
456 case NVC0_HW_METRIC_QUERY_INST_PER_WRAP
:
457 /* inst_executed / warps_launched */
459 return res64
[0] / (double)res64
[1];
461 case NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
:
462 /* (inst_issued - inst_executed) / inst_executed */
464 return (res64
[0] - res64
[1]) / (double)res64
[1];
466 case NVC0_HW_METRIC_QUERY_ISSUED_IPC
:
467 /* inst_issued / active_cycles */
469 return res64
[0] / (double)res64
[1];
471 case NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
:
472 /* ((inst_issued / 2) / active_cycles) * 100 */
474 return ((res64
[0] / 2) / (double)res64
[1]) * 100;
476 case NVC0_HW_METRIC_QUERY_IPC
:
477 /* inst_executed / active_cycles */
479 return res64
[0] / (double)res64
[1];
482 debug_printf("invalid metric type: %d\n",
483 hq
->base
.type
- NVC0_HW_METRIC_QUERY(0));
490 sm21_hw_metric_calc_result(struct nvc0_hw_query
*hq
, uint64_t res64
[8])
492 switch (hq
->base
.type
- NVC0_HW_METRIC_QUERY(0)) {
493 case NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY
:
494 return sm20_hw_metric_calc_result(hq
, res64
);
495 case NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY
:
496 return sm20_hw_metric_calc_result(hq
, res64
);
497 case NVC0_HW_METRIC_QUERY_INST_ISSUED
:
498 /* issued1_0 + issued1_1 + (issued2_0 + issued2_1) * 2 */
499 return res64
[0] + res64
[1] + (res64
[2] + res64
[3]) * 2;
501 case NVC0_HW_METRIC_QUERY_INST_PER_WRAP
:
502 return sm20_hw_metric_calc_result(hq
, res64
);
503 case NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
:
504 /* (metric-inst_issued - inst_executed) / inst_executed */
506 return (((res64
[0] + res64
[1] + (res64
[2] + res64
[3]) * 2) -
507 res64
[4]) / (double)res64
[4]);
509 case NVC0_HW_METRIC_QUERY_ISSUED_IPC
:
510 /* metric-inst_issued / active_cycles */
512 return (res64
[0] + res64
[1] + (res64
[2] + res64
[3]) * 2) /
515 case NVC0_HW_METRIC_QUERY_ISSUE_SLOTS
:
516 /* issued1_0 + issued1_1 + issued2_0 + issued2_1 */
517 return res64
[0] + res64
[1] + res64
[2] + res64
[3];
519 case NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
:
520 /* ((metric-issue_slots / 2) / active_cycles) * 100 */
522 return (((res64
[0] + res64
[1] + res64
[2] + res64
[3]) / 2) /
523 (double)res64
[4]) * 100;
525 case NVC0_HW_METRIC_QUERY_IPC
:
526 return sm20_hw_metric_calc_result(hq
, res64
);
528 debug_printf("invalid metric type: %d\n",
529 hq
->base
.type
- NVC0_HW_METRIC_QUERY(0));
536 sm30_hw_metric_calc_result(struct nvc0_hw_query
*hq
, uint64_t res64
[8])
538 switch (hq
->base
.type
- NVC0_HW_METRIC_QUERY(0)) {
539 case NVC0_HW_METRIC_QUERY_ACHIEVED_OCCUPANCY
:
540 /* ((active_warps / active_cycles) / max. number of warps on a MP) * 100 */
542 return ((res64
[0] / (double)res64
[1]) / 64) * 100;
544 case NVC0_HW_METRIC_QUERY_BRANCH_EFFICIENCY
:
545 return sm20_hw_metric_calc_result(hq
, res64
);
546 case NVC0_HW_METRIC_QUERY_INST_ISSUED
:
547 /* inst_issued1 + inst_issued2 * 2 */
548 return res64
[0] + res64
[1] * 2;
549 case NVC0_HW_METRIC_QUERY_INST_PER_WRAP
:
550 return sm20_hw_metric_calc_result(hq
, res64
);
551 case NVC0_HW_METRIC_QUERY_INST_REPLAY_OVERHEAD
:
552 /* (metric-inst_issued - inst_executed) / inst_executed */
554 return (((res64
[0] + res64
[1] * 2) - res64
[2]) / (double)res64
[2]);
556 case NVC0_HW_METRIC_QUERY_ISSUED_IPC
:
557 /* metric-inst_issued / active_cycles */
559 return (res64
[0] + res64
[1] * 2) / (double)res64
[2];
561 case NVC0_HW_METRIC_QUERY_ISSUE_SLOTS
:
562 /* inst_issued1 + inst_issued2 */
563 return res64
[0] + res64
[1];
564 case NVC0_HW_METRIC_QUERY_ISSUE_SLOT_UTILIZATION
:
565 /* ((metric-issue_slots / 2) / active_cycles) * 100 */
567 return (((res64
[0] + res64
[1]) / 2) / (double)res64
[2]) * 100;
569 case NVC0_HW_METRIC_QUERY_IPC
:
570 return sm20_hw_metric_calc_result(hq
, res64
);
571 case NVC0_HW_METRIC_QUERY_SHARED_REPLAY_OVERHEAD
:
572 /* (shared_load_replay + shared_store_replay) / inst_executed */
574 return (res64
[0] + res64
[1]) / (double)res64
[2];
577 debug_printf("invalid metric type: %d\n",
578 hq
->base
.type
- NVC0_HW_METRIC_QUERY(0));
585 nvc0_hw_metric_get_query_result(struct nvc0_context
*nvc0
,
586 struct nvc0_hw_query
*hq
, boolean wait
,
587 union pipe_query_result
*result
)
589 struct nvc0_hw_metric_query
*hmq
= nvc0_hw_metric_query(hq
);
590 struct nvc0_screen
*screen
= nvc0
->screen
;
591 struct nouveau_device
*dev
= screen
->base
.device
;
592 union pipe_query_result results
[8] = {};
593 uint64_t res64
[8] = {};
598 for (i
= 0; i
< hmq
->num_queries
; i
++) {
599 ret
= hmq
->queries
[i
]->funcs
->get_query_result(nvc0
, hmq
->queries
[i
],
603 res64
[i
] = *(uint64_t *)&results
[i
];
606 switch (screen
->base
.class_3d
) {
609 value
= sm30_hw_metric_calc_result(hq
, res64
);
612 if (dev
->chipset
== 0xc0 || dev
->chipset
== 0xc8)
613 value
= sm20_hw_metric_calc_result(hq
, res64
);
615 value
= sm21_hw_metric_calc_result(hq
, res64
);
619 *(uint64_t *)result
= value
;
623 static const struct nvc0_hw_query_funcs hw_metric_query_funcs
= {
624 .destroy_query
= nvc0_hw_metric_destroy_query
,
625 .begin_query
= nvc0_hw_metric_begin_query
,
626 .end_query
= nvc0_hw_metric_end_query
,
627 .get_query_result
= nvc0_hw_metric_get_query_result
,
630 struct nvc0_hw_query
*
631 nvc0_hw_metric_create_query(struct nvc0_context
*nvc0
, unsigned type
)
633 const struct nvc0_hw_metric_query_cfg
*cfg
;
634 struct nvc0_hw_metric_query
*hmq
;
635 struct nvc0_hw_query
*hq
;
638 if (type
< NVC0_HW_METRIC_QUERY(0) || type
> NVC0_HW_METRIC_QUERY_LAST
)
641 hmq
= CALLOC_STRUCT(nvc0_hw_metric_query
);
646 hq
->funcs
= &hw_metric_query_funcs
;
647 hq
->base
.type
= type
;
649 cfg
= nvc0_hw_metric_query_get_cfg(nvc0
, hq
);
651 for (i
= 0; i
< cfg
->num_queries
; i
++) {
652 hmq
->queries
[i
] = nvc0_hw_sm_create_query(nvc0
, cfg
->queries
[i
]);
653 if (!hmq
->queries
[i
]) {
654 nvc0_hw_metric_destroy_query(nvc0
, hq
);
664 nvc0_hw_metric_get_driver_query_info(struct nvc0_screen
*screen
, unsigned id
,
665 struct pipe_driver_query_info
*info
)
669 if (screen
->base
.drm
->version
>= 0x01000101) {
671 count
= nvc0_hw_metric_get_num_queries(screen
);
678 if (screen
->compute
) {
679 if (screen
->base
.class_3d
<= NVF0_3D_CLASS
) {
680 const struct nvc0_hw_metric_query_cfg
**queries
=
681 nvc0_hw_metric_get_queries(screen
);
682 const struct nvc0_hw_metric_cfg
*cfg
=
683 nvc0_hw_metric_get_cfg(queries
[id
]->type
);
685 info
->name
= cfg
->name
;
686 info
->query_type
= NVC0_HW_METRIC_QUERY(queries
[id
]->type
);
687 info
->type
= cfg
->type
;
688 info
->group_id
= NVC0_HW_METRIC_QUERY_GROUP
;